JP2009075942A5 - - Google Patents

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Publication number
JP2009075942A5
JP2009075942A5 JP2007245471A JP2007245471A JP2009075942A5 JP 2009075942 A5 JP2009075942 A5 JP 2009075942A5 JP 2007245471 A JP2007245471 A JP 2007245471A JP 2007245471 A JP2007245471 A JP 2007245471A JP 2009075942 A5 JP2009075942 A5 JP 2009075942A5
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2007245471A
Other languages
Japanese (ja)
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JP2009075942A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2007245471A priority Critical patent/JP2009075942A/ja
Priority claimed from JP2007245471A external-priority patent/JP2009075942A/ja
Publication of JP2009075942A publication Critical patent/JP2009075942A/ja
Publication of JP2009075942A5 publication Critical patent/JP2009075942A5/ja
Withdrawn legal-status Critical Current

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JP2007245471A 2007-09-21 2007-09-21 Ｄｍａコントローラ Withdrawn JP2009075942A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007245471A JP2009075942A (ja) 2007-09-21 2007-09-21 Ｄｍａコントローラ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007245471A JP2009075942A (ja) 2007-09-21 2007-09-21 Ｄｍａコントローラ

Publications (2)

Publication Number Publication Date
JP2009075942A JP2009075942A (ja) 2009-04-09
JP2009075942A5 true JP2009075942A5 (enExample) 2010-04-08

Family

ID=40610832

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007245471A Withdrawn JP2009075942A (ja) 2007-09-21 2007-09-21 Ｄｍａコントローラ

Country Status (1)

Country Link
JP (1) JP2009075942A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9904645B2 (en) * 2014-10-31 2018-02-27 Texas Instruments Incorporated Multicore bus architecture with non-blocking high performance transaction credit system
JP6886301B2 (ja) 2017-01-26 2021-06-16 キヤノン株式会社 メモリアクセスシステム、その制御方法、プログラム、及び画像形成装置

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