JP2009069854A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a lateral electric field driven semi-transmissive liquid crystal display device for electrically compensating difference between operation modes in a transmissive region and a reflective region, and which is excellent in the display quality. <P>SOLUTION: A unit display region includes: (A) a first pixel electrode and a first counter electrode for composing the reflective display region; (B) a first retention capacity for retaining a voltage difference between the first pixel electrode and the first counter electrode; (C) a second pixel electrode and a second counter electrode for composing the transmissive display region; and (D) a second retention capacity for retaining a voltage difference between the second pixel electrode and the second counter electrode. A first voltage is applied to the first counter electrode. A second voltage is different from the first voltage, and applied to the second counter electrode. V<SB>1</SB>represents the first voltage. V<SB>2</SB>represents the second voltage. Hi (V<SB>1</SB>, V<SB>2</SB>) represents a higher voltage among the first and second voltage V<SB>1</SB>, V<SB>2</SB>. Low (V<SB>1</SB>, V<SB>2</SB>) represents a lower voltage among the first and second voltage V<SB>1</SB>, V<SB>2</SB>. A third voltage is Hi (V<SB>1</SB>, V<SB>2</SB>) or less and Low (V<SB>1</SB>, V<SB>2</SB>) or more, and applied to the first and second pixel electrodes. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a liquid crystal display device, and more particularly, to a transflective liquid crystal display device having a reflective display area for displaying by reflecting external light and a transmissive display area for transmitting light from the back.

  A reflection type liquid crystal display device that reflects external light by a reflector provided in a pixel and does not need to include an illumination device, and a transmission type liquid crystal display device that includes a backlight as the illumination device are known.

  Since the reflective liquid crystal display device can display using external light, low power consumption, thinning, and weight reduction can be achieved. For example, the reflective liquid crystal display device is used for a portable terminal. On the other hand, since the transmissive liquid crystal display device includes a backlight, it has a characteristic that visibility is good even in a dark environment.

  Further, as a liquid crystal display device having the advantages of both a reflective liquid crystal display device and a transmissive liquid crystal display device, a reflective display region is provided within one pixel (or within one sub-pixel in a color display liquid crystal display device). There has been proposed a transflective liquid crystal display device having both (hereinafter simply referred to as a reflective region) and a transmissive display region (hereinafter simply referred to as a transmissive region). In the transflective liquid crystal display device, light reciprocates in the liquid crystal layer in the reflection region, and light from the illumination device passes through the liquid crystal layer in the transmission region. For this reason, it is also proposed to eliminate the difference in retardation (phase difference) due to the difference in the light path length in the liquid crystal layer by providing a difference in the thickness of the liquid crystal layer between the reflective region and the transmissive region. (For example, refer to Japanese Patent No. 2955277 (Patent Document 1)).

  Further, as a liquid crystal display device, in addition to a vertical electric field drive type liquid crystal display device that performs display by rotating the direction of the molecular axis of the aligned liquid crystal molecules (also referred to as “director”) in a plane orthogonal to the substrate, the substrate A lateral electric field drive type liquid crystal display device that performs display by rotating in a plane parallel to the surface is well known. In a lateral electric field drive type liquid crystal display device such as an in-plane switching (IPS) method, an electric field is applied to a liquid crystal layer sandwiched between opposing substrates, and liquid crystal molecules are parallel to the substrate. The image is displayed by rotating in a plane.

  In a horizontal electric field drive type liquid crystal display device, for example, a transmission type IPS liquid crystal display device, the liquid crystal layer is arranged between two polarizing plates arranged in crossed Nicols. In the case of so-called normally black, the direction of the polarization axis of one polarizing plate and the director substantially coincide with each other when no electric field is applied to the liquid crystal layer, and when the electric field is applied to the liquid crystal layer, An angle of about 45 degrees is formed. In the state where no electric field is applied to the liquid crystal layer, the light incident on the incident-side polarizing plate reaches the output-side polarizing plate with almost no retardation by the liquid crystal layer, and is absorbed by the output-side polarizing plate. (Black display). Therefore, the black display state can be almost equivalent to an ideal crossed Nicol that does not sandwich the liquid crystal layer. On the other hand, when an electric field is applied to the liquid crystal layer, the director forms an angle of approximately 45 degrees with respect to the linearly polarized light transmitted through the incident-side polarizing plate. At this time, the liquid crystal layer acts as a half-wave plate and rotates the vibration direction of the linearly polarized light by 90 degrees. Thereby, the light which has passed through the liquid crystal layer is transmitted through the polarizing plate on the emission side (white display state).

  The IPS liquid crystal display device is known to have a wide viewing angle characteristic. Further, as described above, the black display state is almost equivalent to the ideal crossed Nicol state in which the liquid crystal layer is not sandwiched. Accordingly, high-contrast image display is possible.

  However, if the transflective liquid crystal display device is simply a lateral electric field drive type, normally black in the transmissive region and normally white in the reflective region, causing the problem that the operation modes do not match. Hereinafter, description will be given with reference to the drawings.

  29A to 29D are schematic diagrams in the case where both the reflective region and the transmissive region of the transflective liquid crystal display device are of a lateral electric field drive type. 29A shows the arrangement of the constituent members, FIG. 29B shows the polarization axis of the upper polarizing plate 51 and the molecular axes of the liquid crystal molecules 31 constituting the liquid crystal layer 30 when viewed from the upper substrate 40 side. 29C and 29D show the operation of the transflective liquid crystal display device, respectively.

  As shown in FIG. 29A, the transflective liquid crystal display device includes a lower substrate 10, an upper substrate 40, a liquid crystal layer 30 sandwiched between the two substrates, an outer side of the lower substrate 10 (a backlight 60 described later). A lower polarizing plate 50 disposed on the side) and an upper polarizing plate 51 disposed outside the upper substrate 40. A lower alignment film 23 is formed on the lower substrate 10, and an upper alignment film 43 is formed on the upper substrate 40. The liquid crystal layer 30 is in contact with the lower alignment film 23 and the upper alignment film 43. These alignment films define the direction of the molecular axes (initial alignment direction) of the liquid crystal molecules 31 when no electric field is applied. Reference numeral 60 is a backlight for irradiating the transflective liquid crystal display device from the back, reference numeral 41 is a so-called black matrix, and reference numeral 42 is a color filter. Depending on the type of the transflective liquid crystal display device, the black matrix and the color filter are omitted.

  A first insulating film 13A and a second insulating film 13B are stacked on the liquid crystal layer 30 side of the lower substrate 10. A transistor 14 (not shown) is formed between the first insulating film 13A and the second insulating film 13B. A video signal line 15 is formed on the second insulating film 13B. Specifically, the video signal line 15 is connected to one source / drain electrode of the transistor 14, and the other source / drain electrode has a first pixel electrode (reflection area pixel electrode) 20A (described later) and a second electrode. A pixel electrode (transmission region pixel electrode) 20B is connected. The transistor 14 operates according to the signal of the scanning signal line 11 (not shown). When the transistor 14 is turned on, a predetermined voltage is applied to the first pixel electrode 20A and the second pixel electrode 20B via the video signal line 15 from a video signal drive circuit (not shown).

  A first interlayer insulating layer 16 (16A, 16B) is formed on the second insulating film 13B. Concavities and convexities are formed on the surface of the first interlayer insulating layer 16A in the reflective region, and the reflective plate 17 is formed on the surface. A second interlayer insulating layer 18 is formed on the reflection plate 17. A first pixel electrode 20 </ b> A and a first counter electrode 21 extending in the Y direction and parallel to each other are formed on the second interlayer insulating layer 18. Is formed. The liquid crystal layer 30 in the reflection region is driven by an electric field in the X direction formed between the first pixel electrode 20A and the first counter electrode 21. On the other hand, a second pixel electrode 20B and a second counter electrode 22 extending in the Y direction and parallel to each other are formed on the first interlayer insulating layer 16B in the transmissive region, and the second pixel electrode 20B and the second counter electrode 22 are formed. The liquid crystal layer 30 in the transmissive region is driven by the electric field in the X direction formed between the two.

  The first pixel electrode 20A and the second pixel electrode 20B are electrically connected to each other, and the same voltage is applied. The first counter electrode 21 and the second counter electrode 22 are electrically connected to each other, and the same voltage is applied. The second interlayer insulating layer 18 is set to a thickness such that the thickness DB of the liquid crystal layer 30 in the transmissive region is approximately twice the thickness DA of the liquid crystal layer 30 in the reflective region. The liquid crystal layer 30 functions as a half-wave plate in the transmission region and as a quarter-wave plate in the reflection region.

  As shown in FIG. 29B, the polarization axis of the lower polarizing plate 50 is an angle of 45 degrees with respect to the X axis, the polarization axis of the upper polarizing plate 51 is an angle of 135 degrees with respect to the X axis, The molecular axis of the liquid crystal molecules 31 constituting the liquid crystal layer 30 in the state where no electric field is formed between the electrode 21 and the first pixel electrode 20A and between the second counter electrode 22 and the second pixel electrode 20B is the X axis. It is assumed that the angle is set to 45 degrees. The liquid crystal molecules 31 are rotated along the X direction by the electric field in the X direction formed between the pixel electrode 20A and the counter electrode 21 and the electric field in the X direction formed between the pixel electrode 20B and the counter electrode 22. To do. The degree of rotation of the liquid crystal molecules 31 changes according to the strength of the electric field (in other words, the absolute value of the potential difference between the pixel electrode and the counter electrode).

  Referring to FIG. 29C, there is no potential difference between the first pixel electrode 20A and the first counter electrode 21 and between the second pixel electrode 20B and the second counter electrode 22 (in other words, Operation in a state where no electric field is applied to the liquid crystal layer). In the reflection region, external light passes through the upper polarizing plate 51 and becomes linearly polarized light having an angle of 135 degrees with respect to the X axis (1 → 2 → 3), and is reflected by the reflecting plate 17 after passing through the liquid crystal layer 30. (4 → 5 → 6 → 7), and further passes through the liquid crystal layer 30 and remains as linearly polarized light having an angle of 135 degrees, and is incident on the upper polarizing plate 51, so that white display is obtained (8 → 9 → 10 → 11). Becomes Marie White. On the other hand, in the transmissive region, the light irradiated from the back surface passes through the lower polarizing plate 50 and becomes linearly polarized light having an angle of 45 degrees (1 → 2 → 3), and passes through the liquid crystal layer 30 and has an angle of 45 degrees. Since the linearly polarized light thus formed is incident on the upper polarizing plate 51, the display becomes black (4 → 5 → 6 → 7), so-called normally black.

  Referring to FIG. 29D, there is a potential difference between the first pixel electrode 20A and the first counter electrode 21 and between the second pixel electrode 20B and the second counter electrode 22 (in other words, Operation in a state where an electric field is applied to the liquid crystal layer). In the reflection region, external light passes through the upper polarizing plate 51 and becomes linearly polarized light having an angle of 135 degrees with respect to the X axis (1 → 2 → 3), and passes through the liquid crystal layer 30 and becomes clockwise circular deflection. (4 → 5), then reflected by the reflecting plate 17 to become counterclockwise circular deflection (6 → 7), and further passes through the liquid crystal layer 30 to become linearly polarized light having an angle of 45 degrees (8 → 9). The light enters the upper polarizing plate 51 and is in a black display state (10 → 11). On the other hand, in the transmissive region, the light irradiated from the back surface passes through the lower polarizing plate 50 and becomes linearly polarized light having an angle of 45 degrees (1 → 2 → 3), passes through the liquid crystal layer 30 and has an angle of 135 degrees. The linearly polarized light thus formed (4 → 5) is incident on the upper polarizing plate 51 to be in a white display state (6 → 7).

  In order to solve the above-described problem, a ½ wavelength plate is provided between the lower polarizing plate and the liquid crystal layer, and the liquid crystal layer in the transmissive region functions as a ½ wavelength plate without applying a voltage. There has been proposed a configuration in which the reflection region is normally black (see Japanese Patent Application Laid-Open No. 2003-344837 (Patent Document 2)). Further, a configuration in which different initial orientation directions are given to liquid crystal molecules in the reflective region and the transmissive region (Japanese Patent Laid-Open No. 2005-338264 (Patent Document 3)), and a configuration in which a retardation plate is provided only in the reflective region (Japanese Patent Laid-Open No. 2006-2006). No. 171376 (Patent Document 4) has also been proposed. Although not mentioned above, the structure in which two transistors are provided in one pixel and different voltages are applied to the liquid crystal layer in the transmissive region and the reflective region (Japanese Patent Laid-Open No. 2003-295159 (Patent Document) 5)) has also been proposed.

Japanese Patent No. 2955277 JP 2003-344837 A JP 2005-338264 A JP 2006-171376 A JP 2003-295159 A

  In the liquid crystal display device disclosed in Patent Document 1, the black display state in the transmissive region is performed using the phase difference of the liquid crystal layer. For this reason, the state of black display is not close to an ideal crossed Nicol state that does not sandwich the liquid crystal layer, and the contrast performance decreases. According to the configurations disclosed in Patent Documents 2 to 4, the black display state in the transmissive region can be close to an ideal crossed Nicol state, both of which are the structure and manufacturing process of the liquid crystal display device. Becomes complicated, and issues remain in mass productivity and reliability. Even in the configuration disclosed in Patent Document 5, it is impossible to avoid a decrease in the aperture ratio due to an increase in the transistor region in the liquid crystal display device and an increase in the video signal lines and the scanning signal lines, and problems remain in mass productivity and reliability. .

  Accordingly, an object of the present invention is to provide a transflective liquid crystal display device that can electrically compensate for a difference in operation mode between a transmissive region and a reflective region with a simple configuration. It is another object of the present invention to provide a transflective liquid crystal display device which can obtain a good black display state in the transmissive region and has high contrast and excellent display quality.

In order to achieve the above object, a transflective liquid crystal display device of a lateral electric field drive type according to the present invention,
(A) M scanning signal lines extending in the first direction and having one end connected to the scanning signal driving circuit;
(B) N video signal lines extending in the second direction and having one end connected to the video signal driving circuit;
(C) a switching element disposed at an intersection between the scanning signal line and the video signal line and operating in accordance with the scanning signal of the scanning signal line
(D) a unit display area having a reflective display area and a transmissive display area provided corresponding to each switching element;
A transflective liquid crystal display device of a lateral electric field drive type comprising:
In the unit display area,
(A) a first pixel electrode and a first counter electrode constituting a reflective display area;
(B) a first holding capacitor for holding a potential difference between the first pixel electrode and the first counter electrode;
(C) a second pixel electrode and a second counter electrode constituting a transmissive display area, and
(D) a second storage capacitor for holding a potential difference between the second pixel electrode and the second counter electrode;
Is provided,
A first voltage is applied to the first counter electrode,
A second voltage different from the first voltage is applied to the second counter electrode,
The first voltage is V ₁ , the second voltage is V ₂ , the higher voltage of V ₁ and V ₂ is Hi (V ₁ , V ₂ ), and the lower voltage of V ₁ and V ₂ is Low when (V _1, V ₂₎ and represents a Hi (V _1, V ₂₎ less voltage, _{and, Low (V 1, V 2} ) or more third voltage is voltage, scanning signal lines Based on the operation of the switching element according to the scanning signal, the image signal is applied from the video signal driving circuit to the first pixel electrode and the second pixel electrode through the video signal line.

In the lateral electric field drive type transflective liquid crystal display device of the present invention (hereinafter sometimes simply referred to as the liquid crystal display device of the present invention), a first voltage is applied to the first counter electrode. A second voltage different from the first voltage is applied to the second counter electrode. Then, the first voltage V _1, the one voltage of the second voltage V _2, V ₁ and V ₂ is high Hi (V _1, V _2), that the voltage of V ₁ and V ₂ is low when expressed as a _{Low (V 1, V 2)} , Hi (V 1, V 2) is less voltage, and, third voltage is Low (V _1, V ₂₎ or more voltages, scan signals Based on the operation of the switching element according to the scanning signal of the line, it is applied from the video signal driving circuit to the first pixel electrode and the second pixel electrode via the video signal line. According to the configuration described above, when one of the absolute value of the potential difference between the first counter electrode and the first pixel electrode and the absolute value of the potential difference between the second counter electrode and the second pixel electrode are increased. The other becomes smaller. As a result, the reflective display area (hereinafter sometimes referred to simply as the reflective area) is normally white, and the transmissive display area (hereinafter sometimes simply referred to as the transmissive area) is normally black. However, the difference in operation mode between the transmissive region and the reflective region is electrically compensated, and an image can be displayed without any trouble.

In the liquid crystal display device of the present invention, when scanning by the first to Mth scanning signal lines for forming the even-numbered frame is completed, a certain unit display area is applied to the first counter electrode. applied a first voltage is _V 1_evenF, the second voltage being applied to the second counter electrode is expressed as _V 2_evenF, the first through the M-th scanning signal for forming an odd-numbered frame When the scanning by the line is completed, for the certain unit display area, the first voltage applied to the first counter electrode is V _{1_oddF} , and the second voltage applied to the second counter electrode is V _{2_oddF} . When representing
_{V1_evenF} - _{V2_evenF} =-( _{V1_oddF} - _{V2_oddF} )
It can be set as the structure which is. Thereby, the direction of the electric field applied to the liquid crystal layer changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented.

In this case, a configuration that satisfies any of the following (1) to (3) can be adopted.
(1) V _{1_evenF} = V _{1_oddF}
(2) V _{2_evenF} = V _{2_oddF}
(3) V _{1_evenF} = V _{2_oddF} and V _{1_oddF} = V _{2_evenF}
In the configuration satisfying the above (1) or (2), the voltage of the first counter electrode or the voltage of the second counter electrode can be a constant value irrespective of the frame, and the voltage is applied to the counter electrode. The circuit configuration can be simplified. In the configuration satisfying the above (3), the fluctuation range of the first voltage, the second voltage, and the third voltage can be reduced, so that the power consumption of the liquid crystal display device can be reduced. Can be achieved.

In the liquid crystal display device of the present invention including the various preferred configurations described above (hereinafter, these may be simply referred to as the present invention), a first frame for forming a certain frame is used. When scanning with the first to Mth scanning signal lines is completed, in each unit display area corresponding to the mth scanning signal line (where m = 1, 2,..., M), the first counter electrode the, a first voltage V _{1_m} is applied to the second counter electrode, can be configured to a second voltage V _{2_M} is applied.

  In the present invention, P (provided that P = 2M) common electrode lines are provided, and any one of the first counter electrode and the second counter electrode of each unit display area corresponding to the m-th scanning signal line. One counter electrode and the p-th (p = 2m−1) common electrode line are connected, and the other counter electrode and the (p + 1) -th common electrode line are connected, A first voltage is applied to the first counter electrode via a common electrode line connected to the first counter electrode, and a common electrode line connected to the second counter electrode is connected to the second counter electrode. A configuration in which the second voltage is applied thereto can be adopted. The unit display areas constituting adjacent rows can be configured such that the reflective area and the transmissive area are opposed to each other, or the same type of areas are disposed so as to be opposed to each other. You can also. Or it can also be set as the structure with which these were combined.

In this case, the voltage V _{2_M} is constant value V _{2_Const,} voltage V _{1_m,} when the value of m is an odd number, a constant value V _{1_Odd,} if the value of m is an even number, the V _{1_Odd} A different constant value V _{1_even} may be used. In addition to _this, V 1_odd -V 2_const = - can also be configured as a _(V 1_even -V 2_const). According to this configuration, the polarity of the applied voltage is inverted between each unit display area corresponding to the odd-numbered scanning signal line and each unit display area corresponding to the even-numbered scanning signal line, and flicker is reduced. Is done. For example, when V _{2_const} is 0 volts, V _{1_odd} is 10 volts, and V _{1_even} is −10 volts, the absolute value of the third voltage applied to each pixel electrode in accordance with the image to be displayed is 0. Take a value in the range of 10 to 10 volts. In the example described above, the absolute value of the potential difference between the first counter electrode and the first pixel electrode and the range that the absolute value of the potential difference between the second counter electrode and the second pixel electrode can take are 0 volts to 10 volts. It becomes a bolt. Alternatively, the voltage V _{1_m} is constant value V _{1_Const,} voltage V _{2_M,} when the value of m is an odd number, a constant value V _{2_Odd,} if the value of m is an even number, different from the V _{2_Odd} The configuration may be a constant value V _{2_even} , and in addition, the configuration may be V _{1_const} −V _{2_odd} = − (V _{1_const} −V _{2_even} ). For example, when V _{1_const} is 0 volts, V _{2_odd} is +10 volts, and V _{2_even} is −10 volts, the absolute value of the third voltage applied to each pixel electrode according to the image to be displayed is 0. Take a value in the range of 10 to 10 volts. Also in the above-described example, the absolute value of the potential difference between the first counter electrode and the first pixel electrode and the range that the absolute value of the potential difference between the second counter electrode and the second pixel electrode can take are from 0 volt to 10 volts. According to these configurations described above, since the voltage of the first counter electrode or the voltage of the second counter electrode can be set to a constant value, the configuration of the circuit for applying the voltage to the counter electrode can be simplified. it can.

Alternatively, the voltage V _{1_m} a constant value V _{1_Odd} when the value of m is an odd number, when the value of m is an even number is constant V _{1_Even} different from the V _{1_Odd,} voltage V _{2_M} is the m value can be configured to be different from the constant value V _{2_Even} the V _{2_Odd} if a constant value _V 2_odd, the value of m is an even number in the case of an odd number. In _addition, V 1_odd = V 2_even, and can be configured to be _V 1_even = V 2_odd. For example, when V 1 _—odd = V 2 _—even = −5 volts and V 1 _—even = V 2 _—odd = 5 volts, the absolute value of the third voltage applied to each pixel electrode in accordance with the image to be displayed is 0. Take a value in the range of 5 to 5 volts. Also in the above-described example, the absolute value of the potential difference between the first counter electrode and the first pixel electrode and the range that the absolute value of the potential difference between the second counter electrode and the second pixel electrode can take are from 0 volt to 10 volts. According to the above-described configuration, the fluctuation range of the first voltage, the second voltage, and the third voltage can be reduced, so that the power consumption of the liquid crystal display device can be reduced.

  In the present invention, P (provided that P = M + 1) common electrode lines are provided, and the p-th common electrode line (where p is a natural number greater than or equal to 2 and less than or equal to M-1) includes the m-th common electrode line. Either the first counter electrode or the second counter electrode of each unit display area corresponding to the 'th (where m' = p-1) scan signal line, and the (m '+ 1) th scan electrode line The first counter electrode or the second counter electrode of each unit display area corresponding to the scanning signal line is connected to the other counter electrode, and the first counter electrode of each unit display area corresponding to the first scanning signal line is connected. Of the one counter electrode or the second counter electrode, an electrode that is not connected to the second common electrode line is connected to the first common electrode line, and corresponds to the Mth scan signal line. Of the first counter electrode or the second counter electrode of each unit display area, the (P-1 The electrode not connected to the th common electrode line and the Pth common electrode line are connected, and the first counter electrode is connected to the first counter electrode via the common electrode line connected to the first counter electrode. The second voltage is applied to the second counter electrode through a common electrode line connected to the second counter electrode. According to the configuration described above, the number of common electrode lines is reduced, so that a margin such as a layout space of each component constituting the liquid crystal display device is increased. In other words, the structural margin of the liquid crystal display device is improved. Thereby, the yield and the reliability of the liquid crystal display device can be improved.

In this case, the voltage V _{1_m} a constant value V _{1_Odd} when the value of m is an odd number, when the value of m is an even number is constant V _{1_Even} different from the V _{1_Odd,} voltage V _{2_M} is m values are constant values V _{2_Odd} in the case of an odd number, when the value of m is an even number can be configured to be different from the constant value V _{2_Even} the _V 2_odd. In _addition, V 1_odd = V 2_even, and can be configured to be _V 1_even = V 2_odd. For example, when V 1 _—odd = V 2 _—even = −5 volts and V 1 _—even = V 2 _—odd = 5 volts, the absolute value of the third voltage applied to each pixel electrode in accordance with the image to be displayed is 0. Take a value in the range of 5 to 5 volts. Also in the above-described example, the absolute value of the potential difference between the first counter electrode and the first pixel electrode and the range that the absolute value of the potential difference between the second counter electrode and the second pixel electrode can take are from 0 volt to 10 volts.

  In the present invention, P (provided that P = M + 1) common electrode lines are provided, and the p-th common electrode line (where p is a natural number of 2 or more and M or less) includes the m′-th common electrode line. (However, m ′ = p−1) and the first counter electrode or the second counter electrode of each unit display area corresponding to the (m ′ + 1) -th scanning signal line are connected to one of the counter electrodes. The first counter electrode or the second counter electrode of each unit display area corresponding to the first scanning signal line, the electrode not connected to the second common electrode line, and the first counter electrode The common electrode line is connected to the (P-1) th common electrode line among the first counter electrode or the second counter electrode of each unit display region corresponding to the Mth scanning signal line. The electrode not connected to the Pth common electrode line is connected to the first counter electrode. The first voltage is applied via the common electrode line connected to the first counter electrode, and the second voltage is applied to the second counter electrode via the common electrode line connected to the second counter electrode. It can be set as the structure to which the voltage is applied.

  Even in the configuration described above, the number of common electrode lines is reduced. Further, only the first counter electrode or only the second counter electrode is connected to the common electrode line. Thereby, the unit display areas facing each other across the common electrode line can be arranged so that the reflective areas are opposed to each other (note that the transmissive areas are also reflectively opposed). For example, in a configuration in which the reflective areas are opposed to each other, a reflector or the like provided in the reflective area can be continuously formed so as to extend over a plurality of unit display areas. The same applies to various components provided in the transmission region. According to the above-described configuration, the dividing process of the reflector and the like can be simplified, so that the structural margin of the liquid crystal display device can be further increased. In this configuration, a video signal that is inverted every frame is applied to the video signal line.

In this case, the voltage V _{2_M} is constant value V _{2_Const,} voltage V _{1_m} is different from the V _{2_Const,} can be configured to be a constant value _V 1_const.

  Further, in the present invention, each unit display area corresponding to the m'th (where m 'is a natural number less than or equal to M) scanning signal line is provided with P (where P = M + 2) common electrode lines. , In the unit display area corresponding to the odd-numbered video signal line, either one of the first counter electrode or the second counter electrode and the first counter electrode in the unit display area corresponding to the even-numbered video signal line or The other electrode of the second counter electrode is connected to the pth (where p = m ′ + 1) common electrode line, and the (p−1) th common electrode line or the (p + 1) th common electrode line The common electrode line is connected to the pth common electrode line of the first counter electrode or the second counter electrode in the unit display region corresponding to the odd-numbered video signal line. No electrode is connected and the second The other common electrode line of the (p-1) th common electrode line or the (p + 1) th common electrode line and the first counter electrode or the second counter electrode in the unit display region corresponding to the even-numbered video signal line. Among them, an electrode that is not connected to the p-th common electrode line is connected, and the first voltage is applied to the first counter electrode via the common electrode line connected to the first counter electrode. In addition, the second counter electrode may be configured to be applied with the second voltage via a common electrode line connected to the second counter electrode. In this configuration, the video signal applied to the odd-numbered video signal line and the video signal applied to the even-numbered video signal line are in an inverted relationship.

  In the configuration described above, the polarity of the voltage applied to each unit display area changes. More specifically, since the polarity is reversed in a checkered pattern, flicker is reduced and the display image can be made suitable.

  Note that the conditions shown in the various expressions in this specification are satisfied not only when the expression is strictly mathematically established but also when the expression is substantially satisfied. In other words, regarding the establishment of the formula, the presence of various variations that occur in the design or manufacture of the liquid crystal display device is allowed.

In the present invention including the various preferable configurations described above, the liquid crystal display device includes, for example, a front panel, a rear panel, and a liquid crystal layer disposed between the front panel and the rear panel. The liquid crystal display device may be a monochrome liquid crystal display device or a color liquid crystal display device. The liquid crystal display device
(A) M scanning signal lines extending in a first direction (for example, the X direction) and having one end connected to the scanning signal driving circuit;
(B) N video signal lines extending in a second direction (for example, Y direction) and having one end connected to the video signal driving circuit;
(C) a switching element disposed at an intersection between the scanning signal line and the video signal line and operating in accordance with the scanning signal of the scanning signal line
(D) a unit display area having a reflective area and a transmissive area provided corresponding to each switching element;
It has.

  The front panel is composed of, for example, an upper substrate made of a glass substrate or a plastic substrate, and an upper polarizing plate provided on the outer surface of the upper substrate. In the case of a color liquid crystal display device, a color filter is provided on the inner surface of the upper substrate. Examples of the unit display area or the color filter arrangement pattern include a delta arrangement, a stripe arrangement, a diagonal arrangement, and a rectangle arrangement.

  On the other hand, the rear panel is, for example, a lower substrate made of, for example, a glass substrate or a plastic substrate, a switching element formed on the inner surface of the lower substrate, and a conduction / non-conduction with the video signal line controlled by the switching element. The pixel electrode / second pixel electrode, the first counter electrode / second counter electrode, and a lower polarizing plate provided on the outer surface of the lower substrate, for example. In the unit display area, the first counter electrode and the second counter electrode are formed separately. A first voltage is applied to the first counter electrode, and a second voltage different from the first voltage is applied to the second counter electrode. A reflective plate made of, for example, aluminum is formed in a portion corresponding to the reflective region on the lower substrate.

  The direction of the molecular axis of the liquid crystal molecules when an electric field is not applied (initial alignment orientation) is, for example, a surface in which an upper alignment film is formed on the surface where the upper substrate and the liquid crystal layer are in contact, and the lower substrate and the liquid crystal layer are in contact The lower alignment film can be formed on the upper alignment film and the upper alignment film and the lower alignment film can be rubbed.

  The thickness of the liquid crystal layer is set so that it functions as a half-wave plate in the transmission region and a quarter-wave plate in the reflection region. For example, the interlayer insulating layer formed on the lower substrate can have a suitable thickness by making the thickness different between the reflective region and the transmissive region, but is not limited thereto.

  The various members and liquid crystal materials constituting the liquid crystal display device described above can be formed from known members and materials. Examples of switching elements include three-terminal elements such as transistor elements such as MOS FETs and thin film transistors (TFTs), and two-terminal elements such as MIM elements, varistor elements, and diodes.

  A region including the liquid crystal cell in which the first pixel electrode / second pixel electrode and the first counter electrode / second counter electrode are formed corresponds to one pixel (pixel) or one sub-pixel (sub-pixel). In a color liquid crystal display device, a red light emitting sub-pixel (which may be referred to as a sub-pixel [R]) constituting each pixel (pixel) is composed of a combination of the region and a color filter that transmits red. The green light emitting subpixel (sometimes referred to as subpixel [G]) is composed of a combination of the region and a color filter that transmits green, and may be referred to as the blue light emitting subpixel (subpixel [B]). ) Is composed of a combination of such a region and a color filter that transmits blue. The arrangement pattern of the sub-pixel [R], sub-pixel [G], and sub-pixel [B] matches the arrangement pattern of the color filter described above. The pixel is not limited to a configuration in which three types of sub-pixels [R, G, B], which are a sub-pixel [R], a sub-pixel [G], and a sub-pixel [B], are configured as one set. For example, a set of these three types of sub-pixels [R, G, B] plus one or more types of sub-pixels (for example, one sub-pixel that emits white light to improve brightness) To expand the color reproduction range, one set including sub-pixels that emit complementary colors to expand the color reproduction range, one set including sub-pixels that emit yellow to expand the color reproduction range It can also be composed of a set of subpixels that emit yellow and cyan.

  As values of pixels (pixels) arranged in a two-dimensional matrix, VGA (640, 480), S-VGA (800, 600), XGA (1024, 768), APRC (1152, 900), S-XGA ( 1280,1024), U-XGA (1600,1200), HD-TV (1920,1080), Q-XGA (2048,1536), (1920,1035), (720,480), (1280,960) Some of the image display resolutions can be exemplified, but not limited to these values.

  In the example described above, the first pixel electrode / second pixel electrode and the first counter electrode / second counter electrode are described as being provided on the lower substrate. However, the present invention is not limited to this. As long as an electric field in a lateral direction (a direction following a virtual plane perpendicular to the thickness direction of the liquid crystal layer and a direction substantially following the upper substrate surface / lower substrate surface) can be applied to the liquid crystal layer, these can be applied. The arrangement of the electrodes can be arbitrarily set. For example, the first pixel electrode / the second pixel electrode are formed on the lower substrate side, and between the projection image of the first counter electrode and the projection image of the first pixel electrode, and between the projection image of the second counter electrode and the second image. The first counter electrode / second counter electrode may be formed on the upper substrate side so that there is a gap between the projected image of the pixel electrodes.

  The shapes of the first counter electrode and the second counter electrode may be appropriately set according to the specifications and design of the liquid crystal display device. For example, these electrodes may be substantially linear or may have a comb shape in which the branch electrode portion extends from the trunk electrode portion. For example, the first counter electrode and the second counter electrode may be configured to extend substantially linearly in the X direction and form an electric field in the Y direction between the opposing pixel electrodes. Alternatively, the stem electrode portions of the first counter electrode and the second counter electrode extend in the X direction, the branch electrode portion extends in the Y direction from the stem electrode portion, and the X electrode is interposed between the pixel electrode facing the branch electrode portion. A configuration in which an electric field in the direction is formed may be employed. What is necessary is just to set suitably the number of the branch electrode parts formed in a unit display area according to the specification etc. of a liquid crystal display device.

  The first pixel electrode and the second pixel electrode are formed as island-shaped electrodes for each unit display region. Basically, there is a gap between the projection image of the first counter electrode and the projection image of the first pixel electrode, and between the projection image of the second counter electrode and the projection image of the second pixel electrode. There must be. In general, it is convenient for the edge of the first pixel electrode / second pixel electrode to have a shape that follows the edge of the first counter electrode / second counter electrode. For example, when the first counter electrode / second counter electrode extends linearly, the first pixel electrode / second pixel electrode may be a simple rectangle, and the first counter electrode / second counter electrode may be a trunk. In the case of a comb-like shape in which the branch electrode portion extends from the electrode portion, the shape may be a rectangle having a protruding portion located between the branch electrode portion and the branch electrode portion. The first pixel electrode and the second pixel electrode may be provided as independent island-shaped electrodes. Alternatively, it is configured as one island-like electrode extending between the reflective region and the transmissive region, and a portion corresponding to the reflective region forms a first pixel electrode, and a portion corresponding to the transmissive region forms a second pixel electrode. Also good.

  In a horizontal electric field type liquid crystal display device, a change in chromaticity (color shift) occurs in an image when the liquid crystal molecules are viewed from the long axis direction and when the liquid crystal molecules are viewed from the short axis direction. Are known. As a countermeasure, it has been conventionally proposed that the pixel electrode and the counter electrode are formed in a “<” shape and the rotation direction of the liquid crystal molecules is two directions in the unit display region. Also in the present invention, the pixel electrode and the counter electrode may be formed in a “<” shape. For example, the counter electrode may include a trunk electrode part and a branch electrode part extending from the trunk electrode part, and the branch electrode part may be formed in a “<” shape. The same applies to the pixel electrode.

  The first storage capacitor for holding the potential difference between the first pixel electrode and the first counter electrode is, for example, an auxiliary electrode that is conductive to the first pixel electrode and an auxiliary electrode that is conductive to the first counter electrode. (More specifically, the capacitance of these auxiliary electrodes and the capacitance between the first pixel electrode and the first counter electrode are connected in parallel, These electrostatic capacities hold the potential difference). The auxiliary electrode may be appropriately provided by a well-known method, for example, formed between the laminated interlayer insulating layers in the lower substrate. The second holding capacitor for holding the potential difference between the second pixel electrode and the second counter electrode is the same as described above.

  In the present invention, the polarization axis of the lower polarizing plate is substantially parallel or substantially perpendicular to the direction of the molecular axis of the liquid crystal molecules when no voltage is applied, and the polarization axis of the upper polarizing plate is the polarization axis of the lower polarizing plate. And a configuration that is substantially vertical. Thereby, a favorable black display state can be obtained in the transmissive region. Note that the polarization axis of the lower polarizing plate forms approximately 45 degrees with the molecular axis of the liquid crystal molecules when no voltage is applied, and the polarization axis of the upper polarizing plate is substantially perpendicular to the polarization axis of the lower polarizing plate. In the case of the configuration, the transmissive region is normally white and the reflective region is normally black. Even in this configuration, the difference in operation mode between the transmissive region and the reflective region is electrically compensated by applying the present invention. Thus, an image can be displayed without hindrance (however, in contrast to the configuration in which the transmission region is normally black, the black display in the transmission region is performed using the phase difference of the liquid crystal layer, so the contrast performance is reduced. ). The initial orientation direction of the liquid crystal molecules constituting the liquid crystal layer can be appropriately set according to the design of the display device. For example, it can be set to form a predetermined angle in the range of 0 to 45 degrees with respect to the direction in which the pixel electrode extends.

  A widely known backlight can be used as the backlight that irradiates the transmissive region from the back. Examples of the light source of the backlight include a light emitting diode (LED), or a cold cathode fluorescent lamp, an electroluminescence (EL) device, a cold cathode field emission device (FED), a plasma display device, A normal lamp can also be mentioned. A known optical sheet such as a light diffusion plate may be disposed between the backlight and the liquid crystal display device.

  Various circuits for driving the liquid crystal display device can be constituted by known circuits such as a drive circuit, an arithmetic circuit, and a storage device (memory). Note that the number of images sent to the drive circuit as electrical signals per second is the frame frequency (frame rate), and the reciprocal of the frame frequency is the frame time (unit: seconds). The driving method of the liquid crystal display device may be a line-sequential driving method or a dot-sequential driving method.

  According to the present invention, the difference in operation mode between the transmissive region and the reflective region is electrically compensated for by a simple configuration. A good black display state can be obtained in the transmissive region, and a transflective liquid crystal display device with high contrast and excellent display quality can be obtained.

  First, in order to help understanding of the present invention, an outline of the liquid crystal display device of the present invention will be described.

  As shown in FIG. 8, the liquid crystal display device 1 according to the first embodiment includes (a) M scanning signal lines SL extending in the first direction and having one end connected to the scanning signal driving circuit 71, and (b) first. N video signal lines VL, one end of which is connected to the video signal driving circuit 72, and (c) an intersection of the scanning signal line SL and the video signal line VL. A transistor 14 (transistor 14 will be described later) that operates in response to the scanning signal, and (d) a unit display area UA having a reflective area RA and a transmissive area TA provided corresponding to each transistor 14 are provided. This is a horizontal electric field drive type transflective liquid crystal display device. The same applies to liquid crystal display devices in other embodiments to be described later.

  In the unit display area UA, (A) the first pixel electrode 20A and the first counter electrode 21 constituting the reflection area RA, and (B) the potential difference between the first pixel electrode 20A and the first counter electrode 21 are set. A first holding capacitor 24 for holding; (C) a second pixel electrode 20B and a second counter electrode 22 constituting the transmission region TA; and (D) a gap between the second pixel electrode 20B and the second counter electrode 22. Is provided with a second storage capacitor 25 for holding the potential difference. The same applies to liquid crystal display devices in other embodiments to be described later. The first storage capacitor 24, the second storage capacitor 25, the first pixel electrode 20A, the second pixel electrode 20B, the first counter electrode 21, and the second counter electrode 22 will be described later. The liquid crystal display device 1 will be described in detail in the description of the first embodiment.

  FIG. 1 is a schematic plan view for explaining the arrangement of various components in the vicinity of a certain unit display area UA in the liquid crystal display device 1 according to the first embodiment. 2A is a schematic end view when the liquid crystal display device 1 is cut along a line AA in FIG. Similarly, FIG. 2B is an end view when the liquid crystal display device 1 is cut along the line BB in FIG. 1, and FIG. 2C shows the liquid crystal display device 1 in FIG. It is an end elevation when cut | disconnecting by the line shown by CC in FIG. The same applies to liquid crystal display devices in other embodiments described later.

  A first storage capacitor 24 and a second storage capacitor 25 shown in FIG. 3 to be described later are configured by auxiliary electrodes that are respectively connected to the first pixel electrode 20A, the first counter electrode 21, the second pixel electrode 20B, and the second counter electrode 22. Has been. In FIG. 1 and FIG. 2, for convenience, illustration of auxiliary electrodes constituting the first storage capacitor 24 and the second storage capacitor 25 is omitted.

  In FIG. 1, FIG. 2, FIG. 3 and the following description referring to these, for convenience, the scanning signal line SL is represented as the scanning signal line 11 and the video signal line VL is represented as the video signal line 15. A common electrode line CL having one end connected to the common electrode drive circuit 73 shown in FIG.

  As shown in FIGS. 1 and 2A to 2C, the liquid crystal display device 1 includes a lower substrate 10 and an upper substrate 40, a liquid crystal layer 30 sandwiched between both substrates, and an outer side of the lower substrate 10 ( A lower polarizing plate 50 disposed on the backlight 60 side described later) and an upper polarizing plate 51 disposed outside the upper substrate 40 are provided. A lower alignment film 23 is formed on the lower substrate 10, and an upper alignment film 43 is formed on the upper substrate 40. The liquid crystal layer 30 is in contact with the lower alignment film 23 and the upper alignment film 43. These alignment films 23 and 43 define the direction of the molecular axis of the liquid crystal molecules 31 constituting the liquid crystal layer 30 in the state where no electric field is applied. Reference numeral 60 is a backlight for irradiating the liquid crystal display device 1 from the back, reference numeral 41 is a so-called black matrix, and reference numeral 42 is a color filter.

  A first insulating film 13A and a second insulating film 13B are stacked on the liquid crystal layer 30 side of the lower substrate 10. A transistor 14 is formed between the first insulating film 13A and the second insulating film 13B. A video signal line 15 is formed on the second insulating film 13B. A tongue 15A of the video signal line 15 is connected to one source / drain electrode of the transistor 14. A first pixel electrode 20A and a second pixel electrode 20B, which will be described later, are connected to the other source / drain electrode through a conduction portion 15B. The conductive portion 15B is formed by patterning simultaneously with the formation of the video signal line 15, for example.

  The transistor 14 functions as a switching element that operates according to the signal of the scanning signal line 11. Based on the operation of the transistor 14 according to the scanning signal of the scanning signal line 11, a predetermined voltage (described later) is applied from the video signal driving circuit 72 to the first pixel electrode 20A and the second pixel electrode 20B via the video signal line 15. A third voltage) is applied. A first interlayer insulating layer 16 (16A, 16B) is formed on the second insulating film 13B.

  Irregularities are formed on the surface of the first interlayer insulating layer 16A in the reflective region RA, and a reflective plate 17 made of, for example, aluminum is deposited on the surface. A second interlayer insulating layer 18 is formed on the reflection plate 17, and a first pixel electrode 20 </ b> A and a first counter electrode 21 are formed on the second interlayer insulating layer 18. On the other hand, a second pixel electrode 20B and a second counter electrode 22 extending in the Y direction and parallel to each other are formed on the first interlayer insulating layer 16B in the transmissive region TA.

  As shown in FIG. 1, the 1st counter electrode 21 and the 2nd counter electrode 22 are formed in the comb-tooth shape. Specifically, the first counter electrode 21 includes a trunk electrode portion extending in the X direction in the drawing and a branch electrode portion extending in the −Y direction from the stem electrode portion. Similarly, the second counter electrode 22 includes a trunk electrode portion extending in the X direction in the drawing and a branch electrode portion extending in the + Y direction from the trunk electrode portion.

  As shown in FIGS. 1 and 2A, the first pixel electrode 20A is a portion corresponding to the reflection region RA of one island-like electrode 20 extending over the reflection region RA and the transmission region TA. The second pixel electrode 20 </ b> B is a portion corresponding to the transmission region TA of the island-shaped electrode 20. The first pixel electrode 20A is located between the branch electrode portion of the first counter electrode 21 and the branch electrode portion, and the second pixel electrode 20B is between the branch electrode portion of the second counter electrode 22 and the branch electrode portion. Located in. Thus, the first pixel electrode 20A and the second pixel electrode 20B are formed along the Y direction.

  An electric field formed between the first pixel electrode 20A and the first counter electrode 21 (more specifically, formed between the first pixel electrode 20A and the branch electrode portion of the first counter electrode 21). The liquid crystal layer 30 in the reflection region RA is driven by the electric field in the X direction. Similarly, an electric field formed between the second pixel electrode 20B and the second counter electrode 22 (more specifically, formed between the second pixel electrode 20B and the branch electrode portion of the second counter electrode 22). The liquid crystal layer 30 in the transmission region TA is driven by the electric field in the X direction.

  The first pixel electrode 20A and the second pixel electrode 20B are electrically connected to each other, and a third voltage described later is applied to both. More specifically, the third voltage is applied to the first pixel electrode 20A and the first pixel electrode 20A from the video signal drive circuit 72 via the video signal line 15 based on the operation of the transistor 14 according to the scanning signal of the scanning signal line 11. Applied to the two-pixel electrode 20B.

  On the other hand, the first counter electrode 21 and the second counter electrode 22 are formed separately. The first counter electrode 21 is connected to the common electrode line 12, and a first voltage is applied from the common electrode drive circuit 73 through the common electrode line 12. Similarly, the second counter electrode 22 is connected to another common electrode line 12, and a second voltage different from the first voltage is applied from the common electrode drive circuit 73 via the other common electrode line 12. The

  The second interlayer insulating layer 18 is set to have a thickness such that the thickness of the liquid crystal layer 30 in the transmissive area TA is approximately twice the thickness of the liquid crystal layer 30 in the reflective area RA. The region TA functions as a ½ wavelength plate, and the reflection region RA functions as a ¼ wavelength plate.

  The molecules of the liquid crystal molecules 31 constituting the liquid crystal layer 30 in a state where no electric field is formed between the first counter electrode 21 and the first pixel electrode 20A and between the second counter electrode 22 and the second pixel electrode 20B. The axis forms an angle of approximately 45 degrees with respect to the X axis. The molecular axis of the liquid crystal molecules 31 constituting the liquid crystal layer 30 in the reflective region RA changes so as to follow the X axis by the electric field between the first counter electrode 21 and the first pixel electrode 20A. Similarly, the molecular axis of the liquid crystal molecules 31 constituting the liquid crystal layer 30 in the transmissive region TA changes so as to follow the X axis by the electric field between the second counter electrode 22 and the second pixel electrode 20B. The polarization axis of the lower polarizing plate 50 is set to a direction that forms approximately 45 degrees with respect to the X axis, and the polarization axis of the upper polarizing plate 51 is a direction that is substantially orthogonal to the polarization axis of the lower polarizing plate 50 (specifically, Is set to a direction that forms approximately 135 degrees with respect to the X-axis.The above-described configuration is the same as that described in the background art with reference to FIGS. The transmission area TA is normally black, and the reflection area RA is normally white.

  FIG. 3A schematically shows the configuration of the unit display area UA in the liquid crystal display device 1 described above. As described above, the third voltage is applied to the first pixel electrode 20 </ b> A and the second pixel electrode 20 </ b> A from the video signal drive circuit 72 via the video signal line 15 based on the operation of the transistor 14 according to the scanning signal of the scanning signal line 11. Applied to the pixel electrode 20B. In the connection diagram relating to the embodiments described later, for the sake of convenience, the structure shown in FIG. 3A is simplified as shown in FIG.

  Next, a method for manufacturing the liquid crystal display device will be briefly described. First, the scanning signal line 11 and the common electrode line 12 are formed in the same layer on the lower substrate 10. Next, a first insulating film 13A is formed on the entire surface, and then a transistor 14 made of a semiconductor layer is formed at a predetermined location. Thereafter, the second insulating film 13B is formed on the entire surface.

  Next, an opening is formed in the second insulating film 13B so that both source / drain electrode portions of the transistor 14 are exposed. Thereafter, a video signal line 15 (including a tongue portion 15A) is formed on the insulating film 13B so as to cover the opening, and is connected to one of the source / drain electrodes through the opening. In addition, together with the formation of the video signal line 15, a conduction portion 15 </ b> B connected to the other source / drain electrode is formed.

  Next, a first interlayer insulating layer 16 (16A, 16B) made of polyimide or the like is formed on the entire surface. Thereafter, irregularities are formed on the surface of the first interlayer insulating layer 16A corresponding to the reflective region RA. Specifically, the step shape is formed by performing halftone exposure or the like, and then the step shape is rounded by forming the unevenness by performing a reflow process. However, the present invention is not limited to this.

  Thereafter, for example, aluminum is vapor-deposited on the uneven surface of the first interlayer insulating layer 16 </ b> A to form the reflecting plate 17. Next, after the second interlayer insulating layer 18 is formed on the entire surface, the second interlayer insulating layer 18 in the portion of the transmission region TA is selectively removed.

  Thereafter, an opening is formed in the first interlayer insulating layer 16 and the like so that the conductive portion 15B connected to the source / drain electrode of the transistor 14 is exposed. Next, an island-like electrode 20 is formed covering the opening and extending over the first interlayer insulating layer 16 </ b> B and the second interlayer insulating layer 18. Similarly, an opening is formed in the first interlayer insulating layer 16 or the like so that a predetermined portion of the common electrode line 12 is exposed. Next, the first counter electrode 21 connected to the predetermined common electrode line 12 through the opening is formed on the second interlayer insulating layer 18 and connected to the other predetermined common electrode line 12 through the opening. The second counter electrode 22 is formed on the first interlayer insulating layer 16B. For convenience of explanation, each electrode forming step has been described separately. However, in practice, each opening and each electrode can be formed by a common process.

  Thereafter, the lower alignment film 23 is formed on the entire surface, and then the surface is rubbed. Thus, a series of steps relating to the lower substrate 10 is completed.

  Next, after preparing an upper substrate 40 on which a black matrix 41, a color filter 42, an upper alignment film 43, and the like are formed, the upper substrate 40 and the lower substrate 10 that have undergone the above steps are opposed to each other, and a liquid crystal material is sealed therebetween. , Seal around. Thereafter, the lower polarizing plate 50 is attached to the surface of the lower substrate 10, and the upper polarizing plate 51 is attached to the surface of the upper substrate 40. Next, connection with an external circuit, attachment of a backlight, and the like can be performed to complete the liquid crystal display device.

  The outline of the liquid crystal display device including the manufacturing method has been described above. Next, the basic operation principle of the liquid crystal display device of the present invention including various embodiments to be described later will be described.

In the liquid crystal display device of the present invention, a first voltage is applied to the first counter electrode 21, and a second voltage different from the first voltage is applied to the second counter electrode 22. . Then, the first voltage V _1, the one voltage of the second voltage V _2, V ₁ and V ₂ is high Hi (V _1, V _2), that the voltage of V ₁ and V ₂ is low when expressed as a _{Low (V 1, V 2)} , Hi (V 1, V 2) is less voltage, and, third voltage is Low (V _1, V ₂₎ or more voltages, scan signals Based on the operation of the transistor 14 in accordance with the scanning signal of the line 11, it is applied from the video signal driving circuit 72 to the first pixel electrode 20A and the second pixel electrode 20B via the video signal line 15.

4A and 4B are diagrams schematically showing the potential relationship of each electrode when V ₁ > V ₂ in a certain unit display area UA. In this case, Low (V ₁ , V ₂ ) = V ₂ and Hi (V ₁ , V ₂ ) = V ₁ . Therefore, when the value of the third voltage applied to the first pixel electrode 20A and the second pixel electrode 20B is expressed as V ₃ , the third voltage is applied in the range of V ₂ ≦ V ₃ ≦ V _1. The

FIG. 4A schematically shows a state where V ₃ is relatively closer to V ₁ (for example, a state where V ₂ = 0 volts, V ₁ = 10 volts, V ₃ = 8 volts). . FIG. 4B schematically shows a state where V ₃ is relatively closer to V ₂ (for example, a state where V ₂ = 0 volts, V ₁ = 10 volts, V ₃ = 2 volts). Shown in

As apparent from FIGS. 4A and 4B, when | V ₃ −V ₁ | increases, | V ₃ −V ₂ | decreases, and when | V ₃ −V ₁ | decreases, | V ₃ It can be seen that −V ₂ | In other words, when the electric field applied to the liquid crystal layer 30 in the reflective area RA becomes strong, the electric field applied to the liquid crystal layer 30 in the transmissive area TA becomes weak, and when the electric field applied to the liquid crystal layer 30 in the reflective area RA becomes weak. The electric field applied to the liquid crystal layer 30 in the transmissive area TA has a strong relationship. Therefore, the difference in operation mode between the transmission area TA and the reflection area RA is electrically compensated, and an image can be displayed without any trouble. Hereinafter, a description will be given with reference to FIGS.

FIG. 5A schematically shows the relationship between the light transmittance of the reflection region RA and the transmission region TA and the absolute value of the potential difference between the pixel electrode and the counter electrode. The transmittance on the vertical axis is shown normalized. As described above, the transmission area TA of the liquid crystal display device is normally black, and the reflection area RA is normally white. Accordingly, as the absolute value of the potential difference between the second pixel electrode 20B and the second counter electrode 22 increases, the light transmittance of the transmission region TA increases. On the other hand, as the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 increases, the light transmittance of the reflection region RA decreases. In FIG. 5A, the absolute value of the maximum potential difference applied between the pixel electrode and the counter electrode is designed as V _max in order to sufficiently invert the light transmittance of the transmission region TA and the reflection region RA. did.

FIG. 5B is a schematic diagram showing the relationship shown in FIG. 5A from the viewpoint of display gradation in the unit display area UA. When the unit display area UA is designed to have the maximum black display state by design, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 provided in the reflection area RA is V _max, and transmission is performed. It can be seen that the potential difference between the second pixel electrode 20B and the second counter electrode 22 provided in the region TA may be 0 volts. When the unit display area UA is designed to have the maximum white display state by design, the potential difference between the first pixel electrode 20A and the first counter electrode 21 provided in the reflection area RA is set to 0 volt, and the transmission area It can be seen that the absolute value of the potential difference between the second pixel electrode 20B and the second counter electrode 22 provided in TA may be V _max . That is, the absolute value of the voltage to be applied between the first pixel electrode 20A and the first counter electrode 21 and the second pixel electrode 20B and the second counter electrode 22 are included, including the case of displaying an intermediate gradation. There is a trade-off relationship with the absolute value of the voltage to be applied between them.

In the liquid crystal display device of the present invention, as described above, when | V ₃ −V ₁ | increases, | V ₃ −V ₂ | decreases, and when | V ₃ −V ₁ | decreases, | V ₃ −V ₂ | is in a relationship of increasing. Therefore, since | V ₃ −V ₁ | and | V ₃ −V ₂ | are in a trade-off relationship, an image can be displayed without hindrance. Note that the value of V _max shown in FIGS. 5A and 5B substantially corresponds to the value of | V ₁ −V ₂ |. Therefore, the values of V ₁ and V ₂ may be set corresponding to the maximum potential difference to be applied between the pixel electrode and the counter electrode in design.

  The basic operation principle of the liquid crystal display device of the present invention including various embodiments described later has been described above. As described above, according to the present invention, the difference in operation mode between the transmission area TA and the reflection area RA can be electrically compensated with a simple configuration. Note that when an electric field is applied to the liquid crystal layer 30 in one direction for a long time, the liquid crystal layer 30 deteriorates. Therefore, it is desirable to apply an electric field to the liquid crystal layer 30 by appropriately reversing the direction. Hereinafter, a configuration for applying an electric field by reversing the direction of the liquid crystal layer 30 will be described.

Basically, in a certain unit display area UA, a state where V ₁ > V ₂ and a state where V ₂ > V ₁ are appropriately switched may be used. Thereby, the electric field can be applied to the liquid crystal layer 30 while reversing the direction.

For example, when the scanning by the first to Mth scanning signal lines for forming the even-numbered frame is completed, the first counter electrode 21 applied to the first counter electrode 21 for a certain unit display area UA. the voltage _V 1_evenF, the second voltage being applied to the second counter electrode 22 is expressed as _V 2_evenF, scanning by the 1st through M-th scanning signal line for forming an odd-numbered frame is complete when, for該或Ru unit display area UA, representing the first voltage being applied to the first counter electrode ₂₁ V 1_oddF, the second voltage being applied to the second counter electrode 22 and the _V 2_oddF. For example, by satisfying the relationship of V _{1_evenF} −V _{2_evenF} = − (V _{1_oddF} −V _{2_oddF} ), the electric field can be applied to the liquid crystal layer 30 by reversing the direction for each frame.

In this case, for example, V 1 _—evenF = V 1 _—oddF or V 2 _—evenF = V 2 _—oddF may be satisfied. In this configuration, the same voltage is applied to either the first counter electrode 21 or the second counter electrode 22 regardless of the frame. Therefore, the configuration of a circuit for applying a voltage to the counter electrode can be simplified. FIG. 6 shows an operation example when V 2 _—evenF = V 2 _—oddF . The operation in the case of V _{1_evenF} = V _{1_oddF} is the one in which the relationship of the voltages is replaced in FIG.

Alternatively, for example, V 1 _—evenF = V 2 _—oddF and V 1 _—oddF = V 2 _—evenF may be satisfied. Figure _7, V 1_evenF = V 2_oddF, and shows an operation example where the _V 1_oddF = V 2_evenF. According to this configuration, the fluctuation range of each voltage can be reduced as compared with FIG. 6, so that the power consumption of the liquid crystal display device can be reduced.

  The configuration for applying the electric field by reversing the direction to the liquid crystal layer 30 has been described above. Next, the present invention will be described based on examples with reference to the drawings.

  Example 1 relates to a liquid crystal display device of the present invention. FIG. 8 is a schematic configuration diagram of the liquid crystal display device 1 according to the first embodiment. FIG. 9 is a schematic timing chart of the operation in the white display state of the liquid crystal display device 1 according to the first embodiment. FIG. 10 is a schematic timing chart of the operation in the black display state of the liquid crystal display device 1 according to the first embodiment. For convenience of explanation, it is assumed that the unit display areas UA are arranged in a 4 × 4 matrix, but the present invention is not limited to this. The same applies to other embodiments described later.

  For convenience of explanation, the absolute value of the design potential difference between the first counter electrode 21 and the second counter electrode 22 is 10 volts in each unit display area UA, including other embodiments described later. And The white display state in the embodiment means that the absolute value of the potential difference between the first counter electrode 21 provided in the reflective area RA and the first pixel electrode 20A is 2 volts, and the second counter electrode 22 provided in the transmissive area TA. The absolute value of the potential difference between the first pixel electrode 20B and the second pixel electrode 20B is 8 volts (that is, the state is slightly darker than the maximum white display state by design). Further, the black display state in the embodiment means that the absolute value of the potential difference between the first counter electrode 21 provided in the reflective area RA and the first pixel electrode 20A is 8 volts, and the second counter provided in the transmissive area TA. The absolute value of the potential difference between the electrode 22 and the second pixel electrode 20B is set to 2 volts (that is, a state slightly brighter than the maximum black display state in terms of design).

As shown in FIG. 8, the first row corresponding to the signal lines SL ₁ to be described later by the unit display area UA _{1_1} ~UA _{1_4} is constructed, four lines corresponding to the signal line SL ₄ by the unit display area UA _{4_1} ~UA _{4_4} The eyes are composed. Similarly, configured second line by the unit display area UA _{2_1} ~UA _{2_4} corresponding to the signal line SL ₂ is, the third line corresponding to the signal line SL ₃ by the unit display area UA _{3_1} ~UA _{3_4} is formed However, these notations are omitted in FIG. Further, the reflection area RA and the transmission area TA constituting the unit display area UA _{1_1} are represented as a reflection area RA _{1_1} and a transmission area TA _{1_1} , respectively. The same applies to the other unit display areas UA. The same applies to other embodiments described later.

  As shown in FIG. 8, an input signal for an image to be displayed is input to the control circuit 70. The scanning signal driving circuit 71, the video signal driving circuit 72, and the common electrode driving circuit 73 operate at a predetermined timing in accordance with a command from the control circuit 70.

In the liquid crystal display device according to the first embodiment, scanning by the first to Mth scanning signal lines SL (M = 4 in the example shown in FIG. 8) for forming a certain frame is completed. time, the m-th (where, m = 1, 2, ..., M) in each unit display area UA corresponding to the scanning signal line SL _m of the first counter electrode 21, a first voltage V _{1_m} is applied The second voltage V 2 — _m is applied to the second counter electrode 22. In other words, the voltage of the first common is applied to the first counter electrode 21 of the first row of the unit display area UA _{1_1} ~UA _{1_4,} second voltage common to each second counter electrode 22 is Applied. The same applies to the unit display areas UA in the second and subsequent lines. The same applies to a second embodiment, a third embodiment, and a fourth embodiment which will be described later.

More specifically, as shown in FIG. 8, the liquid crystal display device of Example 1 includes P common electrodes CL (where P = 2M, P = 8 in the example shown in FIG. 8). Yes. Of the first counter electrode 21 or the second counter electrode 22 of each unit display area UA corresponding to the _mth scanning signal line SLm, either one of the counter electrodes (in the reflection area RA in the example shown in FIG. 8). The provided first counter electrode 21) and the p-th (p = 2m−1) common electrode line CL _p are connected. Also, the other counter electrode (in the example shown in FIG. 8, the second counter electrode 22 provided in the transmission region TA) and the (p + 1) th common electrode line CL _{p + 1} are connected. In the first embodiment, the unit display areas UA constituting adjacent rows are arranged so that the reflection area RA and the transmission area TA are opposed to each other. The schematic structure of the first counter electrode 21 and the second counter electrode 22 is as shown in FIG.

  A first voltage is applied to the first counter electrode 21 via a common electrode line CL connected to the first counter electrode 21, and the second counter electrode 22 is connected to the second counter electrode 22. The second voltage is applied through the common electrode line CL. As a result, a common first voltage is applied to the first counter electrode 21 in the unit display area UA of each row, and a common second voltage is applied to each second counter electrode 22.

  9 and 10, the left side of the figure shows a timing chart when an even frame is formed, and the right side of the figure shows a timing chart when an odd frame is formed. The same applies to the drawings relating to other embodiments described later.

9 and 10, Vpx _{1_1} indicates the voltage of the pixel electrode (specifically, the first pixel electrode 20A and the second pixel electrode 20B) corresponding to the unit display area UA _{1_1} . The same is true for Vpx _{2_1} ~Vpx _{4_1.} CL ₁ indicates the voltage of each common electrode line CL ₁ . The same applies to the CL ₂ ~CL _8. The same applies to the drawings relating to other embodiments described later.

9 and 10, “Vpx _{1_1} -CL ₁ ” corresponds to the potential difference between the first pixel electrode 20A corresponding to the unit display area UA _{1_1} and the first counter electrode 21, and “Vpx _{1_1} -CL _2”. "Corresponds to the potential difference between the second pixel electrode 20B and the second counter electrode 22 corresponding to the unit display area UA _{1_1} . The same applies to the "Vpx _{2_1} -CL _3" - "Vpx _{4_1} -CL _8". The same applies to FIG. 17 in Example 2 described later.

That is, "Vpx _{1_1} -CL _1" - "Vpx _{4_1} -CL _8" is the waveform shown in, respectively, the reflective area RA _{1_1} constituting the unit display region arrays in the first column shown in FIG. 8, the transmissive region TA _{1_1,} reflecting A waveform of a potential difference between the pixel electrode and the counter electrode in the region RA _{2_1} , the transmission region TA _{2_1} , the reflection region RA _{3_1} , the transmission region TA _{3_1} , the reflection region RA _{4_1} , and the transmission region TA _{4_1} is shown. In the examples shown in FIGS. 9 and 10, since the voltages applied to the video signal lines VL _{1 to} VL ₄ are set to the same value, the above waveform is substantially in the unit display area UA of each row. The potential difference between the first pixel electrode 20A and the first counter electrode 21 provided in the reflective region RA and the potential difference between the second pixel electrode 20B and the second counter electrode 22 provided in the transmissive region TA. Also correspond. The same applies to FIG. 17 in Example 2 described later.

As shown in FIG. 9 and FIG. 10, scanning pulses are sequentially applied from the scanning signal driving circuit 71 to the scanning signal lines SL _{1 to} SL ₄ . For example, while the scan pulse of the scanning signal line SL ₁ is applied, the transistor 14 of the unit display region of the first row UA _{1_1} ~UA _{1_4} is turned on, the pixel electrodes of the respective unit display area UA, the video signal driving A third voltage is applied as a video signal from the circuit 72 via the video signal lines VL _{1 to} VL ₄ . Then, after the scanning pulse of the scanning signal line SL ₁ is finished, the transistor 14 of each unit display area UA in the first row is turned off. The potential difference between the first pixel electrode 20A and the first counter electrode 21 in each unit display area UA is held by the first storage capacitor 24, and the potential difference between the second pixel electrode 20B and the second counter electrode 22 is the first. 2 is held by the holding capacitor 25. The same applies to the unit display areas UA in the second and subsequent lines. As described above, the liquid crystal display device of Example 1 is line-sequentially driven. The same applies to other embodiments described later.

  The operation in the white display state will be described below with reference to FIG.

As shown in FIG. 9, the formation of the even frame starts from the period Te _A. The length of each period shown in FIG. 9 including the period Te _A is a so-called horizontal scanning period (1H). The state before the period Te _A is the state after the formation of the previous frame (that is, the immediately preceding odd frame) is completed, and is basically the same as the state after the period To _E after the odd frame formation shown in FIG. It is.

[Before period To _Z ]
In this state, the voltage of a certain value is connected to the transmission region TA from the common electrode driving circuit 73 as V ₀ (for convenience, it is treated as V ₀ = 0 V including other embodiments described later). V ₀ (= 0 volts) for the common electrode lines CL ₂ , CL ₄ , CL ₆ , CL ₈ , V ₀ +10 volts (= 10 volts) for the common electrode lines CL ₁ , CL ₅ , and the common electrode line CL ₃ , CL ₇ is applied with a voltage of V ₀ −10 volts (= −10 volts). The value of Vpx _{1_1} ~Vpx _{4_1,} upon the immediately preceding odd frame forming, voltage applied through the video signal line VL ₁ is is a value of the voltage held by the first holding capacitor 24 and the second storage capacitor 25 . Vpx _{1_1,} the value of Vpx _{3_1} is V ₀ +8 volts (= 8 volts), Vpx _{2_1,} the value of Vpx _{4_1} is V ₀ -8 volts (= -8 volts).

[Period Te _A ]
In the period Te _A , V ₀ -8 volts (= -8 volts) is applied from the video signal drive circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₁ . Further, a voltage of V ₀ −10 volts (= −10 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₁ (that is, the voltage of the common electrode line CL ₁ is changed from +10 volts to −10 volts). ).

It is also possible to aspects varied prior to than the beginning of the common electrode line CL ₁ of the voltage period Te _A. The same applies to other periods Te _{B to} Te _D and To _{A to} To _D described later. After determining the voltage of the common electrode line CL, the voltage is applied from the video signal line VL to the first pixel electrode 20A and the second pixel electrode 20B of the unit display area UA, thereby more effectively the first storage capacitor 24. In addition, the second holding capacitor 25 can hold the potential difference. Although depending on the configuration of the liquid crystal display device, for example, a mode in which the voltage of the common electrode line CL is changed in advance by about 0 to several H may be employed. The same applies to other embodiments described later. Here, before the period To _Z , the transistor 14 in the unit display area UA is in an off state. Therefore, the potential of the pixel electrode in the unit display area UA in the first row depends on the voltage of the common electrode line CL and the amount of charge written in the first storage capacitor 24 and the second storage capacitor 25 by the previous odd-numbered frame scan. Determined. Therefore, for example, when the voltage applied to the common electrode line CL ₁ changes in the period To _Z preceding 1H, the first row for the common electrode lines CL ₁ and CL ₂ before the period To _Y and in the period To _Z. The potential of the pixel electrode in the unit display area UA changes (the voltage division relationship changes). For this reason, there is a possibility that the luminance change of the unit display area UA in the first row occurs in the period To _Z. However, the above change occurs in a time sufficiently short with respect to the time for forming one frame, and can be ignored in practice. In the third embodiment, the fourth embodiment, and the fifth embodiment, which will be described later, the voltage of the common electrode line CL is changed in advance. For the sake of convenience, the timing charts shown in the drawings used to describe these examples are shown assuming that there is no change in the voltage division relationship.

In the period Te _A, transistor 14 of the first row of the unit display the scan pulse of the scanning signal lines SL ₁ area UA _{1_1} ~UA _{1_4} is turned on, the video signal line VL ₁ ~VL ₄ from the video signal driving circuit 72 Accordingly, a voltage of −8 volts is applied to the first pixel electrode 20A and the second pixel electrode 20B in each unit display area UA. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₁ is finished.

[Period Te _B ]
In the period Te _B , V ₀ +8 volts (= 8 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₂ . Further, a voltage of V ₀ +10 volts (= 10 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₃ (that is, the voltage of the common electrode line CL ₃ is changed from −10 volts to +10 volts).

In the same manner as described above, the transistor 14 of the unit of the second row display area UA _{2_1} ~UA _{2_4} is turned on, the video signal driving circuit 72 through the video signal line VL ₁ ~VL _4, each unit display area UA A voltage of 8 volts is applied to the first pixel electrode 20A and the second pixel electrode 20B. Applied voltage, after the scan pulse end scanning signal line SL ₂ is also held by the first holding capacitor 24 and the second storage capacitor 25 of each unit display area UA.

[Period Te _C ]
In the period Te _C , V ₀ -8 volts (= -8 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₃ . Further, a voltage of V ₀ −10 volts (= −10 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₅ (that is, the voltage of the common electrode line CL ₅ is changed from +10 volts to −10 volts). ).

In the same manner as described above, the transistor 14 of the unit display region UA _{3_1} ~UA _{3_4} of the third row is turned ON, the video signal driving circuit 72 through the video signal line VL ₁ ~VL _4, each unit display area UA A voltage of −8 volts is applied to the first pixel electrode 20A and the second pixel electrode 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₃ is finished.

[Period Te _D ]
In the period Te _D, V ₀ +8 volts video signal drive circuit 72 to the video signal line VL ₁ ~VL ₄ (= 8 volts) is applied, the scan pulse is applied to the scanning signal line SL _4. Further, a voltage of V ₀ +10 volts (= 10 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₇ (that is, the voltage of the common electrode line CL ₇ is changed from −10 volts to 10 volts).

In the same manner as described above, the transistor 14 of the unit display region UA _{4_1} ~UA _{4_4} in the fourth row are turned on, the video signal driving circuit 72 through the video signal line VL ₁ ~VL _4, each unit display area UA A voltage of 8 volts is applied to the first pixel electrode 20A and the second pixel electrode 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 of each unit display area UA even after the scanning pulse of the scanning signal line SL ₄ is finished.

The formation of the even frame is completed by the operation of the periods Te _{A to} Te _D described above. At the point of time Te _E when the formation of the even frame is finished,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = -2 volts Transmission region TA Potential difference at _{2_1} Vpx _{2_1} -CL ₄ = 8 volts Potential difference at reflection region RA _{3_1} ... Vpx _{3_1} -CL ₅ = 2 volts Potential difference at transmission region TA _{3_1} ... Vpx _{3_1} -CL ₆ = -8 volts Potential difference at reflection region RA _{3_1} ... the potential ... vpx _{4_1} -CL ₈ = ₈ volts in vpx _{4_1} -CL ₇ = -2 volts transmissive area TA _{4_1.}

  Accordingly, when the formation of the even frame is finished, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 2 volts, and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

Next, the formation of odd frames will be described. The formation of the even frame starts from period To _A. The state before the period To _A is the state after the formation of the previous frame (that is, the immediately preceding even frame) is completed, and is basically the same as the state after the period Te _E when the even frame formation shown in FIG. It is.

The operations in the period To _A to the period To _D are basically the same as those described for the [period Te _A ] to the [period Te _D ], and the video signal lines VL _{1 to} VL ₄ and the common electrode lines CL ₁ , Since the waveform of the voltage applied to CL ₃ , CL ₅ , and CL ₇ may be reversed, description thereof is omitted.

Odd-frame formation is completed by the operations in the periods To _{A to} To _D. At the point of time To _E when the formation of the odd-numbered frame is finished
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = 2 volts Transmission region TA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₄ potential difference = -8 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 5 =} -2 potential difference volt transmission area _{TA 3_1 ... Vpx 3_1 -CL 6 =} 8 volts reflective area RA _{4_1} in ... the potential ... vpx _{4_1} -CL ₈ = -8 volts in vpx _{4_1} -CL ₇ = 2 volts transmissive area TA _{4_1.} Although the polarity is inverted from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflective area RA is 2 volts, and the second pixel electrode 20B in each transmissive area TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

The relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is as follows. That is, for example, when scanning by the first to Mth scanning signal lines SL for forming an even-numbered frame is completed, a certain unit display area UA is applied to the first counter electrode 21. The first voltage is _represented by V 1 _—evenF , the second voltage applied to the second counter electrode 22 is represented by V 2 _—evenF, and the first to Mth scanning signal lines SL for forming odd-numbered frames are used. When the scanning is completed, for the certain unit display area UA, the first voltage applied to the first counter electrode 21 is V 1 _—oddF , and the second voltage applied to the second counter electrode 22 is V 2 _—oddF. It expresses. The relationship V _{1 —evenF} −V _{2 —evenF} = − (V 1 _—oddF— V 2 _—oddF ) is satisfied. In the liquid crystal display device 1 of Example 1, the direction of the electric field applied to the liquid crystal layer 30 changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented. FIG. 11A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the even frame. FIG. 11B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the odd frame. In FIG. 11, for convenience, the unit display areas UA are described as being arranged in a matrix. The same applies to FIGS. 16, 24, and 28 described later.

In this case, the relationship V 2 _—evenF = V 2 _—oddF is satisfied. That is, a constant voltage V ₀ (= 0 volt) is always applied to the common electrode lines CL ₂ , CL ₄ , CL ₆ , CL ₈ connected to the transmission region TA regardless of the even frame / odd frame. The Therefore, the configuration of the common electrode drive circuit 73 that applies a voltage to the second counter electrode 22 can be simplified.

Next, when attention is paid to the relationship at the time when scanning by the first to Mth scanning signal lines SL for forming a certain frame is completed, the mth (where m = 1, 2,..., M In each unit display area UA corresponding to the scanning signal line SL _m ), the first voltage V 1 — _m is applied to the first counter electrode 21, and the second voltage V 1 is applied to the second counter electrode 22. _{2_m} is applied. Then, the voltage V _{2_M} is constant V _{2_Const,} voltage V _{1_m} a constant value when the value of m is odd V _{1_Odd,} constant value V _{1_Even} different from the V _{1_Odd} when the value of m is an even number Satisfies the relationship. In addition to this, the relationship V _{1 —odd} −V _{2 —const} = − (V 1 _—even— V 2 _—const ) is satisfied. The liquid crystal display device 1 according to the first embodiment that satisfies these relationships includes the unit display areas UA corresponding to the odd-numbered scanning signal lines SL and the unit display areas UA corresponding to the even-numbered scanning signal lines SL. The polarity of the applied voltage is reversed. Thereby, the flicker of the display image can be reduced. FIG. 12 schematically shows the relationship between the first voltage V ₁ , the second voltage V ₂ , and the third voltage V ₃ in each unit display area UA in the odd / even rows.

  The operation in the white display state has been described above with reference to FIG. Next, the operation in the black display state will be described with reference to FIG.

The operation in the black display state is basically the same as the operation in the period Te _A to the period Te _D and the period To _A to the period To _D in FIG. 9, and the voltage applied to the video signal lines VL _{1 to} VL _4. The difference is that the value is changed from 8 volts to 2 volts and from -8 volts to -2 volts. Therefore, the description in each period is omitted.

The even frame formation is completed by the operation of the periods Te _{A to} Te _D in FIG. At the point of time Te _E when the formation of the even frame is finished,
Potential difference in the reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 8 volts Potential difference in the transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -2 volts Potential difference in the reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = -8 volts Transmission region TA potential difference potential ... Vpx _{2_1} -CL ₄ potential difference = 2 volts reflective area RA _{3_1} potential ... Vpx _{3_1} -CL ₅ = 8 volts transmissive area TA _{3_1} in ... Vpx _{3_1} -CL ₆ = -2 volts reflective area RA _{4_1} in _{2_1} ... the potential ... vpx _{4_1} -CL ₈ = 2 volts in vpx _{4_1} -CL ₇ = -8 volts transmissive area TA _{4_1.} Therefore, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 8 volts, and the voltage difference between the second pixel electrode 20B and the second counter electrode 22 in each transmission region TA. The absolute value of the potential difference is 2 volts. Therefore, the difference in operation mode between the transmissive area TA and the reflective area RA is electrically compensated, and an image in a black display state slightly brighter than the maximum black display state in design is displayed.

Further, the formation of the odd-numbered frame is completed by the operation during the period To _{A to} To _D in FIG. At the time point To _E when the formation of the even frame is finished,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -8 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 2 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = 8 volts Transmission region TA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₄ potential difference = -2 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 5 =} -8 potential difference volt transmission area _{TA 3_1 ... Vpx 3_1 -CL 6 =} 2 volts reflective area RA _{4_1} in ... the potential ... vpx _{4_1} -CL ₈ = -2 volts in vpx _{4_1} -CL ₇ = 8 volts transmissive area TA _{4_1.} Although the polarity is reversed from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 8 volts, and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 2 volts. Therefore, the difference in operation mode between the transmissive area TA and the reflective area RA is electrically compensated, and an image in a black display state slightly brighter than the maximum black display state in design is displayed.

The operation of the liquid crystal display device of Example 1 has been described above. In the above-described configuration, when a constant voltage V ₀ (= 0 volt) is always applied to the common electrode lines CL ₂ , CL ₄ , CL ₆ , CL ₈ connected to the transmission region TA. However, it is not limited to this. The common electrode lines CL ₂ , CL ₄ , CL ₆ , and CL ₈ and the common electrode lines CL ₁ , CL ₃ , CL ₅ , and CL ₇ may be replaced with each other.

Even in the case where the relationship between the voltages applied to the common electrode lines CL ₂ , CL ₄ , CL ₆ , and CL ₈ and the common electrode lines CL ₁ , CL ₃ , CL ₅ , and CL ₇ is changed, the above-described configuration is used. Similarly, when attention is paid to the relationship at the time when scanning by the first to Mth scanning signal lines SL for forming a certain frame is completed, the mth (where m = 1, 2, ..., in each unit display area UA corresponding to the scanning signal line SL _m of M), the first counter electrode 21, a first voltage V _{1_m} is applied to the second counter electrode 22, the second The voltage V 2 — _m is applied. Then, the voltage V _{1_m} is constant V _{1_Const,} voltage V _{2_M} a constant value when the value of m is odd V _{2_Odd,} constant value V _{2_Even} different from the V _{2_Odd} when the value of m is an even number Satisfy the relationship. In addition to this, the relationship V ₁ — _const −V 2 _—odd = − (V 1 _—const −V 2 _—even ) is satisfied. Also in this configuration, the polarity of the applied voltage is inverted between the unit display areas UA corresponding to the odd-numbered scanning signal lines SL and the unit display areas UA corresponding to the even-numbered scanning signal lines SL. Therefore, the flicker of the display image can be reduced.

  Next, a modification of the first embodiment will be briefly described. FIG. 13 is a schematic configuration diagram of a modified example of the liquid crystal display device according to the first embodiment.

In FIG. 8, the unit display areas UA constituting adjacent rows are arranged such that the reflection area RA and the transmission area TA are opposed to each other. On the other hand, in the modification shown in FIG. 13, the same kind of regions are arranged so as to face each other. More specifically, the modification shown in FIG. 13 has a configuration in which the reflection area RA and the transmission area TA of each unit display area UA corresponding to the scanning signal lines SL ₂ and SL ₄ are replaced with respect to FIG. .

  In a region where the reflection regions RA are opposed to each other, a reflection plate or the like provided in the reflection region RA can be continuously formed so as to extend over the plurality of unit display regions UA. The same applies to various components formed in the transmission region. According to the above-described configuration, the dividing step of the reflector or the like is not necessary, and the structural margin of the liquid crystal display device can be further increased.

FIG. 14 is a schematic timing chart when the operation corresponding to the operation shown in FIG. 9 described above is performed in the modification shown in FIG. When performing an operation corresponding to the operation illustrated in FIG. 9 described above, the voltages applied to some of the common electrode lines CL may be switched. Specifically, in FIG. 9, the waveform of the common electrode line CL _{3 and} the waveform of the common electrode line CL ₄ may be interchanged, and the waveform of the common electrode line CL _{7 and} the waveform of the common electrode line CL ₈ may be interchanged (note that Accordingly, it replaced and the waveform of the waveform and Vpx _{2_1} -CL ₄ of Vpx _{2_1} -CL ₃ shown in FIG. 9, switched and the waveforms of the Vpx _{4_1} -CL ₈ of Vpx _{4_1} -CL _7). In the modification, the same applies to the case where the same operation as that shown in FIG. 10 is performed. FIG. 15 is a schematic timing chart when the operation corresponding to the operation shown in FIG. 10 described above is performed in the modification shown in FIG. FIG. 16A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the even frame in the modification. FIG. 16B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the odd frame.

  The second embodiment is a modification of the first embodiment. In contrast to the first embodiment, the absolute value of the voltage applied to the video signal line VL and the common electrode line CL can be reduced. The structure itself of the liquid crystal display device 2 of the second embodiment is the same as that described in the first embodiment, and only the operation is different. Therefore, the description of the structure of the liquid crystal display device is omitted.

  For the second embodiment and the embodiments described later, only the operation in the white display state will be described for convenience. FIG. 17 is a schematic timing chart of the operation in the white display state of the liquid crystal display device 2 according to the second embodiment.

As in FIG. 9 in the first embodiment, even-numbered frames are formed in the period Te _{A in} FIG. The state before the period Te _A is the state after the formation of the previous frame (that is, the immediately preceding odd frame) is completed, and is basically the same as the state after the period To _E after the odd frame formation shown in FIG. It is.

[Period before To _Z ]
In this state, as V ₀ a voltage of a certain value, from the common electrode driving circuit 73, the common electrode lines _{CL 1, CL 4, CL 5} , CL 8 is, V ₀ +5 volts (= 5 volts), the common electrode A voltage of V ₀ −5 volts (= −5 volts) is applied to the lines CL ₂ , CL ₃ , CL ₆ and CL ₇ . The value of Vpx _{1_1} ~Vpx _{4_1,} upon the immediately preceding odd frame forming, voltage applied through the video signal line VL ₁ is is a value of the voltage held by the first holding capacitor 24 and the second storage capacitor 25 . Vpx _{1_1,} the value of Vpx _{3_1} is V ₀ +3 volts (= 3 volts), Vpx _{2_1,} the value of Vpx _{4_1} is V ₀ -3 volts (= -3 volts).

[Period Te _A ]
In the period Te _A , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₁ . Further, a voltage of V ₀ −5 volts (= −5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₁ (that is, the voltage of the common electrode line CL ₁ is changed from +5 volts to −5 volts). ). In Example 2, varying the voltage applied to the common electrode line CL ₂ adjacent unlike Example 1. More specifically, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₂ (that is, the voltage of the common electrode line CL ₂ is −5 volts to 5 volts). Become).

In the same manner as described in Example 1, in the period Te _A, a first pixel electrode 20A of each unit display area UA of the scanning signal lines SL ₁ unit display of the first row by the scanning pulse area UA _{1_1} ~UA _{1_4} A voltage of −3 volts is applied to the second pixel electrode 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 of each unit display area UA even after the scanning pulse of the scanning signal line SL ₁ is finished.

[Period Te _B ]
In the period Te _B , V ₀ +3 volts (= 3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₂ . Further, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₃ (that is, the voltage of the common electrode line CL ₃ is changed from −5 volts to 5 volts). In the second embodiment, unlike the first embodiment, the voltage applied to the common electrode line CL ₄ is also changed. More specifically, a voltage of V ₀ −5 volts (= −5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₄ (that is, the voltage of the common electrode line CL ₄ is from −5 volts to − 5 volts).

In the same manner as described above, the period in Te _B, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit of the second row display a scan pulse of the scan signal line SL ₂ area UA _{2_1} ~UA _{2_4} A voltage of 3 volts is applied to 20B. Applied voltage, after the scan pulse end scanning signal line SL ₂ is also held by the first holding capacitor 24 and the second storage capacitor 25 of each unit display area UA.

[Period Te _C ]
In the period Te _C , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₃ . Further, a voltage of V ₀ -5 volts (= -5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₅ (that is, the voltage of the common electrode line CL ₅ is changed from 5 volts to -5 volts). ). Further, in the second embodiment, unlike the first embodiment, the voltage applied to the common electrode line CL ₆ is also changed. More specifically, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₆ (that is, the voltage of the common electrode line CL ₆ is −5 volts to 5 volts). Becomes).
.

In the same manner as described above, the period in Te _C, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit display region UA _{3_1} ~UA _{3_4} of the third row by the scanning pulse of the scanning signal line SL ₃ A voltage of -3 volts is applied to 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₃ is finished.

[Period Te _D ]
In the period Te _D, V ₀ +3 volts video signal drive circuit 72 to the video signal line VL ₁ ~VL ₄ (= 3 volts) is applied, the scan pulse is applied to the scanning signal line SL _4. Further, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₇ (that is, the voltage of the common electrode line CL ₇ is changed from −5 volts to 5 volts). Further, in the second embodiment, unlike the first embodiment, the voltage applied to the common electrode line CL ₈ is also changed. More specifically, a voltage of V ₀ −5 volts (= −5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₈ (that is, the voltage of the common electrode line CL ₈ is from −5 volts to − 5 volts).

In the same manner as described above, the period in Te _D, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit display region UA _{4_1} ~UA _{4_4} in the fourth row by the scanning pulse of the scanning signal line SL ₄ A voltage of 3 volts is applied to 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 of each unit display area UA even after the scanning pulse of the scanning signal line SL ₄ is finished.

The formation of the even frame is completed by the operation of the periods Te _{A to} Te _D described above. Similarly to the formation of the even frame in FIG. 9 of the first embodiment, at the time of the period Te _E when the formation of the even frame in the second embodiment is completed,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = -2 volts Transmission region TA potential difference potential ... Vpx _{2_1} -CL ₄ potential difference = 8 volts reflective area RA _{3_1} potential ... Vpx _{3_1} -CL ₅ = 2 volts transmissive area TA _{3_1} in ... Vpx _{3_1} -CL ₆ = -8 volts reflective area RA _{4_1} in _{2_1} ... the potential ... vpx _{4_1} -CL ₈ = ₈ volts in vpx _{4_1} -CL ₇ = -2 volts transmissive area TA _{4_1.} Accordingly, when the formation of the even frame is finished, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 2 volts, and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

Next, the formation of odd frames will be described. The formation of the even frame starts from period To _A. The state before the period To _A is the state after the formation of the previous frame (that is, the immediately preceding even frame) is completed, and is basically the same as the state after the period Te _E when the even frame formation shown in FIG. It is.

The operations in the period To _A to the period To _D are basically the same as those described for the [period Te _A ] to the [period Te _D ], and the video signal lines VL _{1 to} VL ₄ and the common electrode lines CL ₁ to Since the waveform of the voltage applied to CL ₈ may be inverted, description thereof is omitted.

Odd-frame formation is completed by the operations in the periods To _{A to} To _D. Similar to the formation of odd frames in FIG. 9 of the first embodiment, also at the time of the period To _E when the formation of odd frames in the second embodiment is completed,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₃ = 2 volts Transmission region TA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₄ potential difference = -8 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 5 =} -2 potential difference volt transmission area _{TA 3_1 ... Vpx 3_1 -CL 6 =} 8 volts reflective area RA _{4_1} in ... the potential ... vpx _{4_1} -CL ₈ = -8 volts in vpx _{4_1} -CL ₇ = 2 volts transmissive area TA _{4_1.} Although the polarity is inverted from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflective area RA is 2 volts, and the second pixel electrode 20B in each transmissive area TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

  The relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is the same as described in the first embodiment.

That is, for example, when scanning by the first to Mth scanning signal lines SL for forming an even-numbered frame is completed, a certain unit display area UA is applied to the first counter electrode 21. The first voltage is _represented by V 1 _—evenF , the second voltage applied to the second counter electrode 22 is represented by V 2 _—evenF, and the first to Mth scanning signal lines SL for forming odd frames are used. When the scanning is completed, for the certain unit display area UA, the first voltage applied to the first counter electrode 21 is V _{1_oddF} , and the second voltage applied to the second counter electrode 22 is V _{2_oddF.} It expresses. For example, the _relationship V 1 _—evenF −V _{2 —evenF} = − (V 1 _—oddF— V 2 _—oddF ) is satisfied. Also in the liquid crystal display device of Example 2, the direction of the electric field applied to the liquid crystal layer 30 changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented. The polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA is the same as (A) and (B) of FIG. 11 in the first embodiment described above.

Further, in this _case, V 1_evenF = V 2_oddF, and the relationship that _V 1_oddF = V 2_evenF is satisfied. By satisfying this relationship, as described later, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or the second voltage are applied. Since the fluctuation range of the third voltage applied to the pixel electrode 20B can be reduced, the power consumption of the liquid crystal display device can be reduced.

Next, when attention is paid to the relationship at the time when scanning by the first to Mth scanning signal lines SL for forming a certain frame is completed, as in the first embodiment, the mth (where m = , M), in each unit display area UA corresponding to the scanning signal line SL _m , the first voltage V 1 — _m is applied to the first counter electrode 21, and the second counter electrode 22 The second voltage V 2 — _m is applied. Then, the voltage V _{1_m} a constant value V _{1_Odd} when the value of m is an odd number, when the value of m is an even number is constant V _{1_Even} different from the V _{1_Odd,} voltage V _{2_M} the value of m satisfy the relationship of different constant values V _{2_Even} the V _{2_Odd} if a constant value _V 2_odd, the value of m is an even number in If is odd. In addition to _this, V 1_odd = V 2_even, and satisfy the relationship of _V 1_even = V 2_odd. Also in the liquid crystal display device according to the second embodiment that satisfies this relationship, application is performed in each unit display area UA corresponding to the odd-numbered scanning signal line SL and in each unit display area UA corresponding to the even-numbered scanning signal line SL. The polarity of the applied voltage is reversed. Thereby, the flicker of the display image can be reduced.

Furthermore, in the liquid crystal display device of Example 2 that satisfies the above-described relationship, the voltage applied to the common electrode line CL when driven in the white display state is −5 volts / 5 volts, and the video signal line VL The voltage applied to is -3 volts / 3 volts. On the other hand, in the first embodiment described above, the voltage applied to the common electrode line CL when driving in the white display state is −10 volts / 10 volts, and the voltage applied to the video signal line VL is −8 volts / 8. It is a bolt. Therefore, according to the liquid crystal display device of Example 2, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or the first voltage. Since the fluctuation range of the third voltage applied to the two-pixel electrode 20B can be reduced, the power consumption of the liquid crystal display device can be reduced. FIG. 18 schematically shows the relationship among the first voltage V ₁ , the second voltage V ₂ , and the third voltage V ₃ in each unit display area UA in the odd / even rows.

Next, a modification of the second embodiment will be briefly described. The modified example of the second embodiment performs the same operation as the operation illustrated in FIG. 17 described above in the configuration illustrated in FIG. 13 described as the modified example of the first embodiment. FIG. 19 is a schematic timing chart when the operation corresponding to the operation shown in FIG. 17 described above is performed in the modification shown in FIG. As described in the first embodiment, in this case as well, the voltages applied to some of the common electrode lines CL may be switched. Specifically, replacing the waveform of the common electrode line CL ₃ and the waveform of the common electrode line CL ₄ 17 may be interchanged with the waveform of the common electrode line CL ₇ and the waveform of the common electrode line CL ₈ (Note, Accordingly, it replaced and the waveform of the waveform and Vpx _{2_1} -CL ₄ of Vpx _{2_1} -CL ₃ shown in FIG. 17, switched and the waveforms of the Vpx _{4_1} -CL ₈ of Vpx _{4_1} -CL _7). The polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the modification is the same as that in FIGS. 16A and 16B of the modification in the first embodiment described above.

  Example 3 also relates to the liquid crystal display device of the present invention. The main difference from the first embodiment is that the number of common electrode lines CL is reduced.

  FIG. 20 is a schematic configuration diagram of the liquid crystal display device 3 according to the third embodiment. FIG. 21 is a schematic timing chart of the operation in the white display state of the liquid crystal display device 3 according to the third embodiment.

As shown in FIG. 20, the liquid crystal display device 3 of Example 3 includes P common electrodes CL (where P = M + 1, and in the example shown in FIG. 20, M = 4, so P = 5). ing. The p-th (where p is a natural number of 2 to M−1) common electrode line CL _p is connected to the m′-th (where m ′ = p−1) scanning signal line SL _{m ′} . One of the first counter electrode 21 and the second counter electrode 22 of each corresponding unit display area UA (the second counter electrode 22 of the transmission area TA in the example shown in FIG. 20), and the (m Of the first counter electrode 21 or the second counter electrode 22 of each unit display area UA corresponding to the '+1) th scanning signal line SL _{m ′ + 1} , the other counter electrode (in the example shown in FIG. 20, the reflection area RA). The first counter electrode 21) is connected.

Of the first counter electrode 21 or the second counter electrode 22 of each unit display area UA corresponding to the _first scan signal line SL ₁ , an electrode (not connected to the _second common electrode line SL ₂ ) in the example shown in FIG. 20, a first counter electrode 21) of the reflective area RA, 1st and the common electrode line CL ₁ is connected.

Furthermore, (in the example shown in FIG. 20, M = 4) the M-th of the first counter electrode 21 or the second counter electrode 22 of the unit display region UA that corresponds to the scanning signal line SL _M, the (P- 1) An electrode (in the example shown in FIG. 20, the second counter electrode 22 in the transmission region TA) that is not connected to the common electrode line CL _P-1 (P-1 = 4 in the example shown in FIG. 20) (in the example shown in FIG. 20, P = 5) the P th and the common electrode line CL _P in is connected. A first voltage is applied to the first counter electrode 21 via the common electrode line CL connected to the first counter electrode 21, and the second counter electrode 22 is connected to the second counter electrode 22. A second voltage is applied via the connected common electrode line CL. As a result, a common first voltage is applied to the first counter electrode 21 of the unit display area UA in each row, A common second voltage is applied to the two counter electrodes 22.

The liquid crystal display device 3 of Example 3 is different from the liquid crystal display device 1 of Example 1 shown in FIG. 8 in the unit display areas UA _{1_1 to} UA _{1_4} in the first row and the unit display areas UA _{2_1 to} UA in the second row. The number of common electrode lines CL positioned between _{2_4} is reduced by one. Similarly, one common electrode line positioned between the second row, the third row, the third row, and the fourth row is also reduced. Note that the common electrode line CL ₂ -CL ₄ shown in FIG. 20, a first counter electrode 21 and the second counter electrode 22 are connected together. Accordingly, the voltage applied to these common electrode lines CL is the “first voltage” for the first counter electrode 21 and the “second voltage” for the second counter electrode 22. The same applies to other embodiments described later.

In the liquid crystal display device 3 of the third embodiment, for example, the second counter electrode 22 is the common electrode line CL ₂ provided in the transmission area TA of the first row of the unit display area UA _{1_1} ~UA _{1_4,} 2 The first counter electrode 21 provided in the reflection area RA of the unit display areas UA _{2_1 to} UA 2_4 in the _row is connected. When applying a voltage from the video signal line VL to the unit display area UA in the first row, the potentials of the common electrode lines CL ₁ and CL ₂ need to be determined. In addition, when applying a voltage from the video signal line VL to the unit display area UA in the second row, the voltages of the common electrode lines CL ₂ and CL ₃ need to be determined. Thus, for example, after the first row unit display area UA of the scan, when performing the scanning of the second line of the unit display area UA, the switching of the voltage applied to the common electrode line CL _2, line 1 The unit display area UA needs to be scanned as a reference. The same applies to the common electrode lines CL ₃ and CL ₄ . The same applies to other embodiments described later.

In FIG. 21, “Vpx _{1_1} -CL ₁ ” corresponds to the potential difference between the first pixel electrode 20A corresponding to the unit display area UA _{1_1} and the first counter electrode 21, and “Vpx _{1_1} -CL ₂ ” This corresponds to the potential difference between the second pixel electrode 20B and the second counter electrode 22 corresponding to the unit display area UA _{1_1} . The same applies to the "Vpx _{2_1} -CL _2" - "Vpx _{4_1} -CL _5".

That is, "Vpx _{1_1} -CL _1" - "Vpx _{4_1} -CL _5" is the waveform shown in, respectively, the reflective area RA _{1_1} constituting the unit display region arrays in the first column shown in FIG. 20, the transmissive region TA _{1_1,} reflecting A waveform of a potential difference between the pixel electrode and the counter electrode in the region RA _{2_1} , the transmission region TA _{2_1} , the reflection region RA _{3_1} , the transmission region TA _{3_1} , the reflection region RA _{4_1} , and the transmission region TA _{4_1} is shown. In the example shown in FIG. 21, since the voltages applied to the video signal lines VL _{1 to} VL ₄ are set to the same value, the above waveform is substantially the reflection area RA in the unit display area UA of each row. This also corresponds to the potential difference between the first pixel electrode 20A and the first counter electrode 21 provided in the transmissive area TA and the potential difference between the second pixel electrode 20B and the second counter electrode 22 provided in the transmission area TA. . The same applies to FIG. 23 in Example 4 to be described later.

  Hereinafter, the operation of the liquid crystal display device 3 according to the third embodiment in the white display state will be described with reference to FIG.

As in the other embodiments described above, even-numbered frame formation also starts in period Te _{A in} FIG. The state before the period Te _A is the state after the formation of the previous frame (that is, the immediately preceding odd frame) is completed, and is basically the same as the state after the period To _E after the odd frame formation shown in FIG. It is.

[Before period To _Y ]
In this state, the voltage of a certain value is set to V ₀ , and V ₀ +5 volts (= 5 volts) is applied to the common electrode lines CL ₁ , CL ₃ , and CL ₅ from the common electrode drive circuit 73, and the common electrode line CL _2. , CL ₄ is applied with a voltage of V ₀ −5 volts (= −5 volts). The value of Vpx _{1_1} ~Vpx _{4_1,} upon the immediately preceding odd frame forming, voltage applied through the video signal line VL ₁ is is a value of the voltage held by the first holding capacitor 24 and the second storage capacitor 25 . Similar to FIG. 17 in Embodiment 2, Vpx _{1_1,} Vpx _{3_1} is V ₀ +3 volts (= 3 volts), Vpx _{2_1,} Vpx _{4_1} is V ₀ -3 volts (= -3 volts).

[Period To _Z ]
In the period To _Z , a voltage of V ₀ −5 volts (= −5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₁ (that is, the voltage of the common electrode line CL ₁ is from +5 volts to − 5 volts). Note that changing the voltage of the common electrode line CL ₁ in the period the To _Z in the period Te _A ~Te _D, in which the change of the voltage of the common electrode line CL ₂ -CL ₅ is tailored to take place every 1H . The same applies to Example 4 and Example 5 described later.

[Period Te _A ]
In the period Te _A , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₁ . In addition, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₂ (that is, the voltage of the common electrode line CL ₂ is changed from −5 volts to 5 volts).

In the same manner as described in Example 1, in the period Te _A, a first pixel electrode 20A of each unit display area UA of the scanning signal lines SL ₁ unit display of the first row by the scanning pulse area UA _{1_1} ~UA _{1_4} A voltage of −3 volts is applied to the second pixel electrode 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₁ is finished.

[Period Te _B ]
In the period Te _B , V ₀ +3 volts (= 3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₂ . Further, a voltage of V ₀ -5 volts (= -5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₃ (that is, the voltage of the common electrode line CL ₃ is changed from 5 volts to -5 volts). ).

In the same manner as described above, the period in Te _B, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit of the second row display a scan pulse of the scan signal line SL ₂ area UA _{2_1} ~UA _{2_4} A voltage of 3 volts is applied to 20B. Applied voltage, after the scan pulse end scanning signal line SL ₂ is also held by the first holding capacitor 24 and the second storage capacitor 25 of each unit display area UA.

[Period Te _C ]
In the period Te _C , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₃ . Further, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₄ (that is, the voltage of the common electrode line CL ₄ is changed from −5 volts to +5 volts).

In the same manner as described above, the period in Te _C, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit display region UA _{3_1} ~UA _{3_4} of the third row by the scanning pulse of the scanning signal line SL ₃ A voltage of -3 volts is applied to 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₃ is finished.

[Period Te _D ]
In the period Te _D, V ₀ +3 volts video signal drive circuit 72 to the video signal line VL ₁ ~VL ₄ (= 3 volts) is applied, the scan pulse is applied to the scanning signal line SL _4. Further, a voltage of V ₀ −5 volts (= −5 volts) is applied to the common electrode line CL ₅ from the common electrode drive circuit 73 (that is, the voltage of the common electrode line CL ₅ is from −5 volts to − 5 volts).

In the same manner as described above, the period in Te _D, the first pixel electrode 20A and the second pixel electrode of each unit display area UA of the unit display region UA _{4_1} ~UA _{4_4} in the fourth row by the scanning pulse of the scanning signal line SL ₄ A voltage of 3 volts is applied to 20B. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 of each unit display area UA even after the scanning pulse of the scanning signal line SL ₄ is finished.

The formation of the even frame is completed by the operation of the periods Te _{A to} Te _D described above. Similarly to the formation of the even frame in FIG. 9 of the first embodiment, at the time of the period Te _E when the formation of the even frame in the third embodiment is finished,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₂ = -2 volts Transmission region TA potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = 8 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 3 =} 2 difference in volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} -8 volts reflective area RA _{4_1} in _{2_1} ... the potential ... vpx _{4_1} -CL ₅ = 8 volts in vpx _{4_1} -CL ₄ = -2 volts transmissive area TA _{4_1.} Accordingly, when the formation of the even frame is finished, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 2 volts, and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

Next, the formation of odd frames will be described. The formation of the even frame starts from period To _A. The state before the period To _A is the state after the formation of the previous frame (that is, the immediately preceding even frame) is completed, and is basically the same as the state after the period Te _E when the even frame formation shown in FIG. It is.

The operations in the period To _A to the period To _D are basically the same as those described for the [period Te _A ] to the [period Te _D ], and the video signal lines VL _{1 to} VL ₄ and the common electrode lines CL ₁ to Since the waveform of the voltage applied to CL ₅ may be inverted, description thereof is omitted.

Odd-frame formation is completed by the operations in the periods To _{A to} To _D. Similar to the formation of odd frames in FIG. 9 of the first embodiment, also at the time of the period To _E when the formation of odd frames in the third embodiment is completed,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₂ = 2 volts Transmission region TA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = -8 volts reflective area RA _{3_1} ... Vpx _{3_1} -CL ₃ potential difference = -2 volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} 8 volts reflective area RA _{4_1} in ... the potential ... vpx _{4_1} -CL ₅ = -8 volts in vpx _{4_1} -CL ₄ = 2 volts transmissive area TA _{4_1.} Although the polarity is inverted from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflective area RA is 2 volts, and the second pixel electrode 20B in each transmissive area TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

  The relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is the same as described in the first embodiment.

That is, the relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is as follows. That is, for example, when scanning by the first to Mth scanning signal lines SL for forming an even-numbered frame is completed, a certain unit display area UA is applied to the first counter electrode 21. The first voltage is _represented by V 1 _—evenF , the second voltage applied to the second counter electrode 22 is represented by V 2 _—evenF, and the first to Mth scanning signal lines SL for forming odd frames are used. When the scanning is completed, for the certain unit display area UA, the first voltage applied to the first counter electrode 21 is V _{1_oddF} , and the second voltage applied to the second counter electrode 22 is V _{2_oddF.} It expresses. The relationship V _{1 —evenF} −V _{2 —evenF} = − (V 1 _—oddF— V 2 _—oddF ) is satisfied. Also in the liquid crystal display device of Example 3, the direction of the electric field applied to the liquid crystal layer 30 changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented. The polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA is the same as (A) and (B) of FIG. 11 in the first embodiment described above.

Further, in this _case, V 1_evenF = V 2_oddF, and the relationship that _V 1_oddF = V 2_evenF is satisfied. By satisfying this relationship, as in the second embodiment, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or Since the fluctuation range of the third voltage applied to the second pixel electrode 20B can be reduced, the power consumption of the liquid crystal display device can be reduced.

Next, when attention is paid to the relationship when the scanning by the first to Mth scanning signal lines SL for forming a certain frame is completed, the mth (where m = 1, 2,..., M In each unit display area UA corresponding to the scanning signal line SL _m ), the first voltage V 1 — _m is applied to the first counter electrode 21 as in the first embodiment, and the second counter electrode 22 The second voltage V 2 — _m is applied. Then, in the same manner as in Example 2, the voltage V _{1_m} a constant value V _{1_Odd} when the value of m is an odd number, when the value of m is an even number is constant V _{1_Even} different from the V _{1_Odd,} voltage V _{2_M} a constant value V _{2_Odd} when the value of m is an odd number, when the value of m is an even number satisfies the relationship of different constant values V _{2_Even} the _V 2_odd. In addition to _this, V 1_odd = V 2_even, and satisfy the relationship of _V 1_even = V 2_odd. Also in the liquid crystal display device according to the third embodiment that satisfies this relationship, the voltage is applied between each unit display area UA corresponding to the odd-numbered scanning signal line SL and each unit display area UA corresponding to the even-numbered scanning signal line SL. The polarity of the applied voltage is reversed. Thereby, the flicker of the display image can be reduced. The relationship among the first voltage V ₁ , the second voltage V ₂ , and the third voltage V ₃ in each of the unit display areas UA in the odd-numbered / even-numbered lines is the same as that in FIG. It is.

  In the liquid crystal display device of Example 3 that satisfies the above-described relationship, the voltage applied to the common electrode line CL when driven in the white display state is −5 volts to 5 volts, as in Example 2. The voltage applied to the video signal line VL is -3 volts to 3 volts. Therefore, according to the liquid crystal display device of Example 3, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or the first voltage. The fluctuation range of the third voltage applied to the two-pixel electrode 20B can be reduced, and the number of common electrode lines can be reduced.

  Example 4 also relates to the liquid crystal display device of the present invention. The third embodiment is mainly different from the third embodiment in that only the same kind of pixel electrode is connected to each common electrode line.

  FIG. 22 is a schematic configuration diagram of the liquid crystal display device 4 of the fourth embodiment. FIG. 23 is a schematic timing chart of the operation in the white display state of the liquid crystal display device 4 according to the fourth embodiment.

As shown in FIG. 22, the liquid crystal display device 4 of Example 4 includes P common electrodes CL (where P = M + 1, and in the example shown in FIG. 22, M = 4, so P = 5). ing. The p-th (where p is a natural number greater than or equal to 2 and less than or equal to M) common electrode line CL _p is the m′th (where m ′ = p−1) and (m ′ + 1) th scan. Either one of the first counter electrode 21 and the second counter electrode 22 of each unit display area UA corresponding to the signal lines SL _{m ′} and SL _{m ′ + 1} is connected. In the example shown in FIG. 22, the common electrode line CL ₂ is connected to the second counter electrode 22 of the transmission area TA, the common electrode line CL ₃ is connected to the first counter electrode 21 in the reflection area RA , the second counter electrode 22 in the transmissive region TA is connected to the common electrode line CL _4.

Of the first counter electrode 21 or the second counter electrode 22 of each unit display area UA corresponding to the _first scan signal line SL ₁ , an electrode (not connected to the _second common electrode line CL ₂ ). in the example shown in FIG. 22, a first counter electrode 21) of the reflective area RA, 1st and the common electrode line CL ₁ is connected.

Furthermore, (in the example shown in FIG. 22, M = 4) the M-th of the first counter electrode 21 or the second counter electrode 22 of the unit display region UA that corresponds to the scanning signal line SL _M, the (P- 1) An electrode (in the example shown in FIG. 22, the first counter electrode 21 in the reflective region RA) that is not connected to the common electrode line CL _P-1 (P-1 = 4 in the example shown in FIG. 22) (in the example shown in FIG. 22, P = 5) the P th and the common electrode line CL _P in is connected.

  A first voltage is applied to the first counter electrode 21 via the common electrode line CL connected to the first counter electrode 21, and the second counter electrode 22 is connected to the second counter electrode 22. A second voltage is applied via the connected common electrode line CL. As a result, a common first voltage is applied to the first counter electrode 21 of the unit display area UA in each row, and a common second voltage is applied to each of the second counter electrodes 22.

  As shown in FIG. 22, in the liquid crystal display device 4 of Example 4, the unit display area UA is arranged so that the reflection areas RA or the transmission areas TA face each other across the common electrode line CL. .

In FIG. 23, “Vpx _{1_1} -CL ₁ ” corresponds to the potential difference between the first pixel electrode 20A corresponding to the unit display area UA _{1_1} and the first counter electrode 21, and “Vpx _{1_1} -CL ₂ ” This corresponds to the potential difference between the second pixel electrode 20B and the second counter electrode 22 corresponding to the unit display area UA _{1_1} . Similarly, “Vpx _{2_1} -CL ₂ ” corresponds to the potential difference between the second pixel electrode 20B corresponding to the unit display area UA _{2_1} and the second counter electrode 22, and “Vpx _{2_1} -CL ₃ ” This corresponds to the potential difference between the first pixel electrode 20A and the first counter electrode 21 corresponding to the display area UA _{2_1} . The same applies to the "Vpx _{3_1} -CL _3" - "Vpx _{4_1} -CL _5".

That is, a waveform shown in "Vpx _{1_1} -CL _1" - "Vpx _{4_1} -CL ₅ ', respectively, the reflective region RA _{1_1} constituting the unit display region arrays in the first column shown in FIG. 22, the transmissive region TA _{1_1,} transparent The waveform of the potential difference between the pixel electrode and the counter electrode in the region TA _{2_1} , the reflective region RA _{2_1} , the reflective region RA _{3_1} , the transmissive region TA _{3_1} , the transmissive region TA _{4_1} , and the reflective region RA _{4_1} is represented (Example 1 described above) (Note that the correspondence between the reflection area RA and the transmission area TA is partially replaced with respect to the second embodiment (except the modification), the second embodiment (except the modification), and the third embodiment).

  Hereinafter, the operation in the white display state of the liquid crystal display device 4 according to the fourth embodiment will be described with reference to FIG.

As in the other embodiments described above, even-numbered frames are also formed in period Te _{A in} FIG. The state before the period Te _A is the state after the formation of the previous frame (that is, the immediately preceding odd frame) is completed, and is basically the same as the state after the period To _E after the odd frame formation shown in FIG. It is. In the liquid crystal display device 4 of the fourth embodiment, a video signal that is inverted every frame is applied to the video signal line VL.

[Before period To _Y ]
In this state, the voltage of a certain value is set to V ₀ , and V ₀ +5 volts (= 5 volts) is applied to the common electrode lines CL ₁ , CL ₃ , and CL ₅ from the common electrode drive circuit 73, and the common electrode line CL _2. , CL ₄ is applied with a voltage of V ₀ −5 volts (= −5 volts). The value of Vpx _{1_1} ~Vpx _{4_1,} upon the immediately preceding odd frame forming, voltage applied through the video signal line VL ₁ is is a value of the voltage held by the first holding capacitor 24 and the second storage capacitor 25 . _{Vpx 1_1, Vpx 2_1, Vpx 3_1} , the value of Vpx _{4_1} is V ₀ +3 volts (= 3 volts).

[Period To _Z ]
In the period To _Z , a voltage of V ₀ −5 volts (= −5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₁ (that is, the voltage of the common electrode line CL ₁ is from 5 volts to − 5 volts).

[Period Te _A ]
In the period Te _A , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₁ . In addition, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode driving circuit 73 to the common electrode line CL ₂ (that is, the voltage of the common electrode line CL ₂ is changed from −5 volts to 5 volts).

Period in Te _A, the scanning signal lines SL ₁ of the scan pulse by a row unit display area UA _{1_1} ~UA _{1_4} first pixel electrode 20A and -3 volts and a second pixel electrode 20B of the respective unit display area UA of Is applied. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₁ is finished.

[Period Te _B ]
Also during the period Te _B , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₂ . Further, a voltage of V ₀ -5 volts (= -5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₃ (that is, the voltage of the common electrode line CL ₃ is changed from 5 volts to -5 volts). ).

Period in Te _B, the scanning signal line SL ₂ of the scanning pulse by the second line unit display area UA _{2_1} ~UA _{2_4} first pixel electrode 20A and -3 volts and a second pixel electrode 20B of the respective unit display area UA of Is applied. Applied voltage, after the scan pulse end scanning signal line SL ₂ is also held by the first holding capacitor 24 and the second storage capacitor 25 of each unit display area UA.

[Period Te _C ]
Also in the period Te _C , V ₀ -3 volts (= -3 volts) is applied from the video signal driving circuit 72 to the video signal lines VL _{1 to} VL ₄ , and a scanning pulse is applied to the scanning signal line SL ₃ . Further, a voltage of V ₀ +5 volts (= 5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₄ (that is, the voltage of the common electrode line CL ₄ is changed from −5 volts to +5 volts).

Period in Te _C, the scanning signal line SL ₃ of the scan pulse by the third line unit display area UA _{3_1} ~UA _{3_4} first pixel electrode 20A and -3 volts and a second pixel electrode 20B of the respective unit display area UA of Is applied. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 in each unit display area UA even after the scanning pulse of the scanning signal line SL ₃ is finished.

[Period Te _D ]
Also in the period Te _D, the video signal from the video signal driving circuit 72 line VL ₁ ~VL ₄ to V ₀ -3 volts (= -3 volts) is applied, the scan pulse is applied to the scanning signal line SL _4. Further, a voltage of V ₀ -5 volts (= -5 volts) is applied from the common electrode drive circuit 73 to the common electrode line CL ₅ (that is, the voltage of the common electrode line CL ₅ is changed from 5 volts to -5 volts). ).

Period in Te _D, the scanning signal line and the first pixel electrode 20A and -3 volts and a second pixel electrode 20B of the respective unit display area UA of SL ₄ of the fourth row units displayed by scanning pulse area UA _{4_1} ~UA _{4_4} Is applied. The applied voltage is held by the first holding capacitor 24 and the second holding capacitor 25 of each unit display area UA even after the scanning pulse of the scanning signal line SL ₄ is finished.

The formation of the even frame is completed by the operation of the periods Te _{A to} Te _D described above. At the point of time Te _E when the formation of the even frame is finished,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -8 volts Potential difference in transmission region TA _{2_1} ... Vpx _{2_1} -CL ₂ = -8 volts Reflection region RA potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = 2 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 3 =} 2 difference in volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} -8 volts transmissive area TA _{4_1} in _{2_1} ... the potential ... vpx _{4_1} -CL ₅ = 2 volts in vpx _{4_1} -CL ₄ = -8 volts reflective area RA _{4_1.} When the formation of the even frame is finished, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 2 volts, and the second pixel electrode 20B and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the two counter electrodes 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

Next, the formation of odd frames will be described. The formation of the even frame starts from period To _A. The state before the period To _A is a state after the formation of the previous frame (that is, the immediately preceding even frame) is completed, and is basically the same as the state after the period Te _E when the even frame formation shown in FIG. It is.

The operations in the period To _A to the period To _D are basically the same as those described for the [period Te _A ] to the [period Te _D ], and the video signal lines VL _{1 to} VL ₄ and the common electrode lines CL ₁ to Since the waveform of the voltage applied to CL ₅ may be inverted, description thereof is omitted.

Odd-frame formation is completed by the operations in the periods To _{A to} To _D. At the point of time To _E when the formation of the odd-numbered frame is finished,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 8 volts Potential difference in transmission region TA _{2_1} ... Vpx _{2_1} -CL ₂ = 8 volts Reflection region RA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = -2 volts reflective area RA _{3_1} ... Vpx _{3_1} -CL ₃ potential difference = -2 volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} 8 volts transmissive area TA _{4_1} in ... the potential ... vpx _{4_1} -CL ₅ = -2 volts in vpx _{4_1} -CL ₄ = 8 volts reflective area RA _{4_1.} Although the polarity is inverted from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflective area RA is 2 volts, and the second pixel electrode 20B in each transmissive area TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

  The relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is the same as described in the first embodiment.

That is, the relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is as follows. That is, for example, when scanning by the first to Mth scanning signal lines SL for forming an even-numbered frame is completed, a certain unit display area UA is applied to the first counter electrode 21. The first voltage is _represented by V 1 _—evenF , the second voltage applied to the second counter electrode 22 is represented by V 2 _—evenF, and the first to Mth scanning signal lines SL for forming odd frames are used. When the scanning is completed, for the certain unit display area UA, the first voltage applied to the first counter electrode 21 is V _{1_oddF} , and the second voltage applied to the second counter electrode 22 is V _{2_oddF.} It expresses. The relationship V _{1 —evenF} −V _{2 —evenF} = − (V 1 _—oddF— V 2 _—oddF ) is satisfied. Also in the liquid crystal display device of Example 4, the direction of the electric field applied to the liquid crystal layer 30 changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented. FIG. 24A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the even frame. FIG. 24B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the odd frame.

Further, in this _case, V 1_evenF = V 2_oddF, and the relationship that _V 1_oddF = V 2_evenF is satisfied. By satisfying this relationship, as described later, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or the second voltage are applied. Since the fluctuation range of the third voltage applied to the pixel electrode 20B can be reduced, the power consumption of the liquid crystal display device can be reduced.

Next, when attention is paid to the relationship when the scanning by the first to Mth scanning signal lines SL for forming a certain frame is completed, the mth (where m = 1, 2,..., M in each unit display area UA corresponding to the scanning signal line SL _m of)
A first voltage V 1 — _m is applied to the first counter electrode 21,
A second voltage V 2 — _m is applied to the second counter electrode 22, and
Voltage _V 2_m is a constant value _V 2_const,
The voltage V _{1_m} is different from V _{2_const} and is a constant value V _{1_const} ,
I have a relationship. In this configuration, the polarity of the voltage applied to each unit display area UA is inverted for each frame, and flicker can be reduced.

  In the liquid crystal display device according to the fourth embodiment that satisfies the above-described relationship, the voltage applied to the common electrode line CL when driven in the white display state is -5 volts to 5 as in the second or third embodiment. The voltage applied to the video signal line VL is -3 volts to 3 volts.

  Therefore, according to the liquid crystal display device of Example 4, the first voltage applied to the first counter electrode 21, the second voltage applied to the second counter electrode 22, and the first pixel electrode 20A or the first voltage. The fluctuation range of the third voltage applied to the two-pixel electrode 20B can be reduced, and the number of common electrode lines can be reduced. Further, in the region where the reflection regions RA are opposed to each other, as described in the modification of the first embodiment, the reflection plate or the like provided in the reflection region RA is continuously spread over the plurality of unit display regions UA. Can be formed. The same applies to various components formed in the transmission region. According to the above-described configuration, the dividing step of the reflector or the like is not necessary, and the structural margin of the liquid crystal display device can be further increased.

  Example 5 also relates to the liquid crystal display device of the present invention. The main difference from the third embodiment is that each common electrode line CL is connected in a zigzag shape.

  FIG. 25 is a schematic configuration diagram of the liquid crystal display device 5 of the fifth embodiment. 26 and 27 are schematic timing charts of the operation in the white display state of the liquid crystal display device 5 according to the fifth embodiment.

As shown in FIG. 25, the liquid crystal display device 5 of Example 5 includes P common electrodes CL (where P = M + 2, P = 6 since M = 4 in the example shown in FIG. 25). ing. In each unit display area UA corresponding to the m′-th (where m ′ is a natural number equal to or less than M) scanning signal line SL _{m ′} , the unit display area UA corresponding to the odd-numbered video signal line VL. One electrode of the first counter electrode 21 or the second counter electrode 22 and the other electrode of the first counter electrode 21 or the second counter electrode 22 in the unit display area UA corresponding to the even-numbered video signal line VL. Are connected to the p-th (where p = m ′ + 1) common electrode line CL _p .

Then, either the (p-1) th common electrode line CLp _-1 or the (p + 1) th common electrode line CLp _{+ 1} , and the odd-numbered video signal line VL. Of the first counter electrode 21 or the second counter electrode 22 in the corresponding unit display area UA, an electrode that is not connected to the _pth common electrode line CLp is connected.

Furthermore, it corresponds to the other common electrode line CL of the (p-1) th common electrode line CLp _-1 or the (p + 1) th common electrode line CLp _{+ 1} , and the even-numbered video signal line VL. Of the first counter electrode 21 or the second counter electrode 22 in the unit display area UA, an electrode that is not connected to the p-th common electrode line CL _p is connected.

  A first voltage is applied to the first counter electrode 21 via the common electrode line CL connected to the first counter electrode 21, and the second counter electrode 22 is connected to the second counter electrode 22. A second voltage is applied via the connected common electrode line CL. As a result, a common first voltage is applied to the first counter electrode 21 of the unit display area UA in each row, and a common second voltage is applied to each of the second counter electrodes 22.

The liquid crystal display device 5 of the fifth embodiment, FIG. 25 displays the first column and the third column unit shown in region columns UA _{1_1} ~UA _{4_1,} a first group consisting of UA _{1_3} ~UA _{4_3,} 2 column and 4 th column of the unit display region arrays UA _{1_2} ~UA _{4_2,} and a second group consisting of UA _{1_4} ~UA _{4_4} is, at different timings, so can be described as performing the same operation as described in example 3, details The detailed explanation is omitted. In the liquid crystal display device 5 of the fifth embodiment, the relationship between the video signal applied to the odd-numbered video signal line VL and the video signal applied to the even-numbered video signal line VL is inverted. Need to be in. This point is different from the third embodiment. FIG. 26 is a timing chart for the first group, and FIG. 27 is a timing chart for the second group.

In FIG. 26, “Vpx _{1_1} -CL ₁ ” corresponds to the potential difference between the first pixel electrode 20A corresponding to the unit display area UA _{1_1} and the first counter electrode 21, and “Vpx _{1_1} -CL ₂ ” This corresponds to the potential difference between the second pixel electrode 20B and the second counter electrode 22 corresponding to the unit display area UA _{1_1} . The same applies to the "Vpx _{2_1} -CL _2" - "Vpx _{4_1} -CL _5".

That is, "Vpx _{1_1} -CL _1" - "Vpx _{4_1} -CL _5" waveform shown in the same manner as in Example 3, respectively, the reflective area RA constituting the unit display region arrays in the first column shown in FIG. 25 _{1_1} , A waveform of a potential difference between the pixel electrode and the counter electrode in the transmissive region TA _{1_1} , the reflective region RA _{2_1} , the transmissive region TA _{2_1} , the reflective region RA _{3_1} , the transmissive region TA _{3_1} , the reflective region RA _{4_1} , and the transmissive region TA _{4_1} .

On the other hand, in FIG. 27, “Vpx _{1_2} -CL ₂ ” corresponds to the potential difference between the first pixel electrode 20A corresponding to the unit display area UA _{1_2} and the first counter electrode 21, and “Vpx _{1_2} -CL ₃ ”. Corresponds to the potential difference between the second pixel electrode 20B and the second counter electrode 22 corresponding to the unit display area UA _{1_2} . The same applies to "Vpx _{2_2} -CL ₃ " to "Vpx _{4_2} -CL ₆ ".

That is, the waveforms shown in “Vpx _{1_2} -CL ₂ ” to “Vpx _{4_2} -CL ₆ ” are the reflection regions RA _{1_2} constituting the second unit display region row shown in FIG. , A waveform of a potential difference between the pixel electrode and the counter electrode in the transmissive region TA _{1_2} , the reflective region RA _{2_2} , the transmissive region TA _{2_2} , the reflective region RA _{3_2} , the transmissive region TA _{3_2} , the reflective region RA _{4_2} , and the transmissive region TA _{4_2} .

The operations shown in FIGS. 26 and 27 are basically the same as those described in the third embodiment, and a description thereof will be omitted. Also in the fifth embodiment, the formation of the even frame is completed by the operation of the periods Te _{A to} Te _D shown in FIGS.

As shown in FIG. 26, at the time point Te _E when the formation of the even-numbered frame is completed,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = 2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = -8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₂ = -2 volts Transmission region TA potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = 8 volts reflective area _{RA 3_1 ... Vpx 3_1 -CL 3 =} 2 difference in volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} -8 volts reflective area RA _{4_1} in _{2_1} ... the potential ... vpx _{4_1} -CL ₅ = 8 volts in vpx _{4_1} -CL ₄ = -2 volts transmissive area TA _{4_1.} In addition, as shown in FIG.
Potential difference in reflection region RA _{1_2} ... Vpx _{1_2} -CL ₂ = -2 volts Potential difference in transmission region TA _{1_2} ... Vpx _{1_2} -CL ₃ = 8 volts Potential difference in reflection region RA _{2_2} ... Vpx _{2_2} -CL ₃ = 2 volts Transmission region TA _{2_2} potential difference potential ... Vpx _{2_2} -CL ₄ potential difference = -8 volts reflective area _{RA 3_2 ... Vpx 3_3 -CL 4 =} -2 potential difference volt transmission area _{TA 3_2 ... Vpx 3_3 -CL 5 =} 8 volts reflective area RA _{4_2} in ... Vpx _{4_4} −CL ₅ = 2 volts _Potential difference in the transmission region TA _{4_2} ... Vpx _{4_4} −CL ₆ = −8 volts. When the formation of the even frame is finished, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflection region RA is 2 volts, and the second pixel electrode 20B and the second pixel electrode 20B in each transmission region TA. The absolute value of the potential difference between the two counter electrodes 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed.

In addition, the formation of the odd-numbered frame is completed by the operation in the periods To _{A to} To _D. As shown in FIG. 26, at the time point To _E when the formation of the odd-numbered frames is completed,
Potential difference in reflection region RA _{1_1} ... Vpx _{1_1} -CL ₁ = -2 volts Potential difference in transmission region TA _{1_1} ... Vpx _{1_1} -CL ₂ = 8 volts Potential difference in reflection region RA _{2_1} ... Vpx _{2_1} -CL ₂ = 2 volts Transmission region TA _{2_1} potential difference potential ... Vpx _{2_1} -CL ₃ potential difference = -8 volts reflective area RA _{3_1} ... Vpx _{3_1} -CL ₃ potential difference = -2 volts transmissive area _{TA 3_1 ... Vpx 3_1 -CL 4 =} 8 volts reflective area RA _{4_1} in ... the potential ... vpx _{4_1} -CL ₅ = -8 volts in vpx _{4_1} -CL ₄ = 2 volts transmissive area TA _{4_1.} In addition, as shown in FIG.
Potential difference in the reflection region RA _{1_2} ... Vpx _{1_2} -CL ₂ = 2 volts Potential difference in the transmission region TA _{1_2} ... Vpx _{1_2} -CL ₃ = -8 volts Potential difference in the reflection region RA _{2_2} ... Vpx _{2_2} -CL ₃ = -2 volts Transmission region TA potential difference potential ... Vpx _{2_2} -CL ₄ potential difference = 8 volts reflective area _{RA 3_2 ... Vpx 3_3 -CL 4 =} 2 difference in volts transmissive area _{TA 3_2 ... Vpx 3_3 -CL 5 =} -8 volts reflective area RA _{4_2} in _{2_2} ... Vpx _{4_4} −CL ₅ = −2 volts _Potential difference in the transmission region TA _{4_2} ... Vpx _{4_4} −CL ₆ = 8 volts. Although the polarity is inverted from that of the even frame, the absolute value of the potential difference between the first pixel electrode 20A and the first counter electrode 21 in each reflective area RA is 2 volts, and the second pixel electrode 20B in each transmissive area TA. The absolute value of the potential difference between the second counter electrode 22 and the second counter electrode 22 is 8 volts. Accordingly, the difference between the operation modes of the transmissive area TA and the reflective area RA is electrically compensated, and an image in a white display state slightly darker than the maximum white display state in design is displayed. FIG. 28A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the even frame. FIG. 28B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the odd frame.

  The relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is the same as described in the first embodiment.

That is, the relationship between the voltages applied to the first counter electrode 21 and the second counter electrode 22 in the even frame and the odd frame is as follows. That is, for example, when scanning by the first to Mth scanning signal lines SL for forming an even-numbered frame is completed, a certain unit display area UA is applied to the first counter electrode 21. The first voltage is _represented by V 1 _—evenF , the second voltage applied to the second counter electrode 22 is represented by V 2 _—evenF, and the first to Mth scanning signal lines SL for forming odd frames are used. When the scanning is completed, for the certain unit display area UA, the first voltage applied to the first counter electrode 21 is V _{1_oddF} , and the second voltage applied to the second counter electrode 22 is V _{2_oddF.} It expresses. The relationship V _{1 —evenF} −V _{2 —evenF} = − (V 1 _—oddF— V 2 _—oddF ) is satisfied. Also in the liquid crystal display device 5 of Example 5, the direction of the electric field applied to the liquid crystal layer 30 changes from frame to frame, and deterioration of the liquid crystal due to the application of the electric field in one direction for a long time can be prevented. In addition, in the liquid crystal display device of Example 5, the polarity is inverted in a checkered pattern as shown in FIGS. Thereby, flicker is reduced and the display image can be made suitable.

  As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The configurations and structures of the liquid crystal display devices described in the embodiments are examples and can be changed as appropriate. For example, in the third to fifth embodiments, the common electrode line on one side can always be set to a constant voltage as in the first embodiment.

  In addition, each of the above embodiments has been described as an IPS-type lateral electric field drive type liquid crystal display device, but other lateral electric field drive type liquid crystal display devices, for example, references: SHLee, SLLee and HYKim, The FringeFieldSwitching method described in Appl. Phys. Lett. 73, 2881 (1998).

FIG. 1 is a schematic plan view for explaining the arrangement of various components in the vicinity of a certain unit display area in the liquid crystal display device of the embodiment. 2A is a schematic end view when the liquid crystal display device is cut along the line AA in FIG. FIG. 2B is an end view of the liquid crystal display device taken along the line BB in FIG. FIG. 2C is an end view of the liquid crystal display device taken along the line CC in FIG. FIG. 3A is a diagram schematically showing a configuration of a unit display area in the liquid crystal display device. FIG. 3B is a simplified diagram like the structure shown in FIG. 4A and 4B are diagrams schematically showing the potential relationship of each electrode when V ₁ > V ₂ in a certain unit display area. FIG. 5A schematically shows the relationship between the light transmittance of the reflective region and the transmissive region and the absolute value of the potential difference between the pixel electrode and the counter electrode. FIG. 5B is a schematic diagram showing the relationship shown in FIG. 5A from the viewpoint of display gradation in the unit display area. FIG. 6 shows an operation example when V 2 _—evenF = V 2 _—oddF . _7, V 1_evenF = V 2_oddF, and an operation example where the _V 1_oddF = V 2_evenF. FIG. 8 is a schematic configuration diagram of the liquid crystal display device according to the first embodiment. FIG. 9 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the first embodiment. FIG. 10 is a schematic timing chart of the operation in the black display state of the liquid crystal display device according to the first embodiment. FIG. 11A shows the polarity of the voltage of the pixel electrode with reference to the counter electrode in each unit display area in the even frame. FIG. 11B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the odd frame. FIG. 12 is a diagram schematically showing the relationship among the first voltage V ₁ , the second voltage V ₂ , and the third voltage V ₃ in each unit display area of the odd / even rows. . FIG. 13 is a schematic configuration diagram illustrating a modification of the liquid crystal display device according to the first embodiment. FIG. 14 shows a schematic timing chart when the operation corresponding to the operation shown in FIG. FIG. 15 shows a schematic timing chart when the operation corresponding to the operation shown in FIG. 10 described above is performed in the modification. FIG. 16A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the even frame in the modification. FIG. 16B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the odd frame. FIG. 17 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the second embodiment. FIG. 18 is a diagram schematically showing the relationship among the first voltage V ₁ , the second voltage V ₂ , and the third voltage V ₃ in each unit display area UA in the odd / even rows. is there. FIG. 19 shows a schematic timing chart when the operation corresponding to the operation shown in FIG. 17 described above is performed in the modification. FIG. 20 is a schematic configuration diagram of the liquid crystal display device according to the third embodiment. FIG. 21 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the third embodiment. FIG. 22 is a schematic configuration diagram of a liquid crystal display device of Example 4. FIG. 23 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the fourth embodiment. FIG. 24A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the even frame. FIG. 24B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the odd frame. FIG. 25 is a schematic configuration diagram of a liquid crystal display device of Example 5. FIG. 26 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the fifth embodiment. FIG. 27 is a schematic timing chart of the operation in the white display state of the liquid crystal display device according to the fifth embodiment. FIG. 28A shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area in the even frame. FIG. 28B shows the polarity of the voltage of the pixel electrode with respect to the counter electrode in each unit display area UA in the odd frame. 29A to 29D are schematic diagrams in the case where both the reflective region and the transmissive region of the transflective liquid crystal display device are of a lateral electric field drive type. 29A shows the arrangement of each component, and FIG. 29B shows the polarization axis of the upper polarizing plate, the molecular axes of the liquid crystal molecules constituting the liquid crystal layer, and the lower polarizing plate when viewed from the upper substrate side. 29C and 29D show the operation of the transflective liquid crystal display device, respectively.

Explanation of symbols

1, 2, 3, 4, 5 ... Liquid crystal display device, 10 ... Lower substrate, 11 (SL) ... Scanning signal line, 12 (CL) ... Common electrode line, 13A ... No. 1 insulating film, 13B ... second insulating film, 14 ... transistor, 15 (VL) ... video signal line, 15A ... tongue, 15B ... conductive portion, 16, 16A, 16B ... First interlayer insulating layer, 17... Reflector, 18... Second interlayer insulating layer, 20... Pixel electrode, 20 A... First pixel electrode (reflection area pixel electrode), 20 B 2nd pixel electrode (transmission region pixel electrode), 21... First counter electrode, 22... Second counter electrode, 23. -Retention capacity, 30 ... Liquid crystal layer, 31 ... Liquid crystal molecule, 40 ... Upper substrate, 41 ... Black matrix, 42 Color filter, 43 ... upper alignment film, 50 ... lower polarizing plate, 51 ... upper polarizing plate, 60 ... backlight, 70 ... control circuit, 71 ... scanning signal drive circuit 72 ... Video signal drive circuit, 73 ... Common electrode drive circuit, UA ... Unit display area, RA ... Reflection area, TA ... Transmission area

Claims (1)

(A) M scanning signal lines extending in the first direction and having one end connected to the scanning signal driving circuit;
(B) N video signal lines extending in the second direction and having one end connected to the video signal driving circuit;
(C) a switching element disposed at an intersection between the scanning signal line and the video signal line and operating in accordance with the scanning signal of the scanning signal line
(D) a unit display area having a reflective display area and a transmissive display area provided corresponding to each switching element;
A transflective liquid crystal display device of a lateral electric field drive type comprising:
In the unit display area,
(A) a first pixel electrode and a first counter electrode constituting a reflective display area;
(B) a first holding capacitor for holding a potential difference between the first pixel electrode and the first counter electrode;
(C) a second pixel electrode and a second counter electrode constituting a transmissive display area, and
(D) a second storage capacitor for holding a potential difference between the second pixel electrode and the second counter electrode;
Is provided,
A first voltage is applied to the first counter electrode,
A second voltage different from the first voltage is applied to the second counter electrode,
The first voltage is V ₁ , the second voltage is V ₂ , the higher voltage of V ₁ and V ₂ is Hi (V ₁ , V ₂ ), and the lower voltage of V ₁ and V ₂ is Low when (V _1, V ₂₎ and represents a Hi (V _1, V ₂₎ less voltage, _{and, Low (V 1, V 2} ) or more third voltage is voltage, scanning signal lines Based on the operation of the switching element according to the scanning signal, applied from the video signal driving circuit to the first pixel electrode and the second pixel electrode via the video signal line,
When scanning by the first to Mth scanning signal lines for forming the even-numbered frame is completed, the first voltage applied to the first counter electrode is set to V _{1_evenF} for a certain unit display region. The second voltage applied to the second counter electrode is denoted as V _{2_evenF,} and when the scanning by the first to Mth scanning signal lines for forming the odd-numbered frame is completed, the certain voltage the unit display area, when the first voltage being applied to the first counter electrode V _{1_OddF,} the second voltage being applied to the second counter electrode is represented as V _{2_OddF,
V1_evenF} - _{V2_evenF} =-( _{V1_oddF} - _{V2_oddF} )
And
A transflective liquid crystal display device that satisfies any of the following conditions (1) and (2).
(1) V _{1_evenF} = V _{1_oddF}
(2) V _{2_evenF} = V _{2_oddF}

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