JP2009065726A - Rectenna device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a rectenna device capable of operating at the most efficient conversion efficiency, irrespective of variation in load resistance. <P>SOLUTION: A parallel rectifier circuit 13 is composed of first-fourth rectenna substrates 19-22. A voltage detection circuit 47 detects an output voltage of a composite DC power outputted from the parallel rectifier circuit 13. A switch control section 50 obtains an output side impedance Zo of a load circuit 16 and a variable resistor 43 on the basis of a result of detection of the output voltage. The switch control section 50 determines the number of connection of rectennas at which conversion efficiency η is the maximum on the basis of the output side impedance Zo. The switch control section 50 controls first and second switch circuits 23, 24 to switch to the determined number of rectennas. Thus, the rectenna device can operate at the most efficient conversion efficiency. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a rectenna device that converts a microwave received by an antenna into DC power by a rectifier circuit.

  A rectenna device that converts microwaves received by an antenna into DC power by a rectifier circuit is known (see Patent Document 1). The rectenna device is a space power satellite (SPS) project that sends power generated by an artificial satellite equipped with a solar panel to the earth with microwaves, and microwaves to remote islands and mountaintops where wired power transmission is difficult. It is expected to be used for power transmission plans.

  In recent years, rectenna apparatuses are also used for responders such as RFID (Radio Frequency Identification) tags. When the RFID tag approaches the interrogator, microwaves are transmitted from the interrogator to the RFID tag. The RFID tag converts the microwave transmitted from the interrogator into DC power by a rectifier circuit, and operates the built-in load circuit using this DC power as driving power. Then, information stored in advance in the load circuit is returned to the interrogator as a response signal.

In such a rectenna apparatus, various proposals have been made to realize a stable supply of DC power. For example, the rectenna device is composed of a substrate, n antenna elements formed on the substrate, and n rectifier circuits individually connected to the antenna elements. When the rectifier circuits are connected in series, the output voltage output from the rectenna device becomes V · n obtained by adding n output voltages V of the individual rectifier circuits. When the rectifier circuits are connected in parallel, the output current output from the rectenna device is I · n obtained by adding n output currents I of the individual rectifier circuits. Accordingly, by appropriately connecting the rectifier circuits in series or in parallel, it is possible to supply a desired amount of DC power (see Patent Document 2).
JP 2002-84585 A JP-A-8-33243

  By the way, it is generally known that the conversion efficiency at which the rectenna device converts microwaves (input power) into DC power is maximized when the impedance of the rectifier circuit and the load resistance of the load circuit are impedance matched.

  However, the load resistance of the load circuit is not constant and varies depending on the operation status of the device. That is, when the power consumption in the load circuit increases, the load resistance decreases, and conversely, when the power consumption decreases, the load resistance increases. As a result, impedance matching between the rectifier circuit and the load circuit is lost, and conversion efficiency is reduced. In particular, the RFID tag transmits low power unlike the above-described SPS that transmits high power, and therefore, if the conversion efficiency is significantly reduced due to fluctuations in load resistance, it is not possible to secure drive power necessary for the operation of the load circuit. .

  In order to solve this problem, for example, if the rectenna device described in Patent Document 2 is used, necessary drive power can be secured by increasing the number of antenna elements and rectifier circuits. However, if the number of antenna elements and rectifier circuits is increased, the size of the rectenna device increases, so that it cannot be applied to a small device such as an RFID tag.

  In addition, for example, a method is conceivable in which impedance matching is performed by connecting a variable resistor in parallel to the load circuit and adjusting the size of the variable resistor so that the fluctuation of the load resistance of the load circuit is corrected. However, even if this method is used, when the power consumption of the load circuit is increased and the load resistance is remarkably lowered, it is not possible to cope with the adjustment of the variable resistance. Remain.

  The present invention has been made to solve the above-described problem, and is a rectenna that can be operated with the most efficient conversion efficiency even when the load resistance of the load circuit fluctuates, particularly when the load resistance is significantly reduced. An object is to provide an apparatus.

  In order to solve the above problem, a rectenna device according to the present invention converts a microwave received by an antenna into direct current power, and operates the load circuit using the converted direct current power as drive power. A plurality of rectifier circuits connected in parallel to each other; a switch for selectively connecting one or more rectifier circuits from the plurality of rectifier circuits to the antenna; and a circuit impedance of the load circuit Determining the number of connections of the rectifier circuit that maximizes the conversion efficiency of the DC power with respect to the input power of the microwave based on the determination result of the determination means and the determination result of the determination means; Switch control means for operating the switch so that a number of the rectifier circuits are connected to the antenna.

  A variable resistance connected in parallel to the load circuit; and a variable resistance control means for controlling the magnitude of the variable resistance, wherein the determination means has a first combined impedance obtained by combining the circuit impedance and the variable resistance. The switch control means determines the number of connections of the rectifier circuit that maximizes the conversion efficiency based on the first combined impedance, and the variable resistance control means determines the determined number of connections. It is preferable to control the size of the variable resistor so that the first combined impedance matches the second combined impedance based on the corresponding second combined impedance of the rectifier circuit. As a result, the first and second combined impedances can be perfectly matched to operate with more optimal conversion efficiency.

  Output voltage detection means for detecting the output voltage of the DC power, and first storage means for storing in advance the first relationship of the first combined impedance with respect to the magnitude of the output voltage for each of the number of connections. It is preferable that the determination unit obtains the magnitude of the first combined impedance corresponding to the detection result of the output voltage detection unit with reference to the first relationship. Accordingly, the first combined impedance can be easily obtained without actually measuring the circuit impedance (for example, load resistance) of the load circuit that is difficult to measure.

  Preferably, the discriminating unit estimates the magnitude of power consumption of the load circuit from the operating state of the load circuit, and acquires the magnitude of the first combined impedance based on the estimation result of the power consumption. This eliminates the need for a voltage detection circuit or the like that detects the output voltage, thereby reducing the cost and size of the rectenna device.

  For each of the numbers of connections, a second storage unit that stores in advance a second relationship of the conversion efficiency with respect to the first combined impedance is provided, and the switch control unit refers to the second relationship, and It is preferable to determine the number of connections that maximizes the conversion efficiency with respect to the first combined impedance acquired by the determination unit.

  The second relationship is preferably a data table in which a range of the first combined impedance in which the conversion efficiency is higher than that of the other number of connections is set in advance for each of the number of connections. Thereby, the number of connections of the rectifier circuit that maximizes the conversion efficiency can be determined directly from the determination result of the first combined impedance. As a result, the process for determining the number of connections of the rectifier circuit can be performed quickly.

  It is preferable that the number of connections is set to 1 when the load circuit is activated. Thereby, at the time of starting the load circuit, at least only the starting power of the load circuit can be secured.

  The switch control means preferably increases the number of connections when the output voltage of the DC power exceeds a rated voltage. As a result, when the output voltage exceeds the rated voltage, the output voltage can be lowered by increasing the number of connected rectifier circuits. As a result, destruction of the load circuit is prevented.

  Preferably, a booster circuit that boosts the output voltage of the DC power to the operating voltage of the load circuit is provided between the plurality of rectifier circuits and the load circuit. Thereby, the output voltage can be boosted to the operating voltage of the load circuit regardless of the magnitude of the circuit impedance (first combined impedance) of the load circuit.

  The plurality of rectifier circuits are preferably provided on a plurality of substrates each having the same circuit pattern. This eliminates the need to prepare multiple types of rectenna substrates that are complicated and difficult to analyze and design, thereby reducing manufacturing costs.

  The plurality of substrates are preferably stacked. Thereby, the wiring length between each board | substrate can be shortened. As a result, the loss at the time of converting the microwave into DC power can be suppressed. Further, the rectenna device can be downsized.

  The plurality of rectifier circuits are configured by a plurality of circuit patterns formed in parallel on the same substrate, and the plurality of circuit patterns are formed such that circuit patterns adjacent to each other have symmetry. Is preferred. Thereby, thickness can be made thinner than the case where a board | substrate is laminated | stacked.

  According to the rectenna device of the present invention, the magnitude of the circuit impedance of the load circuit is determined, and based on the determination result, the number of connections of the rectifier circuit that maximizes the conversion efficiency is determined, and the rectifier circuit having the determined number of connections Is connected to the antenna, it is possible to operate with optimum conversion efficiency even when the circuit impedance of the load circuit is significantly reduced due to a rapid increase in power consumption of the load circuit.

  As shown in FIG. 1, the RFID tag 10 (rectenna device) of the first embodiment of the present invention is incorporated in a mobile body such as a portable electronic device or a non-contact IC card (not shown). Broadly divided, the antenna 11, the directional coupler 12, the parallel rectifier circuit 13, the changeover switch 14, the power supply stable booster circuit 15, the load circuit 16, the demodulator circuit 17, and the modulator circuit 18 are configured. .

  The antenna 11 receives the microwave transmitted from the interrogator when the RFID tag 10 approaches the interrogator (not shown). Note that the fundamental frequency of the microwave used in the present embodiment is the 2.45 GHz band that is an ISM (Industry Science Medical) band. The microwave received by the antenna 11 is input to the directional coupler 12.

  The directional coupler 12 outputs a part of the microwave (for example, about −10 dB) input from the antenna 11 to the parallel rectifier circuit 13 for driving power, and outputs the rest to the changeover switch 14 as a question signal. The parallel rectifier circuit 13 converts the input microwave into DC power and outputs it. The DC power output from the parallel rectifier circuit 13 is input to the load circuit 16 via the power source stable booster circuit 15. The power source stable booster circuit 15 suppresses voltage fluctuation and noise of the DC power output from the parallel rectifier circuit 13 and boosts the output voltage of the DC power to the operating voltage of the load circuit 16.

  The changeover switch 14 outputs the microwave (question signal) input from the directional coupler 12 toward the demodulation circuit 17 and the microwave (response signal) input from the modulation circuit 18 to the directional coupler 12. Output toward. The demodulation circuit 17 demodulates the microwave from the changeover switch 14 into the original interrogation signal. The demodulated interrogation signal is input to the load circuit 16.

  The load circuit 16 includes a CPU 16a, a memory 16b, and the like, and operates using DC power input through the power supply stabilization circuit 15 as drive power. When the question signal is input, the CPU 16a accesses the memory 16b and inputs a response signal stored in advance to the modulation circuit 18. The modulation circuit 18 modulates the response signal into a microwave. The modulated microwave is output from the antenna 11 via the changeover switch 14 and the directional coupler 12.

  The interrogator (not shown) receives and demodulates the microwave transmitted from the RFID tag 10 to recognize a mobile object in which the RFID tag 10 is incorporated or a person who owns this mobile object.

  As shown in FIG. 2, the parallel rectifier circuit 13 includes first to fourth rectenna substrates 19 to 22 corresponding to a plurality of rectifier circuits of the present invention, a first switch circuit 23, and a second switch circuit 24. Has been. The first rectenna substrate 19 is connected in series to the antenna 11 (directional coupler 12) via the transmission line 25a, and is connected in series to the load circuit 16 (power supply stable booster circuit 15) via the transmission line 25b. Yes. The second to fourth rectenna substrates 20 to 22 are connected in parallel to the first rectenna substrate 19 via the first and second switch circuits 23 and 24. That is, the first to fourth rectenna substrates 19 to 22 are connected in parallel to each other.

  As shown in FIGS. 3 and 4, the first to fourth rectenna boards 19 to 22 are the same circuit boards that convert the inputted microwaves to DC power, and the first rectenna board 19 and the second rectenna board 19 from the bottom. The rectenna substrate 20, the third rectenna substrate 21, and the fourth rectenna substrate 22 are stacked in this order. Note that the order of stacking the rectenna substrates 19 to 22 is not particularly limited. Thus, by stacking the rectenna substrates 19 to 22, the wiring length between the rectenna substrates can be shortened. Thereby, the loss at the time of converting a microwave into direct-current power can be suppressed. Further, by stacking the rectenna substrates 19 to 22, the size can be reduced, and the rectenna substrates 19 to 22 can be built in a small responder such as the RFID tag 10.

  The same circuit pattern 31 is formed on each of the rectenna substrates 19 to 22. By sharing the circuit pattern 31 of each of the rectenna substrates 19 to 22, the manufacturing cost can be reduced as compared with the case of preparing a plurality of rectenna substrates that are complicated and difficult to analyze and design.

  In the circuit pattern 31, a microwave input unit 32, a capacitor mounting unit 33, a diode mounting unit 35, a low pass filter (LPF) 36, and a DC power output unit 37 are formed in this order from the microwave input side. The microwave input unit 32 of the first rectenna substrate 19 is directly connected to the transmission line 25 a, and the microwave input units 32 of the second to fourth rectenna substrates 20 to 22 are connected to the transmission line 25 a via the first switch circuit 23. (See FIG. 2).

  The capacitor mounting portion 33 is mounted with a direct current (DC) cut capacitor 38. For example, a chip ceramic capacitor (10 pF) is used as the capacitor 38. The capacitor 38 prevents the DC power rectified by the diode 39 from being output to the antenna 11 side. The capacitor 38 preferably has a sufficiently low impedance so that the input microwave harmonic signal is efficiently transmitted to the diode 39.

  A diode 39 is mounted on the diode mounting portion 35. As the diode 39, for example, a Schottky barrier diode for UHF band high-frequency detection / mixer is used. The anode of the diode 39 is connected to a GND pattern (not shown) formed on the opposite surface side of the substrate through a via hole 42 formed in the circuit pattern 31. The cathode of the diode 39 is connected to a line between the microwave input unit 32 and the DC power output unit 37. The diode 39 rectifies the microwave and converts it into direct current.

  The LPF 36 is formed by an open stub of the circuit pattern 31. The LPF 36 blocks a fundamental frequency signal leaking from the output of the diode 39 and a harmonic component signal generated during rectification to prevent the harmonic signal from flowing through the load circuit 16. The LPF 36 smoothes the direct current rectified by the diode 39. The DC power smoothed by the LPF 36 is output from the DC power output unit 37. The DC power output unit 37 of the first rectenna substrate 19 is directly connected to the transmission line 25 b, and the DC power output units 37 of the second to fourth rectenna substrates 20 to 22 are connected to the transmission line 25 b via the second switch circuit 24. (See FIG. 2).

  Returning to FIG. 2, the first switch circuit 23 is for selectively connecting one or more rectenna substrates among the rectenna substrates 19 to 22 to the antenna 11, and includes switches 23 a to 23 c. . The switches 23a to 23c can be switched ON / OFF independently. The switch 23a turns on / off the connection between the second rectenna substrate 20 and the antenna 11, and the switches 23b, 23c turn on / off the connection between the third and fourth rectenna substrates 21, 22 and the antenna 11, respectively.

  As the switches 23a to 23c, for example, high-frequency switches such as GaAs MMIC (monolithic microwave integrated circuit) switches are used. Alternatively, a switch formed of a diode, a field effect transistor (FET), a MEMS (Micro Electro Mechanical Systems), or the like may be used. In addition, the 1st switch circuit 23 is adjusted so that impedance matching with each rectenna board | substrates 19-22 can be taken in order to suppress the power loss of a microwave.

  The second switch circuit 24 is the same as the first switch circuit 23, and includes switches 24a to 24c. The switch 24a turns on / off the connection between the second rectenna substrate 20 and the transmission line 25b (load circuit 16), and the switches 24b and 24c are respectively connected to the third and fourth rectenna substrates 21 and 22 and the transmission line 25b. Turn the connection ON / OFF. The switch 24a is turned ON / OFF in conjunction with the ON / OFF of the switch 23a. Similarly, the switches 24b and 24c are turned ON / OFF in conjunction with the ON / OFF of the switches 23b and 23c, respectively.

  When all the switches 23a to 23c and 24a to 24c are turned off, only the first rectenna substrate 19 is connected to the antenna 11. That is, the first rectenna substrate 19 is always connected to the antenna 11 and the load circuit 16. As a result, at least the first rectenna substrate 19 is always operated during microwave reception. As a result, when the second to fourth rectenna substrates 20 to 22 are not used, the reflected power (microwave) generated on the input side of the switches 23a to 23c in the OFF state is converted to DC power by the first rectenna substrate 19. Can do. Therefore, loss due to reflection on the input side of the switches 23a to 23c can be absorbed.

  When only the switches 23 a and 24 a are turned on, the second rectenna substrate 20 is connected to the antenna 11. Further, when the switches 23 b and 24 b are turned on, the third rectenna substrate 21 is also connected to the antenna 11. When all the switches 23 a to 23 c and 24 a to 24 c are turned on, all the rectenna boards 19 to 22 are connected to the antenna 11.

  In this way, the number of connections of the rectenna board connected to the antenna 11 (hereinafter simply referred to as the number of rectenna connections) can be arbitrarily set within a range of 1 to 4 by turning on / off each of the switches 23a to 23c and 24a to 24c. Can be changed to At this time, each of the rectenna substrates 19 to 22 has an impedance individually. For this reason, when the number of rectenna connections is changed, the combined impedance of the parallel rectifier circuit 13 (hereinafter referred to as input-side impedance Zi) changes. Specifically, since the rectenna substrates 19 to 22 are connected in parallel to each other via both switch circuits 23 and 24, the input-side impedance Zi (second combined impedance) decreases as the number of rectenna connections increases. Conversely, if it decreases, input side impedance Zi will become large.

  The DC power output from the first rectenna substrate 19 and the DC power output from the second to fourth rectenna substrates 20 to 22 are combined in the transmission line 25b via the second switch circuit 24, and then loaded. It is output toward the circuit 16. In the following description, the DC power output from the parallel rectifier circuit 13 is defined as combined DC power.

  The combined DC power output from the parallel rectifier circuit 13 is input to the load circuit 16 via the power source stable booster circuit 15 (see FIG. 1). In addition, although illustration is abbreviate | omitted, the electrical storage which consists of a capacitor | condenser etc. between the parallel rectifier circuit 13 and the load circuit 16, and suppresses the voltage fluctuation of the synthetic | combination DC power when the 1st and 2nd switch circuits 23 and 24 are switched. A functional unit (circuit) may be provided.

A variable resistor 43 is connected to the load circuit 16 in parallel. The variable resistor 43 has one end connected to the transmission line 25b and the other end grounded to a GND terminal or the like. The variable resistor 43, for example, capable of changing various variable resistance element the resistance value Z _VR by applying a voltage (MOSFET, etc.) is used, the present invention is not limited thereto, using various variable resistor Good.

By increasing or decreasing the resistance value Z _VR of the variable resistor 43, the combined impedance of the load resistance (circuit impedance) Z _L of the load circuit 16 and the resistance value Z _VR of the variable resistor 43 (hereinafter simply referred to as output-side impedance Zo). Can be adjusted. Thus, it is possible to some extent absorb the variation of the load resistance Z _L of the load circuit 16 by increasing or decreasing the power consumption of such CPU 16a. The output side impedance Zo (first combined impedance) is expressed by the following formula (1).
(1) Zo = (Z _L × Z _VR ) ÷ (Z _L + Z _VR )

  Adjustment of the input side and output side impedances Zi and Zo is performed by an impedance matching control circuit (hereinafter simply referred to as a control circuit) 45. The control circuit 45 optimally adjusts the conversion efficiency η of the combined DC power with respect to the microwave input power by impedance matching (hereinafter simply referred to as matching) of the input side and output side impedances Zi and Zo.

The conversion efficiency η is expressed by the following equation (4) based on the following equations (2) and (3) when the input power of the microwave is PINRF, the combined DC power is PoutDC, and the output voltage of the combined DC power is VoutDC. expressed.
(2) η = PoutDC / PINRF
(3) PoutDC = (VoutDC) ² / Zo
(4) η = (VoutDC) ² / (Zo × PINRF)

  The conversion efficiency represented by the above formula (4) is maximized when the input side and output side impedances Zi and Zo are perfectly matched to satisfy Zo = Zi. When matching both, the input side impedance Zi changes according to the number of rectenna connections. For this reason, when the number of rectenna connections changes, the output side impedance Zo matching the input side impedance Zi also changes. Furthermore, the maximum value of the conversion efficiency η for each number of rectenna connections when Zi and Zo are completely matched is also a property unique to the rectenna. Hereinafter, the relationship between the output side impedance Zo and the conversion efficiency η for each number of rectenna connections will be described with reference to Table 1 below and FIG. 5A in which Table 1 is graphed.

  As shown in Table 1, the output voltage VoutDC was measured when the output side impedance Zo was changed to 27Ω, 50Ω, 180Ω, 270Ω, 560Ω, 780Ω, and 1000Ω, respectively, with 1 to 4 rectenna connections. Was substituted into the above formulas (3) and (4), respectively, to determine the combined DC power PoutDC and the conversion efficiency η. The output voltage VoutDC was measured by the voltage detection circuit 47 (see FIG. 2).

  The data in Table 1 was measured with the input power PINRF fixed at 10 mW. When the number of rectenna connections is “1”, only the first rectenna board 19 is used. When the number of rectenna connections is “2”, the first and second rectenna boards 19 and 20 are used. When the third rectenna substrates 19 to 21 and the number of rectenna connections “4”, the first to fourth rectenna substrates 19 to 22 are connected to the antenna 11 and the load circuit 16, respectively.

As shown in FIG. 5A, as the number of rectenna connections increases, the value of the output side impedance Zo at which the conversion efficiency η becomes the peak value ηmax decreases and the peak value ηmax of the conversion efficiency also decreases. Specifically, when the number of rectenna connections is “1”, Zo = 270Ω (Z _1P ) and η ₁ max = 65%, and when the number of rectenna connections is “2”, η ₂ near Zo = 180Ω (Z _2P ). When max = 62%, the number of rectenna connections “3”, η ₃ max = 54% near Zo = 50Ω (Z _3P ), and when the number of rectenna connections “4”, η ₄ near Zo = 27Ω (Z _4P ). max = 48%.

When η ₁ max to η ₄ max are compared, η ₁ max is the largest. Therefore, by switching the rectenna number of connections to 1, by adjusting the output impedance Zo to Z _1P by increasing or decreasing the variable resistor 43 can be secured DC power in the most efficient conversion efficiency. However, the output side impedance Zo is a combined impedance of the load circuit 16 and the variable resistor 43 expressed by the above formula (1). Therefore, when the power consumption of the load circuit 16 is significantly reduced to the load resistance Z _L is increased, the increase in the output impedance Zo even if the resistance value Z _VR to the maximum is limited. As a result, if the number of rectenna connections remains 1, matching between the input side and output side impedances Zi and Zo cannot be achieved, and the conversion efficiency η may be lower than when the number of rectenna connections is 2 to 4 (described later). Dotted line portion within the range of W _{Z2 to} W _Z4 in FIG.

  Therefore, in such a case, the input side impedance Zi and Zo are matched by switching the number of rectenna connections from 1 to 2 to lower the input side impedance Zi. For this reason, the control circuit 45 selects the number of rectenna connections that can obtain the optimum conversion efficiency in accordance with the output-side impedance Zo. Hereinafter, an example of selection of the number of rectenna connections will be described.

  In detail, when the output side impedance Zo is obtained by a method described later, referring to the relationship between the output impedance Zo and the conversion efficiency η as shown in FIG. 5A, each rectenna connection is determined from the value of the output side impedance Zo. Determine the conversion efficiency η in each of the numbers. Then, the obtained values of the conversion efficiencies η are compared, and the number of rectenna connections that maximizes the conversion efficiencies η is selected.

FIG. 5B shows only the value of the highest conversion efficiency in each value of the output impedance in FIG. As shown in FIG. 5B, when the output impedance Zo where the conversion efficiency is highest when the number of rectenna connections is 1 is W _Z1 , the obtained output impedance Zo is within the range of W _Z1. In this case, the number of rectenna connections 1 is selected. Similarly, when the ranges of the output side impedance Zo where the conversion efficiency is highest when the number of rectenna connections ₂ , ₃ , and ₄ are W _Z2 , W _Z3 , and W _Z4 , respectively, the obtained output side impedance Zo is W _Z2 , If it is within the range of W _Z3 and W _Z4, the number of rectenna connections 2, 3, and 4 is selected. Incidentally, Za in the figure, the value of output impedance Zo to be a boundary value of the range _{W Z1} and _{W Z2,} Zb, Zc, the boundary value of the range _{W Z2} and _{W Z3 respectively, W Z3} and W _This is the value of the output side impedance Zo that becomes a boundary value with _Z4 .

Thus, if the output impedance Zo is lowered to a range of W _Z2 to _W-Z4, by reducing the input impedance Zi increase the rectenna number of connections, both impedance Zo, take the matching of Zi. Thereby, conversion efficiency (eta) can be raised compared with the case where the number of rectenna connections is kept at one.

  Returning to FIG. 2, the control circuit 45 first obtains the output-side impedance Zo when selecting the optimum number of rectenna connections. The output side impedance Zo is obtained from the output voltage VoutDC of the combined DC power PoutDC.

  The voltage detection circuit 47 corresponds to the output voltage detection means of the present invention, and detects the output voltage VoutDC. One end of the voltage detection circuit 47 is connected to the transmission line 25 b on the parallel rectifier circuit 13 side with respect to the variable resistor 43, and the other end is grounded to the GND terminal or the like, with respect to the load circuit 16 and the variable resistor 43. Connected in parallel. The voltage detection circuit 47 inputs the detected output voltage VoutDC to the control circuit 45. Note that the type of the voltage detection circuit is not particularly limited as long as the output voltage VoutDC can be detected, and the position where the voltage detection circuit 47 is connected is not limited to the above position.

  Here, the relationship between the output voltage VoutDC and the output side impedance Zo is based on the above formula (4), and the vertical axis “conversion efficiency (%)” in FIGS. 5A and 5B is “output voltage (V)”. 6A and 6B replaced with.

By obtaining the relationship between the output voltage VoutDC and the output side impedance Zo in advance as shown in FIG. 6A, the output side impedance Zo is obtained from the current rectenna connection number information and the output voltage VoutDC. Further, the output impedance Zo obtained, based on the resistance value Z _VR known variable resistor 43, is also required load resistance Z _L of the load circuit 16 from the above equation (1). Thus, since to obtain the output impedance Zo on the basis of a result of detecting the output voltage VoutDC output from the parallel rectifier circuit 13, trouble of measuring the load resistance Z _L of the measurement difficult load circuit 16 can be omitted.

When the obtained output-side impedance Zo is within the range of W _Z1 , since “1” is selected as the number of rectenna connections, the output voltage VoutDC is within the range of W _V1 as shown in FIG. Be inside. In this case, when the output voltage VoutDC becomes 1.32 V (V _1P ), the output-side impedance Zo becomes Z _1P and the conversion efficiency η is maximized (see Table 1). Therefore, after setting the rectenna number of connections to 1, so that the output voltage VoutDC becomes _{V 1P,} that increase or decrease the resistance value _{Z VR} of the variable resistor 43 increases or decreases the output voltage VoutDC, the output impedance Zo Z It can be adjusted to _1P . Thereby, the input side and output side impedances Zi and Zo can be perfectly matched.

Further, when the output side impedance Zo is in the range of W _Z2 , W _Z3 , W _Z4 , the number of rectenna connections is selected as 2, 3, 4 respectively, so that the output voltage VoutDC is W _V2 , W _V3 , respectively. , W _V4 . Again, the output voltage VoutDC is _{V 2P,} V _3-Way, by increasing and decreasing the resistance value _{Z VR} of the variable resistor 43 so that the _{V 4P,} the output impedance Zo each _{Z 2P, Z 3P, Z 4P} Thus, the input side and output side impedances Zi and Zo can be perfectly matched. For example, although the output voltage V _4P is lower than 0.4V, the output voltage V _4P is boosted to the drive voltage of the load circuit 16 by the power source stable boost circuit 15 described above.

When adjusting the resistance value _{Z VR} of the variable resistor 43, when exceeding the adjustable range of the variable resistor 43, there may not be adjusted output voltage VoutDC the _V 1P _{~V 4P.} In this case, the resistance value _{Z VR} of the variable resistor 43 in the maximum or minimum may be brought close to _V 1P _{~V 4P} as possible output voltage VoutDC.

  Returning to FIG. 2, the control circuit 45 includes a switch control unit 50 and a variable resistance control unit 51. The switch control unit 50 corresponds to the determination unit and the switch control unit of the present invention, and controls ON / OFF of the switches 23a to 23c and 24a to 24c. The switch control unit 50 includes a first arithmetic expression storage unit 53 (first storage unit) and a second arithmetic expression storage unit 54 (second storage unit).

  In the first arithmetic expression storage unit 53, the first relationship of the output side impedance Zo with respect to the output voltage VoutDC for each of the rectenna connection numbers 1 to 4 as shown in FIG. A total of four types of one arithmetic expression are stored. The second arithmetic expression storage unit 54 indicates the second relationship of the conversion efficiency η with respect to the output side impedance Zo for each of the rectenna connections 1 to 4 as shown in FIG. A total of four types of two arithmetic expressions are stored.

  When the detection result of the output voltage VoutDC is input, the switch control unit 50 reads the first arithmetic expression corresponding to the current number of connected rectennas from the first arithmetic expression storage unit 53. Next, the switch control unit 50 obtains the output-side impedance Zo by substituting the input output voltage VoutDC into the first arithmetic expression. Then, the switch control unit 50 reads the second arithmetic expression corresponding to each of the rectenna connection numbers 1 to 4 from the second arithmetic expression storage unit 54, and outputs the output-side impedance obtained by the first arithmetic expression in each second arithmetic expression. Substitute Zo. Thereby, conversion efficiency (eta) for every rectenna connection number 1-4 is calculated | required. The switch controller 50 selects the number of rectenna connections that maximizes the conversion efficiency η, and controls ON / OFF of the switches 23a to 23c and 24a to 24c.

The variable resistance control unit 51 corresponds to the variable resistance control means of the present invention, and adjusts the resistance value _ZVR of the variable resistance 43. Based on the detection result of the output voltage VoutDC input from the voltage detection circuit 47, the variable resistance control unit 51 approaches the output voltage VoutDC as close as possible to V _{1P to} V _4P according to the current number of rectenna connections 1 to 4, respectively. In this manner, the resistance value _ZVR of the variable resistor 43 is increased or decreased. Thus, it is possible to make the conversion efficiency eta respectively η ₁ max~η ₄ max in each rectenna connections.

When the input-side and output-side impedances Zi and Zo are matched, when the number of rectenna connections is 1, the conversion efficiency η is the maximum value η ₁ max, so the output voltage VoutDC is also maximum. At this time, when the microwave input power increases, the output voltage VoutDC also increases. Therefore, the output voltage VoutDC exceeds the rated voltage, and the capacitor 38 and the diode 39 mounted on the load circuit 16 and each rectenna substrate 19-22. (See FIG. 3) and the like may be destroyed. For this reason, when the output voltage VoutDC input from the voltage detection circuit 47 exceeds the rated voltage, the switch control unit 50 increases the number of rectenna connections by +1. Thereby, conversion efficiency (eta) falls and output voltage VoutDC can be made smaller than a rated voltage. If the output voltage VoutDC does not fall below the rated voltage even if it increases by +1, the number of rectenna connections may be increased by +2 or more.

Startup of the load circuit 16, load resistor Z _L is high, output impedance Zo can also be considered high. At this time, if the input-side impedance Zi is low, the conversion efficiency η is remarkably lowered, and the starting power of the load circuit 16 may not be ensured. For this reason, at the time of starting, if the input side impedance Zi is increased in accordance with the output side impedance Zo, the conversion efficiency η is increased. Therefore, at the time of activation, in order to increase the input side impedance Zi, the initial setting is made so that the number of rectenna connections is 1. As a result, at least the starting power of the load circuit 16 can be secured when the load circuit 16 is started. Moreover, by reducing the output impedance Zo, the input side and the output side impedance Zi, in order to reduce the difference in Zo, the resistance value Z _VR of the variable resistor 43 is initially set to a value smaller than a predetermined value . The initial setting value of the resistance value Z _VR is appropriately selected depending on the size and rectenna type substrate of the input power of the microwave.

Next, the operation of the RFID tag 10 according to the first embodiment of the present invention will be described using the flowcharts shown in FIGS. As an initial setting, “1” is selected as the number of rectenna connections in the parallel rectifier circuit 13, and the resistance value _ZVR of the variable resistor 43 is also adjusted to a predetermined initial setting value. Thereby, when the output side impedance Zo is high at the time of starting, high conversion efficiency (eta) is obtained by making the input side impedance Zi high. As a result, electric power that can operate the load circuit 16 can be ensured.

  When the microwave is received by the antenna 11, the received microwave is converted into DC power by the first rectenna substrate 19. The converted direct current power is input to the load circuit 16 after its output voltage VoutDC is boosted to the operating voltage of the load circuit 16 by the power source stable booster circuit 15. Thereby, the load circuit 16 operates.

  The voltage detection circuit 47 detects the output voltage VoutDC and inputs the detection result to the control circuit 45. The switch control unit 50 obtains the output side impedance Zo by substituting the detection result of the output voltage VoutDC into the first arithmetic expression corresponding to the number of rectenna connections 1. Next, the switch control unit 50 substitutes the obtained output-side impedance Zo into the second arithmetic expression corresponding to each of the rectenna connection numbers 1 to 4, and obtains the conversion efficiency η for each of the rectenna connection numbers 1 to 4. Then, of the obtained conversion efficiencies η, the number of rectenna connections that maximizes the conversion efficiencies η is determined.

When the conversion efficiency η of the number of rectenna connections 1 is maximized and the number of rectenna connections is determined to be 1, the variable resistance control unit 51 starts adjusting the resistance value Z _VR of the variable resistance 43 without changing the number of rectenna connections (FIG. 8). When the output voltage VoutDC is below _{V 1P} increases the resistance value _{Z VR} of the variable resistor 43. If conversely the output voltage VoutDC is above _{V 1P} reduces the resistance value _{Z VR} of the variable resistor 43. Then, when brought close to the output voltage VoutDC the _{V 1P} or as possible _{V 1P,,} adjustment of the resistance value _{Z VR} of the variable resistor 43 is completed. Thereby, when the output side impedance Zo is within the range of W _Z1 (see FIG. 5), the input side and output side impedances Zi and Zo are matched to obtain the conversion efficiency η ₁ max.

If the power consumption of the load circuit 16 is increased, since the load resistance Z _L decreases, also decreases the output impedance Zo. As a result, when the output side impedance Zo is within the range of W _Z2 , the conversion efficiency η of the number of rectenna connections 2 is maximized, and the number of rectenna connections 2 is determined by calculation by the switch control unit 50. Further, when the output side impedance Zo is within the range of W _Z3 and W _Z4 , the rectenna connection numbers 3 and 4 are determined by the calculation by the switch control unit 50 in the same manner. When the new number of rectenna connections is determined, the switch control unit 50 controls each of the switches 23a to 23c and 24a to 24c to switch to the determined number of rectenna connections (see FIG. 9).

After completing the switching of the rectenna connections, variable resistance control unit 51 adjusts the resistance value _{Z VR} of the variable resistor 43, close to the output voltage VoutDC the _V 2P _{~V 4P} or where possible _V 2P _{~V 4P,} respectively . As a result, even when the output side impedance Zo falls within the range of W _{Z2 to} W _Z4 , matching between the input side and output side impedances Zi and Zo is achieved and the optimum conversion efficiency η ₂ max to η ₄ max is obtained. . As described above, the resistance value _ZVR of the variable resistor 43 is adjusted so that the input side and output side impedances Zi and Zo are more perfectly matched, so that it is possible to secure DC power with more optimal conversion efficiency. it can.

  By matching the input side and output side impedances Zi and Zo, the output voltage VoutDC also increases. Therefore, the switch controller 50 constantly monitors whether or not the output voltage VoutDC exceeds the rated voltage. When the output voltage VoutDC exceeds the rated voltage, the number of rectenna connections is increased by +1 to lower the output voltage VoutDC. Thereby, destruction of the load circuit 16, the capacitor 38, the diode 39, etc. is prevented.

These series of processes are repeatedly continued until the output of the response signal from the RFID tag 10 to the interrogator (not shown) is completed and the operation of the RFID tag 10 is completed. Switch control unit 50 and the variable resistance control unit 51, rectenna connections before terminating the operation to return the resistance value Z _VR of the variable resistor 43 to the state of the initialization.

  As described above, the RFID tag 10 according to the first embodiment of the present invention increases the number of rectenna connections and reduces the input-side impedance Zi even when the output-side impedance Zo is significantly reduced due to a sudden increase in power consumption of the load circuit 16. By lowering, the input side and output side impedances Zi and Zo can be matched, and DC power can be secured with optimum conversion efficiency.

  Next, the RFID tag 60 according to the second embodiment of the present invention will be described with reference to FIG. In the following description, components that are the same in function and configuration as those of the RFID tag 10 of the first embodiment are given the same reference numerals and description thereof is omitted (the same applies to the third embodiment).

  The RFID tag 60 has basically the same configuration as the RFID tag 10 of the first embodiment. However, in the RFID tag 60, the output side impedance Zo is estimated from the operation state of the CPU 16a of the load circuit 16. Therefore, the CPU 16a is provided with a power consumption estimation circuit 62, and the control circuit 64 is provided with a switch control unit 65 and a variable resistance control unit 66.

  The power consumption estimation circuit 62 estimates the power consumption P of the load circuit 16 based on the operation status of the CPU 16a. When performing such estimation, for example, the power consumption when the CPU 16a is executing various programs and the power consumption when the CPU 16a is accessing the memory 16b are obtained in advance through experiments or operation simulations. deep. As a result, the power consumption detection circuit 62 can estimate the power consumption P based on the operation status such as which program the CPU 16a is executing or accessing the memory 16b. Various methods other than the above method may be used as long as the power consumption P can be estimated. The estimation result of the power consumption P is input to the control circuit 64.

The switch control unit 65 is provided with a Zo estimation unit 67 and the second arithmetic expression storage unit 54 described above. The Zo estimation unit 67 constitutes a determination unit of the present invention together with the power consumption estimation circuit 62. As described above, output impedance Zo load resistance Z _L is reduced with the consumption power P increases the load circuit 16 is lowered, the load resistance Z _L and the power consumption of the load circuit 16 conversely decreases is increased The output side impedance Zo increases. Therefore, the Zo estimation unit 67 estimates the load resistance Z _L based on the estimation result of the power consumption P, and substitutes the estimation result and the known resistance value Z _VR into the above equation (1), thereby outputting the output side impedance Zo. Is estimated. Therefore, the Zo estimation unit 67 stores a Zo estimation table 67a.

Zo estimation table 67a, for each of the rectenna connection number 1-4, a data table showing the relationship between the load resistance Z _L for the power P, is determined in advance by experiment or the simulation or the like. Zo estimating unit 67 refers to the current rectenna connection number information and Zo estimation table 67a, corresponding to the estimation result of the power consumption P based on the load resistance Z _L results were estimated, estimates the output impedance Zo (get. Note that the estimation method of the output-side impedance Zo is not particularly limited. For example, a Zo estimation arithmetic expression may be used instead of the Zo estimation table 67a. Alternatively, a data table indicating the relationship between the power consumption P and the output side impedance Zo may be obtained, and the output side impedance Zo may be directly estimated from the estimation result of the power consumption P.

  The switch control unit 65 obtains the conversion efficiency η for each number of rectenna connections 1 to 4 based on the estimation result of the output-side impedance Zo and the second calculation formula stored in the second calculation formula storage unit 54. As in the first embodiment, the switch control unit 65 selects the number of rectenna connections that maximizes the conversion efficiency η, and controls ON / OFF of the switches 23a to 23c and 24a to 24c.

The variable resistance control unit 66 adjusts the resistance value _ZVR of the variable resistance 43 based on the estimation result of the power consumption P. For this reason, in the memory (not shown) of the variable resistance control unit 66, the power consumption P _{1P to} P _4P when the output side impedance Zo is adjusted to Z _{1P to} Z _4P for each of the rectenna connections 1 to 4 respectively. Is stored in advance. The variable resistance control unit 66 is variable so that the power consumption P (estimation result) matches P _{1P to} P _4P or approaches P _{1P to} P _4P as much as possible according to the current number of rectenna connections 1 to 4. The resistance value Z _VR of the resistor 43 is increased or decreased. Thus, it is possible to make the conversion efficiency eta respectively η ₁ max~η ₄ max.

  Next, the operation of the RFID tag 60 according to the second embodiment of the present invention will be described using the flowcharts shown in FIGS. Note that until DC power is input to the load circuit 16, the description is omitted because it is the same as in the first embodiment.

When the load circuit 16 operates, the power consumption estimation circuit 62 estimates the power consumption P of the load circuit 16 based on the operation state of the CPU 16 a and inputs the estimation result to the control circuit 64. Zo estimating unit 67, based on the current and rectenna connection number information, and the estimation result of the power consumption P inputted, a result of estimating the load resistance Z _L and a Zo estimation table 67a, to estimate the output impedance Zo .

  Next, the switch control unit 65 obtains the conversion efficiency η for each number of rectenna connections 1 to 4 based on the estimation result of the output-side impedance Zo and the second calculation formula read from the second calculation formula storage unit 54. The number of rectenna connections that maximizes the conversion efficiency η is determined.

If the continuation of the rectenna connection number 1 is determined, the variable resistance control unit 66 determines that the estimation result of the power consumption P is P _1P based on the input estimation result of the power consumption P, or P _1P as much as possible. The resistance value _ZVR of the variable resistor 43 is increased or decreased so as to approach (see FIG. 12). Thereby, since the output side impedance Zo approaches Z _1P (see FIG. 5), the input side and output side impedances Zi and Zo are matched, and the conversion efficiency becomes a value close to η ₁ max.

When the number of rectenna connections 2 to 4 is determined, the number of rectenna connections is switched as described with reference to FIG. When the switching of the number of rectenna connections is completed, the variable resistance control unit 66 similarly determines the resistance value Z _VR of the variable resistance 43 so that the estimation results of the power consumption P are respectively P _{2P to} P _4P or as close as possible. Adjust. Thus, even in the rectenna connect two to four, because it is closer to the output side impedance Zo to _Z 2P _{to Z 4P,} conversion efficiency is close to η ₂ max~η ₄ max. Since these adjustments are the same as those in the first embodiment, description thereof is omitted.

  As described above, the RFID tag 60 according to the second embodiment of the present invention estimates the power consumption P of the load circuit 16 based on the operation state of the CPU 16a of the load circuit 16, and estimates the output side impedance Zo based on the estimation result. Since the number of rectenna connections is switched, the same effect as that described in the first embodiment can be obtained. Further, in the second embodiment, by causing the CPU 16a to estimate the power consumption of the load circuit 16, unlike the first embodiment, the voltage detection circuit 47 is not required, so that cost reduction and size reduction can be achieved.

  Next, the RFID tag 70 according to the third embodiment of the present invention will be described with reference to FIG. In the RFID tag 10 of the first embodiment, after obtaining the output-side impedance Zo, the conversion efficiency η for each number of rectenna connections 1 to 4 is obtained, and then the number of rectenna connections that maximizes the conversion efficiency η is determined. ing. In this case, in order to determine the number of rectenna connections from the output-side impedance Zo, it is necessary to obtain the conversion efficiency η of the number of rectenna connections, and there is a problem that it takes time to determine the number of rectenna connections. Therefore, the control circuit 72 of the RFID tag 70 is provided with a switch control unit 73 for quickly determining the number of rectenna connections.

The switch control unit 73 is provided with the first arithmetic expression storage unit 53 and the data table 75 described above. The data table 75 is created based on Table 1 and FIGS. 5 (A) and 5 (B). As described above, when the output side impedance Zo is equal to or higher than Za (within the range of W _Z1 ), the conversion efficiency η is the highest when the number of rectenna connections is 1. Further, output impedance Zo is Zb～Za _(within the range of _{W Z2), (in} the range of _{W Z3) Zc~Zb,} when less than Zc of _(within the range of _{W Z4),} respectively rectenna number of connections 2-4 Conversion efficiency η is highest (see FIG. 5). This relationship does not change if the rectenna substrates are the same. Therefore, as shown in FIG. 14, in the data table 75, the optimum number of rectenna connections is selected in each range of the output side impedance Zo (Za or more, Zb to Za, Zc to Zb, less than Zc). Has been created.

  Returning to FIG. 13, when the output-side impedance Zo is obtained based on the detection result of the output voltage VoutDC, the switch control unit 73 refers to the data table 75 and the conversion efficiency η is highest at the obtained impedance Zo. Determine the number of rectenna connections. Based on the determination result, the switch control unit 73 controls each of the switches 23a to 23c and 24a to 24c to switch to the determined number of rectenna connections.

  Next, the operation of the RFID tag 70 according to the third embodiment of the present invention will be described using the flowchart shown in FIG. Until the output-side impedance Zo is obtained, the description is omitted because it is the same as that in the first embodiment.

  When the output side impedance Zo is obtained, the switch control unit 73 refers to the data table 75. If the output side impedance Zo is equal to or higher than Za, the switch control unit 73 continues the state where the number of rectenna connections is one. Further, the switch control unit 73 switches the switches 23a to 23c and 24a so that the number of rectenna connections is switched to 2, 3, and 4 if the output side impedance Zo is less than Zb to Za, Zc to Zb, and Zc. ˜24c is controlled. Subsequent processing is the same as in the first embodiment, and a description thereof will be omitted.

  As described above, the RFID tag 70 according to the third embodiment of the present invention directly determines the number of rectenna connections with the highest conversion efficiency η from the obtained output-side impedance Zo by referring to the data table 75. Therefore, in addition to the effects described in the first embodiment, the rectenna connection number determination process can be quickly performed.

  In each of the above embodiments, the parallel rectifier circuit 13 has been described by taking a laminated substrate in which the first to fourth rectenna substrates 19 to 22 are sequentially laminated as an example. However, the present invention is not limited to this. Absent. For example, as shown in FIG. 16, two parallel circuit patterns 83a and 83b may be formed in parallel on each rectenna substrate 81 by using a laminated substrate in which two rectenna substrates 81 are stacked as the parallel rectifier circuit 80. Good.

  The circuit pattern 83a is formed in the same pattern as the circuit pattern 31 (see FIG. 3) described above. The circuit pattern 83b is formed to have symmetry with the circuit pattern 83a. Both circuit patterns 83a and 83b include microwave input portions 32a and 32b, capacitor mounting portions 33a and 33b on which a capacitor 38 is mounted, diode mounting portions 35a and 35b on which a diode 39 is mounted, and LPFs 36a and 36b, respectively. And DC power output units 37a and 37b provided with basically the same switches 84a and 84b as the switches 24a to 24c. Since these parts are the same as those formed in the circuit pattern 31, description thereof will be omitted.

  When a plurality of circuit patterns are formed on a single rectenna substrate 81 in this way, the thickness can be made thinner than that of the parallel rectifier circuit 13 that is a four-layer laminated substrate. It is more suitable to be built into the vessel. Although only two circuit patterns are formed on the rectenna substrate 81, three or more circuit patterns may be formed on one rectenna substrate. In this case, the circuit patterns adjacent to each other may be formed so as to have symmetry.

In each of the above embodiments, the case where the variable resistor 43 is connected in parallel to the load circuit 16 has been described as an example. However, the present invention is not limited to this, and the variable resistor 43 is provided. It does not have to be done. Output impedance Zo of this case, the load resistance Z _L of the load circuit 16. In each of the above embodiments, only one variable resistor 43 is provided. However, the present invention is not limited to this, and each DC power output unit 37 of each rectenna substrate 19 to 22 is individually provided. You may make it connect.

  In each of the above embodiments, the first to fourth rectenna substrates 19 to 22 have been described by taking the case of using the same one as an example. However, the present invention is not limited to this, and the rectenna is not limited thereto. The type of substrate may be different. In this case, the relationship between the output side impedance Zo, the conversion efficiency η, and the output voltage VoutDC as shown in FIGS. 5 and 6 may be obtained for each number of rectenna substrates and their combinations. .

  In each of the above embodiments, the initial setting is such that the number of rectenna connections is switched to 1 at the time of startup, but the present invention is not limited to this. For example, when the power consumption of the load circuit 16 (CPU 16a) increases at the time of startup and the output side impedance Zo significantly decreases, the initial setting may be performed so that the number of rectenna connections can be switched to 2 or more.

  In each of the above embodiments, the case where the input power of the microwave is constant at 10 mW has been described as an example. However, the magnitude of the input power varies depending on the distance between the RFID tag and the interrogator. Therefore, a plurality of first and second arithmetic expressions and data tables corresponding to a plurality of input power levels are facilitated in advance, and output is performed using an arithmetic expression and data table most suitable for the input power levels. The magnitude of the side impedance Zo may be determined.

In the first and second embodiments, the variable resistance control units 51 and 66 adjust the variable resistance 43 based on the estimation results of the output voltage VoutDC and the power consumption P, respectively, but the present invention is not limited to this. Is not to be done. For example, based on the output side impedance Zo obtained by the switch control units 50 and 65, the variable resistance 43 is adjusted so that the output side impedance Zo is as close as possible to Z _1P , Z _2P , Z _3P , Z _4P. Also good.

  Moreover, in each said embodiment, although the 1st and 2nd switch circuits 23 and 24 are provided so that the 2nd-4th rectenna board | substrates 20-22 may be pinched | interposed, this invention is limited to this. Instead, only one of them may be used. For example, only the first switch circuit 23 may be provided, and the output side (load circuit side) of the second to fourth rectenna substrates 20 to 22 may be always connected.

  In each of the embodiments described above, the case where a total of four substrates of the first to fourth rectenna substrates 19 to 22 are connected in parallel to each other has been described as an example, but the present invention is limited to this. The present invention can also be applied to a case where three or less or five or more rectenna substrates are connected in parallel.

  In each of the above embodiments, the case where the rectenna device of the present invention is applied to an RFID tag has been described as an example. However, the present invention is not limited to this, and may be applied to various electronic devices. Can do. For example, the rectenna device supplies power for supplying driving power to small electronic devices that do not have sufficient space for batteries such as capsule endoscopes, and to electronic devices (including portable electronic devices) that cannot supply power via wires. Can be used as a source. In such an electronic device, it is considered that the load fluctuation is larger due to, for example, on / off of the backlight of the LCD, and therefore it is effective to apply the present invention. Further, the rectenna device may be one that charges the rechargeable battery instead of directly supplying power to the load circuit.

It is the block diagram which showed the electrical structure of the RFID tag. It is the block diagram which showed the impedance matching control circuit of the RFID tag of 1st Embodiment. It is an external appearance perspective view of a parallel rectifier circuit. It is a top view of a parallel rectifier circuit. (A) is a graph showing the relationship between output impedance and conversion efficiency for each number of rectenna connections, and (B) is a graph showing only the highest conversion efficiency value for each value of output impedance. (A) is a graph showing the relationship between output impedance and output voltage for each number of rectenna connections, and (B) is a graph showing only the highest output voltage value for each value of output impedance. It is a flowchart for demonstrating the effect | action of the RFID tag of 1st Embodiment. It is a flowchart for demonstrating the adjustment process of a variable resistance. It is a flowchart for demonstrating the switching process of the number of rectenna connections. It is the block diagram which showed the impedance matching control circuit of the RFID tag of 2nd Embodiment. It is a flowchart for demonstrating the effect | action of the RFID tag of 2nd Embodiment. It is a flowchart for demonstrating the adjustment process of the variable resistance in 2nd Embodiment. It is the block diagram which showed the impedance matching control circuit of the RFID tag of 3rd Embodiment. It is the figure which showed an example of the data table in the impedance matching control circuit in FIG. It is a flowchart for demonstrating the effect | action of the RFID tag of 3rd Embodiment. It is an external appearance perspective view of the parallel rectifier circuit of other embodiment.

Explanation of symbols

10, 60, 70 RFID tag 11 Antenna 13 Parallel rectifier circuit 15 Power supply stable booster circuit 16 Load circuit 16a CPU
19-22 First to fourth rectenna boards 23 First switch circuit 24 Second switch circuit 25 Power distribution circuit 23a-23c Switch 24a-24c Switch 43 Variable resistance 45, 64, 72 Impedance matching control circuit 47 Voltage detection circuit 50, 65, 73 Switch control unit 51, 66 Variable resistance control unit 53 First arithmetic expression storage unit 54 Second arithmetic expression storage unit 62 Power consumption estimation circuit 67 Zo estimation unit 75 Data table

Claims (12)

In the rectenna device that converts the microwave received by the antenna into DC power and operates the load circuit using the converted DC power as drive power,
A plurality of rectifier circuits that convert the microwaves to DC power and are connected in parallel;
A switch for selectively connecting one or more rectifier circuits from the plurality of rectifier circuits to the antenna;
Determining means for determining the magnitude of the circuit impedance of the load circuit;
Based on the determination result of the determination means, the number of connections of the rectifier circuit that maximizes the conversion efficiency of the DC power with respect to the microwave input power is determined, and the determined number of connections of the rectifier circuits are connected to the antenna. As described above, a rectenna device comprising switch control means for operating the switch. A variable resistor connected in parallel to the load circuit;
Variable resistance control means for controlling the size of the variable resistance,
The determining means obtains a magnitude of a first combined impedance obtained by combining the circuit impedance and the variable resistance,
The switch control means determines the number of connections of the rectifier circuit that maximizes the conversion efficiency based on the first combined impedance.
The variable resistance control means is configured to control the size of the variable resistance so that the first combined impedance matches the second combined impedance based on the second combined impedance of the rectifier circuit corresponding to the determined number of connections. The rectenna device according to claim 1, wherein the rectenna device is controlled. Output voltage detecting means for detecting the output voltage of the DC power;
First storage means for storing in advance a first relationship of the first combined impedance with respect to the magnitude of the output voltage for each of the number of connections;
3. The rectenna device according to claim 2, wherein the determination unit obtains the magnitude of the first combined impedance corresponding to the detection result of the output voltage detection unit with reference to the first relationship.   The determining means estimates the magnitude of power consumption of the load circuit from the operating condition of the load circuit, and obtains the magnitude of the first combined impedance based on the estimation result of the power consumption. The rectenna device according to claim 2. For each of the number of connections, a second storage unit that stores in advance a second relationship of the conversion efficiency with respect to the first combined impedance,
The switch control means determines the number of connections that maximizes the conversion efficiency for the first combined impedance acquired by the determination means with reference to the second relationship. The rectenna device according to claim 3 or 4.   The second relationship is a data table in which a range of the first combined impedance in which the conversion efficiency is higher than that of other numbers of connections is set in advance for each of the numbers of connections. The rectenna device according to claim 5.   The rectenna device according to claim 1, wherein the number of connections is set to 1 when the load circuit is activated.   8. The rectenna device according to claim 1, wherein the switch control unit increases the number of connections when an output voltage of the DC power exceeds a rated voltage.   9. A booster circuit for boosting the output voltage of the DC power to the operating voltage of the load circuit is provided between the plurality of rectifier circuits and the load circuit. The rectenna device described in the paragraph.   The rectenna device according to claim 1, wherein the plurality of rectifier circuits are provided on a plurality of substrates each having the same circuit pattern.   The rectenna apparatus according to claim 10, wherein the plurality of substrates are stacked. The plurality of rectifier circuits are configured by a plurality of circuit patterns formed in parallel on the same substrate,
10. The rectenna device according to claim 1, wherein the plurality of circuit patterns are formed such that circuit patterns adjacent to each other have symmetry.

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