JP2009065252A - Method of manufacturing rfid tag - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing an RFID tag in which the novel RFID tag can be easily manufactured which has an excellent radiation pattern and can be installed on either a conductive body or a nonconductive body with a simple structure without shortening a communication distance. <P>SOLUTION: The method of manufacturing the RFID tag includes a hole portion forming stage of forming a hole portion on one principal surface of a dielectric substrate, an IC chip inserting stage of inserting the IC chip into the hole portion, a ground pattern forming stage of forming a ground conductor pattern on the other principal surface of the dielectric substrate, a conductor pattern forming stage of forming a conductor pattern having a slot in a long and thin shape on the one principal surface of the dielectric substrate, an IC chip connecting stage of electrically connecting the IC chip to the conductor pattern through the slot during the conductor pattern forming stage, and a trimming stage of trimming the conductor pattern along an edge of the slot to increase the width direction or/and length direction or the both of the slot. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing an RFID (Radio Frequency Identification) tag, receives a command signal transmitted from a reader / writer, updates tag information stored in a memory according to the information of the command signal, and additionally writes the tag information. Alternatively, the tag information is transmitted as a read signal to the RFID reader / writer, and is used for living / article entry / exit management, logistics management, and the like.

  The RFID system performs wireless communication between an RFID tag having an IC chip and an RFID reader / writer. RFID tags include a so-called active type tag that is mounted with a battery and driven by the electric power, and a so-called passive type tag that receives electric power from a reader / writer and drives it as a power source. The active tag has a battery compared to the passive type, so it has advantages in terms of communication distance and communication stability, but has a complicated structure and disadvantages such as an increase in size and cost. There is also. And with recent improvements in semiconductor technology, IC chips have become smaller and higher performance for passive tags, and the use of passive tags in a wide range of fields has been expanded by extending communication distance and improving communication stability. This is an expected situation.

  In the passive induction tag, in the electromagnetic induction method applied to the RFID tag of the long wave band and the short wave band, a voltage is applied to the RFID tag by the electromagnetic induction action between the transmission antenna coil of the reader / writer and the antenna coil of the RFID tag. The IC chip is activated by this voltage to enable communication. Therefore, the RFID tag operates only within the induction electromagnetic field by the RFID reader / writer, and the communication distance becomes about several tens of centimeters. In addition, in radio frequency RFID tags such as UHF band and microwave band, the radio wave communication method is applied, and power is supplied to the IC chip of the RFID tag by radio waves, so the communication distance is about 1 to 8 m. And has improved significantly. Accordingly, RFID tags in high frequency bands such as UHF band and microwave band are collectively read and moved by a plurality of RFID tags that are difficult to realize in long wave band and short wave band RFID systems with short communication distances. RFID tags can be read, and the range of use is expected to expand significantly in the future. Then, as a passive tag of high frequency, such as a UHF band or a microwave band, there existed what was described in patent documents 1-5, for example.

  Regarding a conventional RFID tag, FIG. 3 of Patent Document 1 includes a half-wavelength microstrip line resonator 13, a dielectric substrate 14, and a ground conductor plate 15. By connecting the IC chip to the ground conductor plate 15, even if there is a metal object (conductor) on the ground conductor plate 15 side, the metal object (conductor) is hardly affected by the radiation characteristics of the antenna. An RFID tag that can be installed and pasted is disclosed. As for the details of the IC chip, FIG. 17 of Patent Document 1 shows that the dielectric material on the ground conductor side on the back surface of the ground line 104 where the IC 106 is connected to the central portion of the antenna conductor 100 by a technique such as wire bonding. In FIG. 18 to FIG. 21, similarly, the IC 121 is disposed so as to be buried in the dielectric material on the ground conductor side. As disclosed in paragraph No. 0028 of Patent Document 1, any bonding wire 122, 12, 2 can be used as long as the grounding surface can be formed on the side opposite to the surface on which the connection pad of IC 121 is formed. There is a description that one bonding wire 122 is unnecessary.

  FIG. 19 of Patent Document 2 shows an RFID tag 5 provided with a dielectric member 10, an IC chip recess 10 b, a film base 20, an antenna pattern 30, and an IC chip 40. IC chip recess 10b in which IC chip 40 can be embedded is provided, IC chip 40 is embedded in this IC chip recess 10b, and antenna pattern 30 formed on the inner surface side of film substrate 20 is electrically connected to IC chip 40. As described above, there is disclosed a loop antenna in which a film substrate 20 is wound around a dielectric member 10 and configured by an antenna pattern 30 to suppress a decrease in communication distance even in the vicinity of a radio wave absorber.

  1 and 2 of Patent Document 3, the IC chip 21 is fitted in the recess 15 of the base material 11 (substrate), and both ends of the antenna pattern 13 formed by screen printing using conductive ink are shown. An RFID tag electrically connected to the IC chip 21 is disclosed. Further, FIG. 4 of Patent Document 4 discloses one having two pairs of antenna patterns 13A and 13B.

  In FIG. 4 of Patent Document 4, an opening 31 for exposing a part of the dielectric 20 is formed on the antenna surface 30, and the opening includes a pair of first slits 31 a extending in parallel so as to face each other, and the pair. There is disclosed an RFID tag that includes a slit 31a and a second slit 31b that communicates with the pair of slits 31a, and the second slit 31b is positioned at an intermediate portion of the pair of first slits 31a. In the transmission / reception element (IC chip), the first and second feeding points are connected to 41 and 42.

  FIG. 1 and FIG. 2 of Patent Document 5 disclose an RFID tag in which an IC chip 13 is mounted on a slot antenna 10 formed by providing a slot 12 in the central longitudinal direction of a rectangular conductor plate 11. Yes.

Japanese Patent Laid-Open No. 2000-332523 (FIGS. 3, 17 to 21)

Japanese Patent Laying-Open No. 2006-53833 (FIG. 19)

JP 2003-223626 (FIGS. 1, 2 and 4)

Japanese Patent Laying-Open No. 2006-237664 (FIG. 4)

JP 2002-358494 A (FIGS. 1 and 2)

  The RFID tag described in Patent Document 1 can be installed on a metal object (conductor). However, since the IC chip is connected between the half-wavelength microstrip line resonator and the ground conductor plate, it is necessary to connect the IC chip by wire bonding or embed the IC chip inside the dielectric substrate. For this reason, there is a problem that the RFID tag configuration is complicated and manufacturing (mass production) becomes difficult.

  When the RFID tag described in Patent Document 2 is attached to a conductive object (conductor) such as a metal object or installed in the vicinity thereof, the loop antenna may not operate due to the influence of the conductive object, or the communication distance may be reduced. There is a problem that it is extremely lowered.

  When the RFID tag described in Patent Document 3 is attached to a conductive object (conductor) such as a metal object or installed in the vicinity thereof as in Patent Document 2, a loop antenna or a dipole antenna is affected by the influence of the conductive object. Will not work or the communication distance will be extremely reduced.

  The RFID tag described in Patent Document 4 has a pair of first slits 31a extending in parallel so that the openings face each other, the pair of slits 31a, and a second slit 31b that communicates the pair of slits 31a. The opening 31 is configured such that regions 36 and 37 defined by the dielectric 20 exposed through the opening 31 in the antenna surface 30 form a matching circuit for the transmitting and receiving elements. Since the pair of slits 31a have a horizontally long shape with respect to the horizontal direction and the electric field of the cross polarization component in the vertical direction is generated in the pair of slits 31a together with the electric field of the positive polarization in the horizontal direction in the second slit 31b. There exists a subject that the gain of a wave component falls.

  In addition, the generated cross-polarized light is radiated in a direction different from the direction originally intended for the positive-polarized wave, so there may be a case where a tag is in a place where communication is not desired when communicating with a reader / writer. There is also a problem that the installation and operation method of the tag becomes difficult. Further, the patch antenna of the RFID tag described in Patent Document 4 is basically arranged such that the feeding points 41 and 42 are near the center of the antenna surface 30 but the slit is shifted from the center of the antenna surface 30. As a result, the pattern of the positive polarization is also asymmetrical, which affects the symmetry of the radiation pattern of the antenna. From these problems, it can be seen that the patch antenna disclosed in Patent Document 4 is centered on matching between the regions 36 and 37 and the transmitting / receiving element (IC chip).

  The RFID tag described in FIG. 1 and FIG. 2 of Patent Document 5 employs a slot antenna having a slot provided inside a conductor pattern. Similar to Patent Document 2, a conductive object (conductor) such as a metal object is used. ) Or installed in the vicinity thereof, there is a problem that the loop antenna or the dipole antenna does not operate due to the influence of the conductive object, or the communication distance is extremely reduced. Furthermore, since a magnetic field is generated in the longitudinal direction of the slot shown in FIG. 1 of Patent Document 5 and radiates by resonating at this length, the slot length needs to be about λ / 2 in order to radiate with high efficiency. Thus, there is a problem in miniaturization of the RFID tag.

  The present invention has been made to solve the above-described problems, has a good radiation pattern, and has a simple structure, regardless of whether it is a conductive object or a non-conductive object without shortening the communication distance. An object of the present invention is to provide a method of manufacturing an RFID tag that can easily manufacture a new RFID tag that can be installed.

  According to a first aspect of the present invention, there is provided an RFID tag manufacturing method comprising: a hole forming step for forming a hole in one main surface of a dielectric substrate; an IC chip inserting step for inserting an IC chip into the hole; and the dielectric A ground pattern forming step for forming a ground conductor pattern on the other main surface of the body substrate, a conductor pattern forming step for forming a conductor pattern having an elongated slot on one main surface of the dielectric substrate, and a conductor pattern forming step An IC chip connecting step for electrically connecting the IC chip to the conductor pattern through the slot, and trimming the conductor pattern at the end of the slot, so that either the width direction or the length direction of the slot Or a trimming step for widening both of them.

  According to a second aspect of the present invention, there is provided an RFID tag manufacturing method comprising: a hole forming step for forming a hole in one main surface of a dielectric substrate; and a ground pattern for forming a ground conductor pattern on the other main surface of the dielectric substrate. A forming step, a conductor pattern forming step for forming a conductor pattern having an elongated slot on the film substrate, an IC chip connecting step for electrically connecting an IC chip to the conductor pattern via the slot, After the IC chip connecting step, the IC chip is inserted into the hole, and a fixing step for fixing the film base material to the dielectric substrate; and the conductor pattern at the end of the slot is trimmed, and the slot And a trimming step for widening one or both of the width direction and the length direction.

  According to a third aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a hole forming step for forming a hole in one main surface of a dielectric substrate; and a ground pattern for forming a ground conductor pattern on the other main surface of the dielectric substrate. A forming step, a conductor pattern forming step for forming a conductor pattern having an elongated slot on the film substrate, an IC chip connecting step for electrically connecting an IC chip to the conductor pattern via the slot, After the IC chip connecting step, the IC chip is inserted into the hole, and a fixing step for fixing the film base material to the dielectric substrate; and the conductor pattern at the end of the slot is trimmed, and the slot A trimming step of widening one or both of the width direction and the length direction of the film, and a film base material removal step of removing the film base material from the dielectric substrate It is characterized in.

  According to a fourth aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a conductor pattern forming step of forming a conductor pattern having an elongated slot on one principal surface of a dielectric substrate; and the dielectric material simultaneously with the conductor pattern forming step. A ground pattern forming step of forming a ground conductor pattern on the other main surface of the substrate; and an IC for electrically connecting the IC chip to the conductor pattern via the slot before the conductor pattern forming step and the ground pattern forming step. A chip connecting step and a trimming step of trimming the conductor pattern at the end of the slot and widening one or both of the width direction and the length direction of the slot are provided.

  According to a fifth aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a conductor pattern forming step of forming a conductor pattern having an elongated slot on one main surface of a dielectric substrate; and a grounding on the other main surface of the dielectric substrate. A ground pattern forming step of forming a conductor pattern; an IC chip connecting step of electrically connecting an IC chip to the conductor pattern through the slot; and trimming the conductor pattern along the end of the slot; And a trimming step of widening one or both of the width direction and the length direction.

  According to a sixth aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a hole forming step for forming a hole in one principal surface of a dielectric substrate; an IC chip inserting step for inserting an IC chip into the hole; and the dielectric A grounding pattern forming step for forming a grounding conductor pattern on the other main surface of the body substrate, and a convex pattern extending inward from both opposing sides in the length direction are provided on one main surface of the dielectric substrate. A conductor pattern forming step of forming a conductor pattern having a slot formed therein, an IC chip connecting step of electrically connecting the IC chip to the conductor pattern via the slot during the conductor pattern forming step, and the convex pattern And a convex pattern trimming step for widening the length direction of the slot.

  According to a seventh aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a hole forming step for forming a hole in one main surface of a dielectric substrate; and a ground pattern for forming a ground conductor pattern on the other main surface of the dielectric substrate. A conductive pattern forming step of forming a conductive pattern having a slot provided with a convex pattern extending inwardly from both sides facing each other in the length direction on the film base, and a forming step; An IC chip connecting step for electrically connecting the IC chip to the conductor pattern, and after the IC chip connecting step, the IC chip is inserted into the hole and the film base is fixed to the dielectric substrate. And a convex pattern trimming step of trimming the convex pattern and widening the length direction of the slot.

  According to an eighth aspect of the present invention, there is provided a RFID tag manufacturing method comprising: a hole forming step for forming a hole in one main surface of a dielectric substrate; and a ground pattern for forming a ground conductor pattern on the other main surface of the dielectric substrate. A conductive pattern forming step of forming a conductive pattern having a slot provided with a convex pattern extending inwardly from both sides facing each other in the length direction on the film base, and a forming step; An IC chip connecting step for electrically connecting the IC chip to the conductor pattern, and after the IC chip connecting step, the IC chip is inserted into the hole and the film base is fixed to the dielectric substrate. A fixing step, a convex pattern trimming step of trimming the convex pattern and widening a length direction of the slot, and a film base from the dielectric substrate. Is characterized in that a film substrate removal step of removing.

  According to a ninth aspect of the present invention, there is provided a method of manufacturing an RFID tag, comprising: a conductor having a slot formed on one principal surface of a dielectric substrate and having a convex pattern extending inward from both opposing sides in the length direction. A conductor pattern forming step for forming a pattern, a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate simultaneously with the conductor pattern forming step, the conductor pattern forming step, and the ground pattern forming step. An IC chip connecting step for electrically connecting an IC chip to the conductor pattern through the slot and a convex pattern trimming step for trimming the convex pattern and widening the length direction of the slot. It is characterized by that.

  An RFID tag manufacturing method according to a tenth aspect of the present invention is the method according to any one of the sixth to ninth aspects, further comprising a trimming step of widening one or both of the width direction and the length direction of the slot. .

  An RFID tag manufacturing method according to an eleventh aspect of the present invention is the method according to any one of the first to fifth and tenth aspects, wherein, in the trimming step, the slot is widened in a tapered shape as it is separated from the IC chip. is there.

  An RFID tag manufacturing method according to a twelfth aspect of the present invention is the method for manufacturing the RFID tag, wherein when the conductor pattern is formed, the electrical connection portions respectively extending from the opposite sides of the conductor pattern in the width direction constituting the slot to the inside of the slot. 12 is formed, and the electrical connection portion and the IC chip are electrically connected to each other.

  As described above, in the RFID tag according to the RFID tag manufacturing method of the present invention, the electric field direction generated in the slot and the electric field direction of the patch antenna coincide with each other. The configured conductor pattern acts as a radiating part of the patch antenna, so even if it is installed on a conductive installation as well as non-conductive, it is hardly affected by the antenna radiation characteristics. Since the IC chip is electrically connected to the conductive pattern via the power supply loss, the feeding loss can be reduced, and therefore the communicable distance is not shortened and the material constant of the dielectric substrate ( (Impact of slot to improve the deterioration or variation of RFID tag performance due to variations in dielectric constant, dielectric loss tangent, substrate thickness) and processing accuracy. An effect that impedance adjustment is easy.

  In addition, when the IC chip is inserted into the hole of the dielectric substrate or the IC chip is placed inside the dielectric substrate (antenna pattern side), the IC chip does not bulge, so the IC chip due to impact or the like does not occur. There is an effect that the damage of the is reduced.

Embodiment 1 FIG.
Embodiment 1 of the present invention will be described below. FIG. 1 is a configuration diagram of an RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment. 1A is a plan view of the RFID tag, FIG. 1B is a cross-sectional view taken along line AA ′ in FIG. 1A, and FIG. 1C is FIG. 3 is an enlarged plan view of the vicinity of the slot of the RFID tag shown in FIG. In these FIG. 1, 1 is a dielectric substrate. Reference numeral 2 denotes a conductor pattern provided on one main surface (front surface) of the dielectric substrate 1. As shown in FIG. 1A, the conductor pattern 2 is formed on the inner side of the dielectric substrate 1 at a distance d from the vertical and horizontal ends. As shown in FIG. 1A, an elongated slot 3 is formed in the central portion of the conductor pattern 2. In the slot 3, the conductor pattern 2 can be formed by etching, milling, vapor deposition, printing, or the like. The length and width of the slot 3 can be determined by the frequency used. Reference numeral 4 denotes a hole (concave portion) formed in one main surface of the dielectric substrate 1. Reference numeral 5 denotes an IC chip, which is composed of a memory or the like as will be described later. The IC chip 5 is electrically connected to the conductor pattern 2 through the slot 3. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted.

  Here, a connection configuration between the IC chip 5 and the conductor pattern 2 will be described. 6 and 6, as shown in FIGS. 1A and 1B, protruding electrical connection portions respectively extending from both sides of the opposing conductor patterns 2 and 2 in the width direction constituting the slot 3 to the inside of the slot 3. Thus, the conductor patterns 2 and 2 on both sides of the slot 3 are continuously connected and electrically connected. These electrical connections 6 and 6 may be formed simultaneously with the formation of the conductor pattern 2. Two terminals (not shown) of the IC chip 5 are connected to the electrical connection portions 6 and 6 thereof. If the size of the IC chip 5 is the same as or smaller than the width of the slot 3, it will fall within the width of the slot 3. At this time, the two terminals (not shown) of the IC chip 5 are Connect to electrical connections 6, 6. However, when the size of the IC chip 5 is larger than the width of the slot 3, the terminal (not shown) of the IC chip may be electrically connected to a portion near the slot 3 of the conductor pattern 2 through the slot. Therefore, in this case, it is not necessary to provide the electrical connecting portions 6 and 6 as described above.

  Further, in FIG. 1A, the IC chip 5 is disposed at the center in the length direction of the slot 3, but the arrow attached to the slot 3 in FIG. You may arrange | position at the edge part of the length direction of the slot 3 which moved along. Since the hole 4 of the dielectric substrate 1 is formed for inserting the IC chip 5, the depth and the width thereof correspond to the size of the IC chip. However, when a molding material or an adhesive is used to fix the IC chip, it is necessary to consider their volumes. The position where the hole 4 is formed is naturally determined according to the position in the slot 3 where the IC chip 5 is arranged. In any case, the shape and size of the slot 3 must be matched to the number and characteristic impedance of the electrical connection portions 6 of the IC chip 5 to be mounted. For example, in order to achieve impedance matching, in addition to fine adjustment of the shape of the slot 3, in the case where there are two connection terminals of the IC chip 5, two electrical connection portions 6 having a width capable of impedance matching are formed. do it. Next, reference numeral 7 denotes a ground conductor pattern provided on the other main surface (back surface) of the dielectric substrate 1.

  FIG. 2 is a basic configuration diagram of the RFID system, and FIG. 2A is a conceptual diagram schematically showing transmission / reception between the RFID tag and the RFID reader / writer. FIG. 2B is a configuration diagram of the RFID tag, and in particular, a block configuration diagram functionally showing the internal configuration of the IC chip 5. 2A and 2B, reference numeral 8 denotes an RFID tag having the configuration shown in FIG. Reference numeral 9 denotes an antenna portion provided in the RFID tag 8, which corresponds to the conductor pattern 2 in which the slot 3 is formed in FIG. As shown in FIG. 1 described above, the antenna portion 9 of the RFID tag 8 is provided with the conductor pattern 2 having the slot 3 on one main surface (front surface) of the dielectric substrate 1, and the other main surface (back surface) of the dielectric substrate 1. ) Is provided with the ground conductor pattern 7, so that the RFID tag 8 functions as a patch antenna. That is, the conductor pattern 2 having the slot 3 functions as an antenna pattern (radiating portion). The conductor pattern 2 and the slot 3 are adjusted so as to obtain impedance matching between the operating frequency of the RFID system and the IC chip 5 so as to be excited. Since this adjustment is greatly related to the thickness and relative dielectric constant of the dielectric substrate 1, a desired radiation pattern and gain can be obtained by adjusting and designing these conditions together. As described above, the slot 3 is formed in the central portion of the conductor pattern 2 so that the radiation pattern of the conductor pattern 2 is good. By adjusting and designing in accordance with such conditions, a desired radiation pattern and gain in the RFID tag 8 can be obtained, and without increasing the size of the RFID tag 8, that is, the dielectric substrate 1, for example, 1 to 1 A communication distance of about 8 m can be obtained.

  Reference numeral 10 denotes an RFID reader / writer, and reference numeral 11 denotes an antenna unit provided in the RFID reader / writer 10, which performs wireless communication with the antenna unit 9 of the RFID tag 8. Reference numeral 5 denotes the IC chip described in FIG. 1, and the specific configuration thereof is as shown in FIG. An analog unit 12 receives a transmission wave from the RFID reader / writer 10 by the antenna unit 9 of the RFID tag 8 and outputs it to the digital unit 19 at the subsequent stage. Reference numeral 13 denotes an A / D converter that performs A / D conversion on the transmission wave, and reference numeral 14 denotes a rectifier circuit that smoothes the transmission wave received by the antenna unit 9 to generate electric power. It is a power supply control part which performs control. A memory unit 15 is mounted on the RFID tag 8 and stores tag information such as individual identification information. Reference numeral 16 denotes a demodulation unit that demodulates the transmission wave, and reference numeral 17 denotes a control unit that controls a circuit in the IC chip 5 including the memory unit 15 by the transmission wave demodulated by the demodulation unit 16. A modulation unit 18 modulates information extracted from the memory unit 15 by the control unit 17. 19 is a digital unit composed of a demodulator 15, a controller 16, and a modulator 17, and 20 is a D / A converter that D / A converts the signal transmitted from the modulator 18 and outputs it to the analog unit 12. Part. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted.

  Here, the basic operation of such an RFID system will be described. The tag information is stored in the memory unit 15 of the RFID tag 8 in accordance with the use (biological / article entry / exit management and logistics management) using the RFID system, and the RFID reader / writer 10 itself The tag information can be updated, written, or read when the RFID tag 8 is present or moved (attached to a living body / article subject to entry / exit management or physical distribution management) in the transmission / reception area it can. The RFID reader / writer 10 transmits a command signal for instructing the RFID tag 8 to update / write or read data from the antenna unit 11 of the RFID reader / writer 10 to the antenna unit 9 of the RFID tag 8 as a transmission wave. The antenna unit 9 of the RFID tag 8 receives the transmission wave, and the transmission wave is detected and stored (smoothed) by the power supply control unit 14 to generate an operation power supply for the RFID tag 8. Supply. Further, the command signal of the transmission wave is demodulated by the demodulator 16. The control unit 17 processes the data from the instruction content of the demodulated command signal, and instructs the memory unit 15 to update or write the tag information, or to read both, and the memory by the instruction of the control unit 17 A return wave obtained by modulating the read signal output from the unit 15 by the modulation unit 18 is transmitted from the antenna unit 9 to the antenna unit 11 of the RFID reader / writer 10 via the analog unit 12, and the RFID reader / writer 10 receives the read signal. Thus, desired information is obtained. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted.

  Further, the operation of the RFID system using the RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment will be described in detail. The RFID reader / writer 10 performs update / write, read, or the like on the RFID tag 8. A command signal for instructing is transmitted from the antenna unit 11 of the RFID reader / writer 10 to the antenna unit 9 of the RFID tag 8 as a transmission wave. The conductor pattern 2 which is a radio wave radiation portion of the dielectric substrate 1 constituting the RFID tag 8 receives the transmission wave, a potential difference is generated between the opposing portions of the slot 3, and the transmission wave is supplied to the IC chip 5. As described above, the transmission wave supplied to the IC chip 5 is detected and stored (smoothed) by the power supply control unit 14 to generate an operating power supply for the RFID tag 8, and each circuit (IC chip 5) of the RFID tag 8. To supply the operation power, the command signal is demodulated from the transmission wave, the tag content is updated / written and / or read from / to the memory unit 15 from the instruction content of the demodulated command signal, and the memory unit The read signal output from 15 goes back the same path as the transmission wave supplied to the IC chip 5 as a return wave, and the return wave is sent from the conductor pattern 2 which is the radiating portion to the RFID reader / writer 10. Are signals, the antenna unit 11 of the RFID reader-writer 10 receives the reply wave, it comes to obtaining the desired information. Note that the content of the wireless communication data performed by the RFID system may be conventional or new, and the ground conductor pattern 7 is formed on the back surface of the dielectric substrate 1. By directing the back side to the installation target surface, it is possible to manufacture a simple structure RFID tag that can be installed regardless of whether the installation target is a conductor or non-conductor. It can be used in a wide range of fields such as management, equipment management, and car entrance / exit management, and can be installed even if the installation target or installation target surface is a conductor such as a conductive object.

  Next, the manufacturing method of the RFID tag according to Embodiment 1 will be described with reference to FIGS. FIG. 3 is a plan view of the dielectric substrate 1 in which the hole 4 for inserting the IC chip 5 is formed on one main surface of the dielectric substrate 1 (configuration diagram of the dielectric substrate 1 in which the hole is formed). ). The hole 4 may be formed on the substrate by cutting or the like, or may be formed at the time of molding if the substrate is an injection molding method (hole forming step). That is, a projection having a shape corresponding to the IC chip 5 may be provided on the injection mold. 4A and 4B show the manufacturing method of the RFID tag according to the first embodiment (a-1) to (c-1), (a-2) to (d-2), (a-3) to (d-3). It is a manufacturing process diagram classified into three). In these three manufacturing methods, FIG. 4 (a-1), FIG. 4 (b-1), and FIG. 4 (a-3) show initial stages of the respective manufacturing methods, and the respective structures are common, and the dielectric substrate. 1 is a state in which a hole 4 is provided on one main surface (front surface) and a ground conductor pattern 7 is provided on the other main surface (back surface). As a method for forming the ground conductor pattern 7, a general substrate manufacturing method may be used (ground pattern forming step). FIG. 4 shows the completed RFID tag corresponding to a cross-sectional view taken along the line A-A ′ in FIG. 1A as in FIG. 1B. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted. Also, the RFID tag manufacturing method shown in FIG. 4 shows the process before the trimming process or before the convex pattern trimming process, and the slot 3 is formed for the first time after the trimming process. For the sake of simplicity, the slot shown in FIG. 4 is also referred to as slot 3 for convenience (actually, the slot shown in FIG. 4 is a slot 24 described later).

  The manufacturing method shown in FIGS. 4A-1 to 4C-1 will be described. The above-mentioned FIG. 4A-1, that is, the IC chip 5 is placed in the hole 4 of the dielectric substrate 1 in the initial state to obtain the state of FIG. 4B-1 (IC chip insertion process). Next, the conductor pattern 2 (including the slot 3 and the electrical connection portion 6) is formed on the surface of the dielectric substrate 1 by printing or vapor deposition. When the conductor pattern 2 is formed, two terminals (not shown) of the IC chip 5 are connected to the electrical connection portions 6 and 6 (conductor pattern forming step and IC chip connecting step). And the RFID tag shown in FIG.4 (c-1) is completed through the trimming process mentioned later. Next, the manufacturing method shown in FIGS. 4A-2 to 4D-2 will be described. In this method, after the IC chip 5 is placed in the hole 4 of the dielectric substrate 1 to obtain the state shown in FIG. 4B-2, the conductor layer 21 is formed on the surface of the dielectric substrate 1 (conductor layer formation). Step (FIG. 4C-2), the conductor pattern 21 (including the slot 3 and the electrical connection portion 6) is formed on the dielectric substrate 1 by etching or milling the conductor layer 21. Then, the RFID tag shown in FIG. 4D-2 is completed through a trimming process described later. When the conductor layer 21 is formed, the terminals (not shown) of the IC chip 5 are connected to the conductor layer 21 corresponding to the location where the electrical connection portions 6 and 6 are finally formed.

  Then, the manufacturing method shown to FIG. 4 (a-3)-FIG.4 (d-3) is demonstrated. In this method, the processes of (d-2) and (d-3) are almost the same as the methods of FIG. 4 (a-2) to FIG. (B-3) and (c-3) will be described. First, the conductor foil 22 is made to face the surface of the dielectric substrate 1 (FIG. 4B-3). At this time, the IC chip 5 is mounted on the conductor foil 22, and two terminals (not shown) of the IC chip 5 are conductors corresponding to locations where the electrical connection portions 6 and 6 are finally formed. Connected to the foil 22. Then, the conductor foil 22 is placed on the surface of the dielectric substrate 1 by aligning the hole 4 and the IC chip 5 (FIG. 4C-3). In addition, you may use for the conductor foil 22 what was printed and vapor-deposited on the film base material 22a (not shown). In that case, since the conductive foil 22 is provided on the film base material 22a, the conductive pattern 2 can be formed before mounting the IC chip 5 (conductive pattern forming step). Then, the IC chip 5 is electrically connected to the conductor pattern 2 through the slot 3 of the conductor pattern 2 (IC chip connection step). That is, two terminals (not shown) of the IC chip 5 are connected to the electrical connection portions 6 and 6 thereof. After the IC chip connecting step, the IC chip 5 is inserted into the hole 4 to fix the film base material 22a to the dielectric substrate 1 (fixing step). Then, through a trimming process described later, the RFID tag shown in FIG. 4D-3 is completed. The ground conductor pattern 7 formed on the film base 22a may be fixed to the dielectric substrate.

  The film base 22a can be made of film polyethylene terephthalate (PET), polyimide, polyethylene naphthalate, polyvinyl chloride, etc., and the conductor pattern 2 is vacuum deposition, plating, printing, or the like. It is formed with. Further, the film base material 22a may be a flexible substrate or a non-flexible substrate, and may be transparent or colored and translucent. Furthermore, since it has the effect of protecting the conductor pattern 2 and the ground conductor pattern 7, it may be stored without being removed. Further, instead of removing all the film base materials, one side (one main surface or other main surface) or a part of the RFID tag may be removed. Of course, it is also possible to mechanically turn off and remove all film base materials by a machine or manual work (film base material removal step).

  As described above, in addition to the manufacturing method described with reference to FIG. 4, the surface on which the IC chip 5 of the conductor pattern 2 is mounted and the ground conductor pattern 7 are opposed to each other by using an injection molding method or the like. A resin may be filled between the conductor pattern 2 and the ground conductor pattern 7 for manufacturing. The process in that case is as follows: a conductor pattern forming process for forming a conductor pattern 2 having an elongated slot 3 on one main surface of the dielectric substrate 1, and simultaneously with this conductor pattern forming process, the dielectric substrate 1 IC chip connection for electrically connecting the IC chip 5 to the conductor pattern 2 through the slot 3 before the ground pattern forming step for forming the ground conductor pattern 7 on the other main surface, the conductor pattern forming step, and the ground pattern forming step. It consists of steps. Since the dielectric substrate 1 is performed simultaneously with the conductor pattern formation step and the ground pattern formation step (dielectric substrate formation step), it is not necessary to provide the hole 4 separately. Furthermore, the film pattern 22a may be used for the conductor pattern 2 and the ground conductor pattern 7, and, of course, a film substrate removal step may be provided.

  FIG. 5 is an electric field diagram showing an electric field (indicated by an arrow) of the RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment. FIG. 5 also shows a partially enlarged view around the IC chip 5, and the state of the electric field is indicated by an arrow in the partially enlarged view. The arrows shown in FIG. 5 indicate the electric field between the ground conductor pattern 7 and the conductor pattern 2. Since such an electric field is formed between the conductors, the electric field runs between the opposing portions of the slot 3. A potential difference occurs. A position where the intensity of the electric field in the thickness direction of the dielectric substrate 1 is zero is used as a feeding point of the IC chip. As shown in FIG. 5, since the left and right electric fields cancel each other inside the dielectric substrate 1, the electric field strength is at a position along the longitudinal axis of the slot 3 (the depth direction in FIG. 5). Becomes zero. Therefore, if the electrical connection portion 6 of the IC chip 5 is disposed at this position, the power feeding loss can be greatly reduced. Therefore, since the electric field direction generated in the slot 3 and the electric field direction of the patch antenna coincide with each other in this configuration, the cross-polarized component can be suppressed to a very low level, and the slot 3 is connected to the patch antenna (conductor pattern). 2) Since it is basically installed in the center, the pattern of the positive polarization is also symmetrical, so that the symmetry of the radiation pattern of the antenna (RFID tag) can be improved. There is little adverse effect on the symmetry of the radiation pattern, the communicable distance can be greatly increased, and an RFID tag with greatly improved performance can be obtained even with a simple configuration. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted.

  FIG. 6 is a characteristic diagram showing a change in characteristic impedance in the RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment. As described above, it has been described that the conductor pattern 2 is formed at a predetermined distance d from the end of the dielectric substrate 2, but this means that the ground conductor pattern 7 is formed on the entire other main surface of the dielectric substrate 1. Therefore, it can be said that the predetermined distance d is a dimensional difference at the four corners of the conductor pattern 2 and the ground conductor pattern 7 as shown in FIG. In this way, the predetermined distance d is the same at the four corners of the conductor pattern 2 and the ground conductor pattern 7 even when the ground conductor pattern 7 is not formed on the entire other main surface of the dielectric substrate 1. It can be considered as a dimensional difference. Therefore, in FIG. 6, the horizontal axis represents a predetermined distance or the above-described dimensional difference d and the wavelength ratio of the used frequency of the RIFD tag, and the vertical axes R [Ω] and X [Ω] are the real parts of the characteristic impedance, respectively. And the imaginary part. Where λ on the horizontal axis is the wavelength of the operating frequency. According to the characteristic diagram of FIG. 6, when the predetermined distance d is 0.13λ or more, the characteristic impedance of the RFID tag 8 is substantially constant. Therefore, by setting the predetermined distance d to be 0.13λ or more, the characteristic impedance of the RFID tag can be obtained regardless of whether the RFID tag is installed in the air, regardless of whether it is a conductor or a non-conductor object. Therefore, the RFID performance does not deteriorate, and wireless communication with the RFID reader / writer 10 can be achieved. Since the electric field strength at the position of the hole 4 of the dielectric substrate 1 is zero, the RFID tag when there is no hole 4, that is, the IC chip 5 is inserted into the dielectric substrate 1. In the absence, it can be said that the shape of the conductor pattern that is the radiating portion of the patch antenna is almost the same as the change in characteristic impedance of the RFID tag in which the conductor pattern 2 is the same.

  FIG. 7 is a plan view showing a configuration of an RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment. FIG. 7A is a plan view of the RFID tag, and FIG. FIG. 8 is an enlarged plan view of the vicinity of a slot of the RFID tag shown in FIG. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted. So far, the case where the IC chip 5 has two terminals (not shown), that is, the case where two legs are used has been described, but when the IC chip 5 has four terminals mounted, In addition to the electrical connection portions 6 and 6 described above, two dummy pads 23 and 23 are provided inside the slot 3 and in the vicinity of the electrical connection portions 6 and 6. The dummy pads 23 and 23 are formed at the same time as the electrical connection portions 6 and 6 are formed. The dummy pads 23 and 23 are mere dummy pads that are not electrically connected to the conductor pattern 2 and the electrical connection portions 6 and 6. As described above, since it is possible to flexibly cope with a change in the specifications of the IC chip 5 mounted on the RFID, it is possible to manufacture an RFID tag having a simple structure at a low cost. Note that the number of dummy pads 23 is not limited to two. In the subsequent stage, description will be made using an RFID tag having a dummy pad 23.

  The above trimming process will be described with reference to FIGS. FIG. 8 is a trimming process diagram of the RFID tag manufacturing method according to the first embodiment (when the length direction of the slot 24 is widened), FIG. 8A is the conductor pattern 2 before trimming, and FIG. ) Is the conductor pattern 2 after trimming (the dotted line in the figure indicates the end of the conductor pattern 2 before trimming), FIG. 8C is the conductor pattern 2 after trimming, and FIG. 9 is the first embodiment. FIG. 9A is a conductor pattern 2 before trimming, and FIG. 9B is a conductor pattern 2 after trimming (when the width direction of the slot 24 is widened) of the RFID tag manufacturing method according to FIG. (The dotted line in the figure indicates the end of the conductor pattern 2 before trimming), FIG. 9C is the conductor pattern 2 after trimming, and FIG. 10 is the trimming of the RFID tag manufacturing method according to the first embodiment. Process diagram (slot FIG. 10A shows the conductor pattern 2 before trimming, and FIG. 10B shows the conductor pattern 2 after trimming (dotted lines in the figure are before trimming). FIG. 10C shows the previous conductor pattern 2 after trimming.

  8 to 10, reference numeral 24 denotes a slot before trimming, reference numeral 25 denotes a trimming portion in which the side edges of the conductor pattern 2 are removed at the end in the length direction of the slot 24, and reference numeral 3a denotes a width of the slot 24 that is widened by the trimming process. 26, a trimming portion in which the side edges of the conductor pattern 2 are removed from the end portion in the width direction of the slot 24, 3b, a slot in which the width direction of the slot 24 is widened by the trimming process, and 27, the length of the slot 24. Trimming portions 3c from which the side edges of the conductor pattern 2 are removed at the direction end portions and the width direction end portions are slots in which the length direction and the width direction of the slots 24 are widened by the trimming process. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted. 8 to 10, the IC chip 5 is not shown for the sake of simplicity in the description of the trimming process, but the IC chip 5 has the same positional relationship as the RFID tag shown in FIG. Further, the conductor pattern 2 along the edge of the slot 24 is trimmed, and either or both of the width direction and the length direction of the slot 24 are widened to finally form the slot 3 of the RFID tag. In the second embodiment, for the sake of convenience, the slots 3a, 3b, and 3c are classified and described according to the location where the slot 3 is widened.

  Next, details of the trimming process will be described. As described above, the shape and size of the slot 3 must be matched to the number of the electrical connection portions 6 of the IC chip 5 to be mounted and the characteristic impedance. The conductor pattern 2 and the slot 3 use the RFID system so as to be excited. Adjustment is made so that impedance matching between the frequency and the IC chip 5 is achieved. Since this adjustment is greatly related to the thickness and relative dielectric constant of the dielectric substrate 1, a desired radiation pattern and gain can be obtained by adjusting and designing these conditions together. Depending on the material constant (dielectric constant, dielectric loss tangent, substrate thickness) variation and processing accuracy of the substrate 1, the presence or absence of a metal object on the back, the size of the metal object, adjustment by simulation or theoretical calculation, In some cases, an RFID tag having ideal performance (a desired radiation pattern, gain, etc.) as shown in FIGS. 5 and 6 cannot be obtained. Therefore, even if an attempt is made to design the slot 3 that can obtain ideal performance, an RFID tag having the slot 24 that is actually slightly inferior in performance is designed for this reason.

  Thus, since the desired performance cannot be obtained in the slot 24, it is necessary to trim and tune the slot 24 in the trimming process. By trimming the length direction and the width direction of the slot 24, the reactance value can be adjusted to the capacitance (C property) side. Of course, depending on the size of the slot 24, it may be necessary to narrow the slot 24 instead of widening it. However, in consideration of the variation of the material constant of the dielectric substrate 1 and the variation width of the processing accuracy, If the reactance value is designed to be on the inductance side (L property) so that the slot 24 does not need to be narrowed, there is no need to narrow the slot 24. In the trimming process described in the first embodiment, it is needless to say that the slot of the RFID tag may be tuned by trimming by an inaccurate simulation or adjustment or design by theoretical value calculation.

  As described above, in the RFID tag manufactured by the RFID tag manufacturing method according to the first embodiment, the IC chip 5 is inserted into the hole 4 formed in one main surface of the dielectric substrate 1, and the conductor is formed by chip bonding. Since the IC chip 5 is electrically connected to the pattern 2, even when an impact is applied to the RFID tag, the IC chip 5 is damaged or the electrical contact between the IC chip 5 and the electrical connection portion 6 is poor. And the occurrence rate of breakage of connection can be greatly reduced, and further, the performance of the RFID tag deteriorates due to variations in the material constants (dielectric constant, dielectric loss tangent, substrate thickness) of the dielectric substrate 1 and processing accuracy, or Variations can be improved.

Embodiment 2. FIG.
A second embodiment of the present invention will be described below. FIG. 11 is a configuration diagram of an RFID tag manufactured by the RFID tag manufacturing method according to the second embodiment. 11A is a plan view of the RFID tag, FIG. 11B is a cross-sectional view taken along line AA ′ in FIG. 11A, and FIG. 11C is FIG. 3 is an enlarged plan view of the vicinity of the slot of the RFID tag shown in FIG. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted. In the first embodiment, the IC chip 5 is placed in the hole 4 formed on one main surface of the dielectric substrate 1. However, when the swelling by the IC chip 5 does not become a problem, the second embodiment is used. As described above, the IC chip 5 may be provided outside the dielectric substrate 1. The RFID tag manufactured by the RFID tag manufacturing method according to Embodiments 1 and 2 is not significantly different from the position of the IC chip 5 and the presence or absence of the hole 4.

  Next, a method for manufacturing the RFID tag according to the second embodiment will be described. Actually, the slot finally formed is slot 3, and the slot before the trimming process is not slot 3. However, for simplicity of explanation, both the slot before the trimming process and the slot after the trimming process are all slots. This will be described as 3. First, the conductor pattern 2 having the elongated slot 3 (electrical connection portion 6) is formed on one main surface of the dielectric substrate 1 (conductor pattern forming step). Similarly, the ground conductor pattern 7 is formed on the other main surface of the dielectric substrate 1 (ground pattern forming step). For the conductor pattern forming step and the ground pattern forming step, a general substrate molding method (including an injection molding method) may be used. Subsequently, the IC chip 5 is electrically connected to the conductor pattern 2 through the slot 3 (electrical connection portion 6) (IC chip connection step). Since the trimming process (convex pattern trimming process) is the same as that of the first embodiment, the description thereof is omitted. The order of the IC chip connection process may be before or after the trimming process (convex pattern trimming process).

Embodiment 3 FIG.
Embodiment 3 of the present invention will be described below. The RFID tag manufacturing method according to the third embodiment is the same as the RFID tag manufacturing method according to the first and second embodiments except for the shape of the conductor pattern 2 removed by the trimming process, and only the difference will be described. . The trimming process of the third embodiment will be described with reference to FIG. FIG. 12 is a trimming process diagram of the RFID tag manufacturing method according to the third embodiment (when the width direction is widened in a tapered shape of the slot 24), and FIG. 12A is the conductor pattern 2 before trimming, FIG. (B) is the conductor pattern 2 after trimming (the dotted line in the figure indicates the end of the conductor pattern 2 before trimming), FIG. 12 (c) is the conductor pattern 2 after trimming, Reference numeral 28 denotes a trimming portion in which the end of the conductor pattern 2 at the end in the width direction of the slot 24 is removed in a taper shape with the IC chip 5 as the center. Slot. In the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted.

  Similarly to the first embodiment, in FIG. 12 of the third embodiment, the IC chip 5 is not shown for the sake of simplicity in the description of the trimming process, but the IC chip 5 is the same as the RFID tag shown in FIG. It is in a positional relationship. In FIG. 12, trimming is performed in a taper shape centering on the IC chip 5 along the end of the conductor pattern 2 at the end portion in the width direction of the slot 24, and the width direction of the slot 24 is widened, and finally the above-described RFID tag Although the slot 3d is formed, the slot 24 is formed only by the trimming portion 28 in the width direction in the third embodiment as in FIGS. 8 and 10 of the first and second embodiments. Alternatively, the trimming portions 25 and 27 in the length direction may be provided. The trimming process is the same as in the first and second embodiments except that the shape of the conductor pattern 2 removed by trimming is different.

  The third embodiment relates to the widening of the RFID tag in addition to the operations and effects of the first and second embodiments. The slot 3d is a taper whose width increases in the opposite direction from the position where the IC chip 5 is disposed. It is in the shape. Comparing the slot 3 (3a, 3b, 3c) with the slot 3d, the opposite portion of the slot 3 is formed with a constant width in the opposite direction except for the electrical connection portion 6. Since the slot 3d has a tapered shape as described above, it is possible to widen the use frequency of the RFID tag, and the band can be selected by adjusting the dimension in which the taper expands. Therefore, the communicable band of the RFID system can be widened, so that impedance matching is easy and not only the yield deterioration due to manufacturing errors can be reduced, but also the impedance change due to water droplets and dirt adhering to the surrounding environment where the RFID tag is installed RFID tags having strong environmental resistance can be obtained. Note that the dummy pad 23 may not be necessary depending on the number of terminals provided on the IC chip 5.

Embodiment 4 FIG.
Embodiment 4 of the present invention will be described below. The RFID tag manufacturing method according to the fourth embodiment is the same as the RFID tag manufacturing method according to the first to third embodiments except for the shape of the conductor pattern 2 before and after the trimming process (convex pattern trimming process). Only the differences are explained. However, the RFID tag according to the fourth embodiment is different in that the slot 24 (conductor pattern 2) has a convex pattern and a convex pattern trimming process for trimming the convex pattern. The trimming process according to the fourth embodiment will be described with reference to FIG. 13 is a convex pattern trimming process diagram of the RFID tag manufacturing method according to the fourth embodiment, FIG. 13A is a conductor pattern 2 before the convex pattern trimming, and FIG. 13B is a convex pattern. Conductor pattern 2 after trimming (dotted line in the figure indicates the end of conductor pattern 2 before trimming), FIG. 13C shows conductor pattern 2 after convex pattern trimming.

  In FIG. 13, 29 is a convex pattern extending inward of the slot 24 from both sides of the opposing conductor pattern 2 in the length direction constituting the slot 24, and 30 is the conductor pattern 2 at both ends in the length direction of the slot 24. The convex pattern trimming portion 3e from which a part of the convex pattern 29 is removed, 3e is a slot in which the length direction of the slot 24 is widened by the convex pattern trimming process, and 24e constitutes the convex pattern 29 and the slot 24. Slot extensions sandwiched between opposing conductor patterns 2 in the width direction, in the drawings, the same reference numerals denote the same or corresponding parts, and detailed descriptions thereof are omitted. In other words, the convex pattern 29 is naturally formed when the slot extension portions 24e and 24e which are notches of the rod-like (rectangular) conductor patterns 2 formed at the four corners of the slot 24 are formed. It can be said that it is formed between.

As in the first to third embodiments, in FIG. 13 of the fourth embodiment, the IC chip 5 is not shown in the description of the trimming process (convex pattern trimming process) for the sake of simplicity. Is in the same positional relationship as the RFID tag shown in FIG. Further, the conductor pattern 2 along the edge of the slot 24 is trimmed and the length direction of the slot 24 is widened to finally form the slot 3 of the above-described RFID tag. The slot 3e will be described in accordance with the location where the slot 3 is widened.

  In the fourth embodiment, the impedance can be adjusted by the convex pattern trimming step. The conductor pattern 2 along the edge of the slot 24 described in the first to third embodiments is trimmed, and the width direction and length of the slot 24 are trimmed. The slot in which the convex pattern 30 is farther from the IC chip 5 and the electrical connection parts 6 and 6 (dummy pads 23 and 23) than the impedance adjustment method (trimming process) in which either or both directions are widened. Since it has a convex shape that extends inward from both opposing sides in the length direction of 24, it can be easily removed with a cutter or the like. Although not shown, both the trimming process (including the taper shape) and the convex pattern trimming process may be performed. In that case, there is an effect that the impedance can be adjusted more finely. The slot 3e may be a slot in which the slot extension 24e is eliminated depending on the amount of the conductor pattern to be removed by the convex pattern 29. That is, it may be a rectangular or tapered slot similar to the slot 3 (3a to 3d) shown in the first to third embodiments.

It is a block diagram of the RFID tag manufactured by the manufacturing method of the RFID tag which concerns on Embodiment 1 of this invention. 1 is a basic configuration diagram of an RFID system according to the present invention. It is a dielectric substrate block diagram in which the hole which concerns on this invention was formed. It is a manufacturing process figure of the RFID tag which concerns on this invention. It is an electric field diagram showing an electric field of the RFID tag according to the present invention. It is the characteristic view which showed the mode of the characteristic impedance change in the RFID tag which concerns on this invention. It is the top view which showed the structure of the RFID tag manufactured by the manufacturing method of the RFID tag which concerns on Embodiment 1 of this invention. It is a trimming process figure of the manufacturing method of the RFID tag which concerns on Embodiment 1 of this invention. It is a trimming process figure of the manufacturing method of the RFID tag which concerns on Embodiment 1 of this invention. It is a trimming process figure of the manufacturing method of the RFID tag which concerns on Embodiment 1 of this invention. It is a block diagram of the RFID tag manufactured by the manufacturing method of the RFID tag which concerns on Embodiment 2 of this invention. It is a trimming process figure of the manufacturing method of the RFID tag which concerns on Embodiment 3 of this invention. It is a convex pattern trimming process figure of the manufacturing method of the RFID tag which concerns on Embodiment 4 of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Dielectric substrate, 2 ... Conductor pattern, 3 ... Slot, 3a-3e ... Slot, 4 ... Hole part,
5 ... IC chip, 6 ... Electrical connection part, 7 ... Grounding conductor pattern 7 ... RFID tag,
9 ... antenna part, 10 ... RFID reader / writer, 11 ... antenna part, 12 ... analog part,
13 ... A / D conversion unit, 14 ... power supply control unit, 15 ... memory unit, 16 ... demodulation unit,
17 ... Control unit, 18 ... Modulation unit, 19 ... Digital unit, 20 ... D / A conversion unit,
21 ... conductor layer, 22 ... conductor foil, 22a ... film substrate, 23 ... dummy pad,
24 ... slot, 24e ... slot extension, 25-27 ... trimming,
28 ... Trimming part (tapered shape), 29 ... Convex pattern,
30: convex pattern trimming section.

Claims (12)

A hole forming step for forming a hole in one main surface of the dielectric substrate, an IC chip inserting step for inserting an IC chip into the hole, and a ground for forming a ground conductor pattern on the other main surface of the dielectric substrate A pattern forming step, a conductor pattern forming step of forming a conductor pattern having an elongated slot on one main surface of the dielectric substrate, and the IC chip through the slot during the conductor pattern forming step. An RFID tag comprising: an IC chip connecting step for electrically connecting to a slot; and a trimming step for trimming the conductor pattern at the end of the slot and widening one or both of the width direction and the length direction of the slot Manufacturing method. A hole forming step for forming a hole in one main surface of the dielectric substrate; a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate; and an elongated slot on the film substrate. A conductor pattern forming step for forming a conductor pattern having an IC chip connecting step for electrically connecting an IC chip to the conductor pattern through the slot, and after the IC chip connecting step, the IC chip is inserted into the hole portion. And fixing the film base material to the dielectric substrate, trimming the conductor pattern along the end of the slot, and widening one or both of the width direction and the length direction of the slot A method for manufacturing an RFID tag comprising a trimming step. A hole forming step for forming a hole in one main surface of the dielectric substrate; a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate; and an elongated slot on the film substrate. A conductor pattern forming step for forming a conductor pattern having an IC chip connecting step for electrically connecting an IC chip to the conductor pattern through the slot, and after the IC chip connecting step, the IC chip is inserted into the hole portion. And fixing the film base material to the dielectric substrate, trimming the conductor pattern along the end of the slot, and widening one or both of the width direction and the length direction of the slot A method for manufacturing an RFID tag, comprising: a trimming step for removing the film base material; and a film base material removing step for removing the film base material from the dielectric substrate. A conductor pattern forming step for forming a conductor pattern having an elongated slot on one main surface of the dielectric substrate, and a ground pattern for forming a ground conductor pattern on the other main surface of the dielectric substrate simultaneously with the conductor pattern forming step Forming step, IC chip connecting step for electrically connecting an IC chip to the conductor pattern through the slot before the conductor pattern forming step and the ground pattern forming step, and the conductor pattern at the end of the slot And a trimming step of widening one or both of the width direction and the length direction of the slot. A conductor pattern forming step of forming a conductor pattern having an elongated slot on one main surface of the dielectric substrate; a ground pattern forming step of forming a ground conductor pattern on the other main surface of the dielectric substrate; and An IC chip connecting step for electrically connecting the IC chip to the conductor pattern, and trimming the conductor pattern at the end of the slot to widen one or both of the width direction and the length direction of the slot. An RFID tag manufacturing method including a trimming step. A hole forming step for forming a hole in one main surface of the dielectric substrate, an IC chip inserting step for inserting an IC chip into the hole, and a ground for forming a ground conductor pattern on the other main surface of the dielectric substrate A pattern forming step and a conductor pattern forming step for forming a conductor pattern having a slot provided with a convex pattern extending inwardly from both opposing sides in the length direction on one main surface of the dielectric substrate An IC chip connecting step for electrically connecting the IC chip to the conductor pattern through the slot during a conductor pattern forming step, and a convex for trimming the convex pattern and widening the length direction of the slot. RFID tag manufacturing method comprising a pattern pattern trimming step. A hole forming step for forming a hole on one main surface of the dielectric substrate, a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate, and an elongated shape on the film substrate. A conductor pattern forming step of forming a conductor pattern having a slot provided with a convex pattern extending inward from opposite sides in the vertical direction, and electrically connecting the IC chip to the conductor pattern via the slot IC chip connecting step, after the IC chip connecting step, inserting the IC chip into the hole, fixing the film base to the dielectric substrate, trimming the convex pattern, A method of manufacturing an RFID tag, comprising: a convex pattern trimming step for widening a length direction of a slot. A hole forming step for forming a hole on one main surface of the dielectric substrate, a ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate, and an elongated shape on the film substrate. A conductor pattern forming step of forming a conductor pattern having a slot provided with a convex pattern extending inward from opposite sides in the vertical direction, and electrically connecting the IC chip to the conductor pattern via the slot IC chip connecting step, after the IC chip connecting step, inserting the IC chip into the hole, fixing the film base to the dielectric substrate, trimming the convex pattern, RF comprising: a convex pattern trimming step for widening the length direction of the slot; and a film base material removing step for removing the film base material from the dielectric substrate D method of manufacturing a tag. A conductor pattern forming step for forming a conductor pattern having a slot provided with a convex pattern extending inwardly from both opposing sides in the length direction on one principal surface of the dielectric substrate, and forming the conductor pattern A ground pattern forming step for forming a ground conductor pattern on the other main surface of the dielectric substrate simultaneously with the step, and an IC chip through the slot before the conductor pattern forming step and the ground pattern forming step. An RFID tag manufacturing method comprising: an IC chip connecting step for electrical connection; and a convex pattern trimming step for trimming the convex pattern and widening the length direction of the slot. The RFID tag manufacturing method according to claim 6, further comprising a trimming step of widening one or both of the width direction and the length direction of the slot. The RFID tag manufacturing method according to any one of claims 1 to 5 and 10, wherein, in the trimming step, the slot is widened in a tapered shape as it is separated from the IC chip. When the conductor pattern is formed, electrical connection portions extending from both sides of the opposing conductor pattern in the width direction constituting the slot to the inside of the slot are formed, and the electrical connection portion and the IC chip are connected to each other. The RFID tag manufacturing method according to claim 1, wherein the RFID tag is electrically connected.

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