JP2009064036A - Plasma display apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display apparatus in which influence of a fast and large current flowing in an output circuit are decreased. <P>SOLUTION: The display device includes a plasma display panel, a substrate having an insulating film and a wiring pattern provided on the insulating film, and a drive circuit mounted on the wiring pattern and outputting a driving pulse of the plasma display panel, wherein the drive circuit includes an IGBT (insulated gate bipolar transistor). <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a plasma display device.

  A display element such as a plasma display panel (hereinafter abbreviated as PDP) or electroluminescence (EL) requires a driving circuit capable of supplying a high voltage and a large current. An example of a driving circuit that can supply such a high voltage and a large current is an example of a driving device that drives a motor or the like. A reference that seems to be closest to the present invention is described in Japanese Patent Laid-Open No. 5-175384 (Patent Document 1).

  This publication shows a power semiconductor device having a two-stage structure in which a three-dimensional wiring pattern is a basic concept and a control circuit and a power circuit are separated as an application example. In other words, connection wiring between power chips is shown here. Insulating metal is formed by floating a wiring that handles a large current having a large area on the insulating metal substrate on which the power chip is mounted to form a three-dimensional wiring. The substrate area of the substrate is reduced, and the substrate cost is reduced. Since the pattern through which a large current flows must be wide, the area occupied by the pattern becomes large. That is, the area of the insulating metal substrate itself is increased. In order to solve this drawback, wiring for handling high power is made of a metal plate such as copper which can take a large current capacity to form a three-dimensional wiring. Thereby, in this apparatus, only fine patterns and elements remain on the substrate, the substrate area is reduced, and the substrate cost can be reduced. In this conventional example, a substrate on which a control circuit or the like is mounted is held by the above-described three-dimensional wiring, and signal transfer is also performed by this three-dimensional wiring.

JP-A-5-175384

  In the structure in the above conventional example, the three-dimensional wiring for flowing a large current is used as described above, and therefore the degree of freedom of wiring is significantly smaller than the pattern wiring on the substrate.

  In addition, a board mounted with a control circuit or the like and supported by a three-dimensional wiring uses the three-dimensional wiring to exchange signals with the board or the like on which an output element is mounted, so that the degree of freedom of wiring is similarly small. Is receiving. In addition, since the three-dimensional wiring material is used for supporting the control board and for passing control signals, the area of the joint portion between the three-dimensional wiring part and the board is increased, and the board area is not necessarily reduced. .

  Even if the resistance is small compared to direct current or low-frequency current, currents in the form generally called high-speed pulses, such as narrow pulses, steep pulses such as rise and fall, and pulses with many repetitions Since the inductance component becomes a large resistance component with respect to the pulse, the voltage drop increases, and even if the direct current resistance component is reduced using a copper plate or the like, the effect of “reducing the resistance component of the wiring pattern” is reduced.

  In the case of modules that handle high-speed, high-current pulse currents, noise is generated due to induction caused by the pulse current in wiring configurations that make wiring routing complicated, or are electrically floating in the air and separated from the ground (GND) In addition to radiating out of the module, it may cause malfunctions and the like inside the module. In the above conventional example, since the three-dimensional structure is used for the wiring, it is possible that the equivalent inductance looks large or the possibility of drawing a loop increases. Is disadvantageous.

  In order to deal with such problems, the above-mentioned conventional example does not refer to a means for reducing a failure such as a shield or wiring inductance reducing means. Such a problem may occur. Further, the above conventional example only refers to the wiring form inside the module, and there is no description about the main board on which the module is mounted. For this reason, the problem about the interference between the main board and the module is not considered. Further, the conventional example does not mention the relationship between the output element used in the module and its load.

  An object of the present invention is to provide a plasma display device that solves the above-described drawbacks and reduces the influence of high speed and large current flowing in an output circuit.

  In order to achieve the object of the present invention, a plasma display device of the present invention is mounted on a wiring pattern, a substrate including a plasma display panel, an insulating film, a wiring pattern provided on the insulating film, A driving circuit for outputting a driving pulse of the plasma display panel, and the driving circuit includes an IGBT (insulated gate bipolar transistor).

  In the plasma display device, two output terminals of totem pole connection for applying a high voltage and a low voltage for display discharge to the plasma display device in the drive circuit are connected to the IGBT (insulated gate bipolar transistor). And

  In addition, of the two output terminals, the output terminal to which the high voltage is applied is controlled to be turned off after the light emission discharge current is stopped.

  In the present invention, by reducing the influence of the electromagnetic field due to the high speed and large current flowing through the driving device, noise can be reduced, and voltage drop in each part of the circuit due to current pulses can be reduced.

  Embodiments of the present invention will be described below with reference to the drawings using examples.

  FIG. 1 is a sectional view showing an embodiment of a driving apparatus according to the present invention. FIG. 1 shows a state where one power module is mounted on the main board. In FIG. 1, reference numeral 11 denotes a thin insulating film 23 coated on an aluminum (AL: hereinafter abbreviated as aluminum) or copper (Cu) base metal 22, and a wiring pattern 24 is disposed on the insulating film 23. 1 shows an output board on which an output element 12 for generating heat is mounted. Reference numeral 12 denotes an output element mounted on the output board. The output element 12 may be packaged or may be in a bare chip state. Reference numeral 13 denotes a main board in which a wiring pattern 32 is arranged on an insulating plate 31, and a main circuit component 33 of the system and a module are mounted on the wiring pattern 32 of the main board 13. For the main board 13, the module is just one component. Reference numeral 14 denotes a heat radiating plate that efficiently releases heat generated in the output element 12.

  The drive substrate 21 is configured by arranging a wiring pattern 29 on one surface of the insulating plate 28, and the shield layer 16 is provided on the other surface of the insulating plate 28. The wiring pattern 29 is mounted with a drive element 17 that controls the output element 12 and has a protection function and the like. 15 is filled between the output board 11 and the drive board 21 and between the drive board 21 and the main board 13, and is filled with a filler such as gel or resin for sealing so that moisture, dust or the like does not enter the module. Show. Reference numeral 34 denotes a shield layer provided on the insulating plate 31 and made of metal. Reference numeral 18 denotes an input pin for connecting a control signal, a power source and the like to the boards 11 and 21 in the module. Reference numeral 19 denotes an output pin that handles a large current. In FIG. 1, the input pins and the output pins are divided on both sides, but they can be arranged on only one side. Reference numeral 20 denotes a case that protects the elements inside the module from dust, moisture, etc., maintains the mechanical strength of the module, and has a shielding effect for preventing leakage of an electromagnetic field to the outside. In FIG. 1, the drive substrate 21 handles signals with small voltage and current, such as the control element and the drive element 12, which generate relatively little heat. The drive substrate 21 is not necessarily an insulating metal substrate, and can be realized by a general substrate such as epoxy or phenol. In FIG. 1, the power module includes a heat dissipation plate 14, an output board 11, an output element 12, a drive board 21, a drive element 17, a case 20, and the like.

  FIG. 2 is a plan view showing an embodiment of a drive substrate used in the drive device according to the present invention. In the figure, the drive substrate 21 is covered with a shield layer 16 on the surface opposite to the surface on which components such as the drive element 17 are mounted, and the influence of the electromagnetic field from the output substrate 11 is applied to the drive element 17 and the control component side. Prevents leaks. As shown in FIG. 1, the shield layer 16 is arranged between the output circuit composed of the output elements 12 on the output substrate 11 and the drive / control circuit composed of the drive elements 17 on the drive substrate 12. Is effective. Needless to say, the shield layer 34 provided on the main board 13 is effective to cover the module.

  FIG. 3 is a cross-sectional view showing an embodiment of the output substrate and the heat radiating plate shown in FIG. The same thing as FIG. 1 was shown with the same number. In FIG. 3, reference numeral 22 denotes a base metal of the output substrate 11. Generally, aluminum, copper, or the like is used as the material, but it is sufficient that the thermal conductivity is high. However, although specifically described later, in order to reduce the inductance of the wiring, it is necessary that a sufficient eddy current flows through the base metal 22 to generate a canceling magnetic field, and the material needs to have high electrical conductivity. There is. Aluminum and copper are satisfactory in terms of cost. Needless to say, in an application example in which only the thermal conductivity needs to be taken into consideration, it can be realized with ceramics which is easy to pass heat though it is an insulator. In order to reduce the inductance of the wiring using ceramic, it is necessary to attach a metal plate to one surface of the ceramic. Since the inductance of the wiring changes depending on the thickness of the film, the insulating film 23 needs to be thin as long as electrical insulation is maintained. Reference numeral 25 denotes a connection line for connecting the output element 12 and the wiring pattern 24 formed of copper foil or the like, that is, a bonding wire. If problems such as heat dissipation of the element chip can be solved, the chip and the substrate can be connected by bumps or the like. When a material having high electrical conductivity is used for the base metal 22, an eddy current is generated in the base metal 22 due to an electromagnetic field generated when a high-frequency high current flows in a circuit including the output element 12, and the eddy current is generated. Since the electromagnetic field cancels the electromagnetic field generated by the circuit including the output element, the inductance of the wiring pattern 24 and the connection line 25 can be reduced.

  FIG. 4 is a characteristic diagram showing the change in inductance of the insulating film and the wiring pattern in the output substrate shown in FIG. In the figure, the horizontal axis indicates the thickness d of the insulating film 23, and the vertical axis indicates the wiring inductance L. Both are shown on an arbitrary scale. A basic description of the relationship between the insulation between the insulating film and the wiring is described in detail in Japanese Patent Laid-Open No. 10-74886, and is omitted here. However, the present invention is based on the technique described in Japanese Patent Laid-Open No. 10-74886. It is applied. As shown in FIG. 4, the wiring inductance L increases as the thickness d of the insulating film 23 increases.

  FIG. 5 is a circuit diagram showing an embodiment of the output circuit inside the module. Reference numerals 12a to 12d denote output elements. Power MOS FETs are generally used for these elements, but IGBTs (Insulated Gate Bipolar Transistors), electrostatic induction transistors (SIT), etc. are also used. Is called. Reference numeral 26 denotes one discharge cell of a PDP (plasma display panel). Reference numeral 27 denotes a PDP drive circuit, which shows one circuit example of the output unit.

  In general, an IGBT performs a bipolar operation, and therefore has a conductivity modulation effect compared to a power MOS FET, SIT, or the like. That is, since this IGBT carries charges by electrons and holes, the resistance of the element when conducting is small, but since carriers are accumulated, current continues to flow even when an off voltage is applied to the control terminal. For this reason, the switching characteristics are inferior. That is, when the output elements 12c and 12d are connected to the totem pole as shown in FIG. 5, if the switching characteristics are poor and it takes time to turn off more than the performance required for on and off (in the case of IGBT, Since there is carrier accumulation, a phenomenon in which current continues to flow for a while even when the element is turned off is observed), and there is a possibility that the elements 12c and 12d are simultaneously turned on. In such a case, the power supply is short-circuited and the elements 12c and 12d are instantaneously destroyed. For this reason, at present, power MOS FETs that have no carrier accumulation in principle and have a high switching speed have been used for output elements of drive circuits such as PDPs (plasma display panels). However, recently, it has become clear that the IGBT can be used as an output element because the speed of the IGBT has been improved and the phenomenon described below is found in the present invention. In FIG. 5, reference numeral 26 denotes a PDP discharge cell connected to the output terminal of the drive circuit 27.

  FIG. 6 is a waveform diagram showing the output voltage and output current of the drive circuit shown in FIG. FIG. 6A is a voltage waveform diagram applied to the discharge cell 26, where the horizontal axis indicates time t and the vertical axis indicates the voltage V applied to the discharge cell 26. FIG. 6B is a current waveform diagram in which the horizontal axis indicates time t and the vertical axis indicates current I, where Ica is the inter-electrode capacity charging current of the discharge cell 26, and Id is the light emitting discharge current of the discharge cell 26. , Icb represents a capacitance discharge current between the electrodes of the discharge cell 26. A PDP is an assembly of many plasma discharge cells. When viewed from an output circuit, the PDP is a capacitor having a large interelectrode capacitance, and appears as a discharge tube that generates a discharge when a certain voltage is applied. 6 is applied to the panel (specifically, between the electrodes of the discharge cell 26), the output current of FIG. 6 flows from the output circuit to the PDP. That is, in the region where the voltage waveform V of FIG. 6A rises, a charging current Ica flows to the interelectrode capacitance of the cell 26, and when a constant voltage is applied to the cell 26, ionization occurs in the cell and light emission occurs. The accompanying discharge occurs and current Id flows. When a certain amount of charge flows in the light emission discharge current Id, the discharge stops even when a voltage is applied between the electrodes of the cell, and no current flows. Finally, when the voltage waveform V falls, contrary to the rise, a current Icb (discharge current) in the reverse direction flows through the interelectrode capacitance of the cell 26, and the series of operations ends. By repeating this, the light emission of the PDP is maintained.

  As is apparent from FIG. 6, the difference between a general power switching circuit and a PDP drive circuit is in how the current is cut off. That is, in the general power switching circuit, the switching element cuts off a large current according to the control signal, but in the case of PDP, since the cell 26 itself cuts off the current, when the output elements 12c and 12d are cut off according to the control signal. Basically, no current flows through the output elements 12c and 12d. This phenomenon is peculiar to the drive circuit of the PDP, and is fundamentally different from general power circuits such as a power supply and a motor drive circuit, although it is a power circuit.

  Considering the current flow of the PDP, the above-mentioned defects of the IGBT can be covered. In other words, the IGBT, which has been a drawback in charge accumulation, is in a state in which no load current flows through the output elements 12c and 12d when the output elements 12c and 12d are turned off. Operate. The present invention focuses on the characteristics of the discharge current of the PDP, and can be replaced with a conventional power MOS FET.

  The electrostatic induction transistor (SIT) basically has the same operation principle as that of the power MOS FET, and there is no problem in switching performance, and replacement from the power MOS FET is possible. However, the voltage drop of the element when a current flows is not much different from that of a power MOS FET. In principle, the IGBT is more advantageous.

  As described above, in the present invention, the shield structure of the driving device is configured as shown in FIG. 1, so that induction of power circuit and unnecessary radiation can be suppressed, so that noise can be reduced. In addition, a wiring pattern is drawn between a base metal (metal plate) and a thin insulating film, and eddy currents are generated in the base metal to reduce the inductance of the wiring, and impedance to high-speed, high-current pulses with sharp changes. Therefore, the voltage drop in the wiring portion can be reduced. In particular, it is possible to reduce the voltage drop between the output elements 12c and 12d that occurs when the light emission discharge current Id of FIG. 6B flows.

  The voltage drop of the output elements 12c and 12d can be further improved by using an IGBT (compared to a power MOS FET of the same chip size) whose output voltage drop is small when a current flows as the output element.

  Since the discharge cell has the property of operating stably when the voltage applied to it is within a predetermined range, if the voltage drop is reduced, the cell voltage margin will be expanded and will contribute greatly to stable discharge. it is obvious. This is particularly effective for a high-definition PDP that has a large number of cells, a small cell size, and a small cell discharge margin. Needless to say, a small voltage drop not only improves performance but also effectively improves circuit loss.

It is sectional drawing which shows one Example of the drive device by this invention. It is a top view which shows one Example of the drive board | substrate used for the drive device by this invention. It is sectional drawing which shows one Example of the output board and heat sink shown in FIG. It is a characteristic view which shows the inductance change of the thickness of the insulating film in the output board shown in FIG. 3, and a wiring pattern. It is a circuit diagram which shows one Example of the output part circuit inside a module. FIG. 6 is a waveform diagram showing an output voltage and an output current of the drive circuit shown in FIG. 5.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 11 ... Output board, 12, 12a, 12b ... Output element, 13 ... Main board, 14 ... Heat sink, 16, 34 ... Shield layer, 17 ... Drive element, 20 ... Case, 21 ... Drive board, 22 ... Base metal, 23 ... Insulating film, 24, 29, 32 ... Wiring pattern, 26 ... PDP discharge cell, 27 ... Drive circuit.

Claims (3)

A plasma display panel;
An insulating film, a substrate provided with a wiring pattern provided on the insulating film, and
A driving circuit mounted on the wiring pattern and outputting a driving pulse of the plasma display panel;
The plasma display apparatus, wherein the drive circuit includes an IGBT (insulated gate bipolar transistor).   2. The display device according to claim 1, wherein two output terminals of totem pole connection for applying a high voltage and a low voltage for display discharge to the plasma display device in the drive circuit are connected to the IGBT (insulated gate bipolar). A plasma display device.   3. The plasma display according to claim 2, wherein, of the two output terminals, the output terminal to which the high voltage is applied is controlled to be turned off after the light emission discharge current is stopped. apparatus.

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