JP2009060557A - Power amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem that, in a conventional PWM power amplifier, resonance characteristics of an LC are varied due to impedance characteristics of a speaker or the like connected to a load and a peak may occur occasionally in frequency characteristics near a cutoff frequency of a low-pass filter. <P>SOLUTION: In a power amplifier in which a load is driven by connecting outputs of a plurality of amplifiers each including an LC low-pass filter to its output, a time difference is given to signals to be applied to the amplifiers connected, and the time difference is set in correlation with a cutoff frequency of the LC low-pass filter. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a power amplifier using switching using pulse width modulation (hereinafter abbreviated as PWM) or the like.

  In recent years, DVD and other devices that play multi-channel audio have increased, and a power amplifier with low power consumption has been demanded to drive a large number of speakers. Switching amplifiers have been put into practical use. A power amplifier using such switching is generically called a digital power amplifier.

  A block diagram of an example of a digital power amplifier is shown in FIG. In FIG. 6, 100 is a signal processing unit that generates a PWM signal from an input signal, 101 is a power switch capable of controlling a large current, 102 is a coil (L), 103 is a capacitor (C), and 104 is a load (for example, a speaker). .

  As can be seen from FIG. 6, the output unit 105 includes a power switch 101 and a low-pass filter (hereinafter abbreviated as an LC low-pass filter) including a coil 102 and a capacitor 103 in order to attenuate an extra high frequency generated by switching by the power switch. It consists of As the cut-off frequency, a frequency ranging from about 20 kHz of the audible signal band to about 100 kHz of a wider band is selected, and an out-of-band signal of several hundred kHz that is a frequency used for switching is attenuated. .

As for the connection of the output unit 105 of such a digital power amplifier, in addition to this example, for example, a half-bridge connection or a full-bridge connection as described in Patent Document 1 is known.
JP 2005-167470 A

  However, in a digital power amplifier using such an LC low-pass filter, the resonance characteristic of the LC low-pass filter changes due to the impedance characteristic of a speaker or the like connected to the load, and the frequency characteristic is near the cutoff frequency of the LC low-pass filter. There is a problem that a peak may occur.

  FIG. 7 is a characteristic diagram showing the frequency characteristics of such an LC low-pass filter. For example, when L = 15 uH (assuming that the coil loss is 100 mΩ), C = 0.47 uF, and a load of 8Ω is connected to the load, it is cut. The characteristic has a peak of about 3 dB near the off frequency of 60 kHz. When the resistance value of the load is 16Ω, this peak increases to about 10 dB, and an output with a larger amplitude than necessary may occur.

  An object of the present invention is to solve this problem and provide a digital power amplifier that does not generate a peak outside the band and that can reduce the output impedance.

  A power amplifier according to the present invention is a power amplifier that drives a load using a plurality of LC low-pass filters, a signal processing unit that generates a pulse width modulation signal from an input signal, and a signal from the signal processing unit And a power switch that controls a large current and outputs the signal to the LC low-pass filter, and the signal processing unit has a time difference in a signal applied to each connected LC low-pass filter. The time difference is set in correlation with the cut-off frequency of the LC low-pass filter.

  A power amplifier according to the present invention is a power amplifier that drives a load using a plurality of LC low-pass filters, a signal processing unit that generates a pulse width modulation signal from an input signal, and a signal from the signal processing unit And a power switch that controls a large current and outputs the signal to the LC low-pass filter, and the signal processing unit has a time difference in a signal applied to each connected LC low-pass filter. The time difference is set according to the input signal band.

  A power amplifier according to the present invention is a power amplifier that drives a load using a plurality of LC low-pass filters, a signal processing unit that generates a pulse width modulation signal from an input signal, and a signal from the signal processing unit A delay processing unit that delays the output, a power switch that controls a large current and outputs the signal to the LC low-pass filter, and a load determination unit that measures a load impedance in the load, and the signal processing unit is connected The signals given to the respective LC low-pass filters have a time difference, and the time difference is set in correlation with the load impedance measured by the load determination unit.

  The power amplifier of the present invention can reduce the output impedance by connecting a plurality of amplifiers in parallel and driving a load, and by combining a signal with a delay in each amplifier at the load, a so-called comb Because the same characteristics as the filter can be realized, it is possible to attenuate the frequency according to the delay time. By setting this delay time according to the peak frequency of the LC low-pass filter, it occurs at light load. The peak of the LC filter can be prevented. Further, by changing the delay time according to the input signal band, there is an effect that it is possible to reduce the noise level of an unnecessary band having a frequency lower than the peak frequency.

  The power amplifier according to the present invention is a power amplifier that drives a load by using a plurality of LC low-pass filters. A signal to be supplied to each connected amplifier has a time difference, and the time difference is the cut-off frequency of the LC low-pass filter. By setting it to correlate with, the peak level of the frequency characteristic that occurred at low load can be reduced, and the deterioration of the element due to the abnormal voltage generated by this peak and the abnormal current to the load Can be prevented.

In addition, when the input signal is a digital signal, only noise is included beyond the band determined by the sampling frequency, so this extra noise can be reduced by changing the delay time according to the input signal band. Next, an embodiment of the power amplifier of the present invention will be described with reference to the drawings.

(Embodiment 1)
FIG. 1 is a block diagram relating to a power amplifier according to Embodiment 1 of the present invention. In FIG. 1, 1 is a signal processing unit that generates a PWM signal from an input signal, 2, 3, 4, and 5 are delay circuits, 6, 7, 8, and 9 are power switches that can control a large current, and 10 is a load. is there. 11 collectively displays the LC low-pass filter.

  FIG. 2 is an operation waveform diagram in the power amplifier according to the first embodiment of the present invention. In FIG. 2, a to j represent the operation waveforms of the portion corresponding to FIG. 1, where the PWM switching frequency is fs, and the delay time difference between the delay circuit 2 and the delay circuit 4 is T.

  The signal processing unit 1 generates four outputs from the input signal. The outputs a and b of the signal processing unit 1 are in an inverted relationship, and a and c, and b and d have the same output. When the delay times of the delay circuits 2 and 3 are equal and the delay times of the delay circuits 4 and 5 are also set equal, the outputs of the delay circuits 2 and 3 are maintained in an inverted relationship, and similarly the delay circuit 4 This means that the two full bridge connections are connected in parallel, one by the delay circuits 2 and 3 and the other by the delay circuits 4 and 5. ing.

  Since the delay times of the delay circuits 2 and 3 and the delay times of the delay circuits 4 and 5 are different, the respective output waveforms are as e, f, g, and h. The waveforms when these signals are connected to the load through the LC filter 11 are smooth waveforms like i and j. Actually, the component of the switching frequency fs is attenuated by about 30 dB to 40 dB by a low-pass filter and looks a little like noise, but it cannot be heard at all.

  When the signals delayed in this way are connected by a load, they are added in the waveform after the averaging process in the LC filter, and a characteristic like a comb filter is obtained. If the delay time difference between e, f and g, h is T, signals having a phase difference of 180 degrees due to the time difference T cancel each other and become 0, so that no output appears in the load portion. Therefore, the output amplitude can be changed by adjusting T. For example, when T is set to the peak frequency of the LC filter, the amplitude is 0 at the peak frequency, and signals having a phase shift of 90 degrees are added at half the peak frequency, so that an output of -3 dB level is obtained. Be able to.

  If this is used in reverse, setting T to twice the peak frequency results in a characteristic that is 3 dB lower at the peak frequency. If the original characteristic is +3 dB at 8 ohm load, the total is 0 dB clean. Characteristics will be obtained. FIG. 5 shows the characteristics of the comb filter when the delay time difference is set so that 120 kHz becomes an output 0 (1/240 k = 4.17 us). The characteristic of 60 kHz in FIG. 5 is −3 dB. In fact, the sum of this characteristic and the characteristic of the LC filter in FIG. 7 becomes the output characteristic, and therefore 60 kHz may be 0 dB in the total output characteristic. I understand.

  If the delay time is changed between the delay circuits 2 and 3 in the first embodiment, the same comb filter is formed in the opposite phase between the two signals. In addition, by adjusting the delay times of the four delay circuits, various frequency characteristics can be obtained.

(Embodiment 2)
FIG. 3 is a block diagram according to the power amplifier in the second embodiment of the present invention. The same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 3, 16 is an input discriminating circuit, and 12, 13, 14, and 15 are delay circuits having a delay time changing function.

  The input discriminating circuit 16 operates mainly when a digital signal is input. When the sampling frequency of the input signal is 44.1 kHz, the input signal band is limited to 20 kHz, so that the delay time difference T in FIG. 2 is set to a large value of about 8 us, for example, so as to reduce the noise level in the band of 20 kHz or higher. When the sampling frequency is 96 kHz, the input signal band is 40 kHz, so the delay time difference T in FIG. By changing the setting so as to be as small as about 4 us and allowing the band to pass through a band of 20 kHz or higher, noise outside the band can be reduced and high-quality audio output can be obtained. Since the sampling frequency information does not exist when the input signal is analog, in this case, basically, it is set to be a wide band, the output frequency band is determined by the user's setting, and the figure is adjusted accordingly. By setting a delay time difference T of 2, an effect similar to that in the case of digital signal input can be obtained.

  In general, a large current switch generates distortion in a PWM signal due to a subtle shift in switching timing or a change in power supply voltage due to a change in large current. Therefore, the delay shown in FIG. 2 is used to reduce unnecessary band distortion components. By setting the time difference T and connecting the output unit instead of the signal processing unit, the distortion component generated by the large current switch can be attenuated, and a higher quality audio output can be obtained.

  When an audio speaker is a load, the rated impedance is determined at a low frequency. However, at a frequency at which the resonance of the LC low-pass filter becomes a problem, the impedance component exceeds 16Ω due to the inductance component of the speaker. In such a case, the influence of this high-frequency resonance may be further increased. In addition, when the impedance is corrected or a speaker with a different driving method is used, there is a load with relatively little frequency fluctuation.

(Embodiment 3)
FIG. 4 is a block diagram relating to a power amplifier according to Embodiment 3 of the present invention. The same parts as those in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 4, 17 is a load determination circuit, and 18 is a signal processing unit having a test signal generation unit.

  The load determination circuit 17 has two operation modes, an initial setting mode and a normal operation mode. In the initial setting mode, the load determination circuit 17 instructs the signal processing unit 18 to output a test signal, and is output from the signal processing unit 18. The load resistance is determined by comparing the level of the signal measured at the load portion with respect to the test signal. By using a signal having a relatively high frequency that is in the vicinity of the resonance frequency of the LC low-pass filter as the test signal, the resistance value in the high range can be measured more accurately. In the normal operation mode, when the resistance value measured above is larger than the assumed impedance such as 16Ω, the delay time difference T in FIG. 2 is set longer than, for example, 4 us to prevent the occurrence of a peak, When the measured resistance value is as small as 4Ω, the delay time difference T in FIG. 2 is reduced to, for example, 0 so as to be simultaneous, and the frequency characteristic is extended to a high frequency range. Thereby, even when various loads are connected, it is possible to realize a digital power amplifier having optimum frequency characteristics according to the loads. Here, the load determination circuit 17 measures the resistance value, but this can of course be measured by measuring the ratio between the test signal level and the output signal level.

  In the above example, the number of power amplifiers has been described as four. However, if there are a plurality of power amplifiers, the frequency characteristics can be changed as in the present invention by combining them, and the input determination circuit 16 and the load determination circuit It is of course possible to combine both 17. The location of the delay circuit may be anywhere after it is divided for each output channel.

  The power amplifier of the present invention can be used for a multi-channel high-efficiency audio amplifier used in a home theater or the like, thereby obtaining a safe and high-quality audio output.

1 is a block diagram relating to a power amplifier according to a first embodiment of the present invention. Operation waveform diagram of power amplifier in embodiment 1 of the present invention The block diagram which concerns on the power amplifier in Embodiment 2 of this invention Block diagram according to the power amplifier in the third embodiment of the present invention Characteristic diagram of comb filter according to power amplifier in Embodiment 1 of the present invention Block diagram of a conventional digital power amplifier Frequency characteristics of LC low-pass filter in conventional digital power amplifier

Explanation of symbols

1, 18 Signal processor
2, 3, 4, 5, 12, 13, 14, 15 Delay circuit 6, 7, 8, 9, 101 Large current switch 10, 104 Load 11 LC low pass filter 16 Input determination circuit 17 Load determination circuit 105 Output unit

Claims (3)

A power amplifier that drives a load using a plurality of LC low-pass filters,
A signal processing unit for generating a pulse width modulation signal from the input signal;
A delay processing unit for delaying a signal from the signal processing unit;
A power switch that controls a large current and outputs the signal to the LC low-pass filter;
The signal processing unit is configured to give a time difference to a signal to be supplied to each connected LC low-pass filter, and set the time difference in correlation with a cutoff frequency of the LC low-pass filter. amplifier. A power amplifier that drives a load using a plurality of LC low-pass filters,
A signal processing unit for generating a pulse width modulation signal from the input signal;
A delay processing unit for delaying a signal from the signal processing unit;
A power switch that controls a large current and outputs the signal to the LC low-pass filter;
A power amplifier, wherein the signal processing unit is configured to give a time difference to a signal to be supplied to each connected LC low-pass filter, and to set the time difference according to an input signal band. A power amplifier that drives a load using a plurality of LC low-pass filters,
A signal processing unit for generating a pulse width modulation signal from the input signal;
A delay processing unit for delaying a signal from the signal processing unit;
A power switch that controls a large current and outputs the signal to the LC low-pass filter;
A load determination unit for measuring load impedance in the load,
The signal processing unit is configured to have a time difference in the signal to be supplied to each connected LC low-pass filter, and to set the time difference in correlation with the load impedance measured by the load determination unit. Power amplifier.

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