JP2009018532A - Inkjet recording device and inkjet driving circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain stable characteristics not affected by fluctuation in power-supply voltage, regarding an inkjet recording device including an inkjet head having a plurality of actuators and an inkjet driving circuit. <P>SOLUTION: The inkjet recording device uses the inkjet driving circuit. The inkjet driving circuit includes: a voltage register circuit; a multiple voltage circuit; a plurality of actuator driving circuits for driving the plurality of actuators. The inkjet driving circuit includes, independently for every actuator driving circuit, a voltage switching circuit to connect the voltage terminal of the multiple voltage circuit designated by the output signal of the voltage register circuit to the power supply terminal of the actuator driving circuit. The output voltage of the actuator driving circuit is controlled by controlling the voltage of the power supply terminal by the voltage register circuit. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an ink jet recording apparatus including an ink jet head having a plurality of actuators and an ink jet driving circuit.

  An ink jet recording apparatus uses an ink jet head including a plurality of nozzles for ejecting ink droplets and an actuator such as an electromechanical conversion element or a heating resistor provided corresponding to each nozzle to output a recording signal. Accordingly, high-speed, high-density, and high-quality recording is performed by ejecting ink droplets from a nozzle onto a recording material (a material to which ink droplets adhere). In this ink jet recording apparatus, as the print quality is improved, the nozzle arrangement tends to be higher in density, and in order to cope with this, as per Patent Document 1, a plurality of actuator drive circuits are used for each nozzle. A method for driving an actuator has been proposed. A portion composed of one nozzle and an actuator is called a channel.

The known literature is described below.
JP-A-9-99556

  However, since there are manufacturing variations in nozzles, actuators, and actuator drive circuits for each channel, there are differences in the ink droplet ejection characteristics of the nozzles, and the ink droplet ejection speed, ink droplet volume, and ejection stability. As a result, the print quality deteriorates. For example, if the rise time or fall time of the drive pulse signal output from the actuator drive circuit varies for each channel, the ink droplet ejection speed of the nozzle of that channel varies. As a result, there is a problem that dot position shift occurs in the print area of the adjacent channel, or color shift or blur occurs in the case of color recording, and the image quality deteriorates. This problem also occurs due to manufacturing variations in nozzles, actuators, and actuator drive circuits.

  In addition, when a piezoelectric element is used for the actuator of the ink jet head, the electrostatic capacity per actuator is about 700 pF to 3000 pF, and the total capacity of the ink jet head of about 300 nozzles reaches 0.2 μF to 0.9 μF. . When driving the piezoelectric element of the actuator to discharge a fine droplet, a driving waveform having a large potential difference is required in a short time, and a slew rate of 10 V / μs is required at the minimum. To obtain this slew rate, a current of up to 9 amperes is required for the entire inkjet head. Conventionally, a power amplifier circuit having a low output impedance is used for the actuator drive circuit for each actuator for this purpose. However, if so, the configuration of each actuator drive circuit becomes complicated, the mounting area of the circuit increases, and the cost of the actuator drive circuit also increases. Furthermore, since the power consumption of the power amplifier circuit is large, the power consumption of all the actuator drive circuits is large and the amount of heat generated is enormous.

  For this reason, the present invention provides high-quality printing performance that has stability that does not affect printing performance due to fluctuations in power supply voltage, etc., and that compensates for manufacturing variations in an inkjet recording apparatus that uses an inkjet head having a plurality of channels. It is an object of the present invention to obtain an ink jet recording apparatus having the above characteristics, and to reduce the size and power consumption of an actuator drive circuit of the ink jet recording apparatus.

  In order to solve this problem, the present invention provides an ink jet recording apparatus having an ink jet head having a plurality of actuators and an ink jet drive circuit, wherein the ink jet drive circuit has a voltage register circuit and a multiple voltage circuit. A plurality of actuator drive circuits for driving the actuator, and the voltage terminals of the multiple voltage circuit specified by the output signal of the voltage register circuit are connected to the power supply terminals of the actuator drive circuit independently for each actuator drive circuit; An ink jet recording apparatus having a voltage switch circuit.

  The present invention also provides an inkjet recording apparatus having an inkjet head having a plurality of actuators and an inkjet drive circuit, wherein the inkjet drive circuit has a voltage register circuit and a multiple voltage circuit, and a plurality of actuators drive the plurality of actuators. A voltage terminal of the multiple voltage circuit having an actuator drive circuit, having a voltage gate circuit for limiting an output voltage of the actuator drive circuit, and being designated by an output signal of the voltage register circuit independently for each actuator drive circuit An ink jet recording apparatus comprising: a voltage switch circuit for connecting a voltage to a gate terminal of the voltage gate circuit.

  According to the present invention, the actuator drive circuit includes a reference current circuit, a current switch circuit, and a current register circuit, and the current switch circuit is switched by an output signal of the current register circuit independently for each actuator drive circuit. A drive current corresponding to the increased current has a multiple output type current mirror circuit that creates a current obtained by increasing the current of the reference current circuit by a magnification specified by the current register circuit by switching the current of the current terminal The inkjet recording apparatus according to claim 1, further comprising a circuit that outputs a signal from an output terminal of the actuator driving circuit.

  The present invention is also the above ink jet recording apparatus, wherein the ink jet driving circuit comprises a CMOS semiconductor integrated circuit.

  The present invention is also an ink jet drive circuit for driving an ink jet head having a plurality of actuators of an ink jet recording apparatus, comprising a voltage register circuit and a multiple voltage circuit, and a plurality of actuator drive circuits for driving the plurality of actuators. And a voltage switch circuit for connecting a voltage terminal of the multiple voltage circuit specified by an output signal of the voltage register circuit to a power supply terminal of the actuator drive circuit independently for each actuator drive circuit. It is an inkjet drive circuit.

  The present invention is also an ink jet drive circuit for driving an ink jet head having a plurality of actuators of an ink jet recording apparatus, comprising a voltage register circuit and a multiple voltage circuit, and a plurality of actuator drive circuits for driving the plurality of actuators. A voltage gate circuit for limiting an output voltage of the actuator drive circuit, and the voltage gate of the multiple voltage circuit specified by an output signal of the voltage register circuit independently for each actuator drive circuit. An ink jet driving circuit having a voltage switch circuit connected to a gate terminal of the circuit.

  According to the present invention, the actuator drive circuit includes a reference current circuit, a current switch circuit, and a current register circuit, and the current switch circuit is switched by an output signal of the current register circuit independently for each actuator drive circuit. A drive current corresponding to the increased current has a multiple output type current mirror circuit that creates a current obtained by increasing the current of the reference current circuit by a magnification specified by the current register circuit by switching the current of the current terminal The inkjet drive circuit according to claim 1, further comprising a circuit that outputs the output from an output terminal of the actuator drive circuit.

  According to another aspect of the present invention, there is provided the above-described inkjet driving circuit comprising a CMOS semiconductor integrated circuit.

  According to the ink jet recording apparatus of the present invention, the ink jet driving circuit for driving the actuator changes the maximum value of the output voltage of the output terminal for each actuator by the voltage register circuit and the current register circuit. There is an effect that it is possible to realize high-quality printing in which variation in volume of ink droplets is corrected. In addition, since the actuator drive circuit of the ink jet drive circuit of the present invention has a circuit configuration that does not use a power amplifier circuit, and other circuits are configured by CMOS transistors, there is an effect that power consumption can be reduced. In addition, there is an effect that the chip size of the ink jet driving circuit can be reduced, and the manufacturing cost of the ink jet driving circuit can be reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
<First Embodiment>
FIG. 1 is a block diagram illustrating the present invention, FIG. 2 is a schematic circuit diagram of an actuator drive circuit 10 according to a first embodiment of the present invention, and FIG. 3 is a timing chart of the operation of the present invention.
(Outline of inkjet recording apparatus)
The ink jet recording apparatus according to the present embodiment has about 1 to 500 composed of a plurality of nozzles for ejecting ink droplets to an ink jet head and an electric conversion element such as a piezoelectric element corresponding to each nozzle or an electrothermal conversion body such as a heater. A plurality of actuators 1 are provided. As shown in FIG. 1, the plurality of actuators 1 a to 1 n are driven in parallel by the inkjet drive circuit 2 controlled by the control device 20. Thereby, ink droplets are ejected from each nozzle to record an image on a recording material. In addition, the part comprised by one nozzle and the actuator 1 is called a channel (CH1, CH2, CH3, ... CHn).

(Configuration of inkjet drive circuit)
As shown in FIG. 1, the ink jet recording apparatus of the present embodiment includes an ink jet driving circuit 2 made of a CMOS semiconductor integrated circuit. The inkjet drive circuit 2 includes a plurality of actuator drive circuits 10 that drive the actuators 1 (1a to 1n) of the inkjet head. The ink jet driving circuit 2 includes a voltage register circuit 3, a current register circuit 4, and a signal register circuit 5 that are configured by CMOS transistors. These register circuits are connected to the data bus of the control circuit 20 of the ink jet recording apparatus via a serial interface or a parallel interface, and data is set from the control circuit 20 to each register circuit. As shown in FIG. 2, the actuator drive circuit 10 includes a timing signal generation circuit 6, a drive current outflow circuit 8, and a drive current inflow circuit 9 configured by CMOS transistors. A multiple voltage circuit 11 having a plurality of voltage terminals. The signal line of the voltage register circuit 3 is connected to the input terminal of the voltage switch circuit 16 for each actuator drive circuit 10. The voltage switch circuit 16 connects one voltage terminal of the plurality of voltage terminals of the multiple voltage circuit 11 commanded by the signal of the voltage register circuit 3 to the power supply terminal VCC of the drive current outflow circuit 8. Thereby, the voltage register circuit 3 controls the output voltage of the output terminal OUT of the actuator drive circuit 10.

  The drive current outflow circuit 8 includes a first multiple output type current mirror circuit 13, a first current switch circuit 12a, and a first current drive circuit 15a. The drive current inflow circuit 9 includes a second multiple output type current mirror circuit 14, a second current switch circuit 12b, and a second current drive circuit 15b. The reference current created by the reference current circuit 7 of the inkjet drive circuit 2 is passed through the first transistor of each multiple output type current mirror circuit of each actuator drive circuit 10.

(Drive current outflow circuit and drive current inflow circuit)
The actuator drive circuit 10 has a first multiple output type current mirror circuit 13 composed of nMOS transistors in the drive current outflow circuit 8, and a second current composed of pMOS transistors in the drive current inflow circuit 9. A multiple output type current mirror circuit 14 is provided. Then, the signal line of the current register circuit 4 is connected to the input terminals of the current switch circuits 12a and 12b to switch the switches, and the currents of the plurality of current terminals of the multiple output type current mirror circuit are switched. As a result, the first multiple-output current mirror circuit 13 and the second multiple-output current mirror circuit 14 pass a current obtained by doubling the reference current at a magnification specified by the signal of the current register circuit 4. The drive current corresponding to the current of the multiple output type current mirror circuit is caused to flow out or inflow from the output terminal OUT by the current drive circuits 15a and 15b of the current mirror circuit formed of MOS transistors.

(Timing signal generation circuit)
Hereinafter, the operation of the timing signal generation circuit 6 of the actuator drive circuit 10 will be described. The signal register circuit 5 of the inkjet drive circuit 2 outputs a drive command for each actuator drive circuit 10, that is, a drive signal for instructing whether or not output from the output terminal OUT of each actuator drive circuit 10 is possible. To the timing signal generation circuit 6. As shown in FIG. 3, the timing signal generation circuit 6 of the actuator drive circuit 10 that has been commanded to drive in this way generates the drive timing signal IN. The drive timing signal IN may be generated from outside the timing signal generating circuit 6, for example, in the inkjet driving circuit 2 and sent to the timing signal generating circuit 6 of each actuator driving circuit 10. The timing signal creation circuit 6 creates the first switch switching signal UP and the second switch switching signal DOWN from the drive timing signal IN when the driving is instructed from the signal register circuit 5. A non-overlap time is provided between the period in which the first switch switching signal UP is ON (on) and the period in which the second switch switching signal DOWN is ON (on). The switch switching signal DOWN of 2 is prevented from being turned ON at the same time. For example, the first switch switching signal UP is a signal that rises with a delay of a non-overlap time from the rise time of the voltage pulse of the drive timing signal IN. The second switch switching signal DOWN is a timing signal obtained by reversing the polarity of the drive timing signal IN (the rise and fall are reversed), and the rise timing of the signal is based on the fall time of the voltage pulse of the drive timing signal IN. The signal rises with a delay of non-overlap time.

(Current drive circuit)
As shown in FIG. 2, the first current drive circuit 15 a configured by a pMOS transistor is connected to the output terminal of the voltage switch circuit 16 in the drive current outflow circuit 8. The first current drive circuit 15a is configured to have a current mirror circuit configuration by switching the current drive circuit 15a with a MOS transistor switch circuit while the second switch switching signal DOWN created by the timing signal creation circuit 6 is OFF. To do. Further, during the period when the first switch switching signal UP is ON, the first multiple output type current mirror circuit 13 is connected to the first current driving circuit 15a by a MOS transistor switch circuit. The first multiple output current mirror circuit 13 is connected to the ground terminal. As a result, the current mirror circuit of the first current drive circuit 15a causes the drive current corresponding to the current flowing through the first multiple output current mirror circuit 13 to flow out to the output terminal OUT. Further, the second current drive circuit 15b, which is composed of an nMOS transistor in the drive current inflow circuit 9 and connected to the ground terminal, is switched by a MOS transistor switch circuit during the period when the first switch switching signal UP is OFF. The circuit is switched to a current mirror circuit configuration. Further, during the period in which the second switch switching signal DOWN is ON, the second multiple output current mirror circuit 14 is connected to the second current driving circuit 15b by a MOS transistor switch circuit. The second multiple-output current mirror circuit 14 is connected to a second power supply terminal having a voltage VDD of about 3V. Thereby, the current mirror circuit of the second current driving circuit 15b draws the current corresponding to the current flowing through the second multiple output type current mirror circuit 14 from the output terminal OUT. That is, while the voltage of the first switch switching signal UP is ON, the first current driving circuit 15a flows out current to the output terminal OUT, and while the second switch switching signal DOWN is ON, The second current drive circuit 15b draws current.

(Multiple output type current mirror circuit)
In the following, the operation of each of the multiple output type current mirror circuits of the drive current outflow circuit 8 and the drive current inflow circuit 9 of the actuator drive circuit 10 will be described with reference to FIG. The drive current outflow circuit 8 of the actuator drive circuit 10 has a first multiple output type current mirror circuit 13 of an nMOS transistor, and the reference current output from the reference current circuit 7 is the first multiple output type current mirror circuit. The current flows through thirteen first nMOS transistors. The reference current is doubled by the first multiple output type current mirror circuit 13, and the magnification is set by each switch of the first current switch circuit 12 a according to each nMOS of the first multiple output type current mirror circuit 13. Control is performed by switching the current at the current terminal of the transistor in accordance with a command from the current register circuit 4.

  The second nMOS transistor of the first multiple output type current mirror circuit 13 that switches the current by the D0 signal of the current register circuit 4 is configured by a transistor that flows a current corresponding to the current flowing through the first nMOS transistor. The third nMOS transistor that is switched by the D1 signal is configured by a transistor that supplies a current that is twice as much as the current that flows through the first nMOS transistor. The fourth nMOS transistor that is switched by the D2 signal is configured by a transistor that supplies a current that is four times the amount of current that flows through the first nMOS transistor. The sum of the currents flowing through these nMOS transistors flows through the first multiple output current mirror circuit 13. The current drive circuit 15a switches the circuit to a current mirror circuit by a MOS transistor switch circuit during the period when the first switch switching signal UP is ON, and a current corresponding to the current flowing through the first multiple output type current mirror circuit 13 From the output terminal OUT. Thus, the magnification of the current flowing out from the output terminal OUT with respect to the reference current can be freely changed by the first current switch circuit 12a controlled by the current register circuit 4.

  The second multiple-output current mirror circuit 14 composed of pMOS transistors has a plurality of switches controlled by the output signal of the current register circuit 4 in the same manner as the first multiple-output current mirror circuit 13. The current at the current terminal of each pMOS transistor is switched by the second current switch circuit 12b. The second current magnification is freely changed by switching the current. Then, the current drive circuit 15b draws a current having a second current magnification with respect to the reference current of the reference current circuit 7 from the output terminal OUT while the second switch switching signal DOWN is ON.

  The ink jet drive circuit 2 does not necessarily have to be composed of one semiconductor integrated circuit. For example, the voltage register circuit 3, the current register circuit 4 and the signal register circuit 5 are composed of one semiconductor integrated circuit, and the actuator is driven. The circuit group 10 and the reference current circuit 7 may be constituted by different semiconductor integrated circuits. Alternatively, the current register circuit 4 is constituted by an independent ROM (read only memory) and its set value is fixed and designated, while the signal register circuit 5 is constituted by a RAM (random access memory), depending on the printing pattern. A circuit configuration for changing the output signal can also be used.

(Operation timing of inkjet drive circuit)
Next, the driving procedure of the ink jet head by the ink jet driving circuit 2 will be described with reference to FIG. First, the control circuit 20 of the ink jet recording apparatus writes predetermined values to the voltage register circuit 3, the current register circuit 4, and the signal register circuit 5 of the ink jet driving circuit 2. Next, the current register circuit 4 controls the first current switch circuit 12a with the first current magnification signal, and controls the second current switch circuit 12b with the second current magnification signal. The first current switch circuit 12a switches the power supply current of the input terminal of the first multiple output type current mirror circuit 13 according to the first current magnification signal, and the second current switch circuit 12b performs the second current magnification. The current at the input terminal of the second multiple output current mirror circuit 14 is switched in accordance with the signal.

(First current output operation)
Next, the signal register circuit 5 sends a channel drive signal to the input terminal of the timing signal generation circuit 6. The timing signal creation circuit 6 creates the drive timing signal IN when the channel drive signal is ON, and creates the first switch switching signal UP to be turned ON for 4 μs, for example. During the period when the second switch switching signal DOWN is OFF, the current corresponding to the current of the first multiple output type current mirror circuit 13, ie, the reference current, is switched between the first current driving circuit 15a by the MOS transistor switch circuit. Is switched to a current mirror circuit that outputs a current of the first current magnification. Further, during the period when the first switch switching signal UP is ON, the first multiple output current mirror circuit 13 is connected to the first current driving circuit 15a by the MOS transistor switch circuit and operated. . Thus, the first current drive circuit 15a causes the drive current outflow circuit 8 to flow out the current having the first current magnification of the reference current from the output terminal OUT. For example, a current of 11.2 mA is caused to flow out from the output terminal OUT.

  For example, the actuator 1 of a 1000 pF piezoelectric element is connected to the output terminal OUT. Thus, as shown in FIG. 3, the current at the output terminal OUT charges the capacitive load of the piezoelectric element of the actuator 1, and the voltage applied to the piezoelectric element of the actuator 1 after 2.5 μs connects the output terminal of the voltage switch circuit 16. The potential rises to the potential of the power supply terminal VCC of the drive current output circuit 8, for example, a potential of 28V, and is saturated. Then, during the remaining period of the first switch switching signal UP, the potential of the output terminal OUT maintains the potential of VCC, that is, the potential of VCC of 28V. Next, when the first switch switching signal UP falls, the current drive circuit 15a stops the outflow of current from the output circuit OUT, but the voltage at the output terminal OUT is kept constant at the VCC potential of 28V. Thus, the output current from the output terminal OUT increases the voltage of the piezoelectric element of the actuator 1. The slew rate of this increase is (28 V) / (2.5 μs) = 11.2 V / μs.

(Second current output operation)
Next, the timing signal creation circuit 6 creates the second switch switching signal DOWN so as to be ON for 4 μs, for example. A current mirror circuit for causing the second current drive circuit 15b to flow a current corresponding to the current of the second multiple output type current mirror circuit 13 through the switch circuit of the MOS transistor during the period when the first switch switching signal UP is OFF. Switch to. Further, during the period in which the second switch switching signal DOWN is ON, the second multiple output type current mirror circuit 14 is connected to the second current driving circuit 15b to be operated. Thus, the second current drive circuit 15 b flows the current having the second current magnification specified by the output signal of the signal register circuit 5 into the drive current inflow circuit 9 from the output terminal OUT connected to the piezoelectric element of the actuator 1. Let For example, a current of 11.2 mA is caused to flow from the output terminal OUT.

As a result, the electric charge due to the VCC potential of 28 V accumulated in the piezoelectric element of the actuator 1 is discharged from the output terminal OUT in 2.5 μs, and the voltage of the output terminal OUT is lowered to 0 V of the ground potential. The voltage of 0V is maintained for the remaining period of the second switch switching signal DOWN. Next, when the second switch switching signal DOWN falls, the current drive circuit 15b stops drawing current from the output terminal OUT, but the voltage at the output terminal OUT is 0.
The constant value of V is maintained. Thus, the output current from the output terminal OUT reduces the voltage of the piezoelectric element of the actuator 1. The slew rate of this decrease is (28 V) / (2.5 μs) = 11.2 V / μs.

  In this embodiment, the drive current of the actuator 1 output from the output terminal OUT of the actuator drive circuit 10 is controlled by the first current drive circuit 15a and the second current drive circuit 15b, so that the output terminal OUT is piezoelectric. There is an effect that a low impedance output can be made to the actuator 1 composed of an element or the like. On the other hand, the reference current circuit 7 stably generates a reference current independently of the current drive circuit 15 and controls the ink jet drive circuit 2, so that variations in elements such as piezoelectric elements of the actuator 1 and the channel to be driven (CH 1) , CH2, CH3,..., And CHn), there is an effect that the waveform of the reference current is not distorted.

  In the present embodiment, since the actuator 1 can be driven by freely setting the drive current to the current value designated by the current register circuit 4 for each actuator drive circuit 10 for each channel, the nozzle of the inkjet head, the actuator 1 and the actuator drive There is an effect that the variation in the ink droplet discharge speed due to the manufacturing variation of the circuit 10 can be corrected. Thereby, there is an effect that an ink jet recording apparatus capable of printing with high image quality without dot position shift, color shift, and bleeding is obtained. Further, in the present embodiment, for each actuator drive circuit 10 for each channel, the voltage switch circuit 16 controlled by the voltage register circuit 3 selects one of the voltage terminals of the multiple voltage circuit 11 to select the drive current outflow circuit 8. Connect to the power supply terminal VCC. Thereby, the maximum value of the drive voltage output from the output terminal OUT can be changed for each actuator drive circuit 10. Thus, by adjusting the volume of the ink droplet to be ejected for each actuator 1, the variation in the volume of the ink droplet due to the manufacturing variation such as the variation in the characteristics of the inkjet drive circuit 2 or the manufacturing variation of the nozzle of the inkjet head is reduced. There is an effect that an ink jet recording apparatus that can correct and print with high image quality can be obtained.

  In addition, the circuit for controlling the drive current output from the output terminal OUT of the actuator drive circuit 10 of the inkjet drive circuit 2 is composed of a current drive circuit 15 formed of a current mirror circuit of a pMOS transistor or an nMOS transistor, and does not use a power amplifier circuit. The circuit configuration is such that the drive current is generated. Since the other elements of the ink jet drive circuit 2 are composed of CMOS transistors, the power consumption can be reduced. Furthermore, this has the effect of reducing the chip size of the inkjet drive circuit 2, and the manufacturing cost can be reduced by reducing the chip size. Further, by reducing the chip size and forming the actuator drive circuit 10 for each channel in one inkjet drive circuit 2, there is an effect that the characteristics of each channel can be made uniform.

  In addition, since the multiple output current mirror circuit outputs a current having a predetermined magnification of the reference current of the reference current circuit 7 as a drive current, fluctuations in the power supply voltage and the inkjet drive circuit 2 such as a semiconductor integrated circuit Even if there is a change in characteristics due to aging, there is an effect that a stable and accurate driving current can be output to the actuator 1. Thereby, there is an effect that it is possible to realize high-quality printing that can keep the printing of the ink jet recording apparatus stable. In particular, there is an effect that enables stable and high-quality printing without being influenced by the change in temperature of the apparatus from the start-up stage to the steady-state stage. Furthermore, the inkjet drive circuit 2 of the present embodiment uses the current register circuit 4 to multiply the output current of the first multiple output current mirror circuit 13 and the second multiple output current mirror circuit 14 with respect to the reference current. Can be set freely. Therefore, it can be adapted to an ink jet recording apparatus using the actuator 1 having different characteristics only by changing the set value of the current register circuit 4, and there is an effect that it can be used for general purposes.

In the present embodiment, an example in which a piezoelectric element is used as the actuator 1 of the ink jet head has been described. However, the present invention is not limited to the piezoelectric element, and uses a heating resistor for generating bubbles in the liquid chamber. In addition, the present invention can be similarly applied to an apparatus using an energy conversion element for ejecting other ink.

<Second Embodiment>
FIG. 4 is a block diagram of the inkjet drive circuit 2 according to the second embodiment of the present invention, and FIG. 5 is a schematic circuit diagram of the actuator drive circuit 10. The operation timing of the circuit follows the timing chart of FIG. 3 as in the first embodiment. The second embodiment is different from the first embodiment in that the second embodiment uses a low-power multiple voltage circuit 11 that does not pass a drive current as large as that in the first embodiment. is there. Further, a voltage gate circuit 17 of an nMOS transistor is provided between the drive current outflow circuit 8 and the drive current inflow circuit 9. The voltage switch circuit 16 is connected to the gate terminal of the voltage gate circuit 17, and the voltage switch circuit 16 selects the voltage of the multiple voltage circuit 11 and applies it to the gate terminal of the voltage gate circuit 17. This is different from the first embodiment in that the potential of the output terminal OUT connected to the source terminal of the voltage gate circuit 17 is limited to the potential of the gate terminal or less.

(Configuration of inkjet drive circuit)
The ink jet drive circuit 2 of the ink jet recording apparatus of the present embodiment includes a voltage register circuit 3, a current register circuit 4 and a signal register circuit 5 which are constituted by CMOS transistors, and a serial interface is connected to the data bus of the control circuit 20 of the ink jet recording apparatus. Or it connects with a parallel interface. Furthermore, it has a timing signal generating circuit 6 composed of CMOS transistors, a reference current circuit 7 for generating a reference current, and a multiple voltage circuit 11 having a plurality of voltage terminals whose voltages are changed. The current driving circuit 15a includes a voltage gate circuit 17, and forms a current mirror circuit that supplies a current corresponding to a current flowing through the first multiple output current mirror circuit 13 to the drain electrode of the voltage gate circuit 17. Connect. The source electrode of the voltage gate circuit 17 is connected to a current driving circuit 15b that constitutes a current mirror circuit that supplies a current corresponding to the current flowing through the second multiple output current mirror circuit. Then, the signal line of the voltage register circuit 3 is connected to the voltage switch circuit 16 for each actuator drive circuit 10, and the voltage switch circuit 16 is made to select the voltage terminal of the multiple voltage circuit 11, so that the voltage gate circuit of the nMOS transistor. 17 gate electrodes are connected. As a result, the voltage of the source electrode of the voltage gate circuit 17 is limited to be equal to or lower than the voltage of the gate electrode, and the voltage of the output terminal OUT connected to the source electrode is limited. Thus, the voltage register circuit 3 controls the output voltage of the output terminal OUT of the actuator drive circuit 10.

  Further, the output signal line of the current register circuit 4 is connected to the input terminals of the current switch circuits 12a and 12b. The current switch circuits 12a and 12b control current switching to a plurality of current terminals of the multiple output type current mirror circuit. As a result, the output current of the multiple output current mirror circuit obtained by doubling the reference current of the reference current circuit 7 by the magnification designated by the signal of the current register circuit 4 is output from the output terminal OUT of the actuator drive circuit 10. The current drives each actuator 1.

(Actuator drive circuit operation)
Next, in this embodiment, the operation of the actuator drive circuit 10 will be described with reference to the timing chart of FIG. First, as in the first embodiment, the signal register circuit 5 stores the ON / OFF switching data of the actuator 1 for each channel, and the signal register circuit 5 stores the timing signal of the actuator driving circuit 10 of the actuator 1 to be driven. A drive command is given to the creating circuit 6. The timing signal generation circuit 6 instructed to drive generates the first switch switching signal UP and the second switch switching signal DOWN and sends them to the drive current outflow circuit 8 and the drive current inflow circuit 9.

(First current output operation)
As shown in FIG. 4, the signal of the current register circuit 4 is output to the input terminal of the current switch circuit 12a, and the drive current of the first multiple output current mirror circuit 13 is controlled. The first switch switching signal UP and the second switch switching signal DOWN control the current drive circuits 15a and 15b. As in the first embodiment, when the first switch switching signal UP is turned on for 4 μs, a current of 11.2 mA corresponding to the current flowing through the first multiple-output current mirror circuit 13 is applied to the current mirror. The current drive circuit 15a constituting the circuit flows. The current flows out from the output terminal OUT connected to the source electrode of the nMOS transistor of the voltage gate circuit 17 to the actuator 1. And the capacitive load of the actuator 1 of a 1000 pF piezoelectric element is charged. After 2.5 μs, the voltage of the piezoelectric element of the actuator 1, that is, the voltage of the source electrode of the nMOS transistor of the voltage gate circuit 17 rises to a voltage (for example, 28 V) applied to the gate electrode of the nMOS transistor. Saturate and maintain that value. The voltage of the gate electrode of the nMOS transistor of the voltage gate circuit 17 can be changed by the voltage switch circuit 16 switching the value of the voltage at the voltage terminal of the multiple voltage circuit 11.

(Second current output operation)
Next, as in the first embodiment, the second switch switching signal DOWN is turned ON for 4 μs, and during that period, a current of 11.2 mA from the piezoelectric element of the actuator 1 passes through the output terminal OUT and the current driving circuit 15b. To flow into. The current driving circuit 15b forms a current mirror circuit and passes a current of 11.2 mA corresponding to the current flowing through the second multiple output type current mirror circuit. As a result, the current drive circuit 15b discharges the 28 V charge accumulated in the piezoelectric element of the actuator 1 in 2.5 μs, lowers the voltage of the output terminal OUT to 0 V, and maintains the value. In this way, the output current from the output terminal OUT increases and decreases the voltage of the piezoelectric element of the actuator 1 to drive. In this case, the slew rate is (28 V) / (2.5 μs) = 11.2 V / μs.

  As described above, in this embodiment, the voltage switch circuit 16 connected to the gate terminal of the voltage gate circuit 17 of the nMOS transistor converts the voltage of the output terminal OUT connected to the source terminal of the voltage gate circuit 17 to the voltage of the multiple voltage circuit 11. Since the circuit configuration is limited to the following, in addition to the effects of the first embodiment, the following effects can be obtained. That is, since the multiple voltage circuit 11 is connected to the gate terminal of the voltage gate circuit 17 and its current can be extremely reduced, the circuit scale can be reduced. Thereby, there is an effect that the chip size of the semiconductor integrated circuit of the ink jet driving circuit 2 can be reduced, and the manufacturing cost can be reduced.

<Third Embodiment>
FIG. 6 is a schematic circuit diagram of the actuator drive circuit 10 according to the third embodiment of the present invention. The operation timing of the circuit follows the timing chart of FIG. 3 as in the first embodiment. The third embodiment is different from the first and second embodiments in that, in the third embodiment, the first multiple-output current mirror circuit 13 and the second multiple-output current mirror circuit 14 are used. The voltage gate circuit 17 of the nMOS transistor is provided between the two. The saturation voltage of the output terminal OUT connected to the source electrode of the voltage gate circuit 17 is controlled by electrically connecting the output terminal of the multiple voltage circuit 11 switched by the voltage switch circuit 16 to the gate electrode of the voltage gate circuit 17. It is. Further, a logical product of the signal of the output terminal of the current register circuit 4 and the first switch switching signal UP is formed by the first logical product circuit 18a and input to the input terminal of the first current switch circuit 12a. Thereby, the current switch circuit 12a is turned on only during the first switch switching signal UP, and the current flows through the first multiple output current mirror circuit 13. Similarly, for the current of the second multiple output type current mirror circuit 14, the second AND circuit 18 b forms a logical product of the second switch switching signal DOWN and the signal of the current register circuit 4. To the second current switch circuit 12b. As a result, the current switch circuit 12b is turned ON only during the period of the second switch switching signal DOWN, and a current is passed through the second multiple output current mirror circuit 14. That is, in the present embodiment, the current switch circuits 12a and 12b function as the current drive circuits 15a and 15b, and the current switch circuits 12a and 12b generate the drive current according to the switch switching signal. Different from the embodiment.

  In the present embodiment, the first current switch circuit 12a is switched by the output signal of the AND circuit 18a that inputs the output signal of the current register circuit 4 and the first switch switching signal UP to form a logical product signal. Only during the period of the first switch switching signal UP, the current of the first multiple output current mirror circuit 13 is caused to flow out to the output terminal OUT. Further, the second current switch circuit 12b is switched by the output signal of the AND circuit 18b which inputs the output signal of the current register circuit 4 and the second switch switching signal DOWN to form a logical product signal. As a result, current flows from the output terminal OUT into the second multiple output current mirror circuit 14 only during the period of the second switch switching signal DOWN. Thus, the first current switch circuit 12a is used as the first current drive circuit, and the second current switch circuit 12b is used as the second current drive circuit.

It is a block diagram of the inkjet drive circuit of embodiment of this invention. 1 is a schematic circuit diagram of an actuator drive circuit according to a first embodiment of the present invention. It is a timing chart of operation | movement of the actuator drive circuit of embodiment of this invention. It is a block diagram of the inkjet drive circuit of the 2nd Embodiment of this invention. It is a schematic circuit diagram of the actuator drive circuit of the 2nd Embodiment of this invention. It is a schematic circuit diagram of the actuator drive circuit of the 3rd Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 1a, 1b, 1c, 1n ... Actuator 2 ... Inkjet drive circuit 3 ... Voltage register circuit 4 ... Current register circuit 5 ... Signal register circuit 6 ... Timing signal creation circuit 7 ... Reference current circuit 8 ... Driving current outflow circuit 9 ... Driving current inflow circuit 10, 10a, 10b, 10c, 10n ... Actuator driving circuit 11 ... Multiple voltage circuits 12a, 12b ... Current switch circuit 13 ... first multiple output type current mirror circuit 14 ... second multiple output type current mirror circuit 15, 15a, 15b, 15c, 15d ... current drive circuit 16 ... Voltage switch circuit 17 ... Voltage gate circuit 18a, 18b ... AND circuit 20 ... Control circuit CH1, CH2, CH3, CHn ... Channel OUT ... Power terminal IN · · · drive timing signal UP · · · first switching signal DOWN · · · second switching signal

Claims (8)

  An inkjet recording apparatus having an inkjet head having a plurality of actuators and an inkjet drive circuit, wherein the inkjet drive circuit has a voltage register circuit and a multiple voltage circuit, and has a plurality of actuator drive circuits for driving the plurality of actuators. Ink jet recording comprising: a voltage switch circuit for connecting a voltage terminal of the multiple voltage circuit specified by an output signal of the voltage register circuit independently to a power supply terminal of the actuator drive circuit for each actuator drive circuit apparatus.   An inkjet recording apparatus having an inkjet head having a plurality of actuators and an inkjet drive circuit, wherein the inkjet drive circuit has a voltage register circuit and a multiple voltage circuit, and has a plurality of actuator drive circuits for driving the plurality of actuators. A voltage gate circuit for limiting the output voltage of the actuator drive circuit, and the voltage terminal of the multiple voltage circuit specified by the output signal of the voltage register circuit independently for each actuator drive circuit of the voltage gate circuit An ink jet recording apparatus comprising a voltage switch circuit connected to a gate terminal.   The actuator drive circuit has a reference current circuit, a current switch circuit, and a current register circuit, and the current switch circuit is switched by the output signal of the current register circuit independently for each actuator drive circuit to switch the current at the current terminal. Thus, a multiple output type current mirror circuit for creating a current obtained by increasing the current of the reference current circuit by a magnification specified by the current register circuit is provided, and a drive current corresponding to the increased current is supplied to the actuator drive circuit. The inkjet recording apparatus according to claim 1, further comprising a circuit that outputs from an output terminal.   4. The ink jet recording apparatus according to claim 1, wherein the ink jet driving circuit is composed of a CMOS semiconductor integrated circuit.   An ink jet driving circuit for driving an ink jet head having a plurality of actuators of an ink jet recording apparatus, having a voltage register circuit and a multiple voltage circuit, having a plurality of actuator driving circuits for driving the plurality of actuators, and driving the actuator An ink jet drive circuit comprising: a voltage switch circuit for connecting a voltage terminal of the multiple voltage circuit designated by an output signal of the voltage register circuit to a power supply terminal of the actuator drive circuit independently for each circuit.   An ink jet driving circuit for driving an ink jet head having a plurality of actuators of an ink jet recording apparatus, having a voltage register circuit and a multiple voltage circuit, having a plurality of actuator driving circuits for driving the plurality of actuators, and driving the actuator A voltage gate circuit for limiting an output voltage of the circuit, and the voltage terminal of the multiple voltage circuit specified by the output signal of the voltage register circuit is connected to the gate terminal of the voltage gate circuit independently for each actuator driving circuit; An ink-jet drive circuit comprising a voltage switch circuit for performing the operation.   The actuator drive circuit has a reference current circuit, a current switch circuit, and a current register circuit, and the current switch circuit is switched by the output signal of the current register circuit independently for each actuator drive circuit to switch the current at the current terminal. Thus, a multiple output type current mirror circuit for creating a current obtained by increasing the current of the reference current circuit by a magnification specified by the current register circuit is provided, and a drive current corresponding to the increased current is supplied to the actuator drive circuit. The inkjet drive circuit according to claim 5, further comprising a circuit that outputs from an output terminal.   8. The ink jet driving circuit according to claim 5, comprising a CMOS semiconductor integrated circuit.

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