JP2009014432A - Amplitude/phase detecting device, measurement system using the same and amplitude/phase detecting method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for detecting an amplitude and a phase of a sine-wave signal to be measured by using only a sampling processing, through no orthogonal synchronous detection and no phase detector. <P>SOLUTION: The sine-wave signal to be measured is sampled by using a sampling signal. Obtained samples are marked by using a square mark, a triangular mark, a black square mark and a black triangular mark shown in figure, wherein polarities of the black square mark and the black triangular mark are reversed. An average value of an odd-numbered group is obtained by adding the square mark to the polarity-reversed black square mark. An average value of an even-numbered group is obtained by adding the triangular mark to the polarity-reversed black triangular mark. The amplitude and the phase of the sine-wave signal to be measured are calculated by executing a predetermined calculation based on the average values of the odd-numbered group and the even-numbered group. The period of the sampling signal is set for every quarter about one or more odd number period of the sine-wave signal to be measured, and the phase-synchronization relation between the sine-wave signal to be measured and the sampling signal is conserved mutually. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a technique for detecting the amplitude and phase of a sinusoidal waveform. The present invention is intended to be applied to measurement of amplitude and phase with a vector voltmeter, and measurement of transmission characteristics and reflection characteristics with a vector network analyzer (hereinafter abbreviated as VNA), and does not use synchronous detection or phase detection. An amplitude / phase detection method having a simple configuration is to be provided, and the frequency range of interest extends in principle from a low frequency to a very high frequency such as a microwave or millimeter wave band.

  As a method for measuring the amplitude and phase of a sine wave, a measuring instrument represented by a vector voltmeter has been known. In addition, a method of performing appropriate processing after synchronous detection is known for detection of amplitude and phase related to signal detection in a communication system. Further, in a measurement device for transmission characteristics of a circuit typified by VNA, processing following quadrature synchronous detection or a logarithmic compression amplifier and a phase detector are used for measurement of amplitude and phase.

  Although quadrature synchronous detection and phase detectors are established techniques, they require circuits with a slightly complicated configuration such as quadrature carrier synchronization circuits and quadrature detection circuits. In order to perform digital processing after quadrature synchronous detection or phase detection (these are a kind of analog circuit), an A-D converter is also necessary.

  The present invention directly digitizes a sine wave signal to be measured by a four-phase sampling circuit and a subsequent AD converter, thereby eliminating the need for quadrature synchronous detection or phase detection, and a simple configuration of amplitude and phase by digital processing. A detection method is provided.

A sine wave amplitude / phase detection device according to the present invention,
A sampling circuit that samples the measured sine wave signal as a sampling signal with a signal having a phase synchronization relationship with the measured sine wave signal;
An A / D converter for converting a sample by the sampling circuit into a digital value;
Means for obtaining the polarity and absolute value of the converted digital value, and separating the digital value into an even-numbered group and an odd-numbered group according to the order of sampling in the sampling circuit;
A calculation unit that calculates the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group;
The sampling period of the sampling circuit is set every quarter for one or more odd periods of the sine wave signal to be measured.

It is supplemented by “the sampling period of the sampling circuit is set every quarter for one or more odd periods of the sine wave signal to be measured”.
In the case of one cycle of the measured sine wave signal: 0, 1/4 cycle, 2/4 cycle, 3/4 cycle, and so on. This corresponds to the example of FIG.
In the case of 3 periods of the sine wave signal to be measured: 0, 3/4 period, 4/4 (3/2) period, 4/4 period, and so on.
In the case of 5 periods of the sine wave signal to be measured: 0, 5/4 period, 4/10 (5/2) period, 15/4 period, and so on. (Hereinafter the same)

  Prior to the calculation by the calculation unit, an adder that adds a plurality of sample values for each of the even-numbered group and the odd-numbered group may be provided.

  An amplitude limiting amplifier that converts the measured sine wave signal into a constant amplitude and inputs the amplitude to the sampling circuit; and an amplitude suppression amplifier that suppresses the amplitude of the measured sine wave signal, and based on the output of the amplitude suppression amplifier, The amplitude of the measured sine wave signal may be calculated.

The measurement system according to the present invention is:
A first amplitude / phase detection device and a second amplitude / phase detection device for detecting amplitude / phase for each port of a signal input / output to / from a device under measurement having at least two ports;
A comparison processing unit for comparing the detection result by the first amplitude / phase detection device and the detection result by the second amplitude / phase detection device;
A first oscillator for generating a sampling signal;
A second oscillator for generating a measured sinusoidal signal,
A phase synchronization relationship is maintained between the measured sine wave signal and the sampled signal,
The period of the sampling signal is set every quarter for one or more odd periods of the sine wave signal to be measured,
Each of the first amplitude / phase detection device and the second amplitude / phase detection device includes a sampling circuit that samples the measured sine wave signal based on the sampling signal, and a digital value obtained by sampling the sampling by the sampling circuit. An A / D converter that converts the digital value into a digital value, and obtains the polarity and absolute value of the converted digital value, and converts the digital value into an even-numbered group and an odd-numbered group according to the sampling order in the sampling circuit Means for separating, and a calculation unit that calculates the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group. .

An intermediate frequency oscillator;
A frequency shifter for generating a signal having a frequency of the sum or difference of the frequency of the sine wave to be measured and the intermediate frequency of the intermediate frequency oscillator;
A first frequency converter and a second frequency converter, which respectively convert the signal input to and output from the device under measurement having at least two ports into an intermediate frequency signal by mixing with the output signal of the frequency shift unit; With
The first amplitude / phase detection device and the second amplitude / phase detection device may be configured to detect the amplitude / phase based on the outputs of the first frequency converter and the second frequency converter, respectively. .

The measurement system according to the present invention is:
A directional coupler connected to at least one port of the device under test;
A first amplitude / phase detection device and a second amplitude / phase detection device for detecting the amplitude / phase of the signal output from the directional coupler,
A comparison processing unit for comparing the detection result by the first amplitude / phase detection device and the detection result by the second amplitude / phase detection device;
A first oscillator for generating a sampling signal;
A second oscillator for generating a measured sinusoidal signal,
A phase synchronization relationship is maintained between the measured sine wave signal and the sampled signal,
The period of the sampling signal is set every quarter for one or more odd periods of the sine wave signal to be measured,
The measured sine wave signal is input to the measured device via the directional coupler,
Each of the first amplitude / phase detection device and the second amplitude / phase detection device includes a sampling circuit that samples the measured sine wave signal based on the sampling signal, and a digital value obtained by sampling the sampling by the sampling circuit. An A / D converter that converts the digital value into a digital value, and obtains the polarity and absolute value of the converted digital value, and converts the digital value into an even-numbered group and an odd-numbered group according to the sampling order in the sampling circuit Means for separating, and a calculation unit that calculates the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group. .

The amplitude / phase detection method according to the present invention includes:
Sampling a measured sinusoidal signal with a sampling signal;
The obtained samples are set as the first sample point, the second sample point, the third sample point, and the fourth sample point in the sampled order, and the set of the first sample point and the third sample point and the second sample point For the fourth set of sample points, reversing the other polarity with respect to one sample of each set;
Adding the sample value of the first sample point and the sample value of the third sample point to obtain the average value of the odd-numbered set;
Adding the sample value of the second sample point and the sample value of the fourth sample point to obtain an average value of the even-numbered set;
Calculating the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the average value of the odd-numbered group and the average value of the even-numbered group; and
The period of the sampled signal is set every quarter for one or more odd periods of the measured sine wave signal, and the measured sine wave signal and the sampled signal are in phase synchronization with each other. It is what is being held.

<Basic principle>
FIG. 1 is a waveform diagram (one example) for explaining the basic principle of an amplitude / phase detection method (four-phase sampling of a sine wave to be measured) according to an embodiment of the present invention. FIG. 2 is a process flowchart of the amplitude / phase detection method according to the embodiment of the present invention.

  FIG. 1 shows a waveform of f (t / T) = A sin (2πt / T + π / 6) (A = 1 in this case). The horizontal axis is t / T (t is time, T is the period of the sine wave to be measured).

  The measured sine wave is sampled with a sampling pulse having a repetition frequency that is exactly four times the frequency of the measured sine wave (S1 in FIG. 2). In FIG. 1, the phase of the sampling pulse normalized by the period of the sine wave to be measured is (t / T = 0, 1/4, 2/4, 3/4,...) In FIG. At this time, the sample points for the sine wave to be measured are indicated by the series □, Δ, ■, ▲. Hereinafter, such sampling is referred to as four-phase sampling.

  In the case of FIG. 1, the instantaneous values (ie, sample values) of the measured sine waves at the sample points for the □ and ■ and △ and ▲ pairs are A sin (π / 6) and A sin (7π / 6) = -A sin (π / 6), ... and A sin (2π / 3) = A cos (π / 6), A sin (5π / 3) = -A sin (2π / 3) =- A cos (π / 6), etc. A pair of □ and ■ is called a sine series, and a pair of △ and ▲ is called a cosine series.

  These two sets of sample sequences form orthogonal sample sequences. Invert the polarity of the sample values (1) and (2) (S2 in FIG. 2) and add N (N = 2, 4, 6,...) Sample values for each set of squares and triangles (FIG. 2). S3), s (N) = AN sin (π / 6) and c (N) = AN cos (π / 6). Obviously, s (N) is a negative value when the initial phase is not π / 6, for example 7π / 6.

  If c (N) and s (N) are combined as vector components orthogonal to each other, one combined vector is obtained. That is, the amplitude and phase of the sine wave to be measured can be detected by performing the following equations (1) and (2) on c (N) and s (N) (S4 in FIG. 2). .

  When c (N) is close to 0 in the calculation of θ (when the curve in FIG. 1 moves to the left and the maximum value approaches 0 on the horizontal axis), Equation (2) Instead, the following equation (3) may be calculated.

  The θ detected in this way gives the phase of the measured sine wave with reference to the sampling pulse indicated by □.

<Specification of sampling process of basic principle>
In the following description, the waveforms of signals transmitted from several oscillators are sine waves. In some circuits driven thereby, the waveform handled may be a square wave. Since waveform conversion from a sine waveform to a square waveform or vice versa is easy, the description of waveform conversion in individual component blocks is omitted in the following description, including the case where the oscillator sends a square waveform. .

FIG. 3 is a block diagram showing an embodiment of the sampling process based on the basic principle described above.
In FIG. 3, reference numeral 1 denotes an oscillator having a frequency of 4fi (hereinafter referred to as a 4fi oscillator). fi is a frequency corresponding to 1 / T in the basic principle. The output of the 4fi oscillator 1 is sent to the sampling circuit 2 and the four-stage ring counter 3. The 4-stage ring counter functions as a kind of frequency divider, and the output of the first stage (symbol a in FIG. 3) is sent to a PLL (phase-locked loop) oscillator 4 having a frequency fi. The PLL 4 generates a measured sine wave that is phase-synchronized with one output signal of the four-stage ring counter 3 (symbol a in FIG. 3). That is, the phase of the output signal of the PLL 4 is adjusted so as to have a certain relationship with the phase of the output signal of the four-stage ring counter 3. The output signal of the PLL 4 is applied to the sampling circuit 2. The sampling circuit 2 samples the measured sine wave of the output of the PLL 4 four times per period using a sampling pulse generated by shaping the applied sine wave.

  The output samples sampled by the sampling circuit 2 are a series of sample values indicated by □, Δ, ■, ▲,... In FIG. The output sample series of the sampling circuit 2 is guided to the A-D converter 5 where it is converted into a digital numerical series. The digital numerical sequence output from the A-D converter 5 is sent to the polarity inversion unit 6. The polarity inversion unit 6 inverts the polarity of the sample values indicated by ■ and ▲ in FIG. Since the output signals of the third stage (symbol c in FIG. 3) and the fourth stage (symbol d in FIG. 3) of the 4-stage ring counter 3 have timings corresponding to the sample values whose polarities are to be inverted, The polarity inversion operation can be executed by these signals. If the output digital numerical value sequence of the A-D converter 5 is composed of a polarity bit and an absolute value bit sequence, the polarity inversion operation may be simply inversion of the polarity bit. In this case, the four-stage ring counter 3 may be a simple 1/4 frequency divider.

  The output signal of the polarity inversion unit 6 is sent to the selection unit 7. The selection unit 7 controls the output signal from each stage of the four-stage ring counter 3 to separate the digital numeric series coming from the polarity inversion unit 6 into two numeric series of □, sine series, and Δ, cosine series. The sine sequence signal and the cosine sequence numeric sequence are mutually orthogonal components of one vector. Each of the separated numerical series is added by N (N = 2, 4, 8,...) Individually by adders 8 and 9, and each result is averaged by dividing the addition result by N. Value can be obtained.

  The addition and division processes can be easily executed as follows. When each series of signals is expressed by an integer value of binary k bits, for example, N = 2n (n is a positive integer) is selected, and the upper k bits of the addition result may be simply selected. This averaging process is for reducing errors caused by noise in the process of sampling and A-D conversion, and can be omitted if unnecessary.

  By sending the addition results by the adders 8 and 9 to the calculation unit 10, the calculation shown in the equations (1) and (2) (or (3)) can be performed.

  Note that the circuit 11 (the main body of the sine wave amplitude / phase detection device) 11 indicated by the one-dot chain line in FIG. 3 is also used in the embodiments described later.

FIG. 4 is a timing chart (an example) of the circuit of FIG.
The graph of FIG. 4 shows, in order from the top, the output signal fi of the PLL oscillator 4, the output signal 4fi of the oscillator 1, the sampling signal (pulse) of the sampling circuit 2, and a, b, c, d shows output.

  The output signal 4fi is a signal having a frequency four times that of the output signal fi. A phase synchronization relationship is maintained between these two signals (in the example of FIG. 3, the output a of the four-stage ring counter 3 is input to the PLL oscillator 4). In FIG. 4, the output signal 4fi and the output signal fi are simultaneously 0 at the origin, but this is an example. The present invention also includes a case in which both are not 0 at the same time.

  In the example of FIG. 4, the sampling circuit 2 samples the output signal fi at the rising edge of the sampling signal. Although the output signal 4fi (sine wave) of the oscillator 1 is converted into a sampling signal (pulse signal), as described above, it is easy to convert the waveform from a sine waveform to a square waveform or vice versa. Description of waveform conversion is omitted.

  The output a of the four-stage ring counter 3 is a signal for identifying □ which is the first sampling. Similarly, outputs b, c, and d are signals for identifying Δ, ■, and ▲.

  Based on the output a of the four-stage ring counter 3, it can be identified that the digital signal output from the AD converter 5 is □, that is, sine series data.

  From the output b of the four-stage ring counter 3, it is possible to identify that the digital signal output from the AD converter 5 is Δ, that is, cosine series data.

  Based on the output c of the four-stage ring counter 3, the digital signal output from the AD converter 5 at this time is ■, that is, it is sine series data and its polarity should be reversed. Can do.

  Based on the output d of the four-stage ring counter 3, it is possible to identify that the digital signal output from the A / D converter 5 at that time is す な わ ち, that is, the cosine series data and the polarity should be inverted. it can.

  In addition, the process of the part from the polarity inversion part 6 to the calculating part 10 can also be performed by hardware, and those one part or all can also be performed by a software process. Further, the order of the polarity inversion unit 6 and the selection unit 7 may be exchanged.

  The method for synchronizing the output of the four-stage ring counter 3 and the PLL oscillator 4 with each other includes the configuration shown in FIG. 5 in addition to the configuration shown in FIG.

  In FIG. 5, 12 is a phase comparator (Phase Comparator PC). In FIG. 5, the PLL oscillator 4 in FIG. 3 is changed to a free-running oscillator 4, and the 4fi oscillator 1 is a VCO (voltage controlled oscillator).

  In FIG. 3, the output signal of the four-stage ring counter 3 is input to the PLL oscillator 4, so that the PLL oscillator 4 is controlled to have a certain relationship with the phase of the output signal of the four-stage ring counter 3.

  On the other hand, in FIG. 5, the phase comparator 12 operates with the signal of the frequency fi, and the 4fi oscillator 1 is controlled by the output of the phase comparator 12 so that the phase synchronization with the frequency fi is established. That is, the loop circuit composed of the 4fi oscillator 1, the four-stage ring counter 3, and the phase comparator 12 constitutes one PLL although the operating frequency is partially different in the loop circuit.

  In the various embodiments described below, for the sake of simplicity, a circuit employing the configuration shown in FIG. 5 is shown. However, it is obvious that the configuration of the format shown in FIG. 3 can also be used.

  In the following description, an embodiment for further modifying the operational characteristics for practical use will be described.

  The first variation is a reduction in sampling frequency. When sampling the measured sine wave signal in four phases, the sampling frequency has been set to 4 fi in the above description. If the frequency fi is relatively small, sampling at 4 fi is not necessarily a serious obstacle to practical use. However, there are cases where it is desired to select a low sampling frequency so that sampling and A-D conversion operations can be performed without difficulty even in the case of large fi. The reduced sampling technique of sampling a signal at a lower frequency has already been implemented on a sampling oscilloscope.

  However, in order to apply the principle of the present invention, the sampling frequency must be set so that substantially four-phase sampling is performed. This can be performed by the circuit shown in FIG. FIG. 6 shows an embodiment in which a part of the circuit configuration shown in FIG. 5 is changed.

  In FIG. 6, a 1 / N frequency divider 20 is newly inserted between the 4fi oscillator 1 and the sampling circuit 2. In this case, N is an appropriate odd number (the sampling period is set every quarter for one or more odd periods of the sine wave to be measured having the frequency fi). With this setting, sampling is performed four times for each 4N period of a sine wave with a frequency of 4 fi. Therefore, when converted to the period of a sine wave to be measured with a frequency fi, four points are obtained during the period of the N period. Sampling will be performed.

  For example, when N = 11, the sampling point interval is every N / 4 = 2.75 periods of a sine wave of frequency fi. This sampling process will be described in more detail. In the case of N = 3, 7, 11, 15..., The order of Δ and ▲ is opposite to that in FIG. 1, and the sequence order is □, ▲, ■, Δ,. In the case of N = 5, 9, 13,..., The same as in FIG. Therefore, in the case of N = 3, 7, 11, 15,..., The polarity inversion connection may be made as follows. That is, the output from the d terminal of the four-stage ring counter 3 in FIGS. 3, 5, 6 and 7 described later is changed to the output from the b terminal. As a result, the phase of the polarity inversion of the series changes, but the fact that the four-phase sampling is substantially realized is not changed.

The second modification is a measure for further expanding the dynamic range.
Although it is easy to improve the S / N ratio of the signal under measurement to such an extent that it does not cause a practical problem by the filter, the number of quantization bits of the AD converter cannot be increased as much as possible. FIG. 7 shows a modification method in the case where a dynamic range exceeding the limit of quantization noise is required. FIG. 7 shows an embodiment in which a part of the circuit configuration shown in FIG. 3 is changed.

  In FIG. 7, the circuit connected from the PLL oscillator 4 to the sampling circuit 2 is divided into two, one connected to the amplitude limiting amplifier 21 and the other connected to the logarithmic amplifier 22.

  The amplitude limiting amplifier 21 has sufficient amplification even for a small amplitude input signal, and sends out a constant amplitude output signal having a large amplitude equal to that of a large amplitude input signal. Therefore, a signal with a large amplitude is always applied to the sampling circuit 2. Therefore, the A-D converter 5 can always be operated within the allowable maximum amplitude range, and deterioration due to quantization noise can be ignored.

  Since the signal passing through the amplitude limiting amplifier 21 has a constant amplitude, the amplitude information is lost. For this reason, the processing following the A-D converter 5 is used only for detecting phase information. The detected phase information is output from the calculation unit 10.

  To detect the lost amplitude information, a logarithmic amplifier 22 and an A / D converter 23 following the logarithmic amplifier 22 are used. The logarithmic amplifier 22 is a typical example of an amplitude suppression amplifier, and sends out a DC output signal that is substantially proportional to the logarithm of the input signal with respect to a wide dynamic range of the amplitude of the input signal. This output signal is A / D converted by the A / D converter 23, whereby the amplitude information of the input signal of the logarithmic amplifier 22 can be taken out as a digital signal, and can be sent out as an amplitude output.

  By combining the two result outputs, information equivalent to the result output by the circuit of FIG. 3 can be obtained. According to the circuit of FIG. 7, since the influence of the quantization noise of the A-D converter 5 is avoided, the S / N ratio of the phase information can be improved.

  Further, by introducing an appropriate band limiting filter and an adder circuit similar to the adder circuits 8 and 9 in FIG. 3 into the system of the logarithmic amplifier 22, the S / N ratio of the amplitude information is compared with the configuration of FIG. It can also be greatly improved.

  According to the circuit of FIG. 7, it is possible to greatly expand the dynamic range of a signal that can be processed for both amplitude and phase detection as compared with the case of FIG. 3.

<Amplitude / phase detection as a measuring instrument>
The above basic principle simply shows the principle of executing the detection of the relative phase between the amplitude detection and the sampling pulse timing for a certain sine wave by the four-phase sampling. In actual application, it is required to detect an amplitude ratio and a phase difference between a sine wave to be measured as a reference and a sine wave to be measured after being deformed by a certain circuit or system. An example of how the above basic principles are applied for this purpose is described below.

  FIG. 8 shows an embodiment for measuring the transmission characteristics of a DUT (device under test) 13 using the above principle. The DUT 13 is an electric circuit such as a filter. In FIG. 8, two circuits 11 surrounded by a rectangular dotted line in FIG. 3 are used (11-1, 11-2). The operation principle of these two circuits 11-1 and 11-2 is exactly the same as that in the case of FIG.

  As can be seen from FIG. 3, the result output of the circuit 11-1 gives the amplitude of the input signal of the DUT 13 and the phase (based on the sampling time), and the result output of the circuit 11-2 is the output of the DUT 13. Give the amplitude and phase of the signal. Therefore, by processing the two result outputs by the comparison processing unit 14, it is possible to detect a change in amplitude and a phase transition that are received when a signal passes through the DUT 13. This comparison processing is usually executed by digital arithmetic processing with the aid of software, but can also be executed by hardware.

  In the description so far, the oscillator 4 has been set to the fixed frequency fi. However, if this is replaced with a sweep oscillator and the fi is variable, the characteristics of the DUT can be measured over a wide band.

In FIG. 8, the phase comparator 12 operates with the signal from the circuit 11-1, but may be configured to operate with the signal from the circuit 11-2 (in FIGS. 9 and 10). The same).
In FIG. 8, the circuits 11-1 and 11-2 are separately arranged, but the function of one circuit 11-1 is shared in time division with other circuits 11-2. Is also possible.

  Although FIG. 8 shows an example of measuring the transmission characteristics of the DUT 13, when measuring the reflection characteristics, a directional coupler is installed on the input side of the DUT 13 to separate the input signal and the reflected signal. Thus, the two separated signals may be input to the circuits 11-1 and 11-2, respectively. An example of the circuit is shown in FIG.

  The configuration shown in FIG. 8 is suitable for measurement in a relatively low frequency band. When targeting the high frequency band, for example, the microwave band or the millimeter wave band, or reducing the noise bandwidth of the measurement system even in the low frequency band, the frequency is converted to the narrow intermediate frequency band and the amplitude is・ It is desirable to measure the phase. An example of the configuration in this case is shown in FIG.

  In FIG. 10, 4 is a free-running oscillator that generates a frequency fi. In the above description, the possibility that the free-running oscillator 4 is a sweep oscillator has been described. However, in the configuration of FIG. 10, the frequency of the free-running oscillator 4 is a constant value fi. This frequency becomes an intermediate frequency as will be described later.

  Reference numeral 16 denotes an oscillator that generates a frequency fs to be measured by the DUT 13. Although fs may be a fixed frequency oscillator, it is generally a variable frequency by a sweep oscillator. Hereinafter, 16 will be referred to as a sweep oscillator. This is because the function of the free-running oscillator 4 described in the above description is given to the sweep oscillator 16 instead of the sweep oscillator.

  A frequency shift PLL 17 mixes the output signal of the sweep oscillator 16 (frequency is fs) and the output signal of the free-running oscillator 4 (frequency is fi) to generate either frequency fs + fi or fs-fi. PLL. Since the operating principle of the method of the present invention does not change regardless of which frequency is used, the operation of the frequency shift PLL 17 is assumed to generate the frequency fs + fi in the following description.

  Reference numerals 18-1 and 18-2 denote frequency converters each having a function of taking a signal of frequency fs + fi as a local oscillator and adding an input signal of frequency fs and a component of difference frequency fi. is there. As can be easily understood from this, the frequency of the output signals of the frequency converters 18-1 and 18-2 is always a constant frequency fi, no matter how the frequency of the sweep oscillator 16 changes.

  Reference numerals 19-1 and 19-2 denote circuits composed of bandpass filters and amplifiers in the intermediate frequency band. Hereinafter, these are abbreviated as IF-1 and IF-2. With the functions of IF-1 and IF-2, signals having a good S / N ratio can be output even when the input signal level of these circuits is very small.

  If a standard device with various parameters known (for example, one with zero loss / phase shift) can be used in place of the DUT 13, only one circuit 11 is required. One embodiment of the configuration in this case is shown in FIG.

  In FIG. 11, the amplitude / phase of the DUT 13 is measured, and the result is stored in the comparison processing unit 14. Next, a standard device is connected instead of the DUT 13 to measure the amplitude and phase. By comparing the result with the result stored in the comparison processing unit 14, a result equivalent to the case of FIG. 8 can be obtained. The order may be reversed and the standard device may be connected first.

  The present invention is not limited to the above embodiments, and various modifications can be made within the scope of the invention described in the claims, and these are also included in the scope of the present invention. Needless to say.

It is a wave form diagram which shows four-phase sampling of the sine wave for demonstrating the basic principle of the amplitude and phase detection system which concerns on embodiment of this invention. It is a processing flowchart of the amplitude / phase detection method according to the embodiment of the present invention. It is a block diagram which shows an example of the circuit structure for implement | achieving the amplitude and phase detection system which concerns on embodiment of this invention. 4 is a timing chart for explaining the operation of the circuit of FIG. 3. It is a block diagram which shows the other example of the circuit structure for implement | achieving the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows the other example of the circuit structure for implement | achieving the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows the other example of the circuit structure for implement | achieving the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows an example of the circuit structure of the amplitude and phase detection system using the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows the other example of the circuit structure of the amplitude and phase detection system using the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows the other example of the circuit structure of the amplitude and phase detection system using the amplitude and phase detection system which concerns on embodiment of this invention. It is a block diagram which shows the other example of the circuit structure of the amplitude and phase detection system using the amplitude and phase detection system which concerns on embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 4fi oscillator 2 Sampling circuit 3 4 step | paragraph ring counter 4 fi oscillator 5 AD converter 6 Polarity inversion part 7 Selection part 8,9 Adder 10 Calculation part 11 Circuit (the main body of the amplitude / phase detection apparatus of a sine wave)
12 Phase Comparator PC
13 DUT (device under test)
14 Comparison processing unit 15 Directional coupler 16 fs oscillator (sweep oscillator)
17 Frequency shift block (Frequency shift PLL)
18 Frequency converter 19 A circuit (IF) comprising an intermediate frequency band pass filter and an amplifier
20 1 / N Frequency Divider 21 Amplitude Limiting Amplifier 22 Logarithmic Amplifier 23 AD Converter □ Sine Sequence Sampling Point (First Sampling Point): Odd-numbered Sampling Sequence △ cosine Sequence Sampling Point (Second Sampling) Point): Even numbered group of sample series ■ Sample point of sine series (third sample point): Odd numbered group of sample series ▲ Sample point of cosine series (fourth sample point): Even numbered group of sample series

Claims (7)

A sampling circuit that samples the measured sine wave signal as a sampling signal with a signal having a phase synchronization relationship with the measured sine wave signal;
An A / D converter for converting a sample by the sampling circuit into a digital value;
Means for obtaining the polarity and absolute value of the converted digital value, and separating the digital value into an even-numbered group and an odd-numbered group according to the order of sampling in the sampling circuit;
A calculation unit that calculates the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group;
The sampling period of the sampling circuit is set for every quarter of one or more odd periods of the sine wave signal to be measured.   2. The sine wave amplitude according to claim 1, further comprising: an adder that adds a plurality of sample values for each of the even-numbered group and the odd-numbered group prior to the calculation by the calculation unit. Phase detector.   An amplitude limiting amplifier that converts the measured sine wave signal into a constant amplitude and inputs the amplitude to the sampling circuit; and an amplitude suppression amplifier that suppresses the amplitude of the measured sine wave signal, and based on the output of the amplitude suppression amplifier, 2. The sine wave amplitude / phase detection device according to claim 1, wherein the amplitude of the sine wave signal to be measured is calculated. A first amplitude / phase detection device and a second amplitude / phase detection device for detecting amplitude / phase for each port of a signal input / output to / from a device under measurement having at least two ports;
A comparison processing unit for comparing the detection result by the first amplitude / phase detection device and the detection result by the second amplitude / phase detection device;
A first oscillator for generating a sampling signal;
A second oscillator for generating a measured sinusoidal signal,
A phase synchronization relationship is maintained between the measured sine wave signal and the sampled signal,
The period of the sampling signal is set every quarter for one or more odd periods of the sine wave signal to be measured,
Each of the first amplitude / phase detection device and the second amplitude / phase detection device includes a sampling circuit that samples the measured sine wave signal based on the sampling signal, and a digital value obtained by sampling the sampling by the sampling circuit. An A / D converter that converts the digital value into a digital value, and obtains the polarity and absolute value of the converted digital value, and converts the digital value into an even-numbered group and an odd-numbered group according to the sampling order in the sampling circuit A means for separating, and a calculation unit that calculates an amplitude and a phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group. Measuring system. An intermediate frequency oscillator;
A frequency shifter for generating a signal having a frequency of the sum or difference of the frequency of the sine wave to be measured and the intermediate frequency of the intermediate frequency oscillator;
A first frequency converter and a second frequency converter, which respectively convert the signal input to and output from the device under measurement having at least two ports into an intermediate frequency signal by mixing with the output signal of the frequency shift unit; With
The first amplitude / phase detection device and the second amplitude / phase detection device detect amplitude / phase based on outputs of the first frequency converter and the second frequency converter, respectively. 4. The measurement system according to 4. A directional coupler connected to at least one port of the device under test;
A first amplitude / phase detection device and a second amplitude / phase detection device for detecting the amplitude / phase of the signal output from the directional coupler,
A comparison processing unit for comparing the detection result by the first amplitude / phase detection device and the detection result by the second amplitude / phase detection device;
A first oscillator for generating a sampling signal;
A second oscillator for generating a measured sinusoidal signal,
A phase synchronization relationship is maintained between the measured sine wave signal and the sampled signal,
The period of the sampling signal is set every quarter for one or more odd periods of the sine wave signal to be measured,
The measured sine wave signal is input to the measured device via the directional coupler,
Each of the first amplitude / phase detection device and the second amplitude / phase detection device includes a sampling circuit that samples the measured sine wave signal based on the sampling signal, and a digital value obtained by sampling the sampling by the sampling circuit. An A / D converter that converts the digital value into a digital value, and obtains the polarity and absolute value of the converted digital value, and converts the digital value into an even-numbered group and an odd-numbered group according to the sampling order in the sampling circuit A means for separating, and a calculation unit that calculates an amplitude and a phase of the measured sine wave signal by performing a predetermined calculation based on the even-numbered group and the odd-numbered group. Measuring system. Sampling a measured sinusoidal signal with a sampling signal;
The obtained samples are set as the first sample point, the second sample point, the third sample point, and the fourth sample point in the sampled order, and the set of the first sample point and the third sample point and the second sample point For the fourth set of sample points, reversing the other polarity with respect to one sample of each set;
Adding the sample value of the first sample point and the sample value of the third sample point to obtain the average value of the odd-numbered set;
Adding the sample value of the second sample point and the sample value of the fourth sample point to obtain an average value of the even-numbered set;
Calculating the amplitude and phase of the measured sine wave signal by performing a predetermined calculation based on the average value of the odd-numbered group and the average value of the even-numbered group; and
The period of the sampled signal is set every quarter for one or more odd periods of the measured sine wave signal, and the measured sine wave signal and the sampled signal are in phase synchronization with each other. An amplitude / phase detection method characterized by being held.

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