JP2008300642A - Manufacturing method for semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device that can reduce differences in behavior of a resistor element. <P>SOLUTION: This presents a manufacturing method for a semiconductor device that has an MOS transistor 10 and a thin film resistance element 30 on one and the same silicon substrate 1, which includes the steps of forming a thin film resistance element 30 on an interlayer insulating film 40 after a top layer electrode 27 has been formed and performing laser annealing treatment on this thin film resistance element 30 to modify its behavior. Compared to a batch type annealing treatment using a furnace or a hot plate, this method will allow differences in annealing temperature to lower from wafer to wafer in a lot and at each position within the wafer. Further, this method does not heat the whole silicon substrate 1, but can heat only the thin film resistance element 30 up to a desired temperature, and thus, this will enable the laser annealing temperature to be set to a high temperature. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to characteristic modification of a resistor element.

  For example, in a semiconductor device having an analog circuit function, a high-performance resistance element with a small resistance value variation with respect to a temperature change is required. Conventionally, such a resistance element is constituted by a chip separate from the semiconductor element, and the resistance element and the semiconductor element formed separately are mounted on one wiring board to constitute a semiconductor device. However, in recent years, with the miniaturization and miniaturization of semiconductor devices, a method of forming a resistance element and a semiconductor element on the same chip instead of the same wiring board is becoming mainstream.

  FIG. 6 is a cross-sectional view showing a configuration example of a semiconductor device 200 according to a conventional example. The semiconductor device 200 has an analog circuit function, and has a MOS transistor 110 and a thin film resistance element 130 on the same silicon substrate 101 as shown in FIG. FIG. 7 is a flowchart showing a method for manufacturing the semiconductor device 200. Hereinafter, a method for manufacturing the semiconductor device 200 according to the conventional example will be described with reference to FIGS.

  In step d <b> 1 of FIG. 7, after forming the element isolation layer 103 on the silicon substrate 101, a gate oxide film 111 is formed on the silicon substrate 101. Next, in step d2 of FIG. 7, a polysilicon film, for example, is formed on the gate oxide film 111, and the gate electrode 113 is formed by patterning the polysilicon film. In step d3 in FIG. 7, a sidewall 115 made of an insulating film is formed on the sidewall of the gate electrode 113. Further, before and after the step of forming the sidewall 115, impurities 116 are ion-implanted using the gate electrode 113 as a mask to form the source 116 and the drain 117. Thereafter, in step d4 in FIG. 7, the entire silicon substrate 101 including the source 116 and the drain 117 is annealed to characterize the transistor.

  Next, in step d5 of FIG. 7, a resistor material is formed, and this is patterned by photolithography and dry etching techniques to form the thin film resistance element 130. 7, the silicon substrate 101 on which the thin film resistor element 130 is formed is placed in a furnace (furnace) or on a hot plate, and the entire silicon substrate 101 is subjected to an annealing process, so that the thin film resistor element is obtained. Modify 130 properties. Here, the characteristic modification is to reduce the temperature dependence of the resistance value, that is, to reduce the temperature coefficient of resistance. The thin film resistance element 130 can be improved in performance by the characteristic modification.

Next, in step d7 of FIG. 7, for example, contacts 121 made of a wiring material film are formed on the gate electrode 113 of the MOS transistor 110 and on the source 116 and the drain 117, respectively. Next, in step d8 of FIG. 7, the first wiring layer 123 is formed, in step d9 the second wiring layer 125 is formed, and in step d10, the uppermost layer electrode 127 is formed. After the uppermost layer electrode 127 is formed, a passivation film 151 is formed on the entire upper surface of the interlayer insulating film 141. Then, in step d11 of FIG. 7, the entire silicon substrate 101 after the formation of the passivation film 151 is annealed, for example, the gate electrode 113, the source 116 and the drain 117 (or a barrier metal covering them), It promotes alloying with the wiring and alloying between the thin film resistance element 130 (or the barrier metal covering it) and the wiring. Here, the wiring refers to the contact 121, the first wiring layer 123, the second wiring layer 125, and the uppermost layer electrode 127.
Thereby, the reliability of the said wiring can be improved. Thereafter, in step d12, the silicon substrate 101 before dicing is set in a prober, and the characteristics of the thin film resistance element 130 are inspected.
JP 2002-261237 A

By the way, in the prior art, the characteristic modification of the thin film resistance element is performed by a batch type annealing process using a furnace or a hot plate. In such a batch-type annealing treatment, the temperature varies between wafers and at each position in the wafer surface, which causes variations in the characteristics of the thin film resistance element.
Accordingly, the present invention has been made in view of such circumstances, and an object of the present invention is to provide a method of manufacturing a semiconductor device that can reduce variations in characteristics of resistor elements.

  [Invention 1 and 2] In order to solve the above-mentioned problems, a manufacturing method of a semiconductor device of Invention 1 is a manufacturing method of a semiconductor device comprising a semiconductor element and a resistor element on the same substrate, wherein the resistor And a step of modifying the characteristics of the device by irradiating the device with laser light. Here, the “characteristic” of the resistor element is, for example, the temperature dependence of the resistance value, and is a characteristic indicated by a resistance temperature coefficient. Although the resistance value of the resistor element varies with temperature change, the temperature dependence of the resistance value can be reduced by subjecting the resistor element to heat treatment to improve its characteristics.

  According to a second aspect of the present invention, there is provided a semiconductor device manufacturing method comprising: forming a semiconductor element on the substrate; forming a first interlayer insulating film on the substrate so as to cover the semiconductor element; and on the first interlayer insulating film. A step of forming a second interlayer insulating film directly or via one or more interlayer insulating films, a step of forming a resistor element on the second interlayer insulating film, Irradiating a laser beam, wherein the second interlayer insulating film is an uppermost interlayer insulating film.

  According to the method for manufacturing a semiconductor device of the first and second aspects, the characteristics are modified by irradiating each resistive element formed in a substrate (for example, a wafer) with a laser beam. Therefore, as compared with batch-type annealing using a furnace or a hot plate, it is possible to reduce the variation in annealing temperature between wafers in a lot or at each position in the wafer surface. Thereby, the characteristic variation after the modification | reformation of a resistor element can be reduced, and the precision deterioration of the characteristic by a modification process can be suppressed.

  Also, according to such a method, unlike batch annealing using a furnace or a hot plate, the entire substrate is not heated, but only the resistor elements formed in the substrate are heated to a desired temperature. Can be heated. Therefore, the processing temperature of laser annealing can be set to a high temperature only by the convenience of the resistor element without considering the diffusion of impurities contained in the semiconductor element or the like. As a result, the resistor element can be modified at a high temperature without impairing the characteristics and reliability of the semiconductor element.

In the prior art, the heat treatment temperature for characteristic modification must be limited to a low temperature in consideration of the influence on the characteristics and reliability of the semiconductor element, but according to the present invention, only the resistor element has a high temperature. Therefore, it is not necessary to limit the heat treatment temperature for property modification to a low temperature. A high-temperature reforming process is possible, and a thin film material requiring a high temperature for the reforming process can be used as the resistor element.
Further, according to the method of manufacturing a semiconductor device of the second aspect, it is not necessary to apply a thermal stress to the resistor element when forming at least the second interlayer insulating film.

  [Invention 3] According to the method for manufacturing a semiconductor device of Invention 3, in the method for manufacturing a semiconductor device of Invention 2, before the step of forming the wiring above the substrate and the step of forming the resistor element, And a step of subjecting the substrate to a heat treatment for improving the reliability of the wiring. According to such a method, not only the thermal stress when forming the interlayer insulating film, but also the thermal stress when improving the reliability of the wiring need not be applied to the resistor element. Therefore, it is possible to prevent an excessive thermal stress from being applied to the resistor element, and it is possible to prevent the characteristic of the resistor element from fluctuating due to a thermal stress other than the characteristic modification.

  [Invention 4] A method of manufacturing a semiconductor device of Invention 4 is the method of manufacturing a semiconductor device of Invention 2 or 3, wherein a passivation film is formed on the second interlayer insulating film so as to cover the resistor element. Etching the passivation film to form an opening exposing the surface of the resistor element, and irradiating the resistor element with laser light through the opening This is a step of irradiating the surface of the resistor element with laser light. According to such a method, it is possible to directly irradiate the surface of the resistor element with the laser beam, so that it is possible to suppress the attenuation of the laser power due to the transmission through the passivation film. Therefore, the resistor element can be modified efficiently.

  [Invention 5] A method of manufacturing a semiconductor device of Invention 5 includes a step of forming a passivation film on the second interlayer insulating film so as to cover the resistor element in the method of manufacturing a semiconductor device of Invention 2 or Invention 3. A step of etching the passivation film to form an opening on the surface of the resistor element, leaving a part of the passivation film, and irradiating the resistor element with a laser beam. Then, the surface of the resistor element is irradiated with laser light through the passivation film left on the surface of the resistor element. According to such a method, the deterioration of the reliability of the resistor element can be prevented, and at the same time, the attenuation of the laser power caused by passing through the passivation film can be suppressed. Therefore, the resistor element can be modified efficiently.

  [Invention 6] The method of manufacturing a semiconductor device of Invention 6 is the method of manufacturing a semiconductor device of Invention 4 or 5, wherein the substrate on which the resistor element is formed is subjected to a heat treatment using a furnace or a hot plate. Further, in the step of irradiating the resistor element with the laser beam, the laser beam is irradiated onto the substrate after the heat treatment using the furnace or the hot plate is performed.

  According to such a method, an advantage of batch processing using a furnace or a hot plate (that is, a plurality of chips formed on the same substrate can be processed at a time and efficiency is high), and laser annealing is used. Both advantages of the single wafer processing (that is, the point where there is little variation in the annealing temperature between wafers and at each position in the wafer surface) can be utilized. Therefore, the characteristics of the resistor element can be modified relatively uniformly and with high efficiency.

  [Invention 7] The manufacturing method of a semiconductor device of Invention 7 is the manufacturing method of the semiconductor device according to any one of Inventions 1 to 6, wherein the resistor element is irradiated before the step of irradiating the resistor element with laser light. The method further includes a step of forming on the substrate a guard ring that surrounds the substrate in plan view. According to such a method, it is possible to protect the semiconductor element and the wiring from the scattered component (that is, the scattered light) of the laser light, so that the influence of the scattered light (for example, unintended characteristic fluctuation in the semiconductor element or the wiring) And a decrease in reliability).

[Invention 8 to 10] A method for manufacturing a semiconductor device according to Invention 8 is the method for manufacturing a semiconductor device according to any one of Inventions 1 to 7, wherein after the step of irradiating the resistor element with laser light, the resistor The method further includes the step of inspecting the characteristics of the body element.
According to a ninth aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the eighth aspect of the present invention, further comprising: further irradiating the resistor element with laser light based on the result of the inspection to further improve the characteristics thereof Furthermore, it is characterized by including.

A method of manufacturing a semiconductor device according to a tenth aspect of the present invention is the method for manufacturing a semiconductor device according to any one of the first to seventh aspects of the present invention, wherein a step (A) of inspecting the characteristics of the resistor element and A step (B) for determining whether or not additional light irradiation is necessary. If the determination is necessary, the resistor element is additionally irradiated with a laser beam. If the determination is negative, the process ends. Steps (C) are included, and Steps (A) to (C) are repeated in order until the determination is negative.
According to such a method, it is possible to further modify the resistor element, in which desired characteristics cannot be obtained after the modification, by an additional process of laser annealing. Therefore, the semiconductor device (IC chip) that is out of the standard in the inspection process can be relieved, which can contribute to the improvement of the yield of the semiconductor device.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(1) First Embodiment FIG. 1 is a cross-sectional view showing a configuration example of a semiconductor device 100 according to an embodiment of the present invention. The semiconductor device 100 has, for example, an analog circuit function, and has the MOS transistor 10 and the thin film resistance element 30 on the same silicon substrate 1. Specifically, as shown in FIG. 1, the semiconductor device 100 includes a plurality of MOS transistors 10 formed on a silicon substrate 1 and an element isolation that is provided on the silicon substrate 1 and separates the MOS transistors 10. Interlayer insulating film 40 provided on silicon substrate 1 to cover layer 3, MOS transistor 10 and element isolation layer 3, contact 21, first wiring layer 23, second wiring layer 25, uppermost layer electrode and thin film The resistor element 30 and a passivation film 51 provided on the interlayer insulating film 40 so as to cover the thin film resistor element 30 are included.

Among these, the interlayer insulation film 40 is comprised from the 1st insulating layer 41, the 2nd insulating layer 42, and the 3rd insulating layer 43 which were laminated | stacked in order from the bottom, for example. The contact 21 is formed on the silicon substrate 1, the first wiring layer 23 is formed on the first insulating layer 41, and the second wiring layer 25 is formed on the second insulating layer 42. The uppermost layer electrode 27 and the thin film resistance element 30 are respectively formed on the third insulating layer 43. The thin film resistance element 30 is, for example, any one of tungsten silicide (WSi), nickel chromium (NiCr), tantalum nitride (TaN), chromium silicide (CrSi ₂ ), chromium silicon oxy (CrSiO), and the like. It consists of different types of membranes.

Next, a method for manufacturing the semiconductor device 100 will be described.
FIG. 2 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the first embodiment of the present invention. In step a 1 of FIG. 2, after forming the element isolation layer 3 on the silicon substrate 1, a gate oxide film 11 is formed on the silicon substrate 1. Next, in step a2 in FIG. 2, for example, a polysilicon film is formed on the gate oxide film 11, and the gate electrode 13 is formed by patterning the polysilicon film. Then, in step a3 in FIG. 2, a sidewall 15 made of an insulating film is formed on the sidewall of the gate electrode 13. Further, before and after the step of forming the sidewalls 15, the source 16 and the drain 17 are formed by ion implantation of impurities using the gate electrode 13 as a mask. Next, in step a4 in FIG. 2, the entire silicon substrate 1 including the source 16 and the drain 17 is annealed to characterize the MOS transistor 10. The above steps a1 to a4 are the transistor formation process.

Next, in step a5 of FIG. 2, the contact 21 is formed. Specifically, first, a first insulating layer 41 is formed on the silicon substrate 1 so as to cover the MOS transistor 10. The first insulating layer 41 is, for example, a silicon oxide (SiO ₂ ) film, and is formed by, for example, a CVD method. Next, the first insulating layer 41 is selectively etched by photolithography and dry etching techniques to form contact holes. Here, contact holes are formed on the source 16, the drain 17, and the gate electrode 13, respectively. Then, a conductive film is formed on the first insulating layer 41 and the contact hole is filled with the conductive film. The conductive film is, for example, Al alloy containing a small amount of aluminum (Al) or copper (Cu), tungsten (W), or the like. Thereafter, the conductive film is patterned by CMP or selective etching using photolithography and dry etching techniques. In this way, a contact 21 made of a conductive film is formed.

Next, in step a6 in FIG. 2, the first wiring layer 23 is formed. Specifically, a conductive film is formed on the first insulating layer 41. Next, the conductive film is patterned by photolithography and dry etching techniques to form a horizontal pattern 23 a extending in the horizontal direction in the first wiring layer 23. Then, a second insulating layer 42 is formed on the first insulating layer 41 so as to cover the first wiring layer 23. The second insulating layer 42 is, for example, a silicon oxide (SiO ₂ ) film, and is formed by, for example, a CVD method. Next, the second insulating layer 42 is selectively etched by photolithography and dry etching techniques to form via holes. Here, a via hole is formed on the horizontal pattern 23 a of the first wiring layer 23.

  Next, a conductive film is formed on the second insulating layer 42 and the contact hole is filled with the conductive film. Then, the conductive film is patterned by CMP or selective etching using photolithography and dry etching techniques. In this way, the vertical pattern 23b extending in the vertical direction in the first wiring layer 23 is formed. The first wiring layer 23 is configured by the horizontal pattern 23a and the vertical pattern 23b.

Next, in step a7 of FIG. 2, the second wiring layer 25 is formed. The specific formation method is the same as the formation method of the first wiring layer 23, for example. That is, a conductive film made of, for example, aluminum (Al) or the like is formed on the second insulating layer 42, and this conductive film is patterned to form a horizontal pattern 25a extending in the horizontal direction in the second wiring layer 25. Next, a third insulating layer 43 made of, for example, a SiO ₂ film is formed on the second insulating layer 42 so as to cover the second wiring layer 25. Then, the third insulating layer 43 is selectively etched to form a via hole. Here, a via hole is formed on the horizontal pattern 25 a of the second wiring layer 25. Next, a conductive film is formed on the third insulating layer 43 and the contact hole is filled with the conductive film. Then, the conductive film is patterned to form a vertical pattern 25 b extending in the vertical direction in the second wiring layer 25. The second wiring layer 25 is configured by the horizontal pattern 25a and the vertical pattern 25b. The above steps a5 to a7 are the first half of the wiring formation process.

Next, in step a8 of FIG. 2, a resistor material is deposited on the third insulating layer 43 so as to cover the portion of the second wiring layer 25 where the vertical pattern 25b is formed. The resistor material is, for example, any one film of tungsten silicide (WSi), nickel chromium (NiCr), tantalum nitride (TaN), chromium silicide (CrSi ₂ ), or chromium silicon oxy (CrSiO). is there. Then, the resistor material is patterned by photolithography and dry etching techniques to form the thin film resistance element 30. This step a8 is the first half of the resistance element forming process.

  Next, in step a9 of FIG. 2, a conductive film made of, for example, an Al alloy containing a small amount of aluminum (Al) or copper (Cu), tungsten (W), or the like is formed on the second insulating layer 42. The top layer electrode 27 is formed by patterning the film. After forming the uppermost layer electrode 27, a passivation film is formed on the entire upper surface of the interlayer insulating film 40. Then, in step a10 in FIG. 2, the entire silicon substrate 1 after the passivation film 51 is formed is annealed, for example, an alloy of the source 16 and drain 17 (or a barrier metal covering them) and a wiring material. And alloying of the thin film resistance element 30 (or a barrier metal covering it) and the wiring material is promoted. Thereby, the reliability of the entire wiring such as the contact 21, the first wiring layer 23, the second wiring layer 25, and the uppermost layer electrode 27 can be improved. The above steps a9 and a10 are the second half of the wiring formation process.

  Next, in step a11, the thin film resistance element 30 is subjected to laser annealing to modify its characteristics. As described above, characteristic modification is to reduce the temperature dependence of the resistance value, that is, to reduce the temperature coefficient of resistance. The thin film resistance element 30 can be improved in performance by the characteristic modification. In this step a11, the laser annealing process conditions are adjusted so that the resistance temperature coefficient of the thin film resistance element 30 is, for example, 10 ppm / K or less. This step a11 is the second half of the resistance element formation process. Thereafter, in step a12, the silicon substrate 1 before dicing is set in a prober, and the characteristics of the thin film resistance element 30 are inspected. Here, it is inspected whether or not the characteristic of the modified resistor element has reached a target value (for example, the resistance temperature coefficient is 10 ppm / K or less).

  As described above, according to the first embodiment of the present invention, the respective thin film resistor elements 30 formed in the silicon substrate 1 (ie, the wafer) 1 are irradiated with laser light to modify their characteristics. Yes. Therefore, as compared with batch-type annealing using a furnace or a hot plate, variations in the annealing temperature between wafers 1 in a lot or at each position in the wafer 1 surface can be reduced. Thereby, the characteristic variation after the modification | reformation of the thin film resistive element 30 can be reduced, and the precision deterioration of the characteristic by a modification process can be suppressed.

  Further, according to such a method, not the entire wafer 1 is heated, but only the thin film resistance element 30 formed in the wafer 1 can be heated to a desired temperature. Therefore, for example, the processing temperature of laser annealing is set to a high temperature without considering the well layer (not shown) formed in the silicon substrate 1, the impurity concentration in the channel region of the MOS transistor 10, and their thermal diffusion. Can be set. Thereby, the thin film resistance element 30 can be modified at a high temperature without impairing the characteristics and reliability of the MOS transistor 10.

  Here, for example, when the thin film resistance element is made of tungsten silicide (WSi), a heat treatment at 800 ° C. is required for the characteristic modification of WSi, that is, the reduction in temperature coefficient of resistance (for example, 10 ppm / K or less). is there. When such high-temperature heat treatment is performed using a furnace or a hot plate as in the prior art, not only the temperature of the thin-film resistance element but also the temperature of the silicon transistor and the MOS transistor mounted on the silicon substrate. Since the temperature is about 800 ° C., there is a concern that the characteristics of the MOS transistor may be affected. For this reason, in the prior art, the heat treatment temperature for property modification is limited to a value considerably lower than 800 ° C. (for example, 400 ° C. or less), and the use of WSi as a thin film resistance element is also limited.

On the other hand, according to the present invention, only the thin film resistance element 30 can be selectively heated by the laser annealing process so as to have a high temperature without affecting the characteristics or the like of the MOS transistor 10. The thin film resistance element 30 can be modified at 800 ° C. Therefore, WSi can be used as the thin film resistance element 30 without limitation.
Furthermore, according to the first embodiment of the present invention, the thin film resistance element 30 is formed after the annealing process (step a10) for improving the reliability of the wiring. Therefore, it is not necessary to give the resistance element thermal stress when forming the interlayer insulating film 40 or thermal stress when improving the reliability of the wiring. Thereby, it is possible to prevent excessive heat stress from being applied to the thin film resistance element 30, and it is possible to prevent the characteristics of the thin film resistance element 30 from fluctuating due to thermal stress other than characteristic modification. .

(2) Second Embodiment In the first embodiment described above, the case where the characteristics of the thin film resistance element 30 are modified by performing laser annealing once after the uppermost layer electrode 27 is formed has been described. However, the property modification of the present invention is not limited to this method. For example, laser annealing for property modification may be performed a plurality of times with the uppermost layer electrode 27 forming step interposed therebetween. Alternatively, before forming the uppermost layer electrode 27, a batch-type annealing process using a furnace or a hot plate is performed on the entire silicon substrate 1 to modify its characteristics halfway (that is, to a certain level). Laser annealing may be applied to the thin film resistance element 30 after the formation of the upper layer electrode 27 to completely modify its characteristics. In this second embodiment, such a method will be described.

FIG. 3 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the second embodiment of the present invention. In FIG. 3, steps that perform the same processing as in the flowchart shown in FIG. 2 are given the same reference numerals, and repeated descriptions thereof are omitted.
In FIG. 3, steps a1 to a8 are as described in the first embodiment. In the second embodiment, after the thin film resistor 30 is formed in step a8 in FIG. 3, the process proceeds to step b1 in FIG. In step b1, the silicon substrate 1 on which the thin film resistor 30 is formed is placed in a furnace (furnace) or on a hot plate, and the entire silicon substrate 1 is annealed to improve the characteristics of the thin film resistor 30. Quality. Here, the annealing process is performed so that the characteristic modification stops at a certain level rather than completely modifying the characteristic of the thin film resistance element 30. In other words, the process is performed so that the characteristics of the thin film resistance element 30 are modified not to a target value (for example, the resistance temperature coefficient is 10 ppm / K or less) but to the middle thereof.

After step b1 is completed, the process proceeds to step a9. In step a9, the uppermost layer electricity 27 is formed. Next, in step a10, the entire silicon substrate 1 is annealed to increase the reliability of the entire wiring such as the contact 21, the first wiring layer 23, the second wiring layer 25, and the uppermost layer electricity 27. After step a10 is completed, the process proceeds to step b2.
In step b2, the thin film resistor 30 is irradiated with laser light to completely modify its characteristics. That is, in step b2, the thin film resistance element 30 is subjected to a laser annealing process so that the characteristics of the thin film resistance element 30 reach a target value for characteristic modification (for example, the resistance temperature coefficient is 10 ppm / K or less). Here, the characteristic modification of the thin film resistance element 30 has been completed to some extent by the annealing process (step b1) using a furnace or a hot plate. Therefore, compared with step a11 shown in FIG. 2, the time required for laser annealing can be shortened, or the output of laser light (laser power) can be reduced. In this way, after performing step b2, the process proceeds to step a12. In step a12, the silicon substrate 1 before dicing is set in a prober, and the characteristics of the thin film resistance element 30 are inspected.

  As described above, according to the second embodiment of the present invention, the advantages of batch processing using a furnace or a hot plate (that is, a plurality of chips formed on the same substrate can be processed at a time, and the efficiency is high. Point) and the advantage of the single wafer processing by laser annealing (that is, the point where there is little variation in the annealing temperature between the wafers 1 and in each position in the wafer 1 surface) can be utilized. Therefore, the characteristics of the thin film resistance element 30 can be modified relatively uniformly and with high efficiency.

(3) Third Embodiment In the first and second embodiments described above, the case where the characteristics of the thin film resistance element 30 are inspected at the wafer level after the laser annealing treatment has been described, but in the present invention, based on the inspection results. The laser annealing process may be performed again. In other words, when the characteristic modification is insufficient, the laser annealing process may be additionally performed for each chip or for each thin film resistance element 30 so that the characteristic modification is sufficient. In the third embodiment, such a method will be described.

FIG. 4 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the third embodiment of the present invention. In FIG. 4, steps that perform the same processing as in the flowchart shown in FIG. 2 are given the same reference numerals, and repeated descriptions thereof are omitted.
In FIG. 4, steps a1 to a12 are as described in the first embodiment. In the third embodiment, after the wafer level inspection is formed in step a12 in FIG. 4, the process proceeds to step c1 in FIG. In step c1, it is determined whether or not an additional process of laser annealing is necessary based on the result of the inspection in step a21.

  Specifically, when it is determined that the characteristics of the thin film resistance element 30 have not reached the target value (for example, the resistance temperature coefficient is 10 ppm / K or less), the characteristics of the thin film resistance element 30 have reached the target value. Thus, the thin film resistance element 30 is additionally subjected to a laser annealing process. Here, based on the above inspection results, the laser annealing processing conditions (laser light irradiation time, laser power, etc.) are adjusted for each chip, for example. On the other hand, if it is determined in step c1 of FIG. 4 that the characteristics of the thin film resistance element 30 have reached the target value, the additional processing of laser annealing is not necessary, and the flowchart shown in FIG. 4 ends.

  In FIG. 4, when returning from step c1 to step a11, step a11, step a12, and step c1 are repeated in this order until the characteristics of the thin film resistance element 30 reach the target value. However, in the present invention, for example, the number of times that the laser annealing treatment can be added is determined in advance, for example, once or twice, and the flow of FIG. It is also possible to end the process. According to such a method, when an abnormality occurs in the material or shape of the thin film resistance element 30 or the modification process, it is possible to detect the abnormality early by stopping the modification process.

As described above, according to the third embodiment of the present invention, the thin film resistance element 30 that has not obtained desired characteristics after modification can be relieved by an additional process of laser annealing. This can contribute to yield improvement.
In the first to third embodiments described above, the thin film resistor 30 corresponds to the “resistor element” of the present invention, and wiring such as the contact 21, the first wiring layer 23, the second wiring layer 25, and the uppermost layer electricity 27. The whole corresponds to the “wiring” of the present invention. The MOS transistor 10 corresponds to the “semiconductor element” of the present invention.

  In this embodiment, the case where the thin film resistance element 30 is covered with the passivation film 51 and the thin film resistance element 30 is irradiated with laser light (that is, laser annealing is performed through the passivation) has been described. However, in the present invention, for example, as shown in FIG. 5A, the passivation film 51 is selectively etched, and the opening formed by thinning the passivation film on the resistor element directly above the thin film resistor element 30. Alternatively, an opening h whose bottom surface is the surface of the thin film resistance element 30 is formed. And you may make it irradiate a laser beam to the surface of the thin film resistive element 30 through this opening part h. According to such a method, since the surface of the thin film resistor 30 can be irradiated with laser light, the attenuation of the laser power due to transmission through the passivation film 51 can be suppressed, and the thin film resistor 30 can be made efficient. It can be well modified.

In this embodiment, for example, as shown in FIG. 5B, a guard ring 61 that surrounds the thin film resistor 30 in a plan view may be formed above the silicon substrate 1. For example, the guard ring 61 is formed before the laser annealing process is performed on the thin film resistance element 30. According to such a method, the scattered component of laser light (that is, scattered light) can be confined in the guard ring 61, and the MOS transistor 10 and the wiring can be protected from the scattered light. Therefore, an unintended influence (for example, an unintended characteristic change or a decrease in reliability in the MOS transistor 10 or wiring) due to scattered light can be reduced.
The guard ring 61 can be formed, for example, any one of the contact 21, the first wiring layer 23, the second wiring layer 25, the uppermost layer electricity 27, or a combination thereof. The wiring that functions as the guard ring may be formed above the silicon substrate 1 as a pattern that does not actually function as a wiring (that is, a dummy pattern).

FIG. 3 is a cross-sectional view illustrating a configuration example of a semiconductor device 100 according to an embodiment. 3 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the first embodiment. 9 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the second embodiment. 9 is a flowchart showing a method for manufacturing the semiconductor device 100 according to the third embodiment. (A) is sectional drawing which shows the other structural example of the semiconductor device 100, (b) is a top view which shows the example of a shape of the guard ring 61. FIG. Sectional drawing which shows the structural example of the semiconductor device 200 which concerns on a prior art example. 9 is a flowchart showing a method for manufacturing a semiconductor device 200 according to a conventional example.

Explanation of symbols

  1 silicon substrate (wafer), 3 element isolation layer, 10 MOS transistor, 11 gate oxide film, 13 gate electrode, 15 sidewall, 16 source, 17 drain, 21 contact, 23 first wiring layer, 23a horizontal pattern, 23b vertical Pattern, 25 second wiring layer, 25a horizontal pattern, 25b vertical pattern, 27 top layer electrode, 30 thin film resistor, 40 interlayer insulating film, 41 first insulating layer, 42 second insulating layer, 43 third insulating layer, 51 Passivation film, 61 guard ring, 100 semiconductor device h opening

Claims (10)

A method for manufacturing a semiconductor device comprising a semiconductor element and a resistor element on the same substrate,
And a step of irradiating the resistor element with laser light to modify its characteristics. Forming a semiconductor element on the substrate;
Forming a first interlayer insulating film on the substrate so as to cover the semiconductor element;
Forming a second interlayer insulating film directly on the first interlayer insulating film or via one or more interlayer insulating films;
Forming a resistor element on the second interlayer insulating film;
Irradiating the resistor element with laser light, and
The method of manufacturing a semiconductor device, wherein the second interlayer insulating film is an interlayer insulating film located at the uppermost position. Forming a wiring above the substrate;
3. The method of manufacturing a semiconductor device according to claim 2, further comprising a step of performing a heat treatment on the substrate to increase the reliability of the wiring before the step of forming the resistor element. Forming a passivation film on the second interlayer insulating film so as to cover the resistor element;
Forming an opening exposing the surface of the resistor element by etching the passivation film, and
4. The semiconductor device according to claim 2, wherein the step of irradiating the resistor element with laser light is a step of irradiating the surface of the resistor element with laser light through the opening. 5. Production method. Forming a passivation film on the second interlayer insulating film so as to cover the resistor element;
Etching the passivation film to form an opening on the surface of the resistor element, leaving a portion of the passivation film, and
3. The step of irradiating the resistor element with laser light irradiates the surface of the resistor element with laser light through the passivation film left on the surface of the resistor element. Item 4. A method for manufacturing a semiconductor device according to Item 3. Further including a step of performing heat treatment using a furnace or a hot plate on the substrate on which the resistor element is formed,
6. The step of irradiating the resistor element with laser light irradiates the laser light on the substrate after the heat treatment using the furnace or hot plate is performed. The manufacturing method of the semiconductor device as described in 2. above.   7. The method according to claim 1, further comprising a step of forming a guard ring surrounding the resistor element in plan view on the substrate before the step of irradiating the resistor element with laser light. A manufacturing method of a semiconductor device given in any 1 paragraph.   The semiconductor device according to claim 1, further comprising a step of inspecting characteristics of the resistor element after the step of irradiating the resistor element with laser light. Manufacturing method.   9. The method of manufacturing a semiconductor device according to claim 8, further comprising a step of further irradiating the resistor element with a laser beam based on the result of the inspection to further modify its characteristics. A step (A) of inspecting the characteristics of the resistor element;
A step (B) of determining the necessity of additional irradiation of laser light based on the inspection result; and
If the determination is necessary, the resistor element is additionally irradiated with laser light, and if the determination is negative, the process is terminated (C),
8. The method of manufacturing a semiconductor device according to claim 1, wherein the steps (A) to (C) are sequentially repeated until the determination is negative. 9.

Images