JP2008276650A - Control command generator, information processor, electronic equipment, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a control command generator, an information processor and electronic equipment, capable of simplifying processing for issuing a command even when various specifications are mixed. <P>SOLUTION: This control command generator for generating a control command to a storage device includes a command table registered with a plurality of pieces of command setting information, in every block corresponding to a class of the control command, and a command information setting part for controlling the issuing of the control command based on the setting information of a control register, by assigning a table index corresponding to the block, and by setting the command setting information of the block specified by the table index in the control register of a controller for accessing the storage device. Each command information includes command assigning information for assigning a class of the control command, and parameter information for assigning a control sequence type corresponding to the control command. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a control command generation device, an information processing device, an electronic device, and a program.

  In recent years, not only personal computers and peripheral devices (for example, printer devices, scanner devices, or multifunction devices), but also portable information devices such as mobile phones, personal digital assistants (PDAs) and audio players, robot devices, There are increasing opportunities for flash memory cards to be used for data storage applications in electronic devices such as digital cameras, video cameras, global positioning system (GPS) devices, television receivers, projectors and the like.

  Various standards and versions are defined for flash memory cards according to their applications. For example, it has excellent portability for carrying moving image data, still image data, or music data. As a large-capacity flash memory, a flash memory card conforming to the MMC (MultiMediaCard) standard, SD (Secure Digital) standard, or SDIO (SD There are I / O devices that conform to the Input / Output standard. In addition, for example, as a HDD device capable of a small connector shape and high-speed data transfer due to miniaturization of portable devices and household electric appliances, there is a storage device compliant with CE-ATA (Consumer Electronics-AT Attachment) standard.

  In this way, portable data storage applications will continue to expand in the future, and there is a tendency that optimum standards corresponding to the applications will be developed sequentially.

Access to such a flash memory card or the like is realized by issuing a command (control command) defined by the standard. A technique for issuing a command to access a flash memory card is disclosed in Patent Document 1, for example. Patent Document 1 discloses a data processor that can easily cope with additions and changes in the use of commands.
JP 2002-342256 A

  In the technique disclosed in Patent Document 1, in the interface operation of the data processor, the first control information for controlling the operation of the interface control target device and the interface operation between the interface control target device are controlled. Therefore, the second control information is defined separately in correspondence with each other. Therefore, in the technique disclosed in Patent Document 1, the first or second control information can be corrected when a command, a function, or an operation for accessing the interface control target device is added or changed. .

  However, even with the technique of Patent Document 1, there are many types of commands for accessing the flash memory card as described above, and it is necessary to determine the type of command every time a command is issued. Therefore, the technique disclosed in Patent Document 1 has a problem in that there are many types of determination of command types, resulting in complicated control or redundant program code. In particular, various commands such as the MMC standard and the SD standard that are compatible with each other are established for the command for accessing the flash memory card, and it is also necessary to determine the version difference in each standard. This complicates command type determination processing, resulting in a decrease in access performance to the flash memory card.

  The present invention has been made in view of the technical problems as described above, and an object of the present invention is to provide a control command generation apparatus and an information processing apparatus that can simplify command issuing processing even if various standards are mixed. To provide an apparatus, an electronic device, and a program.

In order to solve the above problems, the present invention
A control command generation device for generating a control command for a storage device,
A command table in which a plurality of command setting information is registered for each block corresponding to the type of the control command;
Based on the setting information of the control register by designating the table index corresponding to the block and setting the command setting information of the block specified by the table index in the control register of the control device for accessing the storage device A command information setting unit that performs control to issue the control command,
Each command setting information
The present invention relates to a control command generating apparatus including command specifying information for specifying a type of the control command and parameter information for specifying a control sequence type corresponding to the control command.

  In the present invention, a command table in which command setting information is registered in advance is prepared, and by specifying a table index from the command table, command setting information of various control commands is extracted in a complicated format. Therefore, according to the present invention, even when various control commands exist in a complicated format, it is not necessary to collect necessary parameter information for each control command and perform control command generation processing. Can be simplified.

In the control command generating device according to the present invention,
Each command setting information is provided for each combination of the command index and the parameter information as the command designation information for designating the type of the control command,
The table index and the command index may be different.

  In the present invention, it is not necessary to align the table index number and the command index number. Therefore, according to the present invention, if the table index is grasped, even if a block in which command setting information is registered is newly added or changed, the generation process of the control command is not complicated. .

In the control command generating device according to the present invention,
The plurality of command setting information includes:
Command setting information corresponding to the control command specified by the first standard and command setting information corresponding to the control command specified by the second standard can be included.

  According to the present invention, even when a plurality of standards are mixed and control commands are complicatedly defined for each standard, it is only necessary to specify the table index of the command table. As a result, it is possible to prevent the performance of access to the storage device from being deteriorated.

In the control command generating device according to the present invention,
Each command setting information is
Including a command index as the command designation information for designating the type of the control command, and a response type as the parameter information,
The response type is
Information specifying a response sequence from the storage device corresponding to the control command may be used.

In the control command generating device according to the present invention,
The order in which the command designation information and the parameter information in each command setting information are stored is the same as the order of addresses specifying the control registers of the control device in which the command designation information and the parameter information are set. Good.

In the control command generating device according to the present invention,
The sequence of bits of the command designation information of the command setting information and the information of the parameter information may be the same as the sequence of bit fields of the control register of the control device in which the information is set.

  According to any one of the above inventions, it is possible to set the information of the command setting information as it is in the control register of the control device without performing any processing or bit operation. Therefore, the control command generation process can be simplified.

In the control command generating device according to the present invention,
The command information setting unit
The type of the storage device standard or version can be determined, and the table index can be designated based on the determination result.

  According to the present invention, it is possible to simplify the process of generating a control command in which standards and versions are mixed.

In the control command generating device according to the present invention,
The command table is
Command index and response type of control commands conforming to MMC (MultiMediaCard) standard, SD (Secure Digital) standard, SDIO (SD Input / Output) standard, or CE-ATA (Consumer Electronics-AT Attachment) standard, and command type And command type information for designating.

  According to the present invention, it is possible to simplify the generation process of the control command of the CE-ATA standard as well as the MMC standard, SD standard, and SDIO standard distributed in the market.

The present invention also provides
An information processing apparatus for accessing a storage device,
A control device having a control register and issuing a control command for accessing the storage device based on setting information of the control register;
The present invention relates to an information processing apparatus including the control command generation apparatus according to any one of the above that sets the command setting information in a control register of the control apparatus.

  According to the present invention, it is possible to provide an information processing apparatus to which a control command generating apparatus capable of simplifying command issuing processing even when various standards are mixed is applied.

The present invention also provides
The storage device;
The present invention relates to an electronic device including the information processing apparatus described above.

  According to the present invention, it is possible to provide an electronic device to which a control command generation device that can simplify command issuing processing even if various standards are mixed.

The present invention also provides
Means for designating a table index corresponding to a block with respect to a command table in which a plurality of command setting information is registered for each block corresponding to the type of control command for the storage device;
Means for controlling the command setting information of the block specified by the table index to issue the control command based on the setting information of the control register by setting the control register of the control device for accessing the storage device Function as a computer
Each command setting information
The present invention relates to a program including command designation information for designating a type of the control command and parameter information for designating a control sequence type corresponding to the control command.

In the program according to the present invention,
Each command setting information is provided for each combination of the command index and the parameter information as the command designation information for designating the type of the control command,
The table index and the command index may be different.

In the program according to the present invention,
The plurality of command setting information includes:
Command setting information corresponding to the control command specified by the first standard and command setting information corresponding to the control command specified by the second standard can be included.

In the program according to the present invention,
Each command setting information is
Including a command index as the command designation information for designating the type of the control command, and a response type as the parameter information,
The response type is
Information specifying a response sequence from the storage device corresponding to the control command may be used.

In the program according to the present invention,
The order in which the command designation information and the parameter information in each command setting information are stored is the same as the order of addresses specifying the control registers of the control device in which the command designation information and the parameter information are set. Good.

In the program according to the present invention,
The sequence of bits of the command designation information of the command setting information and the information of the parameter information may be the same as the sequence of bit fields of the control register of the control device in which the information is set.

In the program according to the present invention,
The type of the storage device standard or version can be determined, and the table index can be designated based on the determination result.

In the program according to the present invention,
The command table is
Command index and response type of control commands conforming to MMC (MultiMediaCard) standard, SD (Secure Digital) standard, SDIO (SD Input / Output) standard, or CE-ATA (Consumer Electronics-AT Attachment) standard, and command type And command type information for designating.

  According to any one of the above inventions, it is possible to provide a program for generating a control command for a storage device, which can simplify command issuing processing even if various standards are mixed.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The embodiments described below do not unduly limit the contents of the present invention described in the claims. Also, not all of the configurations described below are essential constituent requirements of the present invention.

1. Information Processing Device FIG. 1 is a block diagram showing a configuration example of an electronic apparatus to which the information processing device according to this embodiment is applied.

  Examples of the electronic device having the configuration shown in FIG. 1 include a personal computer, peripheral devices (for example, a printer device, a scanner device, or a multifunction device), a mobile phone, a portable information terminal, an audio player, a robot device, a digital camera, a video camera, and a GPS. Devices, television receivers, projectors, and the like.

  The electronic device 10 includes a host system 100 as an information processing device and a memory card (storage device in a broad sense) 200, and the host system 100 and the memory card 200 are connected via a card bus 20. The electronic device 10 can write data to the memory card 200 or read data from the memory card 200 by issuing a control command to the memory card 200. The memory card 200 may be, for example, a flash memory card, an I / O device, or an HDD device.

  The host system 100 includes a central processing unit (CPU) 110, a memory 120, and a card controller 130. The CPU 110, the memory 120, and the card controller 130 are connected via a system bus 122. Therefore, the CPU 110 can access the memory 120 or the card controller 130 via the system bus 122. The CPU 110 reads the program stored in the memory 120 and executes a process corresponding to the program, thereby realizing a function as a control command generation device that performs control to issue a control command to the memory card 200. To do. The card controller 130 and the memory card 200 are connected via the card bus 20, and the CPU 110 performs control to generate a control command issued from the card controller 130 to the memory card 200. When the memory card 200 is defined as “device”, the card controller 130 can be defined as “host controller” for controlling the host side.

  The card bus 20 has a clock line for transmitting a transfer clock CLK, a command line for transmitting a control command CMD and a response, for example, a data line for transmitting 4-bit (or 8-bit) transfer data DAT0 to DAT3. In the present embodiment, the card controller 130 issues a command CMD in synchronization with the transfer clock CLK. Then, for example, 4-bit transfer data DAT0 to DAT3 is transmitted / received in synchronization with the transfer clock CLK. Further, depending on the type of command CMD, the memory card 200 can return a response using, for example, a command line as a response to the control command CMD.

  In the following, it is assumed that the memory card 200 is a flash memory card conforming to the SD standard, and control commands, responses, and transfer data are transmitted / received to / from the card bus 20 in a sequence conforming to the SD standard.

  FIG. 2 is an explanatory diagram of control commands in the present embodiment.

  The control command is, for example, 48-bit data, and is composed of a start bit “0”, a transfer bit “1” set by the card controller 130, 45-bit command data, and an end bit “1”. . The last 7 bits of the command data are CRC (Cyclic Redundancy Check) data. The command data can include command, address information, and parameter information, and data having a structure as shown in FIG. 2 is transmitted through the command line.

  Note that the memory card 200 can return a response to the card controller 130 via the command line by setting “0” in the transfer bit, for example.

  FIG. 3 shows a block diagram of a configuration example of the card controller 130 of FIG.

  The card controller 130 includes a control interface (InterFace: I / F) circuit 132, a first-in first-out (FIFO) I / F circuit 134, a controller control register unit 136, a clock control unit 138, and a control logic unit 140. The control logic unit 140 includes a command sequencer 142 and a data sequencer 144.

  The control I / F circuit 132 performs interface processing of control signals and control data transmitted / received to / from the CPU 110 and the memory 120 via the system bus 122. The CPU 110 can set control data in each control register of the controller control register unit 136 via the control I / F circuit 132.

  The FIFO I / F circuit 134 performs interface processing of control signals and control data transmitted / received to / from the CPU 110 and the memory 120 via the system bus 122. Data read from the memory 120 via the system bus 122 is buffered in the FIFO I / F circuit 134 and then supplied to the control logic unit 140. Data read from the memory card 200 is buffered in the FIFO I / F circuit 134 and then output to the CPU 110 or the memory 120 via the system bus 122.

  The controller control register unit 136 has one or a plurality of control registers, and control data for controlling the card controller 130 is set in each control register. Each unit of the card controller 130 is controlled based on a control signal corresponding to the control data set in each control register of the controller control register unit 136.

  The clock control unit 138 supplies a clock to each unit of the card controller 130 and controls to output a transfer clock CLK to a clock line configuring the card bus 20.

  The command sequencer 142 performs control to issue a command to the memory card 200 via the command line constituting the card bus 20 based on the control data of the control register of the controller control register unit 136.

  The data sequencer 144 performs control to transmit / receive data to / from the memory card 200 via the data line constituting the card bus 20 based on the control data of the control register of the controller control register unit 136.

  FIG. 4 shows an outline of the configuration of the controller control register unit 136 shown in FIG.

  The controller control register unit 136 can include a command specification register 150, an argument setting register 152, a command type setting register 154, a response specification register 156, a transfer type setting register 158, and a transfer count number setting register 160. Addresses are assigned to the control registers of the command specification register 150, argument setting register 152, command type setting register 154, response specification register 156, transfer type setting register 158, and transfer count number setting register 160 of the controller control register unit 136. For example, each control register can be accessed in order by incrementing the address (or adding a predetermined address value).

  The CPU 110 can set command designation information for designating the type of command issued to the memory card 200 and parameter information, which is a parameter of the command, in the controller control register unit 136 via the system bus 122. The parameter information can include argument information, command type information, response designation information, transfer type information, and transfer count information.

  Command designation information is set in the command designation register 150. Based on the command designation information set in the command designation register 150, the control signal cmd_index is output. A command index specified by the control signal cmd_index is an index of a command in the SD standard (see, for example, SD Specifications, Part 1, Physical Layer Specification Version 2.00, May 9, 2006, 4.7.4 Detailed Command Description). For example, when the command index specified by the control signal cmd_index specifies “0”, the card controller 130 controls the memory card 200 to issue a command CMD0 for making a transition to the idle state.

  Of the parameter information, the argument information is set in the argument setting register 152. Based on the argument information set in the argument setting register 152, the control signal arg is output. The argument information specified by the control signal arg becomes an argument of the command in the SD standard. Using the argument specified by the control signal arg, the card controller 130 controls the memory card 200 to issue, for example, the command CMD2 (command index is “2”, for example) having the above argument.

  Of the parameter information, command type information is set in the command type setting register 154. A control signal type is output based on the command type information set in the command type setting register 154. The command type information is information for specifying a command type such as a stop command or ACMD such as SD standard, and is information for specifying a control sequence corresponding to the command.

  Of the parameter information, response designation information is set in the response designation register 156. Based on the response designation information set in the response designation register 156, the control signal resp is output. The response designation information designated by the control signal resp is the command response type. The response type is information that specifies not only the presence / absence of a response but also the type of response sequence when there is a response. Here, for example, even when a response type other than R1 is specified in the SD standard, a response type of R6 or R7 whose sequence is substantially the same as R1 may be specified as R1. For example, when the response designation information designated by the control signal resp designates “R1b” (command index is “7”, for example), the card controller 130 is in a busy state with respect to the memory card 200, for example. A control for receiving a response, for example, issuing a command CMD7 is performed.

  Of the parameter information, the transfer type is set in the transfer type setting register 158. Based on the transfer type information set in the transfer type setting register 158, the control signal tran_type is output. Transfer type information specified by the control signal tran_type is a command transfer type in the SD standard. The transfer type information includes information on whether or not a transfer command and a control command CMD12 are involved, in addition to single transfer, multiple transfer, stream transfer, and infinite transfer.

  Of the parameter information, transfer count number information is set in the transfer count number setting register 160. Based on the transfer count set in the transfer count setting register 160, the control signal cnt is output. Based on the transfer count specified by the control signal cnt, the card controller 130 repeats data transfer with the memory card 200.

  The card controller 130 can issue a control command to the memory card 200 using the control data of each control register of the controller control register unit 136 as shown in FIG.

  FIG. 5 shows a block diagram of a configuration example of the memory card 200 of FIG.

  The memory card 200 includes a card I / F circuit 210, a card I / F control circuit 220, a card control register unit 230, a memory I / F circuit 240, and a memory core unit 250.

  The card I / F circuit 210 performs interface processing of signals transmitted through the card bus 20. The card I / F control circuit 220 controls the card I / F circuit 210 to output a signal to the card bus 20 and performs control to input a signal from the card bus 20.

  The card control register unit 230 has a plurality of control registers. For example, the card control register unit 230 includes an operation conditions register (OCR), a card identification register (CID), a card-specific data register (CSD), a relative card address register (CSD) Relative Card Address Register (RCA), Driver Stage Register (Driver Stage Register: DSR), SD Configuration Register (SD Configuration Register: SCR), SD Status Register (SD Status Register: SSR), Card Status Register (Card Status Register: CSR). The card I / F control circuit 220 controls each unit of the memory card 200 based on the setting data of the card control register unit 230 and controls to store the control result in the card control register unit 230.

  The memory I / F circuit 240 performs control of writing data to the memory element of the memory core unit 250 and reading data from the memory element of the memory core unit 250 under the control of the card I / F control circuit 220.

  The memory core unit 250 has a plurality of memory elements. The memory I / F circuit 240 can read data from a memory element corresponding to a previously assigned address or write data to a memory element corresponding to the address.

2. Control Command Generating Device The host system 100 in this embodiment accesses the memory card 200 by issuing a control command to the memory card 200 having the configuration shown in FIG. Control for generating such a control command is performed by the CPU 110 and the memory 120 of the host system 100. Therefore, the function of the control command generation device in this embodiment is realized by the CPU 110 and the memory 120 of the host system 100.

  FIG. 6 shows an outline of the configuration of the control command generation device according to this embodiment.

  The control command generation device 300 in the present embodiment includes a command table 310 and a command information setting unit 320. In the command table 310, each block has a plurality of blocks corresponding to the types of control commands issued to the memory card 200 as a storage device, and command setting information is registered for each block. Therefore, a plurality of command setting information registered for each block is registered in advance in the command table 310. Each command setting information includes command designation information for designating the type of control command and parameter information for designating a control sequence type corresponding to the control command. More specifically, each command setting information includes a command index as command designation information and a response type as parameter information, and the response type is a response from the memory card 200 (storage device) corresponding to the control command. Information specifying a sequence.

  A table index is assigned to each block. The command information setting unit 320 designates a table index corresponding to the block, and sets the command setting information of the block specified by the table index in the control register of the card controller 130 (control device for accessing the storage device). As a result, control for issuing a control command based on the setting information of the control register is performed.

  The function of the command table 310 is realized by the memory 120 of FIG. The function of the command information setting unit 320 is realized by the CPU 110 and the memory 120 of FIG. In other words, the CPU 110 that has read the program stored in the memory 120 executes processing corresponding to the program, thereby realizing the function of the command information setting unit 320.

  The command information setting unit 320 can include a command information extraction unit 322 and a command issue control unit 324. The command information extraction unit 322 specifies a table index and extracts command setting information of a block corresponding to the table index from the command table 310. The command issue control unit 324 sets the command setting information extracted by the command information extraction unit 322 as it is in the control register of the controller control register unit 136 of the card controller 130. By doing so, the command information setting unit 320 can perform control to issue a control command based on the setting information of the control register of the card controller 130.

  In this way, by specifying a table index from the command table 310 registered in advance, even when various control commands exist in a complicated format, necessary parameter information is collected for each control command and the control command is collected. Need not be generated.

  FIG. 7 shows an outline of the configuration of the command table 310 of FIG.

  As shown in FIG. 7, a table index is assigned to each block of the command table 310. Then, command setting information of commands is registered for each block.

  In FIG. 7, for example, command setting information for issuing an SD standard control command CMD0 is registered in a block corresponding to the table index “0”. Similarly, command setting information for issuing an SD standard control command CMD1 is registered in a block corresponding to the table index “1”, for example. Similarly, command setting information for issuing an MMC standard control command CMD3 is registered in the block corresponding to the table index “3”, for example, and the SD standard control is registered in the block corresponding to the table index “4”. Command setting information for issuing the command CMD3 is registered.

  As shown in FIG. 7, it is desirable that the table index and the command index are different. That is, it is not necessary to align the table index number and the command index number. In this way, if the table index is known, the control command generation process will not be complicated even if a block in which command setting information is registered is newly added or changed.

  Further, command setting information of control commands of various standards may be mixed in the command table 310 and registered in each table. That is, it is desirable to include command setting information corresponding to the control command specified by the first standard and command setting information corresponding to the control command specified by the second standard. As shown in FIG. 7, for example, it is desirable to mix SDIO standard control commands and CE-ATA standard control commands in addition to SD standard control commands, MMC standard control commands that are backward compatible with the SD standard, and the like. In this way, it is only necessary to specify a table index in order to issue a control command of any one of a plurality of standards, so the processing can be simplified and the program code compared to conventional control command generation processing. The amount can be reduced.

  FIG. 8 shows an example of command setting information registered in each block of the command table of FIG.

  Command setting information is registered in each block. Each command setting information is provided for each combination of a command index as command designation information and parameter information. In addition to the command index, command argument information, command type (command type information), response type, response data pointer, transfer type information, and transfer count information are registered in each block. The response data pointer is information that designates a storage area of the memory 120 in which response data from the memory card 200 is stored. Command designation information and parameter information excluding the response data pointer are set in the respective control registers of the controller control register unit 136 as they are.

  Here, the order in which the command designation information and parameter information of each command setting information are stored is the order of the addresses that specify the control registers of the controller control register unit 136 of the card controller 130 in which the command designation information and parameter information are set. It is desirable to be the same. In addition, the order of bits of the command specification information and parameter information of each command setting information is the same as the order of bit fields of the control register of the controller control register unit 136 of the card controller 130 in which the information is set. Is desirable.

  By doing so, each piece of information in FIG. 8 can be set as it is in each control register of the controller control register unit 136 in FIG. 4 without performing any processing or bit operation except for the response data pointer. Therefore, the control command generation process can be simplified.

3. Operation Example of Host System Next, an operation example of the host system 100 in the present embodiment will be described.

  FIG. 9 shows a flowchart of a processing example of the host system 100 of FIG.

  A program for executing the processing of FIG. 9 is stored in the memory 120 shown in FIG. 1, and the CPU 110 reads the program from the memory 120 and executes processing corresponding to the program, whereby the CPU 110 The process of FIG. 9 is performed under control. Further, in FIG. 9, given first processing (for example, information processing that requires data stored in the memory card 200) and given second processing (for example, information processing using data read from the memory card 200). The host system 100 performs processing for issuing control commands.

  First, the CPU 110 performs a first process by executing a program read from the memory 120 (step S10).

  Next, the CPU 110 performs control command issuance processing (step S11). More specifically, a table index is designated for the command table stored in the memory 120, and command setting information of the block designated by the table index is stored in each control register of the controller control register unit 136 of the card controller 130. Set. Then, the CPU 110 issues a control command issuance instruction (command Go), whereby a control command corresponding to the content of the control register of the controller control register unit 136 is output via the card bus 20.

  After issuing the control command, the card controller 130 controls the clock line, command line, and data line with the memory card 200 in a control sequence corresponding to the control command, and notifies the CPU 110 of the end of the control command. Notify interrupt. Furthermore, the card controller 130 notifies the CPU 110 of the end of data transfer with the memory card 200 via the card bus 20. For example, the card controller 130 performs control to sequentially store data read from the memory card 200 in the memory 120.

  Subsequent to step S11, the CPU 110 monitors a control command end interrupt from the card controller 130 (step S12), and when notified of the control command end interrupt, monitors the transfer end interrupt from the card controller 130. (Step S13).

  Thereafter, when the CPU 110 is notified of the end of transfer in step S13, the CPU 110 performs a second process using read data from the memory card 200 stored in the memory 120 (step S14), and performs a series of processes. End (end).

  FIG. 10 shows a flowchart of a processing example of the control command issue processing of FIG.

  A program for executing the processing of FIG. 10 is stored in the memory 120, and the CPU 110 reads out the program from the memory 120 and executes processing corresponding to the program, whereby the CPU 110 controls the card controller 130 to execute the processing. Ten processes are performed.

  The CPU 110 performs a determination process for the card standard of the memory card 200 and its version (step S20). This determination processing is performed, for example, in an initialization sequence of the memory card 200 after power is turned on. This is because the type of control command (parameter information, response sequence, etc.) differs depending on the card standard and version.

  When the standard and version are determined in step S20, a table index corresponding to a control command to be issued is specified for the command table in the memory 120 based on the determined standard and version, and the CPU 110, as described above, specifies the card controller 130. Is controlled to issue a control command (step S21), and a series of processing ends (end).

  FIG. 11 shows a flowchart of an example of the card standard and version discrimination process of FIG.

  A program for executing the processing of FIG. 11 is stored in the memory 120, and the CPU 110 reads out the program from the memory 120 and executes processing corresponding to the program, whereby the CPU 110 controls the card controller 130 to execute the processing. 11 processes are performed. That is, control command issuance processing is performed for the purpose of discriminating the card standard and version. Every time the control command in FIG. 11 is issued, issue control using the command table is performed as described above.

  First, the CPU 110 performs control to issue a control command CMD5 (step S25). The control command CMD5 is a control command defined by the SDIO standard. When there is a response from the memory card 200 to the control command CMD5 (step S26: Y), the CPU 110 determines that the standard of the memory card 200 is the SDIO standard (step S27), and ends a series of processing (end).

  In step S26, when there is no response from the memory card 200 to the control command CMD5 (step S26: N), the CPU 110 performs control to issue an SD standard control command CMD8 (step S30). The control command CMD8 is a command for inquiring about a memory card interface condition such as power supply information of the card controller 130. When there is a response from the memory card 200 to the control command CMD8 (step S31: Y), the CPU 110 determines that the standard and version of the memory card 200 are SD 2.0 standards (step S32), and ends a series of processing. (End).

  Next, in step S31, when there is no response from the memory card 200 to the control command CMD8 (step S31: N), the CPU 110 performs control to issue the control command ACMD41 (step S33). The control command ACMD41 is a command for reading the operation condition register and notifying whether or not the card controller 130 supports a large capacity card. When there is a response from the memory card 200 to the control command ACMD41 (step S34: Y), the CPU 110 reads out the SCR register (step S35), extracts version information, SD1. The X standard (SD 1.0 standard or SD 1.10 standard) is discriminated (step S36), and a series of processing ends (end).

  In step S34, when there is no response from the memory card 200 to the control command ACMD41 (step S34: N), the CPU 110 reads the CSD register (step S37), extracts version information, and determines the version of the MMC standard. (Step S38), and a series of processing ends (end).

  FIG. 12 is a flowchart of an example of the control command issuance process of FIG.

  A program for executing the processing of FIG. 12 is stored in the memory 120, and the CPU 110 reads out the program from the memory 120 and executes processing corresponding to the program, whereby the CPU 110 controls the card controller 130 to execute the processing. 12 processes are performed. When there is a command issuance instruction from the host application, the processing of FIG. 12 is performed.

  The CPU 110 designates the table index of the command table corresponding to the control command to be issued in accordance with an instruction from the upper application (step S40), and the command index is selected from the command setting information of the block specified by the table index. The command designation register 150 of the unit 136 is set (step S41).

  Next, the CPU 110 sets argument information in the argument setting register 152 of the controller control register unit 136 from the command setting information of the block specified by the table index, and sets the command type in the command type setting of the controller control register unit 136. The response type is set in the register 154, and the response type is set in the response designation register 156 of the controller control register 136 (step S42). The CPU 110 sets transfer type information in the transfer type setting register 158 and sets transfer count number information in the transfer count number setting register 160.

  Next, the CPU 110 accesses a control command issue instruction register (not shown) of the controller control register 136 of the card controller 130 to issue a control command (step S44), and ends a series of processes (END).

  FIG. 13 shows an outline of the configuration of the driver unit of the card controller 130 of FIG.

  The driver unit shown in FIG. 13 is built in the card controller 130 shown in FIG. The driver unit includes a driver that drives the clock line and outputs the transfer clock CLK, a first input / output driver connected to the command line, and a second input / output driver connected to the data line.

  The first input / output driver includes an output driver that is controlled by the command sequencer 142 and drives a command line to output a control command, and an input driver that receives a response input via the command line. A control command generated by the command sequencer 142 based on the contents of the control register of the controller control register unit 136 is output to the command line by the output driver of the first input / output driver. The response output from the memory card 200 in response to the control command is received by the input driver of the first input / output driver.

  The second input / output driver includes an output driver that is controlled by the data sequencer 144 and drives the data line to output the transfer data, and an input driver that receives the transfer data input through the data line. Based on the contents of the control register of the controller control register 136, the data from the FIFO I / F circuit 134 is output to the data line as transfer data by the output driver of the second input / output driver based on the control of the data sequencer 144. . The response output from the memory card 200 is received by the input driver of the first input / output driver.

  FIG. 14 shows a specific example of command setting information registered in the command table in the present embodiment.

  The command table has a plurality of blocks, a table index is assigned to each block, and command setting information is registered. Therefore, the command setting information of the block can be specified based on the table index. In FIG. 14, a command index, command type information, response type, argument transfer size, and transfer type are registered as command setting information, and the notation of each item follows the specifications of the SD standard. The command type information includes information indicating whether it is ACMD and information indicating whether it is a stop command.

  As described above, the command table includes command indexes of commands conforming to the MMC (MultiMediaCard) standard, SD (Secure Digital) standard, SDIO (SD Input / Output) standard, or CE-ATA (Consumer Electronics-AT Attachment) standard. A response type and command type information for specifying the type of command can be included. Also, the table index number and the command index number are different. Furthermore, it is desirable to add a new block if the control command is different if the versions are different even if they are the same standard. By doing so, it is not necessary to extract parameter information necessary for the control command for each standard or version, and it is only necessary to specify a table index, so that the control command generation process can be greatly simplified.

  FIG. 15 shows a timing diagram of an operation example of the card controller 130 when “0” is designated as the table index.

  15 also shows the state of the command sequencer 142 and the state of the data sequencer 144.

  The table index “0” corresponds to the control command CMD0 in FIG. For this reason, the card controller 130 in which the command setting information of the table index “0” is set as it is controls the card bus 20 in a sequence in which no response is issued and only a control command is issued.

  FIG. 16 shows a timing diagram of an operation example of the card controller 130 when “3” is designated as the table index.

  In FIG. 16, the state of the command sequencer 142 and the state of the data sequencer 144 are also illustrated.

  The table index “3” corresponds to the control command CMD3 with a response in FIG. Therefore, the card controller 130 in which the command setting information of the table index “3” is set as it is, after issuing the control command, ends the control command issuing process through a sequence of receiving a response corresponding to the control command.

  FIG. 17 shows a timing chart of an operation example of the card controller 130 when “9” is designated as the table index.

  In FIG. 17, the state of the command sequencer 142 and the state of the data sequencer 144 are also illustrated.

  The table index “9” corresponds to the control command CMD7 having a busy R1 response in FIG. Therefore, the card controller 130 in which the command setting information of the table index “9” is set as it is is controlled through a sequence in which a busy state is notified from the memory card 200 after the control command is issued and a response corresponding to the control command is received. Terminates command issue processing.

  As described above, in this embodiment, the command setting information necessary for generating various control commands is specified by the table index. Therefore, various command setting information with different standards and versions are collectively stored in the command table. Enabled to register. If a table index is designated, the complicated control command generation process can be simplified.

  The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the gist of the present invention. The memory card in the present embodiment is not limited to a flash memory card. Instead of the memory card in the present embodiment, an I / O device, an HDD device, a DVD device, or an optical disk device may be used.

  Further, the command setting information is not limited to that described in the above-described embodiment. For example, a command index of a control command of a standard based on the same idea as the SD standard or a standard developed from the SD standard and its parameter information. For example, a command index of a control command of a standard based on a concept similar to the MMC standard or a standard developed from the MMC standard and its parameter information, for example, a standard control based on a standard similar to the SDIO standard or a standard developed based on the SDIO standard The present invention can also be applied to the command index of a command and its parameter information, for example, the command index of a control command of a standard based on the same idea as the CE-ATA standard and the standard developed from the CE-ATA standard, and its parameter information.

  In the invention according to the dependent claims of the present invention, a part of the constituent features of the dependent claims can be omitted. Moreover, the principal part of the invention according to one independent claim of the present invention may be made dependent on another independent claim.

The block diagram of the example of composition of the electronic equipment to which the information processor in this embodiment was applied. Explanatory drawing of the control command in this embodiment. The block diagram of the structural example of the card controller of FIG. The figure which shows the outline | summary of a structure of the controller control register part of FIG. The block diagram of the structural example of the memory card of FIG. The figure which shows the outline | summary of a structure of the control command production | generation apparatus in this embodiment. The figure which shows the outline | summary of a structure of the command table of FIG. The figure which shows an example of the command setting information registered into each block of the command table of FIG. FIG. 2 is a flowchart of a processing example of the host system in FIG. 1. FIG. 10 is a flowchart of a process example of a control command issue process in FIG. 9. FIG. 11 is a flowchart of an example of card standard and version discrimination processing in FIG. 10. FIG. 11 is a flowchart of an example of control command issuance processing in FIG. 10. The figure which shows the outline | summary of a structure of the driver part of the card controller of FIG. The figure which shows the specific example of the command setting information registered into the command table in this embodiment. The timing diagram of the operation example of a card controller when "0" is designated as a table index. The timing diagram of the operation example of a card controller when "3" is designated as a table index. The timing diagram of the operation example of a card controller when "9" is designated as a table index.

Explanation of symbols

10 electronic equipment, 20 card bus, 100 host system, 110 CPU,
120 memory, 122 system bus, 130 card controller,
132 control I / F circuit, 134 FIFO I / F circuit,
136 Controller control register part, 138 Clock control part,
140 control logic, 142 command sequencer,
144 Data sequencer, 150 Command specification register,
152 Argument setting register, 154 Command type setting register,
156 Response designation register, 158 Transfer type setting register,
160 transfer count setting register, 200 memory card,
210 card I / F circuit, 220 card I / F control circuit,
230 card control register section, 240 memory I / F circuit,
250 memory core unit, 300 control command generation device,
310 command table, 320 command information setting section,
322 Command information extraction unit, 324 Command issue control unit

Claims (18)

A control command generation device for generating a control command for a storage device,
A command table in which a plurality of command setting information is registered for each block corresponding to the type of the control command;
Based on the setting information of the control register by designating the table index corresponding to the block and setting the command setting information of the block specified by the table index in the control register of the control device for accessing the storage device A command information setting unit that performs control to issue the control command,
Each command setting information
A control command generation device comprising: command designation information for designating a type of the control command; and parameter information for designating a control sequence type corresponding to the control command. In claim 1,
Each command setting information is provided for each combination of the command index and the parameter information as the command designation information for designating the type of the control command,
The control command generation device, wherein the table index and the command index are different. In claim 1 or 2,
The plurality of command setting information includes:
A control command generation device, comprising: command setting information corresponding to a control command specified by the first standard; and command setting information corresponding to a control command specified by the second standard. In any one of Claims 1 thru | or 3,
Each command setting information is
Including a command index as the command designation information for designating the type of the control command, and a response type as the parameter information,
The response type is
A control command generation device, characterized in that the control command generation device is information specifying a response sequence from the storage device corresponding to the control command. In any one of Claims 1 thru | or 4,
The order in which the command designation information and the parameter information of each command setting information are stored is the same as the order of the addresses that specify the control registers of the control device in which the command designation information and the parameter information are set. A control command generation device. In any one of Claims 1 thru | or 5,
A control command characterized in that the order of bits of command information of each command setting information and the information of parameter information is the same as the order of bit fields of a control register of the control device in which the information is set Generator. In any one of Claims 1 thru | or 6.
The command information setting unit
A control command generation device characterized by discriminating a type of a standard or a version of the storage device and designating the table index based on the discrimination result. In any one of Claims 1 thru | or 7,
The command table is
Command index and response type of control commands conforming to MMC (MultiMediaCard) standard, SD (Secure Digital) standard, SDIO (SD Input / Output) standard, or CE-ATA (Consumer Electronics-AT Attachment) standard, and command type And a command type information for designating a control command. An information processing apparatus for accessing a storage device,
A control device having a control register and issuing a control command for accessing the storage device based on setting information of the control register;
An information processing apparatus comprising: the control command generation apparatus according to claim 1, wherein the command setting information is set in a control register of the control apparatus. The storage device;
An electronic apparatus comprising the information processing apparatus according to claim 9. Means for designating a table index corresponding to a block for a command table in which a plurality of command setting information is registered for each block corresponding to a type of control command for the storage device;
Means for controlling the command setting information of the block specified by the table index to issue the control command based on the setting information of the control register by setting the control register of the control device for accessing the storage device Function as a computer
Each command setting information
A program comprising command designation information for designating a type of the control command and parameter information for designating a control sequence type corresponding to the control command. In claim 11,
Each command setting information is provided for each combination of the command index and the parameter information as the command designation information for designating the type of the control command,
The program in which the table index and the command index are different. In claim 11 or 12,
The plurality of command setting information includes:
A program comprising command setting information corresponding to a control command defined in the first standard and command setting information corresponding to a control command defined in the second standard. In any of claims 11 to 13,
Each command setting information is
Including a command index as the command designation information for designating the type of the control command, and a response type as the parameter information,
The response type is
A program characterized by being information specifying a response sequence from the storage device corresponding to the control command. In any one of Claims 11 thru | or 14.
The order in which the command designation information and the parameter information of each command setting information are stored is the same as the order of the addresses that specify the control registers of the control device in which the command designation information and the parameter information are set. A featured program. In any of claims 11 to 15,
A program characterized in that the command designation information of each command setting information and the bit sequence of each information of the parameter information are the same as the bit field sequence of the control register of the control device in which the information is set. In any of claims 11 to 16,
A program for discriminating the type of the storage device standard or version and designating the table index based on the discrimination result. In any of claims 11 to 17,
The command table is
Command index and response type of control commands conforming to MMC (MultiMediaCard) standard, SD (Secure Digital) standard, SDIO (SD Input / Output) standard, or CE-ATA (Consumer Electronics-AT Attachment) standard, and command type And a command type information for designating a program.

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