JP2008270871A - Reference voltage generating circuit, a-d converter, and d-a converter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reference voltage generating circuit to which a voltage dividing resistance for dividing a reference voltage is connected, capable of outputting a highly accurate divided voltage, and reduced in limitation on an arrangement or a dimension while suppressing the current consumption of resistance during a static period, and to provide an A-D converter and a D-A converter using the same. <P>SOLUTION: The reference voltage generating circuit 11 comprises a reference voltage source 12 for outputting a voltage V1 and a buffer 13, and outputs the reference voltage VREF. A ladder resistance 14 is connected to the reference voltage VREF. A divided voltage output of the ladder resistance 14 is inputted to a comparator part 15, and a comparison result with an input voltage VIN is outputted as output signals S1-SN. The buffer 13 is controlled by a signal SLEEP. When the signal SLEEP is turned off, the reference voltage VREF equivalent to the voltage V1 is outputted and the comparator part 15 is operated. When the signal SLEEP is turned on, the reference voltage VREF is lowered and the comparator part 15 is stopped. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a reference voltage generation circuit that supplies a DC output voltage to various electronic devices, and more particularly to control of the electronic device at rest. The present invention also relates to an A / D converter and a D / A converter using a reference voltage generation circuit.

  In an A / D converter or a D / A converter, a reference voltage may be divided by a dividing resistor and used. In low noise applications, the dividing resistor is a thermal noise source, so the resistance value cannot be increased so much, and may be about 10 kΩ as a whole. When the reference voltage is directly applied to the dividing resistor, a current flows through the dividing resistor even when it is stationary, thereby consuming the current at the dividing resistor. For example, when the reference voltage is 1 V, if the resistance value of the dividing resistor is 10 kΩ, a current of 100 μA always flows even at rest.

  In order to solve this problem, a switch may be inserted between the reference voltage and the dividing resistor. However, a voltage drop of the reference voltage occurs due to the ON resistance of the switch, and the relative accuracy is deteriorated.

  FIG. 9 shows a conventional example that solves this problem. FIG. 9 is a circuit diagram of FIG. The A / D converter 70 in FIG. 9 includes a reference voltage source 71, a ladder resistor 72 including resistors 72-1 to 72-N and switches 74-1 to 74-N, and comparators 73-1 to 73-N. And a comparator unit 73. The A / D converter 70 compares a voltage obtained by dividing the voltage of the reference voltage source 71 by the ladder resistor 72 with the input voltage VIN by the comparator 73, and compares the comparison results with the output signals S1, S2, S3, S4,. Output as S (N-1) and SN.

The ladder resistor unit 72 includes switches 74-1 to 72-N for each of the resistors 72-1 to 72-N, and when the switch is stationary, the switches 74-1 to 72-N are turned off. In addition to reducing current consumption, the switches 74-1 to 72-N are provided for each of the resistors 72-1 to 72-N, thereby improving the relative ratio accuracy of the resistors and outputting a highly accurate divided voltage. It becomes.
JP-A-4-22223

  However, since the A / D converter 70 of FIG. 9 requires the switches 74-1 to 72-N for each of the resistors 72-1 to 72-N, the higher the resolution A / D converter, the more the number of switches. This increases the mounting area and cost.

  Further, in order to maintain the output accuracy of the divided voltage, the relative ratio accuracy of each of the switches 74-1 to 72-N is required. In order to ensure the relative ratio accuracy, the selection and arrangement of the switches 74-1 to 72-N are restricted, which causes a deterioration in yield.

  Accordingly, an object of the present invention is to provide a reference voltage generation circuit capable of outputting a divided voltage with high accuracy and having less restrictions on arrangement and area while reducing current consumption at rest, and an A / D converter using the same. It is to be.

  In order to solve the above problems, a first reference voltage generation circuit according to the present invention includes a reference voltage source that outputs a first voltage, an active circuit that inputs the first voltage and outputs a second voltage, and A voltage dividing circuit that inputs the second output voltage and divides the second voltage to output a plurality of third voltages having different voltage values in stages, and the active circuit receives the operation control signal As an input, when the operation control signal is in the first state, a voltage having a predetermined relationship with the first voltage is output as the second voltage, and when the operation control signal is in the second state, the second voltage is output. A voltage lower than the output voltage when the operation control signal is in the first state is output as the voltage of 2, or the output terminal is opened.

  According to this configuration, the operation control signal is set to the first state during normal operation and the operation control signal is set to the second state during stationary operation, so that the current flowing from the active circuit to the voltage resolving circuit during stationary operation can be Compared to this, the current consumption can be reduced. Further, the active circuit can avoid an unnecessary decrease in the second voltage due to the insertion of the active circuit during normal operation, and can output a divided voltage with high accuracy. Furthermore, only one active circuit needs to be provided for the entire voltage dividing circuit, and restrictions on arrangement and area can be reduced.

  In the first reference voltage generation circuit of the present invention, the active circuit is preferably a buffer, and the predetermined relationship is that the voltage value of the second voltage is the same as the voltage value of the first voltage.

  According to this configuration, the second voltage having the same voltage value as the first voltage output from the reference voltage source can be applied to the voltage dividing circuit.

  In the first reference voltage generating circuit of the present invention, the active circuit is an amplifier, and the predetermined relationship is that even if the voltage value of the second voltage is a constant multiple of the voltage value of the first voltage. Good.

  According to this configuration, the second voltage having a voltage value that is a constant multiple of the first voltage output from the reference voltage source can be applied to the voltage dividing circuit. In many cases, a band gap voltage of 1.25 V is used as the reference voltage source. However, by boosting the reference voltage source, the upper limit of the input of the A / D converter can be increased to 1.25 V or more.

  A second reference voltage generation circuit according to the present invention includes a reference voltage source that outputs a first voltage, an active circuit that receives the first voltage and outputs a second voltage, and receives the second output voltage. And a voltage dividing circuit that divides the second voltage and outputs a plurality of third voltages having different voltage values in stages, and the active circuit receives the second power supply voltage when the operating power supply voltage is supplied. Whether a voltage having a predetermined relationship with respect to the first voltage is output as a voltage, and a voltage lower than the output voltage when the operating power supply voltage is supplied is output as the second voltage when the operating power supply voltage is not supplied Or the output end is open.

  According to this configuration, the operating power supply voltage is supplied to the active circuit during normal operation, and the operating power supply voltage is not supplied to the active circuit during rest, so that the current flowing from the active circuit to the voltage resolving circuit during rest can be compared with that during normal operation. Therefore, current consumption can be reduced. Further, the active circuit can avoid an unnecessary decrease in the second voltage due to the insertion of the active circuit during normal operation, and can output a divided voltage with high accuracy. Furthermore, only one active circuit needs to be provided for the entire voltage dividing circuit, and restrictions on arrangement and area can be reduced.

  In the second reference voltage generation circuit of the present invention, the active circuit is formed of a buffer, and the predetermined relationship is that the voltage value of the second voltage is the same as the voltage value of the first voltage. preferable.

  According to this configuration, the second voltage having the same voltage value as the first voltage output from the reference voltage source can be applied to the voltage dividing circuit.

  In the second reference voltage generating circuit of the present invention, the active circuit is an amplifier, and the predetermined relationship is that the voltage value of the second voltage is a constant multiple of the voltage value of the first voltage. There may be.

  According to this configuration, the second voltage having a voltage value that is a constant multiple of the first voltage output from the reference voltage source can be applied to the voltage dividing circuit. In many cases, a band gap voltage of 1.25 V is used as the reference voltage source. However, by boosting the reference voltage source, the upper limit of the input of the A / D converter can be increased to 1.25 V or more.

  A first A / D converter according to the present invention includes a first reference voltage generation circuit according to the present invention described above, and a comparator that compares an analog input signal and a plurality of third voltages output from the reference voltage generation circuit. Department.

  According to this configuration, the same effects as the first reference voltage generation circuit are obtained.

  In the first A / D converter of the present invention, the comparator unit receives the operation control signal, operates when the operation control signal is in the first state, and the operation control signal is in the second state. It is preferable to stop the operation at a certain time.

  According to this configuration, since the comparator unit stops when stationary, power consumption when stationary can be reduced.

  A second A / D converter of the present invention includes a comparator unit that compares the second reference voltage generation circuit of the present invention with an analog input signal and a plurality of third voltages output from the reference voltage generation circuit. And.

  According to this configuration, the same effect as the second reference voltage generation circuit is obtained.

  In the second A / D converter of the present invention, the comparator section is supplied with the operating power supply voltage when the operating power supply voltage is supplied to the active circuit, and operates when the operating power supply voltage is not supplied to the active circuit. It is preferable that no power supply voltage is supplied.

  According to this configuration, since the comparator unit stops when stationary, power consumption when stationary can be reduced.

  The first D / A converter of the present invention includes the first reference voltage generation circuit of the present invention described above and one of a plurality of third voltages output from the reference voltage generation circuit by a digital input signal. And a selection unit for selecting.

  According to this configuration, the same effects as the first reference voltage generation circuit are obtained.

  In the first D / A converter of the present invention, the selection unit receives the operation control signal, operates when the operation control signal is in the first state, and the operation control signal is in the second state. It is preferable to stop the operation at a certain time.

  According to this configuration, since the selection unit stops when stationary, power consumption when stationary can be reduced.

  A second D / A converter according to the present invention includes the above-described second reference voltage generation circuit according to the present invention and one of a plurality of third voltages output from the reference voltage generation circuit by a digital input signal. And a selection unit for selecting.

  According to this configuration, the same effect as the second reference voltage generation circuit is obtained.

  In the second D / A converter of the present invention, the selection unit operates when the operation power supply voltage is supplied to the active circuit and when the operation power supply voltage is not supplied to the active circuit. It is preferable that no power supply voltage is supplied.

  According to this configuration, since the selection unit stops when stationary, power consumption when stationary can be reduced.

  According to the present invention, in a reference voltage generation circuit having a voltage dividing circuit that divides a reference voltage, power consumption at rest can be suppressed, and a highly accurate divided voltage can be output. Further, even if the number of dividing resistors constituting the voltage dividing circuit increases, the mounting area other than the resistors does not increase, and there is no restriction on the arrangement of the buffers or amplifiers.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment 1)
Hereinafter, a reference voltage generation circuit according to Embodiment 1 of the present invention and an A / D converter using the same will be described with reference to the drawings.

  FIG. 1 shows a circuit diagram of a reference voltage generating circuit and an A / D converter using the same according to Embodiment 1 of the present invention. The A / D converter 10 includes a reference voltage generation circuit 11, a ladder resistor unit 14, and a comparator unit 15.

  The reference voltage generation circuit 11 includes a reference voltage source 12 that outputs a voltage V1 and a buffer 13 that is an active circuit, and outputs a reference voltage VREF. The reference voltage VREF is supplied to the ladder resistor unit 14 which is a voltage dividing circuit. The buffer 13 outputs a voltage having the same voltage value as the input voltage.

  The ladder resistor unit 14 includes resistors 14-1 to 14 -N, and the divided output is input to each comparator 15-1 to 15 -N constituting the comparator unit 15.

  The buffer 13 and the comparator unit 15 are controlled by a signal SLEEP. The comparator unit 15 outputs the output signals S1 to SN when the signal SLEEP is off, stops when the signal SLEEP is on, and does not consume current.

  The buffer 13 outputs a reference voltage VREF (second voltage) having a voltage value equal to the voltage V1 (first voltage) when the signal SLEEP is off, and sets the reference voltage VREF to 0 V when the signal SLEEP is on. Reduce. For the purpose of reducing power consumption, it is desirable to reduce it to 0 V. However, even if it is not reduced to 0 V, the power consumption can be reduced if it is lower than the voltage V1.

  FIG. 2 shows a circuit diagram of an example of the buffer 13 controlled by the signal SLEEP. FIG. 2 is a circuit diagram of an example of the buffer 13 composed of CMOS operational amplifiers. The buffer 13 includes a differential input circuit 16, a constant current source 17, a constant current source 18, an inverter 19, a constant current source 20, a switch M1, a switch M2, and a power switch M3.

  When the signal SLEEP is off (during normal operation), the switch M1 and the switch M2 are off, the voltage V1 is input from the reference voltage source 11, and the reference voltage VREF is output. When a voltage difference occurs between the reference voltage VREF input to the differential input circuit 16 and the voltage V1, the gate voltage of the power switch M3 varies so as to cancel the voltage difference. When the voltage V1 is higher than the reference voltage VREF, the gate voltage of the power switch M3 decreases and the reference voltage VREF increases. When the voltage V1 is lower than the reference voltage VREF, the gate voltage of the power switch M3 increases and the reference voltage VREF decreases. Therefore, feedback always works so that the reference voltage VREF becomes equal to the voltage V1. As for the accuracy of the voltage V1, the difference from the reference voltage VREF can be suppressed to about 2 mV by the configuration of the differential input circuit 16. If the reference voltage VREF is, for example, a band gap voltage of 1.25 V, it is possible to output a voltage with a very low error of about 0.2%. The above error is caused by mismatch of input transistors in the differential circuit.

  At rest, the signal SLEEP is turned on and the switches M1 and M2 are turned on. As a result, both the power switch M3 and the constant current source 17 are turned off. As a result, the output of the buffer 13 becomes 0V. Therefore, the buffer 13 stops supplying voltage from the output, and current consumption by the ladder resistor unit is suppressed.

  When only the switch M2 is turned on by the signal SLEEP and the switch M1 is not turned off, the output of the buffer 13 is in an open state. Therefore, the buffer 13 stops supplying current from the output, and current consumption by the ladder resistor unit is suppressed.

  According to this embodiment, the buffer 13 is provided in place of the conventional switch, and the operation of the buffer 13 is controlled by the signal SLEEP, so that the reference having the same voltage value as the voltage V1 from the output terminal during the normal operation. The voltage VREF is output, and when the electronic device in which the voltage VREF is used is stationary, the reference voltage VREF output from the output terminal is lowered from the normal operation or the output is opened.

  In this way, the reference voltage VREF output from the output terminal is lowered at the time of stationary, or the output is opened, so that the current consumption at the stationary time can be reduced. Further, during the normal operation, the reference voltage VREF having the same voltage value as the voltage V1 is output, so that a highly accurate divided voltage can be output. Further, even if the number of dividing resistors constituting the voltage dividing circuit is increased, the mounting area other than the resistors is not increased, and the arrangement of the buffer 13 is not restricted.

(Embodiment 2)
FIG. 3 shows a circuit diagram of a reference voltage generating circuit and an A / D converter using the same according to Embodiment 2 of the present invention. 3, the same reference numerals are given to the same components as those of the A / D converter 10 and the reference voltage generation circuit 11 in FIG. 1, and the description thereof is omitted. The A / D converter 30 in FIG. 3 differs from the A / D converter 10 in FIG. 1 in that the reference voltage generation circuit 11 is used as a component in FIG. It is a point to use. 3 is different from the reference voltage generation circuit 11 in FIG. 2 in that an amplifier 33 which is an active circuit is used in place of the buffer 13.

  The amplifier 33 reduces the reference voltage VREF when stationary when the signal SLEEP is turned on, but changes the reference voltage VREF to a voltage higher than the voltage V1 during normal operation when the signal SLEEP is turned off. An amplifier 33 shown in FIG. 3 is an example of a non-inverting amplifier including an operational amplifier 34, a resistor 35, and a resistor 36. Depending on the resistance ratio of the resistor 35 and the resistor 36, a voltage output of 1 or more times the input can be achieved.

  FIG. 4 shows an example of the amplifier 33. In FIG. 4, the same components as those in the buffer 13 of FIG. The amplifier 33 in FIG. 4 differs from the buffer 13 in FIG. 2 in that a resistor 35 and a resistor 36 are added as components in FIG. When the resistance value of the resistor 35 is R35 and the resistance value of the resistor 36 is R36, the relationship between the input and output voltages of the amplifier 33 is VREF = (1 + R35 / R36) × V1. Similarly to the buffer 13, the amplifier 33 is fed back, and the reference voltage VREF is (1 + R35 / R36) times the voltage V1, and an output voltage with high accuracy is output.

  According to this embodiment, the same effect as in the first embodiment can be obtained, and the reference voltage VREF applied to the ladder resistor unit 14 can be made higher than the voltage V1 of the reference voltage source 12. As a result, the following effects are obtained. In many cases, a band gap voltage of 1.25 V is used as the reference voltage source. However, by boosting the reference voltage source, the upper limit of the input of the A / D converter can be increased to 1.25 V or more.

  Note that the output of the amplifier 33 may be opened when stationary.

(Embodiment 3)
FIG. 5 shows a circuit diagram of a reference voltage generating circuit and an A / D converter using the same according to Embodiment 3 of the present invention. In FIG. 5, the same components as those in the A / D converter 10 and the reference voltage generation circuit 11 in FIG.

  The configuration in which the A / D converter 40 in FIG. 5 is different from the A / D converter 10 in FIG. 1 uses the reference voltage generation circuit 11 and the comparator unit 15 as components in FIG. 1, whereas in FIG. The generation circuit 41 and the comparator unit 45 are used. The comparator unit 45 includes comparators 45-1 to 45-N.

  Further, a switch 47 connected to the power source 46 is added as a component of the A / D converter of FIG. The switch 47 is turned off when stationary and turned on during normal operation. Further, the reference voltage generation circuit 11 in FIG. 1 uses the buffer 13, whereas the reference voltage generation circuit 41 in FIG. 5 uses the buffer 43.

  In the third embodiment, the switch 47 between the power supply 46, the comparator unit 45, and the buffer 13 is turned off instead of turning on the signal SLEEP at rest. As a result, the comparator 45 stops supplying the power supply voltage VCC when it is stationary. As a result, the current consumption of the comparator unit 45 at rest is reduced.

  Further, by turning off the switch 47, the supply of the power supply voltage VCC is similarly stopped when the buffer 43 is stationary. As a result, the reference voltage VREF output from the buffer 43 is reduced to 0V. As a result, it is possible to reduce power loss caused by applying the reference voltage VREF to the ladder resistor unit 14 at rest.

  FIG. 6 shows a circuit diagram of an example of the buffer 43. 2 differs from the buffer 13 of FIG. 2 in that the buffer 43 of FIG. 6 does not need to include the inverter 19, the switch M1, and the switch M2 as components, and instead of changing the reference voltage VREF by turning on / off the signal SLEEP. In other words, the reference voltage VREF is changed by controlling the power supply voltage VCC. During normal operation, the power supply voltage VCC is sufficiently high, and the reference voltage VREF is equal to the voltage V1. On the other hand, since the power supply voltage VCC is not supplied to the buffer 43 at rest, the buffer 43 stops and the reference voltage VREF becomes 0V. Therefore, there is no current consumption in the ladder resistor unit 14 and the buffer 43.

  According to this embodiment, it has the same effect as the first embodiment.

  Note that the output of the buffer 43 may be in an open state when stationary.

(Embodiment 4)
FIG. 7 shows a circuit diagram of a reference voltage generating circuit and an A / D converter using the same according to Embodiment 4 of the present invention. In FIG. 7, the same components as those of the A / D converter 40 and the reference voltage generation circuit 41 in FIG. The A / D converter 60 in FIG. 7 differs from the A / D converter 40 in FIG. 5 in that the reference voltage generation circuit 41 is used as a component in FIG. It is a point to use. Further, the reference voltage generating circuit 41 in FIG. 5 uses the buffer 43, but the reference voltage generating circuit 61 in FIG. The amplifier 63 is an example of a non-inverting amplifier including an operational amplifier 64, a resistor 65, and a resistor 66. Depending on the resistance ratio of the resistor 65 and the resistor 66, it is possible to output a voltage more than 1 times the input.

  The amplifier 63 stops supplying the power supply voltage VCC and reduces the reference voltage VREF when the switch 47 is turned off. On the other hand, during normal operation when the switch 47 is turned on, the reference voltage VREF is changed to a voltage higher than the voltage V1.

  According to the configuration of the present invention, the same effect as that of the third embodiment can be obtained, and the reference voltage VREF applied to the ladder resistor unit 14 can be made higher than the voltage V1 of the reference voltage source 12.

  Note that the output of the amplifier 63 may be open when stationary.

(Embodiment 5)
FIG. 8 shows a circuit diagram of a reference voltage generation circuit according to Embodiment 5 of the present invention and a D / A converter using the reference voltage generation circuit. The D / A converter 90 includes a reference voltage generation circuit 11, a ladder resistor unit 14, and a selection unit 95. Since the reference voltage generation circuit 11 and the ladder resistor section 14 are the same as those in FIG.

The selection unit 95 includes a buffer 95-0 and switches 95-1 to 95-N.
Only one of the switches 95-1 to 95-N is turned on by the digital input DIN, and the other switches are turned off. Therefore, one of the voltages obtained by dividing the reference voltage VREF with a ladder resistor is input. A voltage having the same potential as this voltage is output from the output VOUT.

  Therefore, the output VOUT corresponding to the digital input DIN one to one is output.

  Although the fifth embodiment describes the D / A converter 90 having a configuration corresponding to the first embodiment, the D / A converter having a configuration corresponding to each of the second to fourth embodiments is similarly described. Needless to say, it can be configured. That is, a D / A converter can be formed using the amplifier 33 as shown in FIG. 3 instead of the buffer 13, and a D / A converter can be formed using the buffer 43 and the switch 47 as shown in FIG. Further, a D / A converter can be formed by using the amplifier 63 and the switch 47 as shown in FIG.

  In each embodiment of the present invention, the number of resistors constituting the ladder resistor unit 14 may be any number.

  The present invention is useful for a reference voltage generation circuit that divides and uses a reference voltage, an A / D converter and a D / A converter using the reference voltage generation circuit.

1 is a circuit diagram showing a configuration of a reference voltage generation circuit according to Embodiment 1 of the present invention and an A / D converter using the same. FIG. FIG. 3 is a circuit diagram showing an example of a configuration of a buffer constituting the reference voltage generation circuit according to Embodiment 1 of the present invention. FIG. 5 is a circuit diagram of a reference voltage generation circuit according to a second embodiment of the present invention and an A / D converter using the reference voltage generation circuit. It is a circuit diagram which shows an example of a structure of the amplifier which comprises the reference voltage generation circuit which concerns on Embodiment 2 of this invention. FIG. 6 is a circuit diagram of a reference voltage generation circuit according to a third embodiment of the present invention and an A / D converter using the reference voltage generation circuit. It is a circuit diagram which shows an example of a structure of the buffer which comprises the reference voltage generation circuit which concerns on Embodiment 3 of this invention. It is a circuit diagram which shows the structure of the reference voltage generation circuit which concerns on Embodiment 4 of this invention, and an A / D converter using the same. It is a circuit diagram which shows the structure of the reference voltage generation circuit which concerns on Embodiment 5 of this invention, and a D / A converter using the same. It is a circuit diagram of a conventional example disclosed in Patent Document 1.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 A / D converter 30 A / D converter 40 A / D converter 60 A / D converter 11 Reference voltage generation circuit 31 Reference voltage generation circuit 41 Reference voltage generation circuit 61 Reference voltage generation circuit 12 Reference voltage source 13 Buffer 14 Ladder resistance part 14-1 to 14-N resistor 15 comparator unit 15-1 to 15-N comparator 16 differential input circuit 17 constant current source 18 constant current source 19 inverter 20 constant current source 33 amplifier 34 operational amplifier 35 resistor 36 resistor 43 buffer 45 comparator Unit 45-1 to 45-N comparator 46 power supply 47 switch 63 amplifier 64 operational amplifier 65 resistor 66 resistor 70 A / D converter 71 reference voltage source 72 ladder resistor unit 72-1 to 72-N resistor 73 comparator unit 73 to -1 73-N Compare 74 switch 74-1 to 74-N switch 90 D / A converter 95 selection unit 95-0 buffer 95-1 to 95-N switch M1 switch M2 switch M3 power switch VREF reference voltage V1 voltage VIN input voltage VCC power supply voltage S1 Output signal S2 Output signal S3 Output signal S4 Output signal S (N-1) Output signal SN Output signal SLEEP signal R35 Resistance value R36 Resistance value DIN Digital input VOUT output

Claims (14)

A reference voltage source for outputting a first voltage;
An active circuit for inputting the first voltage and outputting a second voltage;
A voltage dividing circuit that inputs the second output voltage, divides the second voltage, and outputs a plurality of third voltages having different voltage values stepwise;
The active circuit receives an operation control signal, outputs a voltage having a predetermined relationship with the first voltage as the second voltage when the operation control signal is in a first state, When the operation control signal is in the second state, a voltage lower than the output voltage when the operation control signal is in the first state is output as the second voltage, or the output terminal is opened. A reference voltage generating circuit.   2. The reference voltage generation circuit according to claim 1, wherein the active circuit is formed of a buffer, and the predetermined relationship is that the voltage value of the second voltage is the same as the voltage value of the first voltage.   2. The reference voltage generation circuit according to claim 1, wherein the active circuit comprises an amplifier, and the predetermined relationship is that the voltage value of the second voltage is a constant multiple of the voltage value of the first voltage. A reference voltage source for outputting a first voltage;
An active circuit for inputting the first voltage and outputting a second voltage;
A voltage dividing circuit that inputs the second output voltage, divides the second voltage, and outputs a plurality of third voltages having different voltage values stepwise;
The active circuit outputs a voltage having a predetermined relation to the first voltage as the second voltage when an operating power supply voltage is supplied, and the second circuit when the operating power supply voltage is not supplied. A reference voltage generation circuit characterized in that a voltage lower than the output voltage when the operating power supply voltage is supplied is output as the voltage of the output voltage, or the output terminal is in an open state.   5. The reference voltage generation circuit according to claim 4, wherein the active circuit is formed of a buffer, and the predetermined relationship is that the voltage value of the second voltage is the same as the voltage value of the first voltage.   5. The reference voltage generating circuit according to claim 4, wherein the active circuit is composed of an amplifier, and the predetermined relationship is that the voltage value of the second voltage is a constant multiple of the voltage value of the first voltage. A reference voltage generation circuit according to any one of claims 1 to 3,
An A / D converter comprising a comparator unit that compares an analog input signal with a plurality of third voltages output from the reference voltage generation circuit.   8. The comparator according to claim 7, wherein the comparator unit receives an operation control signal, operates when the operation control signal is in the first state, and stops operation when the operation control signal is in the second state. A / D converter. A reference voltage generating circuit according to any one of claims 4 to 6,
An A / D converter comprising a comparator unit that compares an analog input signal with a plurality of third voltages output from the reference voltage generation circuit.   10. The A / A of claim 9, wherein the comparator section is supplied with an operating power supply voltage when an operating power supply voltage is supplied to the active circuit, and is not supplied with an operating power supply voltage when no operating power supply voltage is supplied to the active circuit. D converter. A reference voltage generation circuit according to any one of claims 1 to 3,
A D / A converter comprising: a selection unit that selects one of a plurality of third voltages output from the reference voltage generation circuit according to a digital input signal.   12. The selection unit according to claim 11, wherein the selection unit receives an operation control signal, operates when the operation control signal is in the first state, and stops operation when the operation control signal is in the second state. D / A converter. A reference voltage generating circuit according to any one of claims 4 to 6,
A D / A converter comprising: a selection unit that selects one of a plurality of third voltages output from the reference voltage generation circuit according to a digital input signal.   14. The D / D of claim 13, wherein the selection unit is supplied with an operating power supply voltage when an operating power supply voltage is supplied to the active circuit, and is not supplied with an operating power supply voltage when no operating power supply voltage is supplied to the active circuit. A converter.

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