JP2008205186A - Storage cell and memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a storage cell capable of recording information stably at a small current amount. <P>SOLUTION: The storage cell 1 has a storage layer 3 for holding information by the magnetization state of a magnetic body, and a magnetization fixing layer 2 in which the direction of a magnetization is fixed with respect to this storage layer 3 through a tunnel insulating layer 15. A current Iz is made to flow in a lamination direction, whereby the direction of the magnetization M1 of the storage layer 3 changes and the information is recorded for the storage layer 3. The magnetization fixing layer 2 comprises a plurality of ferromagnetic layers 12, 14 laminated through a nonmagnetic layer 13, and a current supply part for making a current Ia in a film face direction flow to the magnetization fixing layer 2 configures the storage cell 1 formed at the magnetization fixing layer 2. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention includes a storage layer that stores the magnetization state of a magnetic material as information, and a magnetization fixed layer whose magnetization direction is fixed, and a storage element that changes the magnetization direction of the storage layer by passing an electric current. The present invention relates to a memory provided with a memory element, and is suitable for application to a nonvolatile memory.

With the rapid spread of information communication devices, especially small personal devices such as portable terminals, the higher integration, higher speed, lower power, etc. for the elements such as memory and logic that compose this device. There is a demand for higher performance.
In particular, the nonvolatile memory is considered as an indispensable component for enhancing the functionality of the device.

  As the nonvolatile memory, semiconductor flash memory, FeRAM (ferroelectric nonvolatile memory), and the like have been put into practical use, and active research and development are being conducted for further enhancement of performance.

  Recently, as a new nonvolatile memory using a magnetic material, MRAM (Magnetic Random Access Memory) using a tunnel magnetoresistive effect has been remarkably developed and attracting attention (for example, see Non-Patent Document 1).

This MRAM has a structure in which minute memory elements for recording information are regularly arranged, and wirings such as word lines and bit lines are provided so that each of them can be accessed.
Each magnetic memory element includes a storage layer that records information as the magnetization direction of the ferromagnetic material.

  As a configuration of the magnetic memory element, a so-called magnetic tunnel junction (Magnetic Tunnel Junction) including the above-described storage layer, a tunnel insulating film (nonmagnetic spacer film), and a magnetization fixed layer whose magnetization direction is fixed. A structure using MTJ) is employed. The magnetization direction of the magnetization fixed layer can be fixed, for example, by providing an antiferromagnetic layer.

  In such a structure, a so-called tunnel magnetoresistance effect is produced in which the resistance value with respect to the tunnel current flowing through the tunnel insulating film changes depending on the angle between the magnetization direction of the storage layer and the magnetization direction of the magnetization fixed layer. Therefore, information can be written (recorded) by utilizing the tunnel magnetoresistance effect. The magnitude of the resistance value takes a maximum value when the magnetization direction of the storage layer and the magnetization direction of the magnetization fixed layer are antiparallel, and takes a minimum value when they are parallel.

In the magnetic memory element configured as described above, writing (recording) of information to the magnetic memory element is performed on the storage layer of the magnetic memory element by a combined current magnetic field generated by flowing current to both the word line and the bit line. This can be done by controlling the direction of magnetization. In general, the difference in magnetization direction (magnetization state) at this time is stored in association with “0” information and “1” information.
As a method for recording (writing) information in a memory element, there are a method using asteroid characteristics (for example, see Patent Document 1) and a method using switching characteristics (for example, see Patent Document 2).
On the other hand, when reading recorded information, a memory cell is selected using an element such as a transistor, and the difference in the magnetization direction of the storage layer is determined by using the tunnel magnetoresistive effect of the magnetic memory element. By detecting as, it is possible to detect the recorded information.

When this MRAM is compared with other nonvolatile memories, the greatest feature is that the direction of magnetization of the storage layer made of a ferromagnetic material is reversed to rewrite “0” information and “1” information. The rewriting of almost infinite (> 10 ¹⁵ times) is possible.

  However, in MRAM, in order to rewrite recorded information, it is necessary to generate a relatively large current magnetic field, and a certain amount of current (for example, several mA to several tens of mA) must be passed through the address wiring. Therefore, power consumption increases.

In addition, in the MRAM, a write address line and a read address line are required, and it is structurally difficult to miniaturize the memory cell.
Furthermore, as the device becomes finer, the address wiring becomes thinner and it becomes difficult to pass a sufficient current, and the current magnetic field required due to the increased coercive force increases the power consumption, etc. Will occur.
Therefore, it is difficult to miniaturize the element.

Therefore, as one method for solving this problem, a configuration in which recording is performed without using a current magnetic field has been studied. In particular, as a configuration capable of performing magnetization reversal with a smaller current, magnetization reversal by spin transfer has been studied. Attention has been focused on a memory having a configuration using the above (see, for example, Patent Document 3).
Magnetization reversal by spin transfer is to cause magnetization reversal in another magnetic material by injecting spin-polarized electrons that have passed through the magnetic material into another magnetic material (for example, patents). Reference 4).
That is, when spin-polarized electrons that have passed through a magnetic layer (magnetization pinned layer) whose magnetization direction is fixed enter another magnetic layer (magnetization free layer) whose magnetization direction is not fixed, This is a phenomenon of applying torque to the magnetization. And if the electric current beyond a certain threshold value is sent, the direction of magnetization of a magnetic layer (magnetization free layer) can be reversed.

  For example, a giant magnetoresistive effect element (GMR element) or a magnetic tunnel junction element (MTJ element) having a magnetization fixed layer and a magnetization free layer can be used by passing a current in a direction perpendicular to the film surface. The magnetization direction of at least a part of the magnetic layer of the element can be reversed.

Thus, a storage element having a magnetization fixed layer and a magnetization free layer (storage layer) is formed, and by changing the polarity of a current flowing through the storage element, the magnetization direction of the storage layer is reversed, and “0” information and Rewrite with “1” information.
Reading recorded information can utilize the tunnel magnetoresistive effect in the same manner as the MRAM, by providing a tunnel insulating layer between the magnetization fixed layer and the magnetization free layer (storage layer).

Magnetization reversal by spin transfer has an advantage that magnetization reversal can be realized without increasing current even if the element is miniaturized.
The absolute value of the current passed through the memory element for magnetization reversal is 1 mA or less for a memory element with a scale of about 0.1 μm, for example, and decreases in proportion to the volume of the memory element, which is advantageous in terms of scaling.

  In addition, since the recording word line required in the MRAM is not required, there is an advantage that the configuration of the memory cell is simplified.

  Hereinafter, a storage element using spin transfer is referred to as SpRAM (Spin transfer Random Access Memory), and a spin-polarized electron current that causes spin transfer is referred to as a spin injection current.

  SpRAM is highly expected as a non-volatile memory that can achieve low power consumption and large capacity while maintaining the advantages of MRAM, which is high speed and the number of rewrites is almost infinite.

Here, a schematic cross-sectional view of a memory cell of a memory (SpRAM) using a conventional spin transfer is shown in FIG.
In order to electrically select a memory cell in order to read information recorded in the memory cell, a diode, a MOS transistor, or the like can be used. The memory cell shown in FIG. 6 uses a MOS transistor.

First, the configuration of the memory element 101 constituting the SpRAM memory cell will be described.
The ferromagnetic layer 112 and the ferromagnetic layer 114 are antiferromagnetically coupled with each other through the nonmagnetic layer 113. Further, the lower ferromagnetic layer 112 is disposed in contact with the antiferromagnetic layer 111 and has a strong unidirectional magnetic anisotropy due to exchange interaction acting between these layers. These four layers 111, 112, 113, 114 constitute the magnetization fixed layer 102. That is, the magnetization fixed layer 102 has two ferromagnetic layers 112 and 114.
The ferromagnetic layer 116 is configured such that the direction of the magnetization M1 rotates relatively easily, and the storage layer (magnetization free layer) 103 is configured by the ferromagnetic layer 116.
A tunnel insulating layer 115 is formed between the ferromagnetic layer 114 and the ferromagnetic layer 116 of the magnetization fixed layer 102, that is, between the magnetization fixed layer 102 and the storage layer (magnetization free layer) 103. The tunnel insulating layer 115 plays a role of cutting a magnetic coupling between the upper and lower magnetic layers 116 and 114 and flowing a tunnel current. Thereby, the magnetization fixed layer 102 in which the magnetization direction of the magnetic layer is fixed, the tunnel insulating layer 115, and the storage layer (magnetization free layer) 103 capable of changing the magnetization direction are used to generate a TMR (tunnel magnetic field). Resistive effect) element is configured.
The above-described layers 111 to 116, the base film 110, and the topcoat layer 117 constitute a memory element 101 made of a TMR element.

A selection MOS transistor 121 is formed in the silicon substrate 120, and a connection plug 107 is formed on one diffusion layer 123 of the selection MOS transistor 121. A base film 110 of the memory element 101 is connected to the connection plug 107. Although not shown, the other diffusion layer 122 of the selection MOS transistor 121 is connected to a sense line via a connection plug. The gate 106 of the selection MOS transistor is connected to a selection signal line.
The topcoat layer 117 of the memory element 101 is connected to the bit line (BL) 105 thereon.

In a steady state, due to strong antiferromagnetic coupling through the nonmagnetic layer 113, the magnetization M11 of the ferromagnetic layer 112 and the magnetization M12 of the ferromagnetic layer 114 are in a substantially complete antiparallel state.
Usually, the ferromagnetic layer 112 and the ferromagnetic layer 114 are configured to have the same saturation magnetization film thickness product, so that the leakage component of the magnetic pole magnetic field is negligibly small.

Then, the direction of the magnetization M1 of the ferromagnetic layer 116 of the storage layer 103 and the direction of the magnetization M12 of the ferromagnetic layer 114 of the magnetization fixed layer 102 sandwiching the tunnel insulating layer 115 are in a parallel state or in an antiparallel state. The resistance value of the TMR element composed of these layers 114, 115, and 116 varies depending on whether it exists. When the two magnetizations M1 and M12 are in parallel, the resistance value is low, and in the antiparallel state, the resistance value is high. When the resistance value of the TMR element (114, 115, 116) changes, the resistance value of the entire memory element 101 also changes. By utilizing this fact, information can be recorded and the recorded information can be read. That is, for example, by assigning a low resistance value to “0” information and assigning a high resistance value to “1” information, binary (1 bit) information can be recorded.
The ferromagnetic layer 114 on the storage layer 103 side of the fixed magnetization layer 102 is a ferromagnetic layer that is referred to as a reference for the direction of the magnetization M1 of the storage layer 103 when reading recorded information. Also called.
In order to rewrite information in the memory cell or read out information recorded in the memory cell, it is necessary to pass a spin injection current Iz. The spin injection current Iz passes through the storage element 101, the diffusion layer 123, and the bit line 105.

By changing the polarity of the spin injection current Iz, the spin injection current Iz flowing through the memory element 101 can be changed from upward to downward or from downward to upward.
Thereby, the information of the memory cell can be rewritten by changing the direction of the magnetization M1 of the storage layer 103 of the storage element 101.

By the way, in order to reverse the magnetization direction of the storage layer of the storage element, a configuration of an SpRAM is proposed in which not only a spin injection current is passed through the storage element but also a bias current magnetic field is applied in addition to the storage element (patent). Reference 5).
Specifically, for example, in the configuration shown in FIG. 6, the spin injection current Iz is supplied to the memory element 101 through the bit line 105 and the bias current magnetic field Hx generated by the current flowing through the bit line 105 (equal to the spin injection current Iz). (Not shown) is applied to the memory layer 103 of the memory element 101.
Thereby, the direction of the magnetization M1 of the storage layer 103 can be changed efficiently.

  Hereinafter, a state diagram representing the state of the memory cell with the spin injection current Iz as the vertical axis and the bias current magnetic field Hx as the horizontal axis is referred to as a phase diagram. In the case where the pulse current is used as the bias current for generating the spin injection current Iz or the bias current magnetic field Hx, the phase diagram is produced using the peak value of the pulse current.

J. Nahas et al., IEEE / ISSCC 2004 VisulasSupplement, p.22 JP 10-116490 A US Patent Application Publication No. 2003/0072174 US Pat. No. 5,695,864 JP 2003-17782 A JP 2005-277147 A

In the storage element 101 having the configuration shown in FIG. 6, the magnitude of the spin torque acting on the magnetization M _free (= M1) of the storage layer (magnetization free layer) 103 is the vector triple product M _free × M _free × M _ref . Proportional. Here, M _ref is the magnetization (= M12) of the reference layer (ferromagnetic layer) 114.
In the initial state, the magnetization M _free of the storage layer (magnetization free layer) 103 and the magnetization M _{ref of the} reference layer (ferromagnetic layer) 114 are in a parallel state or an anti-parallel state. small.
Thus, since the spin torque is small, the magnetization reversal current becomes large.

A general phase diagram includes a hysteresis region, a region in which the memory cell is in a low resistance state, that is, 0 state regardless of the initial magnetization state (a region in the 0 state), and a memory cell in a high resistance state, that is, regardless of the initial magnetization state. This includes a region to be set to one state (region of one state) and an unstable operation region in which the three regions described above are mixed.
In order for the SpRAM to function as a memory having a practical margin (operation margin), the three regions (hysteresis region, 0 state region, and 1 state region) need to exist sufficiently wide and independently. There is.
The hysteresis region can also be referred to as a bistable operation region. The 0-state region and the 1-state region can also be referred to as monostable operation regions.

Here, FIG. 7 shows an example of a measured phase diagram in the memory element 101 shown in FIG. FIG. 7 shows a case where the pulse width of the current pulse of the spin injection current Iz is 1 ns (nanosecond).
The phase diagram shown in FIG. 7 is a state diagram showing the state of the memory cell with the pulse peak value of the spin injection current Iz as the vertical axis and the pulse peak value of the bias current magnetic field Hx as the horizontal axis.

In the phase diagram, since the bistable operation region (hysteresis region 80) and the monostable operation region (the 0-state region 81 and the 1-state region 82) are separated, stable operation is possible.
As shown in FIG. 7, an unstable operation region 83 in which three states 80, 81, and 82 are mixed appears at the upper right (first quadrant) and lower left (third quadrant) ends in the figure.
When the unstable operation region 83 appears in this way, the spin injection current Iz and the bias current magnetic field Hx when performing the magnetization reversal operation are set so as not to reach the unstable operation region 83.
However, in the phase diagram shown in FIG. 7, since the bistable operation region 80 appears in a wide range, the monostable operation regions 81 and 82 are not applied unless the spin injection current Iz and the bias current magnetic field Hx are increased. Therefore, as described above, it is understood that the magnetization reversal current needs to be increased.

  In order to solve the problems described above, the present invention provides a memory element that can stably record information with a small amount of current, and a memory including the memory element.

The storage element of the present invention includes a storage layer that holds information according to the magnetization state of a magnetic material, and a magnetization fixed layer in which the direction of magnetization is fixed to the storage layer via a nonmagnetic layer, and is stacked By flowing a current in the direction, the magnetization direction of the storage layer is changed, and information is recorded on the storage layer, and the current in the film surface direction is passed through the magnetization fixed layer. The current supply unit is provided for the magnetization fixed layer.
The memory of the present invention has a storage layer that retains information according to the magnetization state of the magnetic substance, and the direction of magnetization of the storage layer is changed by passing a current in the stacking direction, so that information is recorded on the storage layer. The storage element has the configuration of the storage element of the present invention, and at least when writing information, current in the film plane direction is supplied from the current supply unit to the ferromagnetic layer of the magnetization fixed layer. It is what is done.

According to the configuration of the above-described storage element of the present invention, the storage layer that holds information according to the magnetization state of the magnetic substance is provided, and the magnetization fixed layer is provided on the storage layer via the nonmagnetic layer. Since the direction of magnetization of the storage layer is changed by passing a current through the storage layer and information is recorded on the storage layer, the magnetization of the storage layer is changed by spin injection by passing a current in the stacking direction. Information can be recorded by changing the direction.
In addition, since a current supply unit for flowing a current in the film surface direction is provided inside the magnetization fixed layer with respect to the magnetization fixed layer, a current in the film surface direction is supplied to the magnetization fixed layer by the current supply unit. By flowing, it is possible to form magnetization regions having magnetization components in the stacking direction and magnetizations having different directions from each other at both ends of the ferromagnetic layer of the magnetization fixed layer. As a result, two spin torques with different directions act on the storage layer from the magnetization regions at both ends of the ferromagnetic layer of the fixed magnetization layer, so that the magnetization direction of the storage layer can be reversed with a small amount of current. it can. In addition, switching that changes the direction of magnetization can be performed stably regardless of the pulse width of the spin injection current.

According to the configuration of the memory of the present invention described above, the storage layer that retains information according to the magnetization state of the magnetic substance has a storage layer. By flowing a current in the stacking direction, the magnetization direction of the storage layer is changed. A memory element that records information on the memory element, and the memory element has the configuration of the memory element of the present invention, so that information can be recorded by spin injection by passing a current in the stacking direction of the memory elements. it can.
In addition, at least when writing information, a current in the film surface direction is supplied from the current supply unit to the ferromagnetic layer of the magnetization fixed layer, so that the film surface is formed on the magnetization fixed layer through the wiring connected to the magnetization fixed layer. By flowing a current in the direction, it is possible to form a magnetization region having magnetization components in the stacking direction and having different magnetizations at both ends of each ferromagnetic layer of the magnetization fixed layer. As a result, information can be recorded with a small amount of current, and information can be stably recorded regardless of the pulse width of the spin injection current.

According to the present invention described above, information can be recorded by reversing the magnetization direction of the storage layer with a small amount of current.
Thereby, it is possible to reduce the power required for recording information and realize a memory with low power consumption.

In addition, since the switching can be stably performed regardless of the pulse width of the spin injection current, a margin for the pulse width of the spin injection current is widened.
As a result, information can be recorded stably, and a highly reliable memory element can be realized.

In addition, since the margin for the pulse width is wide, it is possible to operate stably even if there is a slight variation in the characteristics of each memory cell. Therefore, it is possible to stably operate even a large capacity memory having a large number of memory cells. Is possible.
That is, according to the present invention, a memory having a large storage capacity that operates stably can be realized.

First, an outline of the present invention will be described prior to description of specific embodiments of the present invention.
In a memory (SpRAM) using spin transfer, a sufficiently large anisotropy is provided so that the magnetization of the storage layer (magnetization free layer) is stable against thermal fluctuation.

The degree of magnetization stability of the storage layer against the above-described thermal fluctuation, that is, an index of thermal stability can be generally expressed by a thermal stability parameter (Δ).
Δ is given by Δ = KuV / k _B T (Ku: anisotropic energy, V: storage layer volume, k _B : Boltzmann constant, T: absolute temperature).

In the conventional SpRAM, since the ferromagnetic layer constituting the magnetization fixed layer is thinly formed, the saturation magnetic field Hs is increased. This saturation magnetic field Hs can be expressed by 2J / (Ms · d). However, J is the magnitude of the antiferromagnetic coupling of the magnetization fixed layer (multiple ferromagnetic layers) antiferromagnetically coupled, and Ms is the saturation magnetization of each ferromagnetic layer of the magnetization fixed layer.
When the saturation magnetic field Hs is large, it is necessary to increase the current for reversing the magnetization direction of the storage layer, that is, the magnetization reversal current.

  In a memory (SpRAM) that uses spin transfer, it is required to ensure both a certain degree of thermal stability index (thermal stability parameter) Δ and a reduction in magnetization reversal current. .

  Therefore, as a result of various studies by the inventors of the present application, a plurality of ferromagnetic layers are stacked via a nonmagnetic layer, and in the magnetization fixed layer antiferromagnetically coupled, at least the ferromagnetic layer closest to the storage layer By forming magnetization regions that have magnetization components in the stacking direction and magnetizations that are different from each other at both ends, the magnetization reversal current can be reduced and sufficient thermal stability can be obtained. It was found that a stable memory can be formed.

In order to form a magnetization region having magnetization components in the stacking direction and having different magnetization directions at both ends of the ferromagnetic layer of the magnetization fixed layer, the film surface is formed inside the magnetization fixed layer. What is necessary is just to provide the current supply part for flowing the electric current of a direction with respect to a magnetization fixed layer.
Further, it has been found that it is effective for reducing the magnetization reversal current to flow a current in the direction of the film surface through the current supply portion through the current supply portion at least when writing information.
The current supply unit is made of a conductor, and a metal material or other conductive material can be used.
In addition, the current supply unit may be connected to a pinned layer different from the pinned magnetic layer, or may be formed of a layer common to the pinned magnetic layer or the like, and any configuration is possible.

  Preferably, the plurality of ferromagnetic layers of the magnetization fixed layer is formed to be slightly thick (for example, thicker than the ferromagnetic layer of the storage layer) so that the magnetization component in the stacking direction can be easily formed.

Preferably, among the ferromagnetic layers of the magnetization fixed layer, the thickness of the ferromagnetic layer closest to the storage layer is 2 nm or more.
More preferably, the thickness of each ferromagnetic layer of the magnetization fixed layer is 2 nm or more.

By forming magnetization regions having magnetization components in the stacking direction and having different magnetizations at both ends of the ferromagnetic layer of the fixed magnetization layer, the magnetization regions of the storage layer Two spin torques with different directions act on both ends.
Since these two spin torques can easily reverse the magnetization direction of the storage layer, the magnetization direction of the storage layer can be reversed with a small amount of current. In addition, switching that changes the direction of magnetization can be performed stably regardless of the pulse width of the spin injection current.

Subsequently, specific embodiments of the present invention will be described.
As an embodiment of the present invention, FIG. 1 shows a schematic configuration diagram (cross-sectional view) of a memory element.
The memory element 1 is composed of a TMR (tunnel magnetoresistive effect) element.
Since the ferromagnetic layer 12 and the ferromagnetic layer 14 are disposed via the nonmagnetic layer 13, they are antiferromagnetically coupled. Further, the ferromagnetic layer 12 is disposed in contact with the antiferromagnetic layer 11 and has a strong unidirectional magnetic anisotropy due to exchange interaction acting between these layers. And these four layers 11, 12, 13, and 14 constitute the magnetization fixed layer 2. That is, the magnetization fixed layer 2 has two ferromagnetic layers 12 and 14.
The ferromagnetic layer 16 is configured such that the direction of the magnetization M1 rotates relatively easily, and the ferromagnetic layer 16 constitutes the storage layer (magnetization free layer) 3.
A tunnel insulating layer 15 is formed between the ferromagnetic layer 14 and the ferromagnetic layer 16, that is, between the magnetization fixed layer 2 and the storage layer (magnetization free layer) 3. The tunnel insulating layer 15 functions to cut the magnetic coupling between the upper and lower magnetic layers 16 and 14 and to flow a tunnel current. Thereby, the magnetization fixed layer 2 in which the magnetization direction of the magnetic layer is fixed, the tunnel insulating layer 15, and the storage layer (magnetization free layer) 3 capable of changing the magnetization direction are used for TMR (tunnel magnetism). Resistive effect) element is configured.
The above-described layers 11 to 16, the base film 10, and the topcoat layer 17 constitute a memory element 1 made of a TMR element.

Due to strong antiferromagnetic coupling via the nonmagnetic layer 13, the magnetization M11 of the ferromagnetic layer 12 and the magnetization M12 of the ferromagnetic layer 14 are in antiparallel directions.
Then, the direction of the magnetization M1 of the ferromagnetic layer 16 of the storage layer 3 and the direction of the magnetization M12 of the ferromagnetic layer 14 of the magnetization fixed layer 2 sandwiching the tunnel insulating layer 15 are in a parallel state or in an antiparallel state. The resistance value of the TMR element composed of these layers 14, 15, 16 varies depending on whether or not there is. When the two magnetizations M1 and M12 are in parallel, the resistance value is low, and in the antiparallel state, the resistance value is high. When the resistance value of the TMR element (14, 15, 16) changes, the resistance value of the entire memory element 1 also changes. By utilizing this fact, information can be recorded and the recorded information can be read. That is, for example, by assigning a low resistance value to “0” information and assigning a high resistance value to “1” information, binary (1 bit) information can be recorded.
The ferromagnetic layer 14 closest to the storage layer 3 in the fixed magnetization layer 2 is a ferromagnetic layer that is referred to as a reference for the orientation of the magnetization M1 of the storage layer 3 when reading recorded information. Also called a layer.

In order to rewrite information in the memory cell or read out information recorded in the memory cell, it is necessary to flow the spin injection current Iz in the stacking direction of the memory element 1.
By changing the polarity of the spin injection current Iz, the spin injection current Iz flowing through the memory element 1 can be changed from upward to downward or from downward to upward.
Thereby, the information of the memory cell can be rewritten by changing the direction of the magnetization M1 of the storage layer 3 of the storage element 1.

Note that, similarly to the conventional memory element 101 shown in FIG. 6, the memory element 1 of the present embodiment is also connected to a selection MOS transistor formed on a silicon substrate to read a memory cell. Can do.
Further, the memory element 1 can be connected to the wiring, and the spin injection current Iz can flow in the stacking direction of the memory element 1 through the wiring.

In the present embodiment, a current in the direction of the film surface is caused to flow in the magnetization fixed layer 2 at least at the time of writing information.
That is, as shown in a cross-sectional view in FIG. 2, a current Iz in the stacking direction is supplied to the storage element 1. When writing information, a current Ia in the film surface direction is supplied to the inside of the magnetization fixed layer 2. A magnetic field Ha is generated by Ia.
For this purpose, although not shown in FIGS. 1 and 2, the above-described current supply unit for supplying the current Ia in the film surface direction to the magnetization fixed layer 2 is provided.
For example, as the current supply unit, a wiring for flowing the current Ia in the film surface direction to the magnetization fixed layer 2 is connected to the magnetization fixed layer 2. Alternatively, for example, the current supply unit is configured by a layer common to the magnetization fixed layer 2 and the like.

Then, as shown in FIG. 2, the two ferromagnetic layers 12 and 14 of the magnetization fixed layer 2 have a magnetization component in the stacking direction at both ends in addition to the magnetization M11 and M12 in the film surface direction. Magnetization M11a, M12a and M11b, M12b are generated.
The magnetization M11a and the magnetization M12a on the left side in the drawing are downward, the magnetization M11b and the magnetization M12b on the right side in the drawing are upward, and they are almost opposite to each other.

  For example, when an element size is about 50 nm by flowing a current Ia in the film surface direction of about 1 mA into the magnetization fixed layer 2, the current Ia causes approximately several hundred [Oe at both ends of the magnetization fixed layer 2. ] Of the magnetic field Ha is applied.

By generating the magnetizations M11a, M12a and M11b, M12b having magnetization components in the stacking direction as described above, in particular, among the ferromagnetic layers 12 and 14 of the magnetization fixed layer 2, the ferromagnetic layer closest to the storage layer 3 ( The vector triple product M _free × M _free × M _ref with the magnetization M 1 of the storage layer 3 can be increased in the initial state by the magnetizations M 12 a and M 12 b of the reference layer 14.
Therefore, a very large spin torque is applied to the extremely narrow region of the magnetization M1 of the storage layer 3 immediately above the magnetization pair M12a and M12b of the ferromagnetic layer 14.

FIG. 3 shows an in-plane distribution state of the spin torque applied to the magnetization M1 of the storage layer 3 in the state of FIG. 2 in the storage element 1 of FIG.
As shown in FIG. 3, spin torques Ta and Tb in opposite directions act on the magnetization M1 of the storage layer 3 from the magnetization pair.
Therefore, it is convenient to rotate the magnetization M1 of the storage layer 3 all at once.
Thereby, the direction of the magnetization M1 of the storage layer 3 can be easily reversed.

For example, when the antiferromagnetic coupling J of the ferromagnetic layers 12 and 14 is about 1 erg / cm ² and the saturation magnetization Ms of the memory layer 3 (16) is about 1200 emu / cc, the magnitude of the saturation magnetic field is 8 kOe. Decreases to: This saturation magnetic field is a magnetic field in order to make the direction of the magnetization M1 of the storage layer 3 parallel to the direction of the magnetization M12 of the ferromagnetic layer 14 arranged closest to the storage layer 3 in the fixed magnetization layer 2. Is the saturation magnetic field that is required when.
Depending on the ferromagnetic material constituting the ferromagnetic layers 12 and 14, a magnetization component in the stacking direction may be generated even if the film thickness d is less than 2 nm.

  In the present embodiment, the magnetizations M11a, M12a and M11b, M12b having magnetization components in the stacking direction are generated in the ferromagnetic layers 12, 14 of the magnetization fixed layer 2, but the direction of the magnetization M1 of the storage layer 3 is controlled. Similar to the memory element 101 shown in FIG. 6, it can be performed by the direction (polarity) of the spin injection current Iz.

Note that the angle between the left magnetization M11a and the magnetization M12a and the right magnetization M11b and the magnetization M12b is approximately 180 degrees in FIG. 1, but the film thickness d of the ferromagnetic layers 12 and 14 and the saturation magnetization The angle can be controlled by the size.
Even if this angle is not near 180 degrees as shown in FIG. 2, the direction of the magnetization M1 of the storage layer 3 can be easily reversed by applying a spin torque of a different direction to the magnetization M1 of the storage layer 3. .

In the present embodiment, the same material as that of a conventional memory element can be used as the material of each layer included in the memory element 1.
As a material of the antiferromagnetic layer 11, for example, PtMn, IrMn, FeMn, or the like can be used.
A ferromagnetic material such as CoFe can be used as the material of the ferromagnetic layers 12 and 14 of the magnetization fixed layer 2.
As the magnetization fixed layer, a laminated body including only two layers of the antiferromagnetic layer 11 and the ferromagnetic layer 12 can be used. In this case, the above-described materials can be used.
As a material of the nonmagnetic layer 13, for example, Ru, Ta, Cr, Cu or the like can be used.
As a material of the tunnel insulating layer 15, for example, MgO can be used.
As the material of the ferromagnetic layer 16 of the memory layer 3, a ferromagnetic material such as CoFeB can be used.

Next, an embodiment of a memory cell configured by connecting a wiring for supplying a current Ia in the film surface direction to the fixed magnetization layer 2 to the memory element 1 of FIG. 1 will be described.
FIG. 4 shows a schematic cross-sectional view of a memory cell of a memory using the memory element 1 of FIG.
In the storage element 1 of FIG. 1, only the upper tunnel insulating layer 15, the ferromagnetic layer 16 of the storage layer 3, and the topcoat layer 17 are patterned into a predetermined (for example, elliptical) planar pattern, Each layer from the base film 10 to the ferromagnetic layer (reference layer) 14 of the magnetization fixed layer 2 is kept in a large plane pattern so as to be a bypass wiring 24. That is, the bypass wiring 24 corresponds to the above-described current supply unit configured by a layer common to the magnetization fixed layer 2 and the like.

A selection MOS transistor 21 is formed in the silicon substrate 20, and a connection plug 9 is formed on one diffusion layer 23 of the selection MOS transistor 21. A bypass wiring 24 (underlayer film 10 to ferromagnetic layer 14) is connected to the connection plug 9. The other diffusion layer 22 of the selection MOS transistor 21 is connected to the wiring (sense line) 7 via the connection plug 9. The gate 6 of the selection MOS transistor 21 is connected to a selection signal line (not shown).
The storage element 1 is connected to a bit line (BL) 5 through a connection plug 9 thereon.
The bypass wiring 24 is formed to extend to the right in the drawing from the tunnel insulating layer 15 to the top coat layer 17 and is connected to the wiring 8 through the lower connection plug 9 near the right end portion. Yes. The wiring 8 and the wiring (sense line) 7 are formed of the same metal wiring layer.

Since the memory cell has such a configuration, spin injection is performed between the bit line 5 and the selection MOS transistor 21 through the bypass wiring 24 and the respective layers (tunnel insulating layer 15 to top coat layer 17) thereabove. A current Iz flows.
On the other hand, a current Ia in the film surface direction flows between the wiring 8 and the selection MOS transistor 21 through the bypass line 24. Thereby, since the current Ia in the film surface direction flows inside the magnetization fixed layer 2 constituting the bypass wiring 24, the magnetic field Ha shown in FIG. 2 can be generated by the current Ia.

  Since the spin injection current Iz and the current Ia in the film surface direction share a common path from the selection MOS transistor 21 to the left side portion of the bypass wiring 24, the current obtained by combining the two currents Iz and Ia in this portion. The quantity flows. Further, the on / off driving on the transistor 21 side is made common by the selection MOS transistor 21.

The arrangement of each part of the memory cell is not limited to the arrangement shown in FIG.
For example, the diffusion layer 22 to which the sense line 7 is connected in FIG. 4 may be arranged on the right side of the diffusion layer 23 to which the bypass wiring is connected.
In FIG. 4, the direction of the gate 6 of the selection MOS transistor 21 (the direction perpendicular to the paper surface) and the direction of the bypass wiring 24 (the left-right direction) are perpendicular to each other. May be parallel.

Further, the configuration for flowing the current Ia in the film plane direction inside the magnetization fixed layer 2 is not limited to the configuration shown in FIG.
The layers constituting the bypass wiring 24 are not limited to the base film 10 to the ferromagnetic layer 14, and the bypass wiring can be configured in a part of these ranges.
Instead of forming the bypass wiring 24 in common in a part of the magnetization fixed layer 2 of the memory element 1, a wiring (for example, a metal wiring layer) different from the memory element 1 may be connected to the outside of the magnetization fixed layer 2. Is possible. In that case, instead of sharing the bypass wiring 24 with the two currents Iz and Ia, a configuration in which two currents are branched closer to the diffusion layer 23 than the bypass wiring 24 (for example, two plugs are set up in the diffusion layer 23). And it is sufficient. It is more advantageous to share the bypass wiring 24 as shown in FIG. 4 than the branching configuration because the configuration of the memory cell can be simplified.

  Next, in this embodiment, FIGS. 5A and 5B show timing charts showing the forms of application timings of the two currents Iz and Ia in FIG.

The timing chart shown in FIG. 5A is a form in which the rising and falling of current pulses of two currents Iz and Ia are simultaneously performed.
In this way, by making the rise and the rise of the current pulse at the same time, the drive for supplying the potential for flowing the current to the wiring (in the case of FIG. 4, the bit line 5 and the wiring 8) is made common, and the memory configuration is made. Simplification is also possible.

The timing chart shown in FIG. 5B is a form in which the current pulse of the current Ia in the film surface direction rises before the current pulse of the spin injection current Iz.
In this way, since the current pulse of the current Ia in the film surface direction rises first, a magnetization region having a magnetization component in the stacking direction can be formed in advance before the spin injection current Iz is passed. The direction of the magnetization M1 of the storage layer 3 can be easily reversed.
As a result, even if the spin injection current Iz is reduced or the width of the current pulse of the spin injection current Iz is further reduced, writing to the memory element 1 can be performed.

  As described above, in order to make the rising timings of the current pulses of the two currents Iz and Ia different, in the memory cell of FIG. 4, potential supply to the bit line 5 and potential supply to the wiring 8 are performed. May be set at different timings.

  Note that the timing relationship of the fall of the current pulses of the two currents Iz and Ia may be either simultaneously lowered as shown in FIGS. 5A and 5B, or one of them may be lowered first. Of course, it is necessary that the current pulses of the two currents Iz and Ia are at least partially overlapped and that there is a period in which the two currents Iz and Ia are simultaneously supplied.

According to the above-described embodiment, the current supply unit for flowing the current Ia in the film surface direction is provided inside the magnetization fixed layer 2 and at least at the time of writing, the current supply unit, for example, the bypass of FIG. A current Ia in the film surface direction is caused to flow inside the magnetization fixed layer 2 through the wiring 24.
Thus, the magnetic field Ha generated by the current Ia has magnetization components in the stacking direction at both ends of the ferromagnetic layers 12 and 14 of the fixed magnetization layer 2 and generates opposite magnetizations M11a and M12a and M11b and M12b. be able to.

Then, by the opposite magnetizations M11a, M12a and M11b, M12b, large opposite spin torques Ta, Tb can be applied to both ends of the magnetization M1 of the storage layer 3.
Thereby, since the direction of the magnetization M1 of the memory layer 3 can be easily reversed, the direction of the magnetization M1 of the memory layer 3 can be reversed with a small amount of spin injection current Iz.
Therefore, it is possible to reduce the spin injection current Iz required for information recording and reduce power consumption.

For example, in the memory element 1 having a configuration in which the thermal stability index Δ = 60, even if the pulse width of the spin injection current Iz is relatively long as 1 ns (nanosecond), magnetization is performed with a small current amount of 0.3 mA or less. Inversion is possible.
On the other hand, if the memory element 101 having the conventional configuration shown in FIG. 6 is configured to have a thermal stability index Δ = 60, a current amount of 2 mA or more is required to reverse the magnetization with a pulse width of 1 ns. Necessary.

Further, according to the present embodiment, since the spin torques Ta and Tb having large reverse directions can be applied to both end portions of the magnetization M1 of the storage layer 3, it depends on the pulse width of the spin injection current Iz. Therefore, it becomes possible to perform switching stably.
As a result, information recording can be performed stably, and the storage element 1 having high reliability can be realized.
Further, since the margin for the pulse width of the spin injection current Iz is widened, it can be stably operated even if there is a slight variation in the characteristics of each memory cell, and even in a large capacity memory having a large number of memory cells. Can be operated.

  Therefore, by configuring a memory having a large number of memory cells including the memory element 1 of the present embodiment, a memory with low power consumption and a large storage capacity that operates stably can be realized.

  In the storage element 1 of the above-described embodiment, the magnetization fixed layer 2 is disposed below the storage layer 3, so that the magnetization region having the magnetization component in the stacking direction of the reference layer 14 is on the lower layer side than the storage layer 3. However, the magnetization fixed layer may be disposed above the storage layer, and the magnetization region may be formed on the upper layer side than the storage layer.

In the memory element 1 of the above-described embodiment, as illustrated in FIG. 2, the current Ia in the film surface direction flows perpendicularly to the direction of the magnetization M <b> 1 of the memory layer 3. Since the direction of the magnetization M1 of the storage layer 3 is along the easy axis direction of the storage layer 3, the current Ia in the film surface direction is substantially perpendicular to the easy axis direction of the storage layer 3.
In the present invention, the case where the direction of the current in the film surface direction and the direction of the easy axis of magnetization of the storage layer have other relationships is included.
As shown in FIG. 2, if the current supply unit is configured such that the current Ia in the film surface direction flows in a direction substantially perpendicular to the magnetization easy axis direction of the storage layer 3, the direction of the magnetization M <b> 1 of the storage layer 3 is easy. There is an advantage that the efficiency of the current Ia for inverting the current is good.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

It is a schematic block diagram (sectional drawing) of the memory element of one embodiment of this invention. FIG. 2 is a cross-sectional view showing a state where a current in the film surface direction is passed through the memory element of FIG. 1. FIG. 3 is a diagram showing an in-plane distribution of spin torque applied to the magnetization of the storage layer in FIG. 2. It is typical sectional drawing of the memory cell of the memory using the memory element of FIG. A, B It is a timing chart which shows the form of the timing of application of two electric currents of FIG. It is a typical sectional view of the memory cell of the memory using the conventional spin transfer. 7 is a phase diagram of the memory element in FIG. 6.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Memory element, 2 Magnetization fixed layer, 3 Memory layer (magnetization free layer), 5 Bit line, 6 Gate, 7 Wiring (sense line), 8 wiring, 9 Connection plug, 10 Underlayer, 11 Antiferromagnetic layer, 12 , 14, 16 Ferromagnetic layer, 13 Nonmagnetic layer, 15 Tunnel insulating layer, 17 Topcoat layer, 21 Select MOS transistor, 22, 23 Diffusion layer, 24 Bypass wiring

Claims (4)

A storage layer that holds information by the magnetization state of the magnetic material;
A magnetization fixed layer having a magnetization direction fixed to the storage layer via a nonmagnetic layer;
A storage element in which the direction of magnetization of the storage layer is changed by passing a current in the stacking direction, and information is recorded on the storage layer,
A memory element, wherein a current supply section for causing a current in the film surface direction to flow inside the magnetization fixed layer is provided for the magnetization fixed layer.   The storage element according to claim 1, wherein the current supply unit is arranged so that a current in the film surface direction flows in a direction substantially perpendicular to the easy axis direction of magnetization of the storage layer.   The memory element according to claim 1, wherein the magnetization fixed layer and the current supply unit are formed in common by at least a part of the same layer. By having a storage layer that holds information according to the magnetization state of the magnetic material, and a magnetization fixed layer in which the magnetization direction is fixed to the storage layer via a nonmagnetic layer, and by passing a current in the stacking direction A storage element in which information is recorded on the storage layer by changing the magnetization direction of the storage layer;
A current supply unit for flowing a current in the film plane direction inside the magnetization fixed layer is provided for the magnetization fixed layer,
The memory in which the current in the film plane direction is supplied from the current supply unit to the ferromagnetic layer of the magnetization fixed layer at least when information is written.

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