JP2008196029A - Mask for vapor deposition and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a mask for vapor deposition capable of reducing the film deposition cost when using the mask for vapor deposition wherein chips on which mask openings are formed are bonded onto a supporting substrate, and the mask for vapor deposition suitable for carrying out the manufacturing method. <P>SOLUTION: The mask for vapor deposition 10 has a structure wherein a plurality of chips 20 are attached to the rectangular supporting substrate 30 composing a base substrate, provided that irregularities 28a are formed on bonded surfaces 28 of the chip side. This prevents strong adhesion of the chips 20 onto the supporting substrate 30 at parts not bonded with an adhesive, even when the mask for vapor deposition 10 is subjected to a wet process. Thus, the chips 20 can be easily removed from the supporting substrate 30 to recover the supporting substrate 30, and the recovered supporting substrate 30 can be reused to manufacture another mask for vapor deposition 10. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a vapor deposition mask in which a chip in which a mask opening is formed is bonded on a support substrate, and the vapor deposition mask.

  In the manufacturing process of various semiconductor devices and electro-optical devices, an evaporation mask having a mask opening corresponding to the film formation pattern is superimposed on the substrate to be processed, and in this state, vacuum evaporation, sputter film formation, ion plating, etc. Vapor deposition may be performed. For example, in the manufacturing process of an organic electroluminescence (hereinafter referred to as EL) device as an electro-optical device, patterning is performed by using a photolithography technique when forming an organic EL material (organic functional layer) for a light emitting element into a predetermined shape. When organic resist materials are exposed to moisture or oxygen when the resist mask is removed with an etchant or oxygen plasma, the organic functional layer is formed using a mask vapor deposition method that does not require a resist mask. It has been proposed to do.

As such a deposition mask, for example, as shown in FIGS. 7A and 7B, a long-hole shaped mask opening 22 ′ is formed by wet etching on a single crystal silicon substrate having a plane orientation (110). A plurality of chips 20 ′ formed by bonding them to a support substrate 30 ′ with an adhesive or the like has been proposed (for example, see Patent Document 1).
JP 2005-276480 A

  However, the support substrate 30 ′ is expensive because it is required to have a high degree of flatness in terms of film forming accuracy. The entire deposition mask 10 'is discarded, which causes an increase in film formation cost.

  Here, when a problem occurs in the chip 20 ′, the inventor removes the adhesive and recovers the support substrate 30 ′, and uses the recovered support substrate 30 ′ to manufacture the deposition mask 30 ′ again. By doing so, it is proposed to reduce the film formation cost.

  However, in the conventional vapor deposition mask 30 ′, even if the adhesive is removed, the chip 20 ′ is firmly attached to the support substrate 30 ′ and cannot be peeled off. As a result of pursuing such a cause, the inventor of the present application conventionally has a smooth surface of the chip 20 ′ and the support substrate 30 ′. Therefore, when the deposition mask 10 ′ is subjected to a wet process such as a cleaning and drying process, It was found that the chip 20 ′ and the support substrate 30 ′ are firmly attached even in the region that is not bonded with the adhesive. As a result, the adhesive cannot be removed, and even if the adhesive can be removed, since the chip 20 'and the support substrate 30' are firmly attached, the chip 20 'cannot be peeled off from the support substrate 30'. is there. The wet process includes a cleaning and drying process after the deposition mask 10 'is manufactured, and a cleaning and drying process for removing a film attached to the deposition mask 10' used for deposition.

  Based on the above problems and knowledge, the object of the present invention is to provide an evaporation device capable of reducing the film formation cost when using an evaporation mask in which a chip having a mask opening formed on a support substrate is used. It is an object of the present invention to provide a method for manufacturing a mask and a deposition mask suitable for carrying out such a manufacturing method.

  In order to solve the above-described problems, in the present invention, in a method for manufacturing a vapor deposition mask including a chip in which a mask opening is formed and a support substrate to which the chip is bonded, a bonding surface of the chip with the support substrate. And an unevenness is formed on at least one of the bonding surfaces of the support substrate and the chip, and the chip is supported when a defect is found in the chip after the chip is bonded to the support substrate. A chip removing process for removing the chip from the substrate is performed, and another chip is fixed to the support substrate from which the chip has been removed in the chip removing process.

  In the present invention, “evaporation” is not limited to vacuum deposition, and includes a general vapor deposition method in which atoms and molecules of a deposition material are supplied as a deposition particle flow, such as sputter deposition and ion plating. is there.

  In the present invention, since unevenness is formed on at least one of the bonding surface on the chip side and the bonding surface on the support substrate side, even a deposition mask exposed to a wet process is bonded with an adhesive. There is no situation where the chip and the support substrate are firmly adhered to each other in the area where no contact is made. For this reason, when a malfunction occurs in the chip, the adhesive can be easily removed, and if the adhesive is removed, the chip can be easily peeled off from the support substrate. Therefore, the deposition cost can be reduced by collecting the support substrate and manufacturing the deposition mask again using the collected support substrate.

  In the present invention, when the chip is bonded to the support substrate, it is preferable to bond the chip with an adhesive applied to a part of a region where the chip and the support substrate overlap. If comprised in this way, a chip | tip can be easily peeled from a support substrate.

  In the present invention, in forming the irregularities on the bonding surface, it is preferable to perform etching in a state where an etching mask is formed on the bonding surface.

  Next, in order to solve the above problem, in the present invention, in a vapor deposition mask having a chip in which a mask opening is formed and a support substrate to which the chip is bonded, a bonding surface of the chip with the support substrate. And an unevenness is formed on at least one of the bonding surfaces of the support substrate and the chip.

  In this invention, it is preferable that the said chip | tip and the said support substrate are joined by the adhesive agent in a part of area | region where the said chip | tip and the said support substrate overlap.

  In the present invention, it is preferable that the unevenness is formed so as to avoid a region overlapping with the alignment mark formed on the chip and the support substrate. If the position that overlaps the alignment mark is also uneven, the visibility of the alignment mark is reduced. However, if the unevenness is formed at a position that avoids the position that overlaps the alignment mark, this decrease in visibility is avoided. can do.

  In the present invention, the chip is preferably formed by forming the mask opening in a single crystal silicon substrate. With this configuration, the mask opening can be formed by crystal selective etching with respect to the single crystal silicon substrate.

  In this invention, when the said unevenness | corrugation is formed at least on the said chip | tip side, it is preferable that the said unevenness | corrugation is formed by the groove-shaped recessed part in the said chip | tip. In the case of forming a groove-shaped recess, etching is performed with an etching mask formed through a narrow gap. At that time, the etching depth is defined by the width of the opening of the etching mask, Become. Therefore, when a mask opening is formed in a single crystal silicon substrate by crystal selective etching, the mask opening needs to be a through hole, so that etching is relatively deep. If formed, the groove-shaped recess and the mask opening can be formed simultaneously.

  In this invention, when the said unevenness | corrugation is formed in the said support substrate side at least, the structure in which the said unevenness | corrugation is formed by the hemispherical recessed part can be employ | adopted in the said support substrate. Such hemispherical recesses can also be formed by etching the support substrate in a state where the hole-shaped etching mask of the support substrate is formed.

  Below, with reference to drawings, the manufacturing method of the vapor deposition mask to which this invention is applied, and a vapor deposition mask are demonstrated. In the following description, after describing a common configuration in each embodiment, a characteristic part of each embodiment will be described. In each drawing used for the following description, the scale of each member is different in order to make each member a size that can be recognized on the drawing. In the following embodiments, an organic EL (electroluminescence) device is exemplified as an object to which the vapor deposition mask and the mask vapor deposition method of the present invention are used.

[Common configuration]
(Configuration example of organic EL device)
FIG. 1 is a cross-sectional view of an essential part of an organic EL device to which the present invention is applied. An organic EL device 1 shown in FIG. 1 is used as an optical head of a display device or a printer. On the element substrate 2, pixels 3 are configured in a plurality of regions surrounded by a partition wall 9 made of a photosensitive resin. Has been. Each of the plurality of pixels 3 includes an organic EL element 3a. The organic EL element 3a injects a pixel electrode 4 made of an ITO (Indium Tin Oxide) film functioning as an anode and holes from the pixel electrode 4 A hole injecting and transporting layer 5 for transporting / transporting, a light emitting layer 6 made of an organic EL material, an electron injecting and transporting layer 7 for injecting / transporting electrons, and a cathode 8 made of aluminum or an aluminum alloy. On the cathode 8 side, a sealing layer and a sealing member (not shown) for preventing the organic EL element 3a from being deteriorated by moisture or oxygen are disposed. On the element substrate 2, a circuit portion 2b including a driving transistor 2a electrically connected to the pixel electrode 4 is formed on the lower layer side of the organic EL element 3a.

  When the organic EL device 1 is a bottom emission method, light emitted from the light emitting layer 6 is emitted from the pixel electrode 4 side, so that the base of the element substrate 2 is glass, quartz, resin (plastic, plastic film) A transparent substrate such as is used. At this time, if the cathode 8 is formed of a light reflecting film, the light emitted from the light emitting layer 6 can be reflected by the cathode 8 and emitted from the transparent substrate side.

  On the other hand, when the organic EL device 1 is a top emission method, the light emitted from the light emitting layer 6 is emitted from the cathode 8 side, and therefore the base of the element substrate 2 does not need to be transparent. However, even when the organic EL device 1 is a top emission type, a light is emitted from the light emitting layer 6 by disposing a reflective layer (not shown) on the surface opposite to the light emitting side with respect to the element substrate 2. Is emitted from the cathode 8 side, it is necessary to use a transparent substrate as the base of the element substrate 2. When the organic EL device 1 is a top emission method, a light emitting layer 6 emits light by forming a reflective layer between the base of the element substrate 2 and the light emitting layer 6, for example, on the lower layer side of the pixel electrode 4. When the emitted light is emitted from the cathode 8 side, the base of the element substrate 2 does not have to be transparent.

  When the organic EL device 1 is a top emission method, the cathode 8 is formed thin. For this reason, an auxiliary wiring 8 a made of aluminum or an aluminum alloy may be formed on the upper surface of the partition wall 9 in order to compensate for an increase in electric resistance of the cathode 8.

  When the organic EL device 1 is used as a color display device, each of the plurality of pixels 3 is configured as a sub-pixel corresponding to red (R), green (G), and blue (B). In that case, in the organic EL element 3a, the light emitting layer 6 is formed of, for example, a light emitting material capable of emitting light corresponding to each color. In addition, since it is often difficult to obtain the characteristics of each RGB color by the light emitting layer 6 made of a single light emitting material, the light emitting layer 6 in which the host material is doped with a fluorescent dye is formed, and the luminescence from the fluorescent dye is emitted. It may be taken out as Examples of such a combination of the host material and the dopant material include a combination of tris (8-quinolylato) aluminum and a coumarin derivative, a combination of an anthracene derivative and a styrylamine derivative, a combination of an anthracene derivative and a naphthacene derivative, and tris ( 8-quinolylate) A combination of aluminum and a dicyanopyran derivative, a combination of a naphthacene derivative and diindenoperylene, and the like.

(Manufacturing method of the organic EL device 1)
In forming the element substrate 2, in addition to a method of performing the following steps on a single-size substrate, the following steps are performed on a large substrate on which a large number of element substrates 2 can be obtained, and then the element substrate 2 is cut into single-size element substrates 2. Although the method is adopted, in the following description, the element substrate 2 will be described regardless of the size.

  In order to manufacture the organic EL device 1, each layer is formed on the element substrate 2 by using a semiconductor process such as a film forming process or a patterning process using a resist mask. However, the hole injecting and transporting layer 5, the light emitting layer 6, and the electron injecting and transporting layer 7 are easily deteriorated by moisture and oxygen. Therefore, when forming the hole injecting and transporting layer 5, the light emitting layer 6, and the electron injecting and transporting layer 7. Furthermore, when the auxiliary wiring 8a and the cathode 8 are formed in the upper layer of the electron injecting and transporting layer 7, if a patterning process using a resist mask is performed, the resist mask is removed when the resist mask is removed with an etching solution or oxygen plasma. The hole injecting and transporting layer 5, the light emitting layer 6, and the electron injecting and transporting layer 7 are deteriorated by moisture and oxygen. Therefore, in this embodiment, when forming the hole injecting and transporting layer 5, the light emitting layer 6, and the electron injecting and transporting layer 7, and further when forming the auxiliary wiring 8a and the cathode 8, the mask vapor deposition method described in detail below. Using this, a thin film having a predetermined shape is formed on the element substrate 2 and a patterning process using a resist mask is not performed.

(Configuration example of mask evaporation system)
FIG. 2 is a schematic configuration diagram schematically showing the configuration of the mask vapor deposition apparatus. As shown in FIG. 2, in the mask vapor deposition apparatus 100, a substrate holder 119 that holds the element substrate 2 (substrate to be processed) and the vapor deposition mask 10 is disposed at an upper position in the vapor deposition chamber 110. The element substrate 2 and the vapor deposition mask 10 are held by the substrate holder 119 in a state where the vapor deposition mask 10 is overlapped at a predetermined position on the lower surface side (film formation surface side) of the element substrate 2. Rotate as shown. The configuration of the vapor deposition mask 10 will be described later with reference to FIG. 3, and has a structure in which a plurality of chips 20 are bonded to the support substrate 30. A mask opening 22 corresponding to the film pattern is formed.

  A vapor deposition source 120 for supplying vapor deposition molecules and vapor atoms toward the element substrate 2 is disposed at a lower position in the vapor deposition chamber 110. The vapor deposition source 120 includes a crucible 121 and a crucible 121 for holding a vapor deposition material therein. The heater 122 for heating the vapor deposition material in the inside, the shutter 123 which opens and closes the upper opening of the crucible 121, etc. are provided.

[Embodiment 1]
(Configuration of evaporation mask)
FIGS. 3A and 3B are a perspective view showing the overall configuration of the evaporation mask according to the first embodiment of the present invention, and an explanatory view schematically showing a BB ′ cross section thereof. 4 (a), 4 (b), and 4 (c) are enlarged views of a region surrounded by an alternate long and short dash line L in FIG. 3 (a) in the lower surface of the chip (the surface to be bonded to the support substrate). FIG. 5 is a plan view showing, an explanatory view schematically showing the CC ′ cross section, and an explanatory view of an etching mask for forming the unevenness shown in FIGS. FIG. 3A also shows a state in which the chip is turned upside down as indicated by an arrow R.

  The vapor deposition mask 10 shown in FIG. 2 and FIGS. 3A and 3B has a configuration in which a plurality of chips 20 are attached to a rectangular support substrate 30 that forms a base substrate. In this embodiment, the chip 20 is made of silicon. Each chip 20 is aligned and bonded to the support substrate 30 with an ultraviolet curable adhesive or the like.

  The vapor deposition mask 10 is, for example, a mask for forming the auxiliary wiring 8a shown in FIG. 1 by a mask vapor deposition method, and the chip 20 has an elongated hole-shaped mask opening corresponding to the film formation pattern of the auxiliary wiring 8a. 22 is formed in a state where a plurality of 22 are arranged in parallel at regular intervals. Therefore, a beam portion 27 is formed in the chip 20 between the mask openings 22.

  In the chip 20, an outer frame portion 25 is formed around a region where the mask opening 22 is formed, and a lower surface of the outer frame portion 25 is a chip-side bonding surface 28 bonded to the support substrate 30. Further, in the support substrate 30, a region surrounded by a one-dot chain line is a support substrate side bonding surface 38 to be bonded to the chip 20.

  In the organic EL device 1 shown in FIG. 1, the pixel electrode 4 is formed in a state of being separated for each pixel, but the hole injection transport layer 5, the light emitting layer 6, and the electron injection transport layer 7 are a plurality of pixels. 3, the hole injection / transport layer 5, the light emitting layer 6, and the electron injection / transport layer 7 may also be long in the chip 20, as with the vapor deposition mask 10. A vapor deposition mask having a structure in which a plurality of hole-shaped mask openings 22 are arranged in parallel at regular intervals is used. In any case, the evaporation mask 10 is formed in a predetermined region of the film formation region, and then formed a plurality of times while shifting the evaporation mask 10, thereby forming a stripe over the entire film formation region. A thin film is formed. In some cases, the vapor deposition mask 10 is used to collectively form a film in a predetermined region of the film formation region to form a striped thin film over the entire film formation region.

  3A and 3B again, the support substrate 30 is formed with a plurality of opening regions 32 made of rectangular through holes in parallel, and the plurality of chips 20 are formed in the opening regions 32 of the support substrate 30. It is fixed on the support substrate 30 so as to close the gap.

  The constituent material of the support substrate 30 preferably has the same or close thermal expansion coefficient as that of the constituent material of the chip 20. Since the chip 20 is made of silicon, the support substrate 30 is made of a material having a thermal expansion coefficient equivalent to that of silicon. By doing in this way, generation | occurrence | production of the "distortion" and "bending" by the difference in the thermal expansion amount of the support substrate 30 and the chip | tip 20 can be suppressed. In this embodiment, a transparent substrate made of alkali-free glass, borosilicate glass, soda glass, quartz glass, or the like is used as the support substrate 30.

  An alignment mark 34 is formed around the opening region 32 on the upper surface of the support substrate 30, and the alignment mark 34 is used for alignment when the chip 20 is bonded to the support substrate 30.

(Detailed configuration of chip)
In each of the plurality of chips 20, an alignment mark 23 is formed on the upper surface of the outer frame portion 25, and the alignment mark 23 is used when the evaporation mask 10 is used for evaporation or the like. It is for performing alignment. In each of the plurality of chips 20, an alignment mark 24 is formed on the lower surface of the outer frame portion 25, and the alignment mark 24 is used when the chip 20 is fixed to the support substrate 30. And aligned. These alignment marks 23 and 24 are formed by a photolithography technique and crystal anisotropic etching.

  In this embodiment, the chip 20 is composed of a single crystal silicon substrate 20a having a plane orientation (110). As will be described later, the single crystal silicon substrate 20a is formed with through-grooves using photolithography technology, wet etching, dry etching, or the like. It is manufactured by forming a mask opening 22 made of In this embodiment, the side surface in the longitudinal direction of the mask opening 22 has a plane orientation (111). A large recess 29 is formed on the back surface of the chip 20, and the mask opening 22 opens at the bottom of the recess 29. For this reason, in the region where the mask opening 22 is formed, the thickness of the substrate is thin, and vapor deposition particles traveling in an oblique direction also easily pass through the mask opening 22.

  In the vapor deposition mask 10 configured as described above, the chip 20 is bonded onto the support substrate 30 by an adhesive applied to two regions indicated by the region M indicated by oblique lines in FIG.

  Further, in this embodiment, the support substrate side bonding surface 38 is a smooth surface, but in the chip side bonding surface 28, an area that overlaps with the alignment marks 23, 24, 34 (four corners of the chip 20) is avoided. Fine irregularities 28a are formed, and the formation area of the irregularities 28a is an area indicated by a dotted line in FIG.

  In this embodiment, as shown in FIGS. 4A and 4B, the unevenness 28a is formed by a groove-shaped recess 28b having a V-shaped cross section. Here, the groove-like recess 28b includes a first groove 28c parallel to the mask opening 22 and a second groove 28d extending in a direction intersecting with the direction in which the side of the mask opening 22 extends. The mask opening 22 and the recess 29 are simultaneously formed by an etching process described later.

(Manufacturing method of evaporation mask)
5A to 5C are process cross-sectional views illustrating a method for manufacturing a vapor deposition mask according to this embodiment. In manufacturing the vapor deposition mask 10 of this embodiment, as shown in FIG. 5A, after an oxide film is formed on the entire surface of the single crystal silicon substrate 20a having the plane orientation (110) by the thermal oxidation method, The oxide film is patterned by using a lithography technique, the region where the mask opening 22 is to be formed, the region where the recess 29 is to be formed, and the unevenness 28a (groove-shaped recess 28b / first groove 28c and second groove 28d. ) To remove the oxide film in the region to be formed.

  As a result, the upper surface, the side surface, and the lower surface of the single crystal silicon substrate 20a are provided with a region where the mask opening 22 is to be formed, a region where the concave portion 29 is to be formed, and a concave and convex portion 28a An etching mask 20b having openings 20c, 20d and 20e is formed in a region where the second groove 28d) is to be formed. Here, the formation pattern of the etching mask 20b in the region that becomes the chip-side bonding surface 28 in the lower surface of the single crystal silicon substrate 20a is as shown in FIG. The mask 20b is aligned vertically and horizontally.

Next, for example, wet etching is performed on the upper and lower surfaces of the single crystal silicon substrate 20a from the openings 20c, 20d, and 20e of the etching mask 20b with an aqueous potassium hydroxide solution having a temperature of 80 ° C. and a concentration of 35%. The wet etching performed here is crystal anisotropic etching, and in the openings 20c, 20d, and 20e, the etching proceeds deeply in a region where the opening is wide, and the etching proceeds shallowly in a region where the opening is narrow. Here, the area per one of the openings 20c, 20d, and 20e is expressed as follows: Opening 20d> Opening 20c> Opening 20e
Therefore, a large and deep recess 29 is formed on the lower surface of the single crystal silicon substrate 20a, while a mask opening made of a through-hole opening at the upper surface and the upper bottom of the recess 29 is formed on the single crystal silicon substrate 20a. 22 is formed. Further, in the single crystal silicon substrate 20a, the lower surface (chip-side bonding surface 28) of the outer frame portion 25 of the chip 20 is in a region avoiding the alignment marks 23 and 24, as shown in FIGS. 4A and 4B, the recesses and protrusions 28a formed by the groove-like recesses 28b (the first groove 28c and the second groove 28d) having a V-shaped cross section described with reference to FIGS.

  Next, when the etching mask 20b is completely removed using buffered hydrofluoric acid, the chip 20 is formed. After that, as shown in FIGS. 3A and 3B, the chip 20 is bonded onto the support substrate 30 with an adhesive partially applied to the region M on the support substrate 30, and the evaporation mask 10. Get. The manufactured deposition mask 10 is dried with a cleaning solution such as isopropyl alcohol, if necessary, and then dried.

(Manufacturing method / reproduction method 1 of mask for vapor deposition)
With respect to the evaporation mask 10 manufactured in this way, an inspection process is performed, and when a defect is found in any of the plurality of chips 20, an adhesive removal made of a mixed solution of sulfuric acid and hydrogen peroxide solution or the like is removed. The deposition mask 10 is immersed in the liquid to remove the adhesive, the defective chip 20 or all the chips 20 are peeled off from the support substrate 30, and another chip 20 is bonded onto the support substrate 30 again. In that case, since the chip | tip 20 is joined to the support substrate 30 by the adhesive agent apply | coated partially, an adhesive agent can be removed easily. In addition, since the unevenness 28a is formed on the chip-side bonding surface 28, the adhesive removal liquid easily enters, so that the adhesive can be easily removed. Further, even when a wet process such as a cleaning and drying process is performed in the state of the vapor deposition mask 10, the chip-side bonding surface 28 has the irregularities 28a, so that the region other than the region bonded by the adhesive, Since the situation where the chip 20 is stuck to the support substrate 30 does not occur, the chip 20 can be easily removed from the support substrate 30 as long as the adhesive is removed. Therefore, since the support substrate 30 can be easily recovered, the evaporation mask 10 can be manufactured again using the recovered support substrate 30.

(Deposition mask production method / regeneration method 2)
Further, while the vapor deposition mask 10 is used for vapor deposition, the film attached to the vapor deposition mask 10 is subjected to a wet process such as removal with an etching solution, washing, and drying. In addition, when a defect occurs in any of the plurality of chips 20 while using the vapor deposition mask 10, the vapor deposition mask is added to an adhesive removing liquid composed of a mixed solution of sulfuric acid and hydrogen peroxide solution. 10 is immersed to remove the adhesive, the defective chip 20 or all the chips 20 are peeled off from the support substrate 30, and another chip 20 is bonded onto the support substrate 30 again. In that case, since the chip | tip 20 is joined to the support substrate 30 by the adhesive agent apply | coated partially, an adhesive agent can be removed easily. In addition, since the unevenness 28a is formed on the chip-side bonding surface 28, the adhesive removal liquid easily enters, so that the adhesive can be easily removed. Further, even when a wet process such as a cleaning and drying process is performed in the state of the vapor deposition mask 10, the chip-side bonding surface 28 has the irregularities 28a, so that the region other than the region bonded by the adhesive, Since the situation where the chip 20 is stuck to the support substrate 30 does not occur, the chip 20 can be easily removed from the support substrate 30 as long as the adhesive is removed. Therefore, since the support substrate 30 can be easily recovered, the evaporation mask 10 can be manufactured again using the recovered support substrate 30.

(Main effects of this form)
As described above, in the vapor deposition mask 10 of this embodiment, the unevenness 28a is formed on the chip-side bonding surface 28. Therefore, even the vapor deposition mask 10 exposed to the wet process is bonded with an adhesive. A situation in which the chip 20 and the support substrate 30 are firmly attached to each other in a region where no contact is made does not occur. For this reason, when trouble occurs in the chip 20, the adhesive can be easily removed, and if the adhesive is removed, the chip 20 can be easily peeled from the support substrate 30. Accordingly, the deposition cost can be reduced by recovering the support substrate 30 and manufacturing the deposition mask 10 again using the recovered support substrate 30.

  In this embodiment, since the unevenness 28a is formed by the groove-shaped recess 28b, the groove-shaped recess 28b can be formed simultaneously with the mask opening 22 and the recess 29. That is, the etching depth is defined by the widths of the openings 20c, 20d, and 20e of the etching mask 20b. Therefore, when the mask opening 22 and the recess 29 are formed in the single crystal silicon substrate 20a by crystal selective etching, the opening is formed. The shallow groove-like recess 28b can be formed simultaneously with the mask opening 22 and the recess 29 only by reducing the width of the portion 20e. Therefore, even when the groove-shaped recess 28b is formed, the number of manufacturing steps does not increase, and problems such as a reduction in strength of the chip 20 do not occur.

  In addition, since the unevenness 28a is formed so as to avoid regions overlapping with the alignment marks 23, 24, and 34 formed on the chip 20 and the support substrate 30, a decrease in visibility with respect to the alignment marks 23, 34, and 34 is avoided. be able to.

(Other manufacturing methods)
In the above embodiment, an oxide film is used as an etching mask. However, as long as it has etching resistance, a metal such as a silicon nitride film formed by a CVD method or an Au film or a Pt film formed by a sputtering method is used. It may be a membrane. Further, the unevenness 28a is not limited to the groove shape but may be formed in a dot shape. Further, the unevenness 28a may be formed by sandblasting or the like.

[Embodiment 2]
6 (a), 6 (b), and 6 (c) are perspective views showing the entire configuration of the vapor deposition mask according to Embodiment 2 of the present invention, and explanatory views schematically showing the DD ′ cross section. It is explanatory drawing which shows the method of forming the unevenness | corrugation shown to Fig.6 (a), (b). Since the basic configuration of this embodiment is the same as that of Embodiment 1, common portions are denoted by the same reference numerals and description thereof is omitted.

  The vapor deposition mask 10 shown in FIGS. 6A and 6B has a configuration in which a plurality of chips 20 are attached to a rectangular support substrate 30 that forms a base substrate, as in the first embodiment. . In this embodiment, the chip 20 is made of silicon. In the chip 20, an outer frame portion 25 is formed around a region where the mask opening 22 is formed, and a lower surface of the outer frame portion 25 is a chip-side bonding surface 28 bonded to the support substrate 30. Further, in the support substrate 30, a region surrounded by a one-dot chain line is a support substrate side bonding surface 38 to be bonded to the chip 20. The support substrate 30 is formed with a plurality of opening regions 32 made of rectangular through holes in parallel, and the plurality of chips 20 are fixed on the support substrate 30 so as to close the opening regions 32 of the support substrate 30. Yes. As the support substrate 30, a transparent substrate made of alkali-free glass, borosilicate glass, soda glass, quartz glass, or the like is used. An alignment mark 34 is formed around the opening region 32 on the upper surface of the support substrate 30. In each of the plurality of chips 20, an alignment mark 23 is formed on the upper surface of the outer frame portion 25, and an alignment mark 24 (see FIG. 3A) is formed on the lower surface of the outer frame portion 25. A large recess 29 is formed on the back surface of the chip 20, and the mask opening 22 opens at the bottom of the recess 29.

  In the vapor deposition mask 10 configured in this manner, the chip 20 is bonded onto the support substrate 30 by an adhesive applied to two regions indicated by the region M indicated by oblique lines in FIG.

  In this embodiment, the chip-side bonding surface 28 is a smooth surface, but the region of the support substrate-side bonding surface 38 that avoids the regions that overlap with the alignment marks 23, 24, 34 (four corner regions of the support substrate-side bonding surface 38). In FIG. 6, fine irregularities 38 a are formed, and the formation area of the irregularities 28 a is an area indicated by a dotted line in FIG.

  In this embodiment, as shown in FIG. 6B, the unevenness 38a is formed by a plurality of hemispherical recesses 38b. In forming such a hemispherical recess 38b, as shown in FIG. 6C, the support substrate 30 is formed with an etching mask 40 having dot-shaped openings 40a formed on the surface of the support substrate 30. Etching is performed. More specifically, after a polycrystalline silicon film is formed on the surface of the support substrate 30, a resist mask is formed on the surface of the polycrystalline silicon film by photolithography, and the polycrystalline film is formed through the opening of the resist mask. The silicon film is patterned to form an etching mask 40. Next, when wet etching is performed on the support substrate 30 from the opening 40a of the etching mask 40 with a hydrofluoric acid (HF) -based etching solution, isotropic etching proceeds around the opening 40a. A hemispherical recess 38 b is formed on the surface of the support substrate 30.

  An adhesive is partially applied to the region M on the support substrate 30 thus manufactured, and then the chip 20 is joined to obtain the evaporation mask 10. The manufactured deposition mask 10 is dried with a cleaning solution such as isopropyl alcohol, if necessary, and then dried.

  Similarly to the first embodiment, when a defect is found in any of the plurality of chips 20 in the inspection process, the vapor deposition mask 10 manufactured in this way is also a mixture of sulfuric acid and hydrogen peroxide solution, or the like. The deposition mask 10 is immersed in an adhesive removing solution made of the above, the adhesive is removed, the defective chip 20 or all the chips 20 are peeled off from the support substrate 30, and another chip 20 is again mounted on the support substrate 30. Join on top. Further, the deposition mask 10 is subjected to a wet process such as cleaning and drying after the film attached when used for deposition is removed with an etching solution. If a defect occurs in any of the plurality of chips 20 while the vapor deposition mask 10 is used, the vapor deposition mask is added to an adhesive removing liquid composed of a mixed solution of sulfuric acid and hydrogen peroxide. 10 is immersed to remove the adhesive, the defective chip 20 or all the chips 20 are peeled off from the support substrate 30, and another chip 20 is bonded onto the support substrate 30 again.

  When performing such regeneration, in the evaporation mask 10 of this embodiment, the unevenness 38a is formed on the support substrate side bonding surface 38, so even the evaporation mask 10 exposed to the wet process is bonded with an adhesive. A situation in which the chip 20 and the support substrate 30 are firmly attached to each other in an unfinished region does not occur. For this reason, when trouble occurs in the chip 20, the adhesive can be easily removed, and if the adhesive is removed, the chip 20 can be easily peeled from the support substrate 30. Accordingly, the deposition cost can be reduced by recovering the support substrate 30 and manufacturing the deposition mask 10 again using the recovered support substrate 30.

  Moreover, since the unevenness 38a is formed so as to avoid the region overlapping with the alignment marks 23, 24, and 34 formed on the chip 20 and the support substrate 30, it prevents the visibility of the alignment marks 23, 34, and 34 from being lowered. be able to.

(Other manufacturing methods)
In the above embodiment, a polycrystalline silicon film is used as an etching mask. However, a silicon nitride film formed by a CVD method, an Au film or a Pt film formed by a sputtering method, etc., as long as it has etching resistance. It may be a metal film. Further, the recess 38a may be formed by sandblasting or the like.

[Other embodiments]
The technical scope of the present invention is not limited to the above embodiments, and various modifications can be made without departing from the spirit of the present invention. For example, in the above embodiment, the example in which the mask opening 22 is formed in the single crystal silicon substrate 20a having the plane orientation (110) has been described. However, the single crystal silicon substrate having other plane orientations, other silicon substrates, The present invention may be applied to an evaporation mask in which a mask opening 22 is formed in a substrate other than silicon.

  In the above embodiment, the vapor deposition mask used in the vacuum vapor deposition method has been described. However, the present invention can be applied to a vapor deposition mask used in a vapor deposition method such as a sputtering film forming method or an ion plating method. In recent years, plasma coating using plasma has been proposed for the ion plating method, and the present invention can also be applied to a deposition mask used in such a deposition method.

  Further, in the above embodiment, the present invention is applied to a vapor deposition mask for forming the striped thin film (auxiliary wiring 8a, hole injection transport layer 5, light emitting layer 6, electron injection transport layer 7) of the organic EL device 1. However, the present invention may be applied to an evaporation mask for forming a stripe-shaped thin film in a manufacturing process of a liquid crystal device or other electro-optical device or semiconductor device.

It is principal part sectional drawing of the organic electroluminescent apparatus with which this invention is applied. It is a schematic block diagram of a mask vapor deposition apparatus. (A), (b) is a perspective view which shows the structure of the whole vapor deposition mask which concerns on Embodiment 1 of this invention, respectively, and explanatory drawing which shows typically the BB 'cross section. (A), (b), (c) is the top view which expands and shows a part of lower surface of the chip | tip used for the vapor deposition mask which concerns on Embodiment 1 of this invention, respectively, and the CC 'cross section is shown. It is explanatory drawing shown typically and explanatory drawing of the etching mask for forming an unevenness | corrugation. (A)-(c) is process sectional drawing which shows the manufacturing method of the mask for vapor deposition which concerns on Embodiment 1 of this invention. (A), (b), (c) is the perspective view which shows the structure of the whole vapor deposition mask which concerns on Embodiment 2 of this invention, explanatory drawing which shows the DD 'cross section typically, and unevenness | corrugation, respectively It is explanatory drawing which shows the method of forming. It is explanatory drawing of the conventional mask for vapor deposition.

Explanation of symbols

1 .... Organic EL device, 2 .... Element substrate (substrate to be processed), 3. Pixel, 3a ... Organic EL element, 10 .... Evaporation mask, 20 .... Chip, 20a ... Single crystal silicon substrate, 22 .. Mask opening, 28.. Chip side bonding surface, 28 a, 38 a.. Unevenness formed on bonding surface, 30.. Support substrate, 38.

Claims (9)

In a method of manufacturing a vapor deposition mask having a chip in which a mask opening is formed and a support substrate to which the chip is bonded,
Forming irregularities on at least one of the bonding surface of the chip with the support substrate and the bonding surface of the support substrate with the chip,
After bonding the chip to the support substrate,
Performing a chip removing step of removing the chip from the support substrate when a defect is found in the chip;
A method for manufacturing a deposition mask, comprising fixing another chip to the support substrate from which the chip has been removed in the chip removal step.   The deposition mask according to claim 1, wherein the chip is bonded to the support substrate by an adhesive applied to a part of a region where the chip and the support substrate overlap. Manufacturing method.   3. The method for manufacturing a deposition mask according to claim 1, wherein when forming the unevenness on the bonding surface, etching is performed in a state where an etching mask is formed on the bonding surface. 4. In a vapor deposition mask having a chip in which a mask opening is formed and a support substrate to which the chip is bonded,
An evaporation mask, wherein unevenness is formed on at least one of a bonding surface of the chip with the support substrate and a bonding surface of the support substrate with the chip.   The vapor deposition mask according to claim 4, wherein the chip and the support substrate are bonded by an adhesive in a part of a region where the chip and the support substrate overlap.   The deposition mask according to claim 4, wherein the unevenness is formed so as to avoid a region overlapping with an alignment mark formed on the chip and the support substrate.   The evaporation mask according to claim 4, wherein the chip has a mask opening formed in a single crystal silicon substrate. The irregularities are formed at least on the chip side,
8. The evaporation mask according to claim 4, wherein the unevenness is formed by a groove-shaped recess. The unevenness is formed at least on the support substrate side,
The deposition mask according to any one of claims 4 to 8, wherein the unevenness is formed by a hemispherical recess in the support substrate.

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