JP2008191864A - Data processor and start-up method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To further improve reliability by early detecting a failure of an ECC memory. <P>SOLUTION: The data processor checks, when a start-up instruction is given, whether a history of memory error is recorded by a recording means or not. When the history of memory error is recorded, the processor inspects the ECC memory. When abnormality of the ECC memory is detected as a result, start-up is stopped after giving a warning for memory error. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a data processing apparatus using an ECC (Error Check and Correct) memory and a starting method thereof.

  Currently, a data processing apparatus such as a PC (personal computer) used in a general household uses a memory to which a parity check function for detecting the occurrence of a memory error when a memory error occurs is provided. The memory with a parity check function is a memory that has one redundant bit for 8 bits and performs a check (parity check) to check whether the memory writing and reading are the same bit. At the time of parity check, if the writing time and reading time are not the same, a memory error is detected. Such a memory with a parity check function cannot detect which bit an error has occurred only by detecting that a memory error has occurred. For this reason, the reliability is poor.

  Therefore, an ECC memory is mainly used in a data processing apparatus such as a database server or a POS (Point Of Sales) system that requires high reliability. The ECC memory is a memory capable of not only detecting a memory error like a memory with a parity check function but also specifying a part where the error has occurred and correcting the error to a correct value.

  The ECC memory has a function to detect and correct this error when, for example, 8 bits of data for error correction correspond to 64 bits and 1 bit out of 64 bits becomes an error value as a main function. Have. Further, when an error occurs in 2 bits or more, the ECC memory cannot correct the 2-bit memory error but can detect it.

  Compared with a memory with a parity check function, such an ECC memory has a problem that more redundant data is required and the cost of the memory is also required. However, since the ECC memory can improve the reliability by correcting the memory error of the system, it is frequently used for a data processing method that requires high reliability such as a database server or a POS system.

Conventionally, as a data processing apparatus using such an ECC memory, when an error occurs in the ECC memory, the control right is switched from OS (Operating System) to BIOS (Basic Input Operating System), which is a 1-bit memory error. If it is automatically repaired, the ECC memory error processing module added to the BIOS executes a recording process for logging while counting the 1-bit memory error, and then returns the control right to the OS. In the case of the above memory errors, the ECC memory error processing module performs a recording process for taking a log while counting the 2-bit memory error, then issues a system error warning, and improves the reliability by stopping the operation. What is made to perform is known (for example, refer patent document 1).
JP 2002-73427 A

  As described above, in the data processing apparatus using the conventional ECC memory, the history of the memory error can be left as a log, but when it is a 1-bit memory error, it is automatically repaired. The user is unaware that a memory error has occurred. A memory error may not only occur accidentally due to external factors such as noise, but may also occur due to a failure sign due to memory degradation or the like. However, it is not possible from the outside to determine the cause of the memory error. In order to determine this, a system administrator or the like has to instruct and execute a memory test. In addition, the memory may be left unattended until the memory fails. For this reason, a system lock or a function stop due to an ECC memory failure may occur, which may cause a function stop of the server system or the POS system.

  The present invention has been made based on such circumstances, and an object of the present invention is to provide a data processing apparatus capable of detecting a failure of an ECC memory at an early stage and further improving reliability and a starting method thereof. It is something to be offered.

  A data processing apparatus according to the present invention includes an ECC memory having a function of detecting and correcting a memory error, and a recording means for recording a history of occurrence of a memory error in the ECC memory, and has a start instruction. And determining means for determining whether or not the memory error history is recorded by the recording means, and checking the ECC memory on condition that the memory error history is determined to be recorded by the determining means And an activation stop means for stopping activation after a memory error warning when an abnormality of the ECC memory is detected as a result of the inspection by the inspection means.

  Further, according to the data processing apparatus activation method of the present invention, when there is an activation instruction, a determination step for determining whether or not a memory error history is recorded by the recording means, and a memory error history is recorded by this determination step. If it is determined that the ECC memory has been detected, an inspection step for performing an inspection of the ECC memory and an activation stop step for stopping the activation after a warning of a memory error when an abnormality of the ECC memory is detected by the inspection step are provided. Is.

  According to the present invention in which such measures are taken, it is possible to provide a data processing apparatus that can detect a failure of the ECC memory at an early stage and can further improve the reliability, and a startup method thereof.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a main configuration of a data processing apparatus 1 according to the present embodiment.
As shown in FIG. 1, the data processing apparatus 1 is equipped with a CPU 10 as a control unit main body. In addition, a chip set 20 that controls information distribution such as management of data transfer, an ECC memory 30 as a main memory, an image processing card 40 that performs image processing, and a plurality of PCIs for mounting expansion boards and the like A slot 50 and a BIOS (Basic Input / Output System) 60 are provided, and these components are connected to the CPU 10 by a bus line 70 such as a PCI bus.

  The chip set 20 includes a north bridge 21 used for connecting the CPU 10 and the bus line 70 and a south bridge 22 having functions of various controllers and the like. A screen 41 for outputting information is connected to the image processing card 40. The chip set 20 is formed to connect the CPU 10 and other components.

  The north bridge 21 is configured so that the CPU 10 can be connected to other components such as the ECC memory 30 so that an application can be activated and data processing can be executed under OS control. The north bridge 21 is also provided with an ECC control circuit that automatically repairs the 1-bit memory error when a 1-bit memory error occurs in the ECC memory 30 and is detected.

  The BIOS 60 is provided with an ECC memory error processing module as a recording unit for recording a history of occurrence of memory errors in the ECC memory. The recording means includes a counter that counts the error occurrence count X. In addition, it has a log file that records the error occurrence status (occurrence location, occurrence content, etc.) as a log.

A basic operation flow of the data processing apparatus 1 configured as described above will be described with reference to a flowchart of FIG.
When the activation is instructed by turning on the power of the data processing apparatus 1 or the like, the data processing apparatus 1 executes an activation process to be described later (ST1). When the system starts up normally by this activation process, the OS operates in the data processing apparatus 1 (ST2). Thereby, thereafter, the CPU 10 operates the data processing apparatus 1 under the control of the OS.

  In this normal operation, the ECC memory 30 is used (ST3). That is, data is written and read. At this time, if a 1-bit memory error occurs in the ECC memory 30 and is detected (ST4, YES), the control right of the CPU 10 is switched from the OS to the BIOS 60 (ST5). The 1-bit memory error in the ECC memory 30 is automatically repaired by the ECC control circuit (ST6).

  When the control right is switched to the BIOS, the ECC memory error processing module added to the BIOS counts up the counter (X ← X + 1) (ST7). For example, if the memory error is the first after the data processing device 1 is started, the count number X is 1. Also, log processing of error occurrence status. Thereafter, the control right of the CPU 10 is returned from the BIOS 60 to the OS (ST8).

  On the other hand, when the memory error occurring in the ECC memory 30 is not a 1-bit memory error but a memory error of 2 bits or more (ST9, YES), the control right of the CPU 10 is switched from the OS to the BIOS 60 (ST10). However, the memory error of 2 bits or more is not self-repaired in the ECC memory 30.

  When the control right is switched to the BIOS 60, the ECC memory error processing module added to the BIOS counts up the counter (X ← X + 1) (ST11). Also, log processing of error occurrence status. Thereafter, the control right of the CPU 10 is returned from the BIOS 60 to the OS (ST12). Note that the count number X may be classified by a 1-bit memory error and a 2-bit or more memory error.

  When the control right is returned to the OS, the data processing apparatus 1 uses the ECC memory until there is a system termination instruction (ST13) (ST4). If there is an end instruction (YES in ST13), the OS is instructed to stop the system, and the data processing apparatus 1 is shut down (ST14).

  Next, the procedure of the activation process of ST1 will be described using the flowchart of FIG.

  When starting the activation process, the CPU 10 determines from the count number X of the counter whether or not a memory error has occurred during the previous operation of the data processing apparatus 1, that is, whether or not a memory error history is recorded. (ST21: determination means). Specifically, when the count number X is 1 or more, it is determined that a memory error has occurred since a memory error history is recorded. When the count number X is 0, a memory error has occurred. Judge that it is not.

  If a memory error has occurred (ST21, YES), a detailed memory inspection is performed on the ECC memory 30 (ST22: inspection means). Here, the detailed memory check is a check for checking whether a failure has occurred in the physical area of the ECC memory 30 in all areas of the ECC memory 30.

  When this detailed memory inspection is completed and a failure of the ECC memory 30 is found in the inspection result (ST23, YES), the CPU 10 should be replaced on the screen 41 because, for example, the ECC memory 30 has failed. Is displayed (ST24). After the display, the CPU 10 stops the system (ST25: activation stop means) and shuts down the data processing apparatus 1. By shutting down the data processing apparatus 1, the failure of the ECC memory 30 is prevented from proceeding further.

  For example, the ECC memory 30 may operate without any problem on the surface even if it has failed. For this reason, the ECC memory 30 may be completely destroyed by performing this operation. If the ECC memory 30 breaks down while the data processing apparatus 1 is in use, there is a possibility that a freeze, a system lock, or the like will occur, which may make the data processing apparatus 1 unusable. If the data processing device 1 becomes unusable, there will be inconveniences such as inability to perform accounting when the data processing device 1 is used in a store POS system or the like. In order to prevent this, the system is stopped after a warning is displayed on the screen 41.

  If no failure of the ECC memory 30 is found in ST23 (ST23, NO), the count number X is set to 0 and the counter is reset (ST26: history canceling means). Thereafter, normal activation is performed (ST27). On the other hand, when the count number X of the counter is 0 and no memory error has occurred (NO in ST21), the CPU 10 executes a simple memory test (ST28: simple test means). This simple memory check is to check only a specific area of the ECC memory 30, for example. Since the simple memory inspection checks only a specific area, the time required for the inspection can be made shorter than the detailed memory inspection. By making the time required for the memory inspection short, the startability is improved.

  After executing the simple memory test, the CPU 10 determines whether or not a memory failure is detected by the simple memory test (ST29). At this time, if a memory failure is detected by the simple memory inspection (YES in ST29), the process proceeds to ST22, and a detailed memory inspection is performed on the ECC memory 30. After this, the operation starts from ST22.

  If a memory failure is not detected as a result of the simple memory test, the process proceeds to ST27 and normal activation is executed.

  As described above, in the data processing device 1 of the present embodiment, the presence or absence of the memory error occurrence history of the ECC memory 30 when the data processing device 1 was operated last time is checked when the system is activated. If a memory error has occurred, a detailed memory check is performed on the ECC memory 30. Therefore, when a 1-bit or 2-bit memory error has occurred when the ECC memory 30 was used last time, the memory error has occurred due to external factors such as noise, or the ECC memory 30 has failed or has failed. It is possible to inspect whether a memory error has occurred due to the precursor. Thereby, a system lock or the like due to a memory failure due to a failure of the ECC memory 30 can be prevented in advance. For this reason, the reliability of the ECC memory 30 can be improved.

  Further, since the detailed memory inspection is performed on the entire area of the ECC memory 30, it takes a long time to perform the inspection. For this reason, if the detailed memory inspection is performed every time in order to improve the reliability, it takes time until the data processing apparatus 1 is used, and the startability and the use efficiency are deteriorated. Therefore, in the present embodiment, if a memory error has not occurred as a result of checking the presence or absence of a memory error occurrence history, a simple memory test that can be completed in a short time is executed. Therefore, it is possible to shorten the inspection time while improving the reliability. Thereby, startability and use efficiency will also be improved.

  Furthermore, even if a memory error has not occurred during the previous use, it is possible to find a memory failure that does not appear by performing a simple memory test. Further, when a memory failure is found by the simple memory inspection, the detailed memory inspection is automatically executed. Even if the ECC memory 30 is out of order, a memory error may not occur, and a detailed memory inspection is performed after judging this oversight by a simple memory inspection, so that a double check is performed and reliability is further improved. .

  As described above, according to the data processing apparatus 1 according to the present embodiment, the inspection method is determined at the next startup according to the state of the ECC memory 30 of the previous data processing apparatus 1, and the ECC memory 30 is inspected. Therefore, high reliability can be obtained. In addition, since the useless inspection is not performed, the inspection time can be shortened.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage.

  For example, in the above-described embodiment, the inspection method is determined according to the memory error count during the previous operation of the data processing apparatus 1 every time the system is started, but this need not be performed every time. For example, a simple memory test is usually performed every time the system is started, and a detailed memory test is performed when a failure is determined. And it is good also as what determines a test | inspection method at the time of the next system starting which operated the fixed starting time by counting the starting time of the data processor 1. FIG. As a result, for example, the ECC memory error frequently occurs in a place where a lot of noise is generated in the place of use, environment, or the like, thereby shortening the inspection time at each system startup.

  In addition, the simple memory test may be performed every time the system is started, and at the same time, the previous bit memory error occurrence count X may be displayed on the screen 41. By checking the count number X by the user and performing a detailed memory inspection when it is deemed necessary, and usually performing a simple memory inspection, the time required for the inspection can be reduced. Further, since the detailed memory inspection is performed when the failure determination is made by the simple memory inspection, the reliability can be improved.

  Furthermore, each time the system is started, the inspection method is determined according to the previous memory error count, and instead of executing the inspection, the inspection method is determined from the memory error count X at the time of system end when the system ends. The inspection may be executed. In this way, the inspection time is provided when the system is terminated (when the data processing apparatus 1 is shut down), so that the inspection is not performed at the next startup. As a result, the startup time for startup can be shortened, and the power is automatically turned off after completion of the inspection, so that it may be left at the time of inspection.

  Further, the data processing apparatus 1 may be applied to a merchandise sales data processing apparatus including a POS (Point Of Sales) terminal installed at a checkout count in a supermarket, or a terminal used for a server system. It can be applied even if it is used.

  In addition to this, when it is determined in ST23 that the ECC memory 30 has failed, the failure information is displayed on the screen 41, and a program that can back up the information in the ECC memory 30 to an external medium is activated. It is good.

  In addition, various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, the constituent elements over different embodiments may be combined.

The block diagram which shows the principal part structure of the data processor which concerns on this Embodiment. The flowchart which shows the basic operation | movement of the same data processor. The flowchart which shows operation | movement of the memory test | inspection method of the same data processor.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Data processing apparatus, 10 ... CPU, 20 ... Chip set, 21 ... North bridge, 22 ... South bridge, 30 ... ECC memory, 40 ... Image processing card, 41 ... Screen, 50 ... PCI slot, 60 ... BIOS, 70 ... Bus line.

Claims (6)

In a data processing apparatus comprising an ECC memory having a function of detecting and correcting a memory error, and a recording means for recording a history of occurrence of the memory error in the ECC memory,
When there is a start instruction, a determination unit that determines whether a history of memory errors is recorded by the recording unit;
Inspection means for executing an inspection of the ECC memory on the condition that the determination means records that the history of the memory error is recorded;
As a result of the inspection by the inspection means, when an abnormality of the ECC memory is detected, start stop means for stopping start after a memory error warning;
A data processing apparatus comprising:   2. The apparatus according to claim 1, further comprising history canceling means for canceling a memory error occurrence history recorded in the recording means when an abnormality of the ECC memory is not detected as a result of the inspection by the inspection means. Data processing equipment. The inspection of the ECC memory by the inspection means is a detailed memory inspection that inspects the entire area of the ECC memory,
The apparatus further comprises simple inspection means for executing a simple memory inspection that inspects a specific area of the ECC memory on the condition that the memory error history is determined not to be recorded by the determination means. Item 3. The data processing device according to Item 1 or 2. An activation method of a data processing apparatus comprising an ECC memory having a function of detecting and correcting a memory error, and a recording means for recording a history of occurrence of the memory error in the ECC memory,
Data processing equipment
When there is an activation instruction, a determination step of determining whether or not a memory error history is recorded by the recording unit;
If it is determined that a memory error history is recorded in this determination step, an inspection step for performing an inspection of the ECC memory;
When an abnormality of the ECC memory is detected by this inspection step, a start stop step for stopping start after a memory error warning;
A method for starting a data processing apparatus, comprising:
A method for starting a data processing apparatus, wherein the memory failure determination means outputs the determination result when the ECC memory is determined to be defective, and the system can be stopped. The inspection of the ECC memory by the inspection step is a detailed memory inspection that inspects the entire area of the ECC memory,
A simple inspection step for executing a simple memory inspection for inspecting a specific area of the ECC memory when the determination step determines that the history of the memory error is not recorded. Item 5. A data processing apparatus startup method according to Item 4.   6. The data processing apparatus activation method according to claim 4 or 5, wherein the activation stop step releases the memory error occurrence history recorded in the recording means before the activation is stopped.

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