JP2008167364A - Amplification circuit, light receiving amplifier circuit, and optical pickup device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve consistency of circuit stabilization at a low gain with high speed responses at a high gain, by switching gains according to the levels of input signals. <P>SOLUTION: A prestage amplification circuit 100a has a bipolar transistor for amplification 102 which amplifies a current signal output from a photodiode 101 and outputs to an output terminal 112, and a feedback circuit having a gain switching function which can switch between a low gain and a high gain and is connected to the base of the bipolar transistor 102 and the output terminal 112. Responding to switching of gains of the feedback circuit according to the signal level of the output current signal, the amplification circuit adjusts open loop gains which are frequency characteristics when the feedback circuit is not provided and indicate relations between gains and response frequencies. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an amplifier circuit, a light receiving amplifier circuit, and an optical pickup device, and more particularly to an amplifier circuit with a gain switching function.

  In recent years, for the purpose of increasing the recording capacity, various types of optical discs such as CD, DVD, and BD have been developed. For this reason, an optical disc recording / reproducing apparatus for recording / reproducing the optical disc is required to have an optical pickup drive corresponding to an optical disc of a different format.

  FIG. 13 is a diagram showing a schematic configuration of an optical system of a conventional optical pickup apparatus 1000. As shown in FIG.

  The optical pickup device 1000 is a device that is mounted on an optical pickup drive (not shown) and reads data on an optical disc 1001 inserted into the optical pickup drive. As shown in FIG. 13, the optical pickup device 1000 includes an objective lens 1002, a collimator lens 1003, a beam splitter 1004, a spot lens 1005, a light receiving IC 1006, and a semiconductor laser 1007.

  The semiconductor laser 1007 is composed of a plurality of semiconductor lasers having different wavelengths in order to support a plurality of different formats. Each semiconductor laser irradiates a laser beam corresponding to each optical disk 1001. For example, a laser beam having a wavelength of 780 nm is used to support CD, a laser beam having a wavelength of 650 nm is used to support DVD, and a laser beam having a wavelength of 405 nm is used to support BD. Must be irradiated.

  Each semiconductor laser is optically arranged with high accuracy and is arranged so that reflected light from the optical disc 1001 is irradiated onto the light receiving IC 1006. The light receiving IC 1006 includes a light receiving amplifier circuit (light receiving amplification circuit) including a light receiving element. The optical signal input to the light receiving element is converted into a current signal, amplified, and output to a subsequent circuit.

  Here, in a recordable / reproducible CD or DVD drive mainly equipped in a general personal computer device, a light amount having a larger laser power is irradiated to an optical disc at the time of recording than at the time of reproduction.

  For this reason, to explain with reference to FIG. 13, an optical signal having a higher level than that at the time of reproduction is input to the light receiving IC 1006 irradiated with the reflected light from the optical disc 1001 at the time of recording. In other words, an increase in laser power is indispensable to cope with an increase in recording speed. Accordingly, it is preferable that the gain setting of the light receiving IC 1006 is low. On the other hand, a high-speed response with a high gain is required in order to cope with the reproduction of an optical disc having an increased recording capacity such as BD.

  Thus, in order to cope with the difference in optical input level between recording and reproduction, the light receiving IC 1006 employs a method of switching the gain so as to correspond to each optical input level during recording and reproduction. The gain of the light receiving IC 1006 needs to be switched widely from a high gain to a low gain according to the optical input level to obtain a sufficient response speed.

  An amplifier circuit having a gain switching function is disclosed in, for example, Patent Document 1 and Patent Document 2. Patent Document 1 discloses a configuration that performs optimum phase compensation for each changed gain. Patent Document 2 discloses a configuration for switching the gain.

  Next, as an example of a conventional light receiving IC 1006, a configuration of a light receiving IC 2000 including a front amplifier circuit 2100 and a rear amplifier circuit 2200 will be described with reference to FIGS.

  FIG. 14 is a diagram showing a configuration of a conventional light receiving IC 2000 with a multistage gain switching function.

  The light receiving IC 2000 includes a light receiving amplifier circuit with a multistage gain switching function for mounting an optical pickup device. Specifically, the light receiving amplifier circuit includes a front-stage amplifier circuit 2100 and a rear-stage amplifier circuit 2200, and has a multi-stage amplification function. Here, the present invention relates to a part of the preamplifier circuit 2100. Therefore, a detailed configuration of the pre-stage amplifier circuit 2100 will be described below.

  As shown in FIG. 14, the preamplifier circuit 2100 includes a photodiode 2101 as a light receiving element that receives reflected light from an optical disk, an amplifier circuit 2102, and a feedback circuit of the amplifier circuit 2102.

  In detail, the feedback circuit is composed of a first-stage feedback circuit and a second-stage feedback circuit. That is, in the feedback circuit of the first stage, the feedback capacitor 2103 and the feedback resistor 2104 are connected in parallel, one terminal of the circuit connected in parallel is connected to the input side of the amplifier circuit 2102, and the other terminal is This is a circuit connected to the output side of the amplifier circuit 2102. In the second-stage feedback circuit, a feedback capacitor 2105 and a feedback resistor 2106 are connected in parallel, one terminal of the circuit connected in parallel is connected to the input side of the amplifier circuit 2102, and the other terminal is the switch 2107. This is a circuit connected to the output side of the amplifier circuit 2102 via

  In the above configuration, the photodiode 2101 converts the received reflected light from an optical signal to a current signal. Here, when high sensitivity is required for the light receiving IC 2000 in order to cope with high-speed reproduction or the like, the switch 2107 is turned off in order to set the gain high.

  In this case, the generated current signal is converted into a voltage signal by the feedback resistor 2104 and output to the subsequent amplifier circuit 2200. At this time, the gain of the preamplifier circuit 2100 is determined by the magnitude of the resistance value Ra of the feedback resistor 2104.

Vo = Isc × Ra (1)
(Vo: output voltage of the pre-amplifier circuit 2100, Isc: current generated when the light receiving element receives light (light intensity × sensitivity of the photodiode 2101))
Therefore, the gain of the pre-stage amplifier circuit 2100 is determined by the magnitude of the resistance value Ra of the feedback resistor 2104 according to the equation (1).

  On the other hand, the sensitivity of the light receiving IC 2000 must be set low when irradiating a large amount of light such as during recording. In this case, the switch 2107 is turned on to set the gain low. Therefore, when the resistance value of the feedback resistor 2106 is Rb, Ra in Expression (1) is Ra // Rb. As a result, the value of the feedback resistor decreases, and the gain of the preamplifier circuit 2100 decreases. Ra // Rb indicates a combined resistance value when Ra and Rb are connected in parallel.

  Therefore, the gain of the preamplifier circuit 2100 can be switched by switching the switch 2107 on / off.

  Next, a detailed configuration of the pre-stage amplifier circuit 2100 will be described.

  FIG. 15 is a diagram showing a detailed configuration of a conventional preamplifier circuit 2100. As shown in FIG.

  As shown in FIG. 15, the preamplifier circuit 2100 includes a photodiode 101, a bipolar transistor 102, a bipolar transistor 103, a resistor 104, a bipolar transistor 105, a constant current source 106, a feedback capacitor 107, a feedback resistor 108, a feedback capacitor 109, and a feedback. A resistor 110, a switch 111, an output terminal 112, a resistor 113, a bipolar transistor 114, and a constant current source 115 are provided.

  Further, the circuit constituted by the resistor 113, the bipolar transistor 114, and the constant current source 115 is a part constituting a current source of a bias current supplied to the bipolar transistor 102 in the preamplifier circuit 2100. That is, although not shown in FIG. 14, actually, a bias current is supplied to the input side of the amplifier circuit 2102.

  The bipolar transistor 102 is an npn-type bipolar transistor, the base is connected to the photodiode 101, the collector is connected to the collector of the bipolar transistor 103, and the emitter is grounded. The bipolar transistor 102 is provided as a grounded emitter type amplification transistor in the pre-stage amplifier circuit 2100.

  The bipolar transistor 103 is a pnp bipolar transistor, and has a base connected to the base of the bipolar transistor 114 and an emitter connected to the power supply Vcc via the resistor 104. The bipolar transistor 103 and the resistor 104 constitute an active load current source for the bipolar transistor 102.

  The bipolar transistor 105 is an npn-type bipolar transistor, the base is connected to the collector of the bipolar transistor 102, the collector is connected to the power supply Vcc, and the emitter is grounded via the constant current source 106. The output terminal 112 outputs the emitter voltage of the bipolar transistor 105, and the bipolar transistor 105 and the constant current source 106 constitute an output emitter follower circuit.

  The bipolar transistor 114 is a pnp type bipolar transistor, and has an emitter connected to the power supply Vcc via a resistor 113 and a collector grounded via a constant current source 115. The collector of the bipolar transistor 114 is also connected to its own base. Therefore, the bipolar transistor 114 forms a current mirror circuit with the bipolar transistor 103.

  The photodiode 101, feedback capacitor 107, feedback resistor 108, feedback capacitor 109, feedback resistor 110, and switch 111 are the photodiode 2101, feedback capacitor 2103, feedback resistor 2104, feedback capacitor 2105, feedback resistor shown in FIG. 2106 and switch 2107, respectively. Specifically, the feedback circuit shown in FIG. 15 is provided between the base of the bipolar transistor 102 corresponding to the input side of the amplifier circuit 2102 and the output terminal 112 corresponding to the output side of the amplifier circuit 2102. .

  In the above configuration, the current signal converted from the optical signal by the photodiode 101 is input to the base of the bipolar transistor 102 and then input to the base of the bipolar transistor 105 through the collector of the bipolar transistor 102. Then, the voltage of the emitter of the bipolar transistor 105 is output from the output terminal 112.

  Further, since the bipolar transistor 103 and the bipolar transistor 114 form a current mirror circuit, a bias current to the bipolar transistor 102 is supplied from the constant current source 115. Note that the switching operation of the switch 111 in the feedback circuit is as described with reference to FIG.

  By the way, the amplifier circuit has a frequency characteristic that the high-frequency gain decreases as the input current signal becomes a high frequency. Then, the frequency characteristic of the pre-stage amplifier circuit 2100 will be described subsequently.

  FIG. 16 is a graph showing the frequency characteristics of the pre-stage amplifier circuit 2100. The upper graph shows the relationship between response frequency and gain, and the lower graph shows the relationship between response frequency and phase.

  It is assumed that the open loop gain of the pre-stage amplifier circuit 2100 is indicated by a graph A indicated by a bold solid line. The open loop gain is a frequency characteristic of the pre-amplifier circuit 2100 when negative feedback is not applied.

In the open loop gain, there are poles P1 to P3. That is, the open loop gain decreases at −6 dB / octave when the frequency is higher than the point of the pole P1, further decreases by −12 dB / octave after the point of the pole P2, and further decreases by −18 dB / octave after the point of the pole P3. The phase of the open loop gain at the points P1 to P3 rotates by -45 degrees at the pole P1, -135 degrees at the pole P2, and -225 degrees at the pole P3.
JP 2003-8361 A (published on January 10, 2003) JP-A-8-154023 (released on June 11, 1996)

  Here, the frequency at which the gain when the feedback is applied to the pre-stage amplifier circuit 2100 having the open loop gain shown in FIG. 16 and the open loop gain, that is, the graph A, is defined as a frequency fx.

  In order to cope with an increase in recording speed, as shown in FIG. 16, a high frequency (L2) may be obtained by setting a low gain (L1) when feedback is applied. However, when the frequency fx becomes higher than the point of the pole P2 whose phase rotates by -135 degrees, the phase margin becomes 45 degrees or less (Z), and there is a risk of oscillation.

  Therefore, setting the frequency fx to a value such that the phase of the open loop gain does not rotate more than −135 degrees is an indispensable condition for preventing oscillation, that is, considering circuit stability. For this reason, the frequency fx must be designed to be before the point of the pole P2.

  On the other hand, in the frequency characteristics of the open loop gain, the frequency fc at the pole P1, which serves as a reference for the gain to begin to decrease, is equal to the feedback resistance 2104 (or feedback resistance 2106) and the feedback capacitance in the pre-stage amplifier circuit 2100 shown in FIG. 2103 (capacitance value Ca) (or feedback capacitance 2105).

fc = 1 / (2πRa · Ca) [Hz] (2)
However, when the resistance value Ra of the feedback resistor 2104 is very high, or depending on the open-loop gain, the response characteristic of the pre-stage amplifier circuit 2100 is limited as compared with the design of the above equation (2). That is, even if the frequency fc is designed to be fast, the limit of the response frequency of the pre-stage amplifier circuit 2100 using the feedback circuit is limited by the frequency fx as shown in FIG. Therefore, the higher the gain is set (H1), the lower the value of the frequency (H2). Therefore, it is difficult to increase the response frequency.

  However, the light receiving IC 2000 with a multistage gain switching function for the optical pickup is required to support a plurality of optical disc media and to increase the speed of recording and reproduction. As a result, the preamplifier circuit 2100 needs to switch the gain in a large range from a low gain to a high gain so as to realize both the circuit stabilization at a low gain and the response speed increase at a high gain. is there.

  The present invention has been made in view of the above-described conventional problems, and its purpose is to switch the gain according to the input signal level, thereby stabilizing the circuit at a low gain and increasing the response speed at a high gain. It is an object of the present invention to provide an amplifier circuit, a light receiving amplifier circuit, and an optical pickup device that can realize both of the above.

  In order to solve the above problems, an amplifier circuit according to the present invention has an input terminal, an output terminal, an amplifying transistor that amplifies a current signal input from the input terminal and outputs the amplified signal to the output terminal, and a low In the amplifier circuit having a gain switching function capable of switching between a gain and a high gain, and having a feedback circuit connected to the input terminal and the output terminal, the feedback circuit according to the signal level of the input current signal According to the switching of the gain, the open loop gain representing the relationship between the gain and the response frequency, which is a frequency characteristic when the feedback circuit is not provided, is adjusted.

  According to the above configuration, the feedback circuit has a gain switching function capable of switching to a low gain or a high gain so as to correspond to each signal level in order to correspond to the difference in signal level of the input current signal. ing.

  The open loop gain has a frequency characteristic in which the response frequency decreases when the gain decreases, and increases when the gain increases. In other words, a decrease in response frequency means a decrease in response speed, and an increase in response frequency means an increase in phase difference and the risk of oscillation.

  Therefore, when switching to a low gain by the feedback circuit according to the input signal level, a risk of oscillation occurs due to an increase in the response frequency. Further, when the gain is switched to a high gain by the feedback circuit, a high-speed response becomes difficult because the response frequency is lowered.

  Therefore, it is possible to obtain a response frequency adjusted in accordance with the input signal level by adjusting the open loop gain in accordance with switching of the gain of the feedback circuit in accordance with the input signal level. For example, when the gain is switched to a low gain by the feedback circuit, the open loop gain is adjusted so as to reduce the response frequency. When the feedback circuit is switched to a high gain, the open loop gain is adjusted so as to increase the response frequency until just before the risk of oscillation is avoided.

  This makes it possible to achieve circuit stabilization even in a low gain state. In addition, a high-speed response can be realized even in a high gain state. Therefore, the amplifier circuit according to the present invention can realize both the stabilization of the circuit with a low gain and the increase of the response speed with a high gain by switching the gain according to the input signal level.

  In addition, when the gain of the feedback circuit is switched to a low gain, the amplifier circuit of the present invention adjusts the open loop gain so as to decrease the GB product so that the gain of the feedback circuit is increased. When switching, it is preferable to adjust the open loop gain so that the GB product increases.

  According to the above configuration, when the GB product of the open loop gain decreases, the open loop gain GB product decreases when comparing the response frequency before and after the open loop gain GB product decreases with the same gain. The later response frequency is lower than the response frequency before the GB product of the open loop gain is decreased. Therefore, when the gain of the feedback circuit is switched to a low gain, the open loop gain can be adjusted so as to prevent circuit oscillation at high frequency and unstable operation.

  In addition, when the GB product of the open loop gain increases, when the response frequency before and after the GB product of the open loop gain increases with the same gain is compared, the response frequency after the GB product of the open loop gain increases is The response frequency before the GB product of the open loop gain increases is increased. Therefore, when the gain of the feedback circuit is switched to a high gain, the open loop gain can be adjusted so that the response frequency increases.

  In the amplifier circuit of the present invention, it is preferable that the open loop gain is adjusted by adjusting a GB product of the amplification transistor.

  According to the above configuration, by adjusting the GB product of the amplifying transistor, the GB product as the amplifier circuit is adjusted. Therefore, the GB product of the open loop gain of the amplifier circuit can be adjusted. Become.

  The amplifier circuit according to the present invention is a grounded-emitter bipolar transistor in which a base is connected to the input terminal and a bias current is supplied to a collector of the amplifier transistor, the emitter of the amplifier transistor being It is preferable to include a first switch connected in series with the ground, and a second switch having one terminal connected to the emitter of the amplifying transistor and the other terminal grounded via the first resistor. .

  According to the above configuration, when the first switch is turned off and the second switch is turned on, the first resistor is connected to the emitter of the amplifying transistor, so that the collector current of the amplifying transistor is reduced. As a result, the output voltage of the amplifying transistor can be adjusted.

  In the amplifier circuit of the present invention, it is preferable that the open loop gain is adjusted by performing phase compensation of the output voltage of the amplification transistor.

  According to the above configuration, by performing phase compensation of the output voltage of the amplification transistor, phase compensation is performed on the output voltage as the amplification circuit. Therefore, in the open loop gain, the frequency point at which the gain starts to decrease. Shifts to the low frequency side. As a result, the open loop gain can be adjusted.

  In the amplifier circuit of the present invention, the amplifying transistor is a grounded emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current, and one terminal of which is a phase compensation capacitor. It is preferable to include a third switch that is connected to the collector of the amplifying transistor through an element and whose other terminal is grounded.

  According to the above configuration, when the third switch is turned on, the phase compensation capacitance element is connected to the collector of the amplification transistor, so that the collector voltage of the amplification transistor is adjusted by the phase compensation capacitance. Thereby, phase compensation of the output voltage of the amplifying transistor can be performed.

  In the amplifier circuit of the present invention, it is preferable that the open loop gain is adjusted by increasing a bias current supplied to the amplifying transistor.

  According to the above configuration, by increasing the bias current supplied to the amplifying transistor, a voltage with a wide high frequency band is output from the amplifying circuit, so that the gain decreases in the open loop gain. The starting frequency point shifts to the high frequency side. As a result, the open loop gain can be adjusted.

  In the amplifier circuit of the present invention, the amplifying transistor is a grounded-emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current, and the collector of the amplifying transistor is connected to the amplifying transistor. The first current source for supplying the bias current and the first current source have one terminal on the upstream side of the first current source when the connection portion connected to the collector of the amplification transistor is on the upstream side. It is preferable to include a fourth switch connected and having the other terminal grounded via the second current source.

  According to the above configuration, when the fourth switch is turned on, the second current source is connected to the upstream side of the first current source, so that the bias current supplied to the amplifying transistor increases. As a result, the bias current supplied to the amplifying transistor can be increased.

  In the amplifying circuit of the present invention, the amplifying transistor is preferably a grounded-emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current.

  According to the above configuration, by using a grounded emitter bipolar transistor, the GB product of the bipolar transistor can be improved. Further, for example, the GB product can be set low by connecting a capacitor or the like to the collector.

  Therefore, by adjusting the GB product of the amplifying transistor, the GB product as the amplifier circuit is adjusted, so that the GB product of the open loop gain of the amplifier circuit can be adjusted. This makes it possible to increase the adjustment range of the open loop gain of the amplifier circuit.

  In the amplifier circuit of the present invention, the feedback circuit is preferably switched by turning on and off the switch. As a result, it is possible to easily switch between a low gain and a high gain simply by turning on and off the switch.

  In the amplifier circuit of the present invention, the feedback circuit includes a first feedback circuit unit in which the second resistor and the first capacitor element are connected in parallel, and a fifth switch in the third resistor and the second capacitor element connected in parallel. It is preferable that the second feedback circuit unit connected in series is connected in parallel.

  According to the above configuration, when the fifth switch is turned on, the first feedback circuit unit and the second feedback circuit unit are connected in parallel, so that the gain of the feedback circuit decreases. Further, when the fifth switch is switched off, the gain of the feedback circuit is higher than the gain when the fifth switch is switched on.

  Therefore, the gain of the feedback circuit can be switched to a low state by switching the fifth switch on, and the gain of the feedback circuit can be switched to a high state by switching the fifth switch off.

  In the amplifier circuit of the present invention, it is preferable that the first switch, the second switch, the third switch, the fourth switch, and the fifth switch are configured by an electrical switch circuit. As a result, the amplifier circuit can be easily realized as a semiconductor integrated circuit.

  Moreover, it is preferable that the amplifier circuit of the present invention includes the fifth switch and a configuration in which a plurality of the first switch and the second switch, the third switch, and the fourth switch are combined.

  According to the above configuration, for example, by providing a fifth switch and a configuration in which the first switch, the second switch, and the third switch are combined, further circuit stabilization is realized by switching each switch. It becomes possible to do.

  In addition, by providing the fifth switch and the configuration in which the third switch and the fourth switch are combined, it is possible to achieve both stabilization of the circuit and faster response by switching each switch. Become. Therefore, it is possible to realize an optimum circuit configuration according to the realization target to be strengthened.

  The light receiving amplifier circuit of the present invention includes the amplifier circuit and a light receiving element that converts an input optical signal into a current signal and outputs the current signal, and the light receiving element outputs the current signal to an input terminal of the amplifier circuit. It is characterized by output.

  According to said structure, it becomes possible to output the voltage signal amplified according to the signal level of an optical signal to a circuit of a back | latter stage by providing a light receiving element.

  Also, an optical pickup device of the present invention is characterized by including the light receiving amplification circuit.

  The optical pickup device inputs reflected light from the optical disk to a light receiving amplification circuit, and outputs a voltage signal amplified from the optical signal of the reflected light to a subsequent circuit. Therefore, according to the above configuration, the open-loop gain is adjusted while the gain is suitably switched so as to correspond to each optical input level at the time of recording and reproduction by providing the light receiving amplification circuit. Therefore, it is possible to always obtain an optimally adjusted output.

  As described above, the amplifier circuit according to the present invention is a frequency characteristic in the case where the feedback circuit is not provided according to the switching of the gain of the feedback circuit according to the signal level of the input current signal. The open loop gain representing the relationship with the frequency is adjusted.

  Therefore, the circuit can be stabilized even when the gain is low, and the high-speed response can be realized even when the gain is high. Therefore, by switching the gain according to the input signal level, there is an effect that it is possible to realize both the stabilization of the circuit with a low gain and the speeding up of the response with a high gain.

  The light receiving amplifier circuit of the present invention includes the amplifier circuit and a light receiving element that converts an input optical signal into a current signal and outputs the current signal, and the light receiving element outputs the current signal to an input terminal of the amplifier circuit. It has a configuration of outputting.

  Therefore, by providing the light receiving element, there is an effect that the voltage signal amplified according to the signal level of the optical signal can be output to the subsequent circuit.

  The optical pickup device of the present invention includes the light receiving amplification circuit. Therefore, by providing the light receiving amplification circuit, it is possible to suitably switch the gain so as to correspond to each optical input level at the time of recording and at the time of reproduction.

  Therefore, by providing the light receiving amplification circuit, the gain is suitably switched so as to correspond to each optical input level at the time of recording and reproduction, and the open loop gain is adjusted so that it is always optimally adjusted. There is an effect that an output can be obtained.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to the drawings. In the present embodiment, components having the same functions as those of the conventional pre-amplifier circuit 2100 shown in FIG. 15 are denoted by the same reference numerals, and description thereof is omitted as appropriate.

  FIG. 1 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 100a of the present embodiment.

  The preamplifier circuit 100a of the present embodiment is configured as a light receiving IC (not shown) with a multistage gain switching function together with a postamplifier circuit (not shown). The light receiving IC is mounted on an optical system device such as an optical pickup device mounted on an optical disk recording / reproducing apparatus for recording / reproducing various types of optical disks such as CDs, DVDs, and BDs as an IC having a light receiving amplification function. The

  As shown in FIG. 1, the preamplifier circuit 100a includes a photodiode 101, a bipolar transistor 102, a bipolar transistor 103, a resistor 104, a bipolar transistor 105, a constant current source 106, a feedback capacitor 107, a feedback resistor 108, a feedback capacitor 109, and a feedback. A resistor 110, a switch 111, an output terminal 112, a resistor 113, a bipolar transistor 114, a constant current source 115, and an emitter resistance switching circuit 120 are provided.

  The preamplifier circuit 100a is a grounded emitter type light receiving amplifier circuit. More specifically, the pre-stage amplifier circuit 100a is configured by a transimpedance amplifier circuit. The transimpedance amplifier circuit is an amplifier circuit using a method called transimpedance that directly inputs and amplifies a minute current signal such as a photodiode. The pre-stage amplifier circuit 100a corresponds to, for example, the part of the pre-stage amplifier circuit 2100 illustrated in FIG.

  The bipolar transistor 102 is an npn-type bipolar transistor, the base is connected to the photodiode 101, the collector is connected to the collector of the bipolar transistor 103, and the emitter is connected to the emitter resistance switching circuit 120. The bipolar transistor 102 is provided as a grounded emitter amplification transistor in the preamplifier circuit 100a.

  The bipolar transistor 103 is a pnp bipolar transistor, and has a base connected to the base of the bipolar transistor 114 and an emitter connected to the power supply Vcc via the resistor 104. The bipolar transistor 103 and the resistor 104 constitute an active load current source for the bipolar transistor 102.

  The bipolar transistor 105 is an npn-type bipolar transistor, the base is connected to the collector of the bipolar transistor 102, the collector is connected to the power supply Vcc, and the emitter is grounded via the constant current source 106. The output terminal 112 outputs the emitter voltage of the bipolar transistor 105, and the bipolar transistor 105 and the constant current source 106 constitute an output emitter follower circuit.

  The bipolar transistor 114 is a pnp type bipolar transistor, and has an emitter connected to the power supply Vcc via a resistor 113 and a collector grounded via a constant current source 115. The collector of the bipolar transistor 114 is also connected to its own base. Therefore, the bipolar transistor 114 forms a current mirror circuit with the bipolar transistor 103.

  The feedback capacitor 107, the feedback resistor 108, the feedback capacitor 109, and the feedback resistor 110 are provided in the feedback circuit of the preamplifier circuit 100a. The feedback circuit is composed of a two-stage circuit in which a first-stage circuit and a second-stage circuit are connected in parallel.

  The first stage is a circuit in which a feedback capacitor 107 and a feedback resistor 108 are connected in parallel, one terminal connected in parallel is connected to the base of the bipolar transistor 102, and the other terminal is connected to the output terminal 112. It is. This circuit corresponds to the first feedback circuit section recited in the claims.

  In the second stage, the feedback capacitor 109 and the feedback resistor 110 are connected in parallel, one terminal connected in parallel is connected to the base of the bipolar transistor 102, and the other terminal is connected to the output terminal 112 via the switch 111. It is a connected circuit. This circuit corresponds to the second feedback circuit section recited in the claims.

  The emitter resistance switching circuit 120 includes a switch 121, a switch 122, and a resistor 123.

  The switch 121 has one terminal connected to the emitter of the bipolar transistor 102 and the other terminal grounded. The switch 122 has one terminal connected to the emitter of the bipolar transistor 102 and the other terminal grounded via a resistor 123. Thereby, if either the switch 121 or the switch 122 is turned on, the emitter of the bipolar transistor 102 is grounded.

  In the above configuration, the current signal converted from the optical signal by the photodiode 101 is input to the base of the bipolar transistor 102 and then input to the base of the bipolar transistor 105 through the collector of the bipolar transistor 102. Then, the voltage of the emitter of the bipolar transistor 105 is output from the output terminal 112.

  Since the bipolar transistor 103 and the bipolar transistor 114 form a current mirror circuit, a bias current to the bipolar transistor 102 is supplied from the constant current source 115.

  Further, the switch 111 is switched on / off in order to switch the gain of the pre-stage amplifier circuit 100a. That is, when the switch 111 is off, the feedback circuit is only the feedback circuit composed of the feedback capacitor 107 and the feedback resistor 108. On the other hand, when the switch 111 is on, the feedback circuit is a feedback circuit in which a feedback circuit composed of the feedback capacitor 107 and the feedback resistor 108 and a feedback circuit composed of the feedback capacitor 109 and the feedback resistor 110 are connected in two stages. become.

  Thus, the feedback circuit is set to a high gain when the switch 111 is off, and is set to a low gain when the switch 111 is on.

  Here, in the emitter resistance switching circuit 120, the on / off of the switch 121 and the switch 122 is switched in accordance with the on / off switching of the switch 111. This will be described next with reference to FIG. 1 and FIG.

  FIG. 2 is a graph showing frequency characteristics of the pre-amplifier circuit 100a. The vertical axis represents gain (dB), and the horizontal axis represents response frequency (Hz).

  First, it is assumed that no feedback circuit is provided in the pre-stage amplifier circuit 100a. The frequency characteristic of the preamplifier circuit 100a at this time is shown as an open loop gain.

  At this time, as shown in FIG. 1, it is assumed that the switch 121 is on and the switch 122 is off, and the emitter of the bipolar transistor 102 is directly grounded without any intervention. Then, the open loop gain of the preamplifier circuit 100a is shown by a graph A indicated by a thick solid line in FIG. In the open loop gain at this time, there are poles P1 to P3. The poles P1 to P3 have the same characteristics as the poles P1 to P3 of the open loop gain shown in FIG.

  On the other hand, assume that the switch 121 is off and the switch 122 is on, and the emitter of the bipolar transistor 102 is grounded via the resistor 123. Then, the collector current of the bipolar transistor 102 is reduced by connecting the resistor 123. For this reason, the value of the voltage finally output from the output terminal 112 decreases. Therefore, the open loop gain of the preamplifier circuit 100a is reduced as a whole.

  That is, the open loop gain at this time is indicated by a graph B indicated by a thick dotted line in FIG. Also in the open loop gain of the graph B, the poles P1 to P3 exist at the same frequency as the graph A. Therefore, when the switch 121 is off and the switch 122 is on, the open-loop gain of the preamplifier circuit 100a decreases in a direction in which the gain decreases compared to when the switch 121 is on and the switch 122 is off. It can be seen that the overall rate has dropped.

  Thus, when the switch 111 is turned on and set to a low gain, the switch 121 is turned off and the switch 122 is turned on, and the gain of the feedback circuit is set based on the open loop gain of the graph B. Thus, it is possible to suppress an increase in frequency even with a low gain. That is, it becomes possible to set the frequency fxL at the time of low gain setting to be before the point of the pole P2. Therefore, it is possible to prevent oscillation, that is, improve the stability of the circuit.

  When the switch 111 is switched off and set to a high gain, the switch 121 is switched on and the switch 122 is switched off so that the open loop gain of the graph A is used as a reference instead of the open loop gain of the graph B. By setting the gain of the feedback circuit, the frequency fxH at the time of high gain can be obtained at a high frequency without reducing it.

  As described above, the preamplifier circuit 100a according to the present embodiment has a circuit configuration for reducing the open loop gain by switching the switch 121 and the switch 122 on and off when setting a low gain. ing.

  That is, when the switch 121 is turned off and the switch 122 is turned on, the resistor 123 is connected to the emitter of the bipolar transistor 102, so that the collector current of the bipolar transistor 102 decreases. For this reason, the output voltage of the output terminal 112 finally decreases. Therefore, the open loop gain when the resistor 123 is connected generally decreases in the direction in which the gain decreases, compared to the open loop gain when nothing is connected to the emitter of the bipolar transistor 102.

  Therefore, when the switch 111 is turned on when the gain is set low, the open loop gain can be lowered only when the gain is set low by switching the switch 121 off and the switch 122 on.

  Here, in the frequency characteristics of the amplifier circuit, the response frequency increases as the low gain state is reached, thereby increasing the phase difference and causing the risk of oscillation. However, in the pre-amplifier circuit 100a of the present embodiment, the open loop gain is lowered, so that an increase in response frequency can be suppressed even in a low gain state. As a result, an increase in phase difference can be suppressed and the stability of the circuit can be improved.

  Further, when the switch 111 is turned off when a high gain is set, the open loop gain is not lowered by turning on the switch 121 and turning off the switch 122. Thereby, even in the high gain state, it is possible to maintain a high-speed response without reducing the response frequency.

  Therefore, the pre-amplifier circuit 100a according to the present embodiment switches the gain while switching on / off of the switch 111, the switch 121, and the switch 122 in accordance with the input level, so that a high-speed response with a high gain and a low response. It becomes possible to achieve both circuit stabilization with gain.

  Here, a general amplifier circuit has a GB product as a parameter for determining the frequency characteristic of the amplifier circuit. The GB product is indicated by “Gain × Band”. Further, in order to use an amplifier circuit in a circuit that operates at high speed, a large GB product is required. As the GB product is larger, the amplifier circuit can be used in a higher frequency region.

  In the pre-amplifier circuit 100a of the present embodiment, when setting a low gain, the open loop gain is generally lowered in the direction in which the gain decreases.

  As the gain decreases, the GB product decreases. Therefore, the direction in which the gain decreases indicates the direction in which the GB product decreases. When the GB product decreases, the amplifier circuit can be used in a lower frequency region than before the GB product decreases. As a result, the amplifier circuit is used in a low frequency region, so that the circuit can be stabilized.

  Conversely, as the gain increases, the GB product increases. Therefore, the direction in which the gain increases indicates the direction in which the GB product increases. When the GB product increases, the amplifier circuit can be used in a higher frequency region than before the GB product increases. As a result, an amplifier circuit is used in a high frequency region, so that high-speed response is possible.

  That is, in the present invention, the open loop gain is adjusted to adjust the GB product. In the pre-amplifier circuit 100a of the present embodiment, when setting a low gain, the open loop gain is adjusted so as to decrease in the direction in which the GB product decreases.

  Specifically, by adjusting the GB product of the amplifying transistor (bipolar transistor 102), the GB product as the amplifier circuit (pre-stage amplifier circuit 100a) is adjusted. Therefore, the amplifying transistor (bipolar transistor 102) is adjusted. ) Is adjusted.

  In the pre-stage amplifier circuit 100a of the present embodiment, the band in “GB product = gain × band” is a frequency band up to −3 dB.

  The preamplifier circuit 100a includes a feedback circuit provided with the feedback resistor 108 and the feedback resistor 110. However, the present invention is not limited to this, and the feedback circuit may include a plurality of high feedback resistors to low feedback resistors. It may be configured by a circuit, and the amplification factor may be switched by switching the switch.

  In addition, the preamplifier circuit 100a is a light receiving amplifier circuit mounted on an optical pickup device or the like, but is not limited thereto. That is, the configuration excluding the photodiode 101 in the pre-stage amplifier circuit 100a shown in FIG. 1 is a transimpedance amplifier circuit (amplifier circuit) using a system called transimpedance. Therefore, the transimpedance amplifier circuit can be suitably used according to the device to be mounted, the configuration connected to the base of the bipolar transistor 102, and the like.

  The preamplifier circuit 100a includes the bipolar transistor 102, the bipolar transistor 103, the bipolar transistor 105, and the bipolar transistor 114, but is not limited thereto.

  That is, as long as the preamplifier circuit 100a achieves the intended effect, the npn type or the pnp type may be used for the bipolar transistor. Further, as the bipolar transistor 103, the bipolar transistor 105, and the bipolar transistor 114, for example, a MOS transistor or the like may be used. Further, the bipolar transistor 102 is not limited to the grounded emitter type, and may be a grounded base type or a grounded collector type.

  The use of the common emitter bipolar transistor 102 is advantageous in increasing the GB product of the open loop gain of the preamplifier circuit 100a. Although there is a limit on the point to be set high, the point to be set low can be designed by providing a phase compensation capacitor 211 and the like described later.

  As a result, the adjustment range of the open loop gain can be increased, and therefore it is preferable to use the grounded emitter bipolar transistor 102.

  Further, the preamplifier circuit 100a having the grounded emitter configuration has been described. However, the present invention is not limited to this, and the effects of the present invention can be applied even when the preamplifier circuit 100a is configured as a differential amplifier circuit. is there.

  Further, the switch 111, the switch 121, and the switch 122 may be configured by an electrical switch, a mechanical switch, or the like. However, for example, when a mechanical switch such as a relay is used, the preamplifier circuit 100a cannot be used as a semiconductor integrated circuit.

  Therefore, in the pre-amplifier circuit 100a of the present embodiment, it is preferable to use an electrical switch circuit configured by a MOS transistor or a bipolar transistor for the switch 111, the switch 121, and the switch 122. As a result, the preamplifier circuit 100a can be used as a semiconductor integrated circuit.

  When an electrical switch circuit is used, switching of each switch can be controlled by outputting a control signal to the electrical switch circuit. This will be described with reference to FIG.

  FIG. 3 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 100b.

  As shown in FIG. 3, the preamplifier circuit 100b includes a MOS transistor 131, a MOS transistor 132, a MOS transistor 133, a resistor 134, in addition to the configuration of the preamplifier circuit 100a excluding the switch 111 and the emitter resistance switching circuit 120. A MOS transistor 135, a MOS transistor 136, and a switch terminal 137 are provided.

  Further, the MOS transistor 132, the MOS transistor 133, and the resistor 134 constitute an emitter resistance switching circuit 130. The emitter resistance switching circuit 130 corresponds to the emitter resistance switching circuit 120 shown in FIG.

  The MOS transistor 131 is an N-channel MOS transistor, and is connected in series between one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel and the base of the bipolar transistor 102. Is connected to one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel, and the source is connected to the base of the bipolar transistor 102. The gate is connected to the drain of the MOS transistor 136. The MOS transistor 131 is a part corresponding to the switch 111.

  The MOS transistor 132 is an N-channel MOS transistor, the gate is connected to the switch terminal 137, the drain is connected to the emitter of the bipolar transistor 102, and the source is grounded. The MOS transistor 132 is a part corresponding to the switch 121.

  The MOS transistor 133 is an N-channel MOS transistor, the gate is connected to the drain of the MOS transistor 136, the drain is connected to the emitter of the bipolar transistor 102, and the source is grounded via the resistor 134. The MOS transistor 133 is a part corresponding to the switch 122, and the resistor 134 is a part corresponding to the resistor 123.

  The MOS transistor 135 is a P-channel MOS transistor, the gate is connected to the switch terminal 137, the drain is connected to the power supply Vcc, and the source is connected to the drain of the MOS transistor 136.

  The MOS transistor 136 is an N-channel MOS transistor, the gate is connected to the switch terminal 137, and the source is grounded. The MOS transistor 135 and the MOS transistor 136 form an inverter circuit.

  In the above configuration, when a Hi signal (VCC voltage) is input to the switch terminal 137 as a switch control signal, the inverter circuit formed by the MOS transistor 135 and the MOS transistor 136 causes the gate of the MOS transistor 131 and the MOS transistor A low signal (GND voltage) is input to the gate of the transistor 133. Therefore, the MOS transistor 131 and the MOS transistor 133 are turned off.

  On the other hand, since a Hi signal is input to the gate of the MOS transistor 132, the MOS transistor 132 is turned on.

  As a result, the feedback circuit is in a high gain setting state, and the emitter of the bipolar transistor 102 is directly grounded without any intervention. Therefore, when a high gain is set, it becomes possible to obtain a reference open loop gain without lowering the open loop gain by outputting a switch control signal at the Hi level.

  Conversely, when a Low signal is input to the switch terminal 137 as a switch control signal, the MOS transistor 131 and the MOS transistor 133 are turned on, and the MOS transistor 132 is turned off.

  As a result, the feedback circuit is set to a low gain setting state, and the emitter of the bipolar transistor 102 is grounded via the resistor 134. Therefore, when a low gain is set, it is possible to obtain an open loop gain lower than the reference by outputting a low level switch control signal.

  Further, by inputting a Hi signal to the switch terminal 137, the preamplifier circuit 100b is equivalent to the preamplifier circuit 100a in which the switch 111 is turned on, the switch 121 is turned off, and the switch 122 is turned on. It becomes the state of.

  Conversely, by inputting a Low signal to the switch terminal 137, the front-stage amplifier circuit 100b is connected to the front-stage amplifier circuit 100a in a state where the switch 111 is turned off, the switch 121 is turned on, and the switch 122 is turned off. Equivalent state.

Therefore, the preamplifier circuit 100b can adjust the open loop gain in synchronization with the gain switching, and the input signals are combined into one, so that the number of input signals can be reduced.
In the above-described preamplifier circuit 100a and preamplifier circuit 100b, the feedback circuit is connected in two stages. However, the present invention is not limited to this, and by increasing the number of feedback circuits and the number of switches, further multistage gain switching It becomes possible to have a function.

[Embodiment 2]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first embodiment. For convenience of explanation, members having the same functions as those shown in the drawings of the first embodiment are given the same reference numerals, and explanation thereof is omitted.

  FIG. 4 is a circuit diagram showing a configuration example of the pre-amplifier circuit 200a of the present embodiment.

  The preamplifier circuit 200a according to the present embodiment includes a phase compensation capacitance switching circuit 210 as shown in FIG. 4 in addition to the configuration of the preamplifier circuit 100a excluding the emitter resistance switching circuit 120.

  The phase compensation capacitor switching circuit 210 includes a phase compensation capacitor 211 and a switch 212. The phase compensation capacitor 211 has one terminal connected to the collector of the bipolar transistor 102 and the other terminal grounded via the switch 212.

  In the above configuration, in the phase compensation capacitance switching circuit 210, the switch 212 is switched on / off in accordance with the switching of the switch 111 on / off. This will be described next with reference to FIG. 4 and FIG.

  FIG. 5 is a graph showing the frequency characteristics of the pre-stage amplifier circuit 200a. The vertical axis represents gain (dB), and the horizontal axis represents response frequency (Hz).

  First, it is assumed that no feedback circuit is provided in the preamplifier circuit 200a. The frequency characteristic of the pre-stage amplifier circuit 200a at this time is shown as an open loop gain.

  At this time, as shown in FIG. 4, it is assumed that the switch 212 is off, nothing is connected to the collector of the bipolar transistor 102, and the emitter is directly grounded. Then, the open loop gain of the pre-stage amplifier circuit 200a is shown by a graph A indicated by a bold solid line in FIG. The open loop gain of the graph A is the same as the open loop gain of the graph A shown in FIG.

  On the other hand, assume that the switch 212 is on and the phase compensation capacitor 211 is connected to the collector of the bipolar transistor 102. Then, the collector voltage of the bipolar transistor 102 is adjusted by the phase compensation capacitor 211 by connecting the phase compensation capacitor 211. For this reason, the phase-compensated voltage is finally output from the output terminal 112. Therefore, the position of the pole P1, which is the main open loop gain of the pre-stage amplifier circuit 200a, is shifted to the low frequency side (pole P1a).

  That is, the open loop gain at this time is indicated by a graph C indicated by a thick dotted line in FIG. Therefore, when the switch 212 is on, the gain begins to decrease at a lower frequency than when the switch 212 is off. Therefore, it can be seen that the open loop gain of the pre-stage amplifier circuit 200a is lowered after the position of the pole P1a shifted to the low frequency side.

  As a result, when the switch 111 is turned on and set to a low gain, the switch 212 is turned on and the gain of the feedback circuit is set based on the open loop gain of the graph C. The increase can be suppressed. That is, it becomes possible to set the frequency fxL at the time of low gain setting to be before the point of the pole P2. Therefore, it is possible to prevent oscillation, that is, improve the stability of the circuit.

  When the switch 111 is switched off and set to a high gain, the switch 212 is switched off and the gain of the feedback circuit is set based on the open loop gain of the graph A instead of the open loop gain of the graph C. Thus, the frequency fxH at the time of high gain can be obtained at a high frequency without decreasing.

  As described above, the preamplifier circuit 200a of the present embodiment has a circuit configuration for reducing the open loop gain by switching the switch 212 on and off when setting a low gain. That is, in the pre-stage amplifier circuit 200a of the present embodiment, when setting a low gain, the open loop gain is adjusted so as to decrease in the direction in which the GB product decreases.

  That is, when the switch 212 is turned on, the phase compensation capacitor 211 is connected to the collector of the bipolar transistor 102, so that the collector voltage of the bipolar transistor 102 is adjusted by the phase compensation capacitor 211. For this reason, finally, the phase-compensated voltage is output from the output terminal 112.

  Therefore, the position of the pole P1, which is the main open-loop gain, is shifted to the lower frequency side than the open-loop gain when the phase compensation capacitor 211 is not connected to the collector of the bipolar transistor 102. Therefore, the open-loop gain of the pre-stage amplifier circuit 200a decreases after the position of the pole P1a shifted to the low frequency side.

  Therefore, when the switch 111 is turned on when a low gain is set, the open loop gain can be lowered only when the low gain is set by turning the switch 212 on.

  Here, in the frequency characteristics of the amplifier circuit, the response frequency increases as the low gain state is reached, thereby increasing the phase difference and causing the risk of oscillation. However, in the pre-amplifier circuit 200a of the present embodiment, the open loop gain is lowered, so that an increase in response frequency can be suppressed even in a low gain state. As a result, an increase in phase difference can be suppressed and the stability of the circuit can be improved.

  Further, when the switch 111 is turned off when setting a high gain, the open loop gain is not lowered by switching the switch 212 to off. Thereby, even in the high gain state, it is possible to maintain a high-speed response without reducing the response frequency.

  Therefore, the pre-amplifier circuit 200a according to the present embodiment switches the gain while switching the on / off of the switch 111 and the switch 212 in accordance with the input level, so that a high-speed response with a high gain and a circuit with a low gain are achieved. It is possible to achieve both stability and stability.

  Also in the pre-amplifier circuit 200a of the present embodiment, it is preferable to use an electrical switch circuit composed of a MOS transistor or a bipolar transistor for the switch 111 and the switch 212. As a result, the pre-stage amplifier circuit 200a can be used as a semiconductor integrated circuit.

  Next, the configuration of the preamplifier circuit 200b using the electrical switch circuit configured by the MOS transistor will be described with reference to FIG. Next, the configuration of the preamplifier circuit 200c that uses an electrical switch circuit configured by bipolar transistors will be described with reference to FIG.

  FIG. 6 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 200b.

  The preamplifier circuit 200b includes, in addition to the configuration of the preamplifier circuit 200a excluding the switch 111 and the phase compensation capacitor switching circuit 210, as shown in FIG. 6, a MOS transistor 221, a phase compensation capacitor 222, a MOS transistor 223, and A switch terminal 224 is provided.

  Further, the phase compensation capacitor 222 and the MOS transistor 223 constitute a phase compensation capacitor switching circuit 220. The phase compensation capacitance switching circuit 220 is a part corresponding to the phase compensation capacitance switching circuit 210 shown in FIG.

  The MOS transistor 221 is an N channel type MOS transistor, and is connected in series between one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel and the base of the bipolar transistor 102. Is connected to one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel, and the source is connected to the base of the bipolar transistor 102. The gate is connected to the switch terminal 224. Note that the MOS transistor 221 is a part corresponding to the switch 111.

  The phase compensation capacitor 222 has one terminal connected to the collector of the bipolar transistor 102 and the other terminal connected to the drain of the MOS transistor 223. The phase compensation capacitor 222 is a part corresponding to the phase compensation capacitor 211.

  The MOS transistor 223 is an N-channel MOS transistor, the gate is connected to the switch terminal 224, and the source is grounded. Note that the MOS transistor 223 is a part corresponding to the switch 212.

  In the above configuration, when a Low signal (GND voltage) is input to the switch terminal 224 as a switch control signal, a Low signal is input to the gate of the MOS transistor 221 and the gate of the MOS transistor 223. Therefore, the MOS transistor 221 and the MOS transistor 223 are turned off.

  As a result, the feedback circuit is set to a high gain state, nothing is connected to the collector of the bipolar transistor 102, and the emitter is directly grounded. Therefore, when a high gain is set, it is possible to obtain a reference open loop gain without lowering the open loop gain by outputting a low level switch control signal.

  Conversely, when a Hi signal (VCC voltage) is input to the switch terminal 224 as a switch control signal, the Hi signal is input to the gate of the MOS transistor 221 and the gate of the MOS transistor 223. Therefore, the MOS transistor 221 and the MOS transistor 223 are turned on.

  As a result, the feedback circuit is set to a low gain setting state, and the phase compensation capacitor 222 is connected to the collector of the bipolar transistor 102. Therefore, when setting a low gain, it is possible to obtain an open loop gain that is lower than the reference by outputting a switch control signal at the Hi level.

  Further, by inputting a Low signal to the switch terminal 137, the pre-stage amplifier circuit 200b is in a state equivalent to the pre-stage amplifier circuit 200a in a state where the switch 111 is turned off and the switch 212 is turned off.

  Conversely, by inputting a Hi signal to the switch terminal 137, the preamplifier circuit 200b becomes equivalent to the preamplifier circuit 200a in which the switch 111 is turned on and the switch 212 is turned on.

  Therefore, the pre-stage amplifier circuit 200b can adjust the open loop gain in synchronization with the gain switching, and can reduce the input signal.

  FIG. 7 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 200c.

  The preamplifier circuit 200c includes a bipolar transistor 231, a bipolar transistor 232, a resistor 233, a phase compensation capacitor, as shown in FIG. 7, in addition to the configuration of the preamplifier circuit 200a excluding the switch 111 and the phase compensation capacitor switching circuit 210. 234, a bipolar transistor 235, a bipolar transistor 236, a bipolar transistor 237, a resistor 238, a resistor 239, a bipolar transistor 240, a resistor 241, and a switch terminal 242.

  Further, the phase compensation capacitor 234 and the bipolar transistor 235 constitute a phase compensation capacitor switching circuit 230. The phase compensation capacitance switching circuit 230 is a part corresponding to the phase compensation capacitance switching circuit 210 shown in FIG.

  The bipolar transistor 231 is a pnp-type bipolar transistor, and the collector is connected in series between the output terminal 112 and one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel. 109 and the feedback resistor 110 are connected to one terminal of a circuit connected in parallel, and the emitter is connected to the output terminal 112. The base is connected to the collector of the bipolar transistor 232. Note that the bipolar transistor 231 is a part corresponding to the switch 111.

  The bipolar transistor 232 is an npn-type bipolar transistor, and has an emitter grounded via a resistor 233 and a base connected to the switch terminal 242. The bipolar transistor 232 and the resistor 233 constitute a current source for the bipolar transistor 231.

  The phase compensation capacitor 234 has one terminal connected to the collector of the bipolar transistor 102 and the other terminal connected to the collector of the bipolar transistor 235. The phase compensation capacitor 234 is a part corresponding to the phase compensation capacitor 211.

  The bipolar transistor 235 is an npn-type bipolar transistor, the base is connected to the collector of the bipolar transistor 237, and the emitter is grounded. Note that the bipolar transistor 235 is a portion corresponding to the switch 212.

  The bipolar transistor 236 is a pnp type bipolar transistor, the base is connected to the base of the bipolar transistor 237, the emitter is connected to the power source Vcc through the resistor 238, and the collector is connected to the collector of the bipolar transistor 240 and its own base. It is connected.

  The bipolar transistor 237 is a pnp type bipolar transistor, and has an emitter connected to the power supply Vcc via a resistor 239. Bipolar transistor 237 and resistor 239 constitute a current source of bipolar transistor 235. Furthermore, the bipolar transistor 236 and the bipolar transistor 237 form a current mirror circuit.

  The bipolar transistor 240 is an npn-type bipolar transistor, the base is connected to the switch terminal 242, and the emitter is grounded via the resistor 241.

  In the above configuration, when a desired voltage (design value for turning on each bipolar transistor) is input to the switch terminal 242 as a switch control signal, the bipolar transistor 232 is turned on and a constant current flows. . Thereby, since the base current of the bipolar transistor 231 is extracted, the bipolar transistor 231 is turned on.

  In addition, when a desired voltage is input, the bipolar transistor 240 is also turned on, so that the bipolar transistor 236 and the bipolar transistor 237 are turned on. The current flowing through the collector of the bipolar transistor 240 is turned back by a current mirror circuit composed of the bipolar transistor 236 and the bipolar transistor 237 and supplied to the base of the bipolar transistor 235. Thereby, the bipolar transistor 235 is turned on.

  As a result, the feedback circuit is set to a low gain setting state, and the phase compensation capacitor 234 is connected to the collector of the bipolar transistor 102. Therefore, when a low gain is set, it is possible to obtain an open loop gain lower than the reference by outputting a switch control signal having a desired voltage.

  Conversely, when setting a high gain, the bias voltage of the switch terminal 242 may be adjusted so as not to exceed a desired voltage. As a result, the feedback circuit is set to a high gain state, nothing is connected to the collector of the bipolar transistor 102, and the emitter is directly grounded. Therefore, it becomes possible to obtain a reference open loop gain without lowering the open loop gain.

  Also, by inputting a desired voltage to the switch terminal 242, the preamplifier circuit 200c becomes in a state equivalent to the preamplifier circuit 200a in which the switch 111 is turned on and the switch 212 is switched on.

  On the contrary, by adjusting the bias voltage of the switch terminal 242 so as not to exceed a desired voltage, the front-stage amplifier circuit 200c is connected to the front-stage amplifier circuit 200a in a state where the switch 111 is switched off and the switch 212 is switched off. Equivalent state.

  Therefore, the pre-stage amplifier circuit 200c can adjust the open loop gain in synchronization with the gain switching, and can reduce the input signal.

  In the preceding stage amplifier circuits 200a to 200c, the feedback circuit is connected in two stages. However, the present invention is not limited to this, and by further increasing the number of feedback circuits and the number of switches, a multi-stage gain switching function is provided. It becomes possible.

[Embodiment 3]
The following will describe another embodiment of the present invention with reference to the drawings. Configurations other than those described in the present embodiment are the same as those in the first and second embodiments. For convenience of explanation, members having the same functions as those shown in the drawings of Embodiments 1 and 2 are given the same reference numerals, and explanation thereof is omitted.

  FIG. 8 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 300a of the present embodiment.

  The preamplifier circuit 300a of this embodiment includes a bias current switching circuit 310 as shown in FIG. 8 in addition to the configuration of the preamplifier circuit 100a excluding the emitter resistance switching circuit 120.

  The bias current switching circuit 310 includes a switch 311 and a constant current source 312. The switch 311 has one terminal connected to the collector of the bipolar transistor 114 and the other terminal grounded via the constant current source 312.

  The constant current source 115 outputs the current Ib, and the constant current source 312 outputs the current Ic.

  In the above configuration, in the bias current switching circuit 310, the on / off of the switch 311 is switched according to the on / off switching of the switch 111. This will be described next with reference to FIGS.

  FIG. 9 is a graph illustrating frequency characteristics of the pre-stage amplifier circuit 300a. The vertical axis represents gain (dB), and the horizontal axis represents response frequency (Hz).

  First, it is assumed that no feedback circuit is provided in the pre-stage amplifier circuit 300a. The frequency characteristic of the pre-stage amplifier circuit 300a at this time is shown as an open loop gain.

  At this time, it is assumed that the switch 311 is OFF and the constant current source 312 is not connected to the collector of the bipolar transistor 114 as shown in FIG. Then, the open loop gain of the preamplifier circuit 300a is shown by a graph A indicated by a thick solid line in FIG. The open loop gain of the graph A is the same as the open loop gain of the graph A shown in FIG.

  Here, the amount of current flowing through the bipolar transistor 103 which is the active load of the bipolar transistor 102 is determined by the bias current flowing through the bipolar transistor 114 forming the current mirror circuit, that is, the current supplied from the constant current source 115.

  On the other hand, assume that the switch 311 is on and the constant current source 312 is connected to the collector of the bipolar transistor 114. Then, by connecting the constant current source 312, a current of Ib + Ic flows through the collector of the bipolar transistor 114. For this reason, when the bias current supplied to the bipolar transistor 102 is increased, a voltage whose frequency band is widened is finally output from the output terminal 112. Therefore, the position of the pole P1, which is the main open-loop gain of the pre-stage amplifier circuit 300a, is shifted to the high frequency side (pole P1b).

  That is, the open loop gain at this time is indicated by a graph D indicated by a thick dotted line in FIG. Therefore, when the switch 311 is on, the gain begins to decrease at a higher frequency than when the switch 311 is off. Therefore, it can be seen that the open-loop gain of the pre-stage amplifier circuit 300a increases from the position of the pole P1 of the graph A before shifting to the high frequency side.

  As a result, when the switch 111 is switched off and set to a high gain, the switch 311 is switched on and the gain of the feedback circuit is set based on the open loop gain of the graph D, so that the frequency can be increased even at a high gain. It is possible to suppress the decrease. That is, it is possible to set the frequency fxH at the time of high gain setting up to the point just before the pole P2. Therefore, the response speed can be improved while preventing the oscillation, and the response speed can be maximized.

  When the switch 111 is switched on and set to a low gain, the switch 311 is switched off and the gain of the feedback circuit is set based on the open loop gain of the graph A instead of the open loop gain of the graph D. Thus, it is possible to obtain the low gain frequency fxL at a low frequency without increasing it.

  As described above, the preamplifier circuit 300a of the present embodiment has a circuit configuration for increasing the open loop gain by switching the switch 311 on and off when setting a high gain. That is, in the pre-stage amplifier circuit 300a of the present embodiment, when setting a high gain, the open loop gain is adjusted so as to increase in the direction in which the GB product increases.

  According to the above configuration, by switching on the switch 311, the constant current source 312 is connected to the collector of the bipolar transistor 114, so that the bias current to the bipolar transistor 102 increases. For this reason, finally, a voltage having a wide high frequency band is output from the output terminal 112.

  Therefore, the position of the pole P1, which is the main open-loop gain, is shifted to the high-frequency side rather than the open-loop gain when the constant current source 312 is not connected to the collector of the bipolar transistor 114. Therefore, the open loop gain of the pre-stage amplifier circuit 300a increases after the position of the pole P1 in the graph A before shifting to the high frequency side.

  Therefore, when the switch 111 is turned off when a high gain is set, the open loop gain can be increased only when the high gain is set by switching the switch 311 on.

  Here, in the frequency characteristic of the amplifier circuit, the response speed decreases as the response frequency decreases as the gain state increases. However, in the pre-stage amplifier circuit 300a of the present embodiment, since the open loop gain is increased, it is possible to suppress a decrease in response frequency even in a high gain state. Thereby, the response speed can be improved.

  If the switch 111 is turned on when a low gain is set, the open loop gain is not increased by turning the switch 311 off. Thereby, even in the low gain state, it is possible to keep the circuit stable without increasing the response frequency.

  Therefore, the pre-amplifier circuit 300a of the present embodiment switches the gain while switching on / off of the switch 111 and the switch 311 according to the input level, so that a high-speed response with a high gain and a circuit with a low gain are achieved. It is possible to achieve both stability and stability.

  Also in the pre-amplifier circuit 300a of the present embodiment, it is preferable to use an electrical switch circuit composed of a MOS transistor or a bipolar transistor for the switch 111 and the switch 311. As a result, the preamplifier circuit 300a can be used as a semiconductor integrated circuit.

  Next, the configuration of the preamplifier circuit 300b using the electrical switch circuit configured by MOS transistors will be described with reference to FIG. Next, the configuration of the preamplifier circuit 300c using an electrical switch circuit configured by bipolar transistors will be described with reference to FIG.

  FIG. 10 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 300b.

  In addition to the configuration of the preamplifier circuit 300a excluding the switch 111 and the bias current switching circuit 310, the preamplifier circuit 300b includes a MOS transistor 321, a MOS transistor 322, a constant current source 323, and a switch as shown in FIG. A terminal 324 is provided.

  In addition, the MOS transistor 322 and the constant current source 323 constitute a bias current switching circuit 320. The bias current switching circuit 320 is a part corresponding to the bias current switching circuit 310 shown in FIG.

  The MOS transistor 321 is an N-channel MOS transistor, and is connected in series between one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel and the base of the bipolar transistor 102. Is connected to one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel, and the source is connected to the base of the bipolar transistor 102. The gate is connected to the switch terminal 324. The MOS transistor 321 is a part corresponding to the switch 111.

  The MOS transistor 322 is a P-channel MOS transistor, the gate is connected to the switch terminal 324, the drain is connected to the collector of the bipolar transistor 114, and the source is grounded via the constant current source 323. The MOS transistor 322 is a part corresponding to the switch 311, and the constant current source 323 is a part corresponding to the constant current source 312.

  In the above configuration, when a Low signal (GND voltage) is input to the switch terminal 324 as a switch control signal, a Low signal is input to the gate of the MOS transistor 321 and the gate of the MOS transistor 322. Therefore, the MOS transistor 321 is turned off and the MOS transistor 322 is turned on.

  As a result, the feedback circuit is set to a high gain state, and the constant current source 323 is connected to the collector of the bipolar transistor 114. Therefore, when a high gain is set, it is possible to obtain an open loop gain that is higher than the reference by outputting a switch control signal at a low level.

  Conversely, when a Hi signal (VCC voltage) is input to the switch terminal 324 as a switch control signal, the Hi signal is input to the gate of the MOS transistor 321 and the gate of the MOS transistor 322. Therefore, the MOS transistor 321 is turned on and the MOS transistor 322 is turned off.

  As a result, the feedback circuit is set to a low gain setting state, and the constant current source 323 is not connected to the collector of the bipolar transistor 114. Therefore, when a low gain is set, it becomes possible to obtain a reference open loop gain without increasing the open loop gain by outputting a switch control signal at the Hi level.

  Further, by inputting a Low signal to the switch terminal 324, the pre-stage amplifier circuit 300b is in a state equivalent to the pre-stage amplifier circuit 300a in which the switch 111 is turned off and the switch 311 is turned on.

  Conversely, by inputting a Hi signal to the switch terminal 324, the pre-stage amplifier circuit 300b becomes equivalent to the pre-stage amplifier circuit 300a in which the switch 111 is turned on and the switch 212 is turned off.

  Therefore, the pre-stage amplifier circuit 300b can adjust the open loop gain in synchronization with the gain switching, and can reduce the input signal.

  FIG. 11 is a circuit diagram showing a configuration example of the pre-stage amplifier circuit 300c.

  In addition to the configuration of the preamplifier circuit 300a excluding the switch 111 and the bias current switching circuit 310, the preamplifier circuit 300c includes a bipolar transistor 331, a bipolar transistor 332, a resistor 333, a switch terminal 334, as shown in FIG. A bipolar transistor 335, a resistor 336, and a switch terminal 337 are provided.

  The bipolar transistor 335 and the resistor 336 constitute a bias current switching circuit 330. The bias current switching circuit 330 is a part corresponding to the bias current switching circuit 310 shown in FIG.

  The bipolar transistor 331 is a pnp type bipolar transistor, and the collector is connected in series between the output terminal 112 and one terminal of a circuit in which the feedback capacitor 109 and the feedback resistor 110 are connected in parallel. 109 and the feedback resistor 110 are connected to one terminal of a circuit connected in parallel, and the emitter is connected to the output terminal 112. The base is connected to the collector of the bipolar transistor 332. Note that the bipolar transistor 331 is a portion corresponding to the switch 111.

  The bipolar transistor 332 is an npn-type bipolar transistor, and has an emitter grounded via a resistor 333 and a base connected to the switch terminal 334. The bipolar transistor 332 and the resistor 333 constitute a current source for the bipolar transistor 331.

  The bipolar transistor 335 is an npn-type bipolar transistor, the base is connected to the switch terminal 337, the collector is connected to the collector of the bipolar transistor 114, and the emitter is grounded via the resistor 336. Note that the bipolar transistor 335 is a portion corresponding to the switch 311.

  In the above configuration, when a desired voltage (design value for turning on each bipolar transistor) is input as a switch control signal to the switch terminal 334, the bipolar transistor 332 is turned on and a constant current flows. . Thereby, since the base current of the bipolar transistor 331 is extracted, the bipolar transistor 331 is turned on.

  Further, when a desired voltage is input to the switch terminal 337 as a switch control signal, the bipolar transistor 335 is turned on and a constant current flows. That is, a constant current is supplied to the bipolar transistor 114.

  Accordingly, when a desired voltage is applied to the switch terminal 334, the bipolar transistor 331 is turned on, and the feedback circuit is set to a low gain setting state. Therefore, the switch terminal 337 at this time is not biased (set to a high impedance state). ). As a result, the bias current of the current Ib of the constant current source 115 is supplied to the bipolar transistor 102.

  Therefore, when a low gain is set, a switch control signal having a desired voltage is output to the switch terminal 334 and is not biased to the switch terminal 337, thereby providing a reference without increasing the open loop gain. An open loop gain can be obtained.

  Conversely, when the switch terminal 334 is not biased (high impedance state), the bipolar transistor 335 is turned on by applying a desired voltage to the switch terminal 337 and biasing it.

  Thereby, the bias current source of the bipolar transistor 102 includes a current flowing through the bipolar transistor 335. Therefore, the bias current of the current Ib + α of the constant current source 115 is supplied to the bipolar transistor 102.

  Therefore, when setting a high gain, the switch terminal 334 is not biased, and a switch control signal having a desired voltage is output to the switch terminal 337, thereby obtaining an open loop gain higher than the reference. Is possible.

  In addition, by inputting a desired voltage to the switch terminal 334 and setting the switch terminal 337 to a high impedance state, the front-stage amplifier circuit 300c has the switch 111 turned on and the switch 311 turned off. It becomes a state equivalent to 300a.

  Conversely, by inputting a desired voltage to the switch terminal 337 and setting the switch terminal 334 to a high impedance state, the preamplifier circuit 300c is a preamplifier in which the switch 111 is turned off and the switch 311 is turned on. The state is equivalent to that of the circuit 300a.

  Therefore, the pre-stage amplifier circuit 300c can adjust the open loop gain in synchronization with the gain switching, and can reduce the input signal.

  In the above-described preamplifier circuits 300a to 300c, the feedback circuit is connected in two stages. However, the present invention is not limited to this. By increasing the number of feedback circuits and the number of switches, a further multistage gain switching function is provided. It becomes possible.

  Further, the bias current switching circuit 310 of the preamplifier circuit 300a of the present embodiment is the phase compensation of the emitter resistance switching circuit 120 of the preamplifier circuit 100a of the first embodiment and the preamplifier circuit 200a of the second embodiment. Each can be combined with the capacitance switching circuit 210.

  FIG. 12 is a circuit diagram illustrating a configuration example of the preamplifier circuit 400 including the phase compensation capacitance switching circuit 210 and the bias current switching circuit 310.

  As shown in FIG. 12, the preamplifier circuit 400 includes a bias current switching circuit 310 in addition to the configuration of the preamplifier circuit 200a of the second embodiment.

  In the above configuration, when the switch 111 is switched off and set to a high gain, the switch 311 is switched on and the switch 212 is switched off, and the feedback is based on the open loop gain of the graph D shown in FIG. By setting the gain of the circuit, it is possible to suppress a decrease in frequency even with a high gain. That is, it is possible to set the frequency fxH at the time of high gain setting up to the point just before the pole P2. Therefore, the response speed can be improved while preventing oscillation.

  Conversely, when the switch 111 is switched on and set to a low gain, the switch 311 is switched off and the switch 212 is switched on so that the open loop gain of the graph C shown in FIG. By setting the gain, it is possible to suppress an increase in frequency even with a low gain. That is, it becomes possible to set the frequency fxL at the time of low gain setting to be before the point of the pole P2. Therefore, it is possible to prevent oscillation, that is, improve the stability of the circuit.

  Therefore, the pre-amplifier circuit 400 switches the gain while switching on / off of the switch 111, the switch 212, and the switch 311 according to the input level, thereby stabilizing the circuit with a low gain and responding with a high gain. It is possible to achieve both high speed.

  The present invention can be applied to a light receiving amplifier IC provided in the optical pickup device in an optical pickup device that reads optical signals from various types of optical disks such as CD, DVD, and BD, but is not limited thereto. It can also be applied to other fields. For example, the present invention can be applied to an amplifier circuit that directly inputs and amplifies a weak current.

1 is a circuit diagram showing an embodiment of a preamplifier circuit in the present invention. It is a graph which shows the frequency characteristic of the said front stage amplifier circuit. It is a circuit diagram which shows an example of another structure of the said front | former stage amplifier circuit. It is a circuit diagram which shows other embodiment of the front | former stage amplifier circuit in this invention. It is a graph which shows the frequency characteristic of the said front stage amplifier circuit. It is a circuit diagram which shows an example of another structure of the said front | former stage amplifier circuit. It is a circuit diagram which shows an example of another structure of the said front stage amplifier circuit. FIG. 6 is a circuit diagram showing still another embodiment of a preamplifier circuit in the present invention. It is a graph which shows the frequency characteristic of the said front stage amplifier circuit. It is a circuit diagram which shows an example of another structure of the said front | former stage amplifier circuit. It is a circuit diagram which shows an example of another structure of the said front stage amplifier circuit. FIG. 6 is a circuit diagram showing still another embodiment of a preamplifier circuit in the present invention. It is a simplified schematic diagram which shows the structure of the optical system of the conventional optical pick-up apparatus. It is a circuit diagram which shows the structure of the conventional light reception IC. It is a circuit diagram which shows the structure of the front | former stage amplifier circuit comprised in the said light reception IC. It is a graph which shows the frequency characteristic of the said front stage amplifier circuit.

Explanation of symbols

100a, 100b Pre-stage amplifier circuit (light receiving amplifier circuit)
101 Photodiode (light receiving element)
102 Bipolar transistor (amplification transistor)
103 Bipolar Transistor 104 Resistor 105 Bipolar Transistor 106 Constant Current Source 107 Feedback Capacitor (First Capacitance Element)
108 Feedback resistor (first resistor)
109 Feedback capacitance (second capacitance element)
110 Feedback resistor (second resistor)
111 switch (5th switch)
112 Output terminal 113 Resistor 114 Bipolar transistor 115 Constant current source (first current source)
120, 130 Emitter resistance switching circuit 121 Switch (first switch)
122 switch (second switch)
123,134 Resistance (first resistance)
131-133, 135, 136 MOS transistors 200a-200c Pre-stage amplifier circuit (light receiving amplifier circuit)
210, 220, 230 Phase compensation capacity switching circuit 211, 222, 234 Phase compensation capacity 212 switch (third switch)
221, 223 MOS transistor 231, 232, 235-237, 240 Bipolar transistor 233, 238, 239, 241 Resistance 300a-300c Preamplifier circuit (light receiving amplification circuit)
310, 320, 330 Bias current switching circuit 311 switch (fourth switch)
312,323 constant current source (second current source)
321, 322 MOS transistor 331, 332, 335 Bipolar transistor 333, 336 Resistor 400 Previous stage amplifier circuit (light receiving amplifier circuit)

Claims (15)

An input terminal, an output terminal,
An amplifying transistor that amplifies the current signal input from the input terminal and outputs the current signal to the output terminal;
In an amplifier circuit having a gain switching function capable of switching between a low gain and a high gain, and including a feedback circuit connected to the input terminal and the output terminal,
In response to switching of the gain of the feedback circuit according to the signal level of the input current signal, an open loop gain representing the relationship between the gain and the response frequency is a frequency characteristic when the feedback circuit is not provided. An amplifier circuit characterized by adjusting. When the gain of the feedback circuit is switched to a low gain, the open loop gain is adjusted so as to decrease in a direction in which the GB product decreases,
2. The amplifier circuit according to claim 1, wherein when the gain of the feedback circuit is switched to a high gain, the open loop gain is adjusted so as to increase in a direction in which the GB product increases.   The amplifier circuit according to claim 1, wherein the open loop gain is adjusted by adjusting a GB product of the amplification transistor. The amplifying transistor is a grounded emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current,
A first switch connected in series between the emitter of the amplifying transistor and ground;
4. The amplifier circuit according to claim 3, further comprising: a second switch having one terminal connected to the emitter of the amplifying transistor and the other terminal grounded via a first resistor.   2. The amplifier circuit according to claim 1, wherein the open loop gain is adjusted by performing phase compensation of an output voltage of the amplification transistor. The amplifying transistor is a grounded emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current,
6. The amplifier circuit according to claim 5, further comprising a third switch having one terminal connected to the collector of the amplifying transistor via a phase compensation capacitive element and the other terminal grounded.   2. The amplifier circuit according to claim 1, wherein the open loop gain is adjusted by increasing a bias current supplied to the amplifying transistor. The amplifying transistor is a grounded emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current,
A first current source for supplying a bias current to the collector of the amplifying transistor;
The first current source has one terminal connected to the upstream side of the first current source and the other terminal connected to the second current source when the connection portion connected to the collector of the amplifying transistor is on the upstream side. The amplifier circuit according to claim 7, further comprising a fourth switch that is grounded via the first switch.   8. The amplifier circuit according to claim 3, 5, or 7, wherein the amplifying transistor is a grounded emitter bipolar transistor having a base connected to the input terminal and a collector supplied with a bias current. .   2. The amplifier circuit according to claim 1, wherein the feedback circuit is switched by turning on and off a switch. The feedback circuit is
A first feedback circuit unit in which the second resistor and the first capacitor element are connected in parallel and a second feedback circuit unit in which a fifth switch is further connected in series to the third resistor and the second capacitor element connected in parallel are connected in parallel. The amplifier circuit according to claim 10, comprising:   The first switch, the second switch, the third switch, the fourth switch, and the fifth switch are each configured by an electrical switch circuit. 11. The amplifier circuit according to 11. The fifth switch;
The amplification according to claim 4, 6, 8, or 11, comprising a combination of a plurality of the first switch, the second switch, the third switch, and the fourth switch. circuit. An amplifier circuit according to any one of claims 1 to 13,
A light receiving element that converts an input optical signal into a current signal and outputs the current signal;
The light receiving amplifier circuit, wherein the light receiving element outputs the current signal to an input terminal of the amplifier circuit.   An optical pickup device comprising the light receiving amplification circuit according to claim 14.

Images