JP2008166290A - Hybrid ballast control circuit in simplified package - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a hybrid ballast control circuit in a simplified package which can implement a lighting control system in a reduced price and in a simplified production process. <P>SOLUTION: The hybrid ballast control circuit includes in a single package a ballast control, a half bridge driver and an electric switch half bridge. The ballast circuit includes a lot of defect protections and security properties and oscillates by itself in order to drive a resonance circuit including a fluorescent lamp. For a lot of driving modes including a drive start up, a preheating, a normal driving mode and a defect protecting response mode, an internal feedback and a controlling signal are provided. A voltage control oscillator adjusts a switching frequency of a switching half bridge and maintains a zero volt switching and a minimum current switching. A total ballast control has only three external connections and its performance can be carried out in a TO220 package. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates generally to electronic ballasts for fluorescent lamps, and more particularly to simplified hybrid ballast controls and packages.

  Electronic ballasts (ballasts) are used in many lighting device applications, particularly those that work with switched half bridges. Such an electronic ballast is shown in US Pat. No. 6,008,593 issued to International Rectifier Corporation. Electronic ballast control has evolved to include a wide range of functions and features, including defect detection and power factor correction in response circuits. A typical electronic ballast includes several control ICs that receive feedback signals to operate the switches in the electronic ballast and to control the fluorescent lamps driven by the switching half bridge. . A control IC for controlling the switching half bridge typically includes an oscillator used to drive a switching signal for a half bridge switch coupled to a fluorescent lamp load. One implementation of an electronic ballast using an oscillator involves connecting a voltage controlled oscillator (VCO) to the electronic ballast and driving the VCO with an appropriate signal to modify the switching frequency as desired. Including. For example, for fluorescent lamp applications, the switching frequency of the electronic ballast can be adjusted to change during start-up or under fault conditions to improve the operation of the electronic ballast.

  Electronic ballasts also typically pre-heat the lamp filament, ignite the lamp, drive the lamp to the desired power level, detect lamp fault conditions, and electronic stability Various design features, such as safely extinguishing the vessel. The use of electronic ballasts for gas discharge lamps such as fluorescent lamps uses insulated gate bipolar transistors (IGBTs) and power MOSFET switching devices that replace previously used power bipolar switching devices. It can be used widely. A monolithic gate driver circuit, such as IR2155 sold by International Rectifier Corporation and described in US Pat. No. 5,545,955, provides a power MOSFET or IGBT in an electronic ballast. Has been used to drive. The IR2155 gate driver IC is advantageous for many applications because it is packaged in a normal DIP or SOIC package with a small profile and can be used in a standard manufacturing process.

  In each of the electronic ballast circuits described above, the control IC is implemented separately from power switches in the switching half bridge or in other parts of the electronic ballast. In addition, the control IC uses external elements such as passive elements to obtain features such as programmable preheat time, minimum frequency, and the like. The external elements can be determined by the designer based on application specific criteria to improve the flexibility of the control IC. However, in many applications it is desirable to obtain a simplified application specific ballast control with low cost and easy manufacturability to implement a lighting control system.

US Pat. No. 6,008,593 US Pat. No. 5,545,955

  In accordance with the present invention, an electronic ballast is provided that is substantially simplified and packaged as a single unit to meet the needs of the lighting system industry. The single unit package includes a ballast control IC, passive elements for programming features in the ballast control IC, and a switched half bridge circuit for providing a controlled power output to the lamp load. All electronic ballasts can be incorporated, for example, in a single TO220 package with only three connecting pins to provide full operability of the electronic ballast. The electronic ballast control package may combine a switching half bridge consisting of MOSFET switches with ballast control circuitry, a charge pump supply, and passive elements that determine control parameters for the electronic ballast.

  Among the features provided by hybrid ballast control is the preheat time set by an integrated capacitor coupled to the ballast controlled VCO. Hybrid ballast control also includes integrated fault protection, including undervoltage lockout, non-ignition conditions, overcurrent conditions, and open filament faults. Hybrid ballast control detects excessive current that can occur during ignition if the lamp does not ignite. Since fluorescent lamps typically operate with a resonant inductor, the inductor can saturate, resulting in a non-ignition lamp failure, which is detected by the electronic ballast of the present invention. Ballast control can perform crest factor measurements based on the RDSON value of the low-side switch in the switching half bridge. If excessive current is detected by crest factor measurement, ballast control enters a fault mode, preventing the switching half bridge driver output from being disabled and damaging the lighting system and system components. The crest factor measurement is a relative current measurement that is independent of temperature and tolerance (tolerance) variations in the low-side MOSFET of the switched half bridge. Thus, more accurate current sensing can be obtained than when the low side switch RDSON voltage is used alone. A lockout and reset feature is provided to allow the electronic ballast to shut down after detection of the result, so power must be returned to the electronic ballast before the electronic ballast begins to operate again.

  The present invention also provides a fixed minimum frequency feature for electronic ballast control. This feature prevents hard switching in the switching half bridge and avoids the possibility of damaging switching losses and half bridge switching elements.

  Other features and advantages of the present invention will become apparent from the following description made with reference to the accompanying drawings.

  1 and 2, there is shown a block diagram of an integrated control circuit 100 used in the hybrid ballast control 20 according to the present invention. The control circuit 100 includes instructions numbered for connections for ballast control inputs and outputs. The VCC voltage is connected to connection number 1, the VCO signal is connected to connection number 3, and the minimum frequency element is connected to FMIN with connection number 4. Outputs HO and LO are connections 7 and 5, respectively, and provide driver outputs for half-bridge switches M1, M2. Voltage VB on connection number 8 provides a power connection to half bridge driver 13 and voltage VS on connection number 6 provides a reference voltage for high side switch M1 in half bridge 22. Connection number 2 labeled COM represents a common voltage connection to provide a return path and voltage reference in the control circuit 100.

  The control circuit 100 also includes an integrated bootstrap diode between voltages VCC and VB that contributes to provide a starting voltage for the high side driver circuit along with the supply capacitor CBOOT (FIG. 2). The circuit 100 also includes a voltage controlled oscillator (VCO) 21 that performs many functions in electronic ballast control. The signal VCO on connection 3 is connected to a capacitor CVCO (FIG. 2) that determines the frequency of VCO 21. By controlling the manner in which the capacitor CVCO is charged, the VCO 21 can change the switching frequency of the half bridge 22 during various operational aspects, including start-up mode, travel mode and fault mode. The frequency of the VCO 21 is affected by an adaptive feedback control loop with current sensing feedback obtained in the VS sensing block 15. In addition, adaptive zero voltage and minimum current switching control 19 provides frequency adjustment to affect half bridge switching via VCO 21 and half bridge driver 13. The switching control 19 affects the frequency of the VCO 21 based on the VS sensing block 15 to obtain zero volt switching (ZVS) and minimum current switching (MCS) in the half bridge 22. VCO 21 is programmably limited to a minimum frequency by the settings given to signal FMIN on connection 4, as will be described in more detail below.

  As shown in FIG. 2, ballast control 20 according to the present invention is shown as ballast control 20. The ballast control 20 incorporates the control circuit 100 described in FIG. 1, receives a control input, and drives a switching half bridge 22 composed of switches M1 and M2. The high side switch M1 in the switching half bridge 22 is connected to a DC bus shown as an external package connection 1. Accordingly, switch M1 switches DC power to output pin 2 for hybrid ballast control. The low side switch M2 in the half bridge 22 is connected to the output 2 of the hybrid ballast control and the common reference point 3 to provide all external power connections to the hybrid ballast control 20. Thus, all high power signals switched by hybrid ballast control 20 flow through switches M1 and M2 in half bridge 22. Therefore, the hybrid ballast control 20 uses three external connections to provide an electronic ballast control function for driving the gas discharge lamp in the resonant circuit. Since the passive elements in the hybrid ballast control 20 and the switches M1, M2 and diodes D1, D2 can be integrated, for example, on a small substrate, the hybrid ballast control 20 is small, such as a TO 220 with three pin connections. Can be implemented in a package.

  Referring now to FIG. 3, a circuit diagram of a CFL lamp 33 with electronic ballast control 20 is shown. The ballast control 20 provides an output to an inductor LRES that forms a resonant circuit with the CFL lamp 33. DC power is supplied to ballast control 20 via connection 1 from inductor L1, capacitor C1 and full-wave bridge rectifier BR. The output connection 2 of the ballast control 20 supplies high frequency power to the lamp 33 via a resonant circuit composed of an inductor LRES and a capacitor CRES. The combination of inductor LRES and capacitor CRES creates a resonant circuit having a resonant frequency that drives lamp 33 with high efficiency. Ballast control 20 includes an adaptive control 19 (FIG. 1) that attempts to drive the output of ballast control 20 at a frequency close to the resonant frequency of the resonant circuit comprised of inductor LRES and capacitor CRES. As the switching frequency approaches the resonant frequency, the minimum current can be switched because the output current on output 2 of ballast control 20 is almost in phase with the output voltage on output 2. In this type of in-phase near resonant operation, the half-bridge switching losses in ballast control 20 are minimized.

  Referring now to FIG. 4, the hybrid ballast control 20 is shown with special elements suitable for operation in a lower voltage lockout mode. When the supply voltage VCC falls below the turn-on threshold of the integrated control circuit 100, the under voltage lockout mode (UVLO) is entered. The UVLO mode maintains an extremely low supply current, i.e. <200 μa, allowing the control circuit 100 to be fully functional before both the high and low sides are energized. . The starting capacitor CVCC is charged by subtracting the starting current drawn by the control circuit 100 from the current supplied by VBUS via the resistor RSUPPLY. Resistor RSUPPLY is selected to provide sufficient current to supply control circuit 100 from bus voltage VBUS. Capacitor CVCC is large enough to maintain the voltage on VCC above the threshold for UVLO mode for at least one half cycle of the input line voltage. Capacitor CVCC maintains a DC voltage on VCC and charges during the peak input voltage supplied by VBUS. When the voltage on the capacitor CVCC supplied to VCC reaches the start threshold, the control circuit 100 turns on, starts driving the outputs HO and LO, and starts oscillating the switching half bridge switches M1 and M2.

  The high side driver circuit voltage provided on connection VB is initially assisted by an internal bootstrap diode DBBOOT and supply capacitor CBOOT to quickly obtain the operating voltage at start-up. A charge pump circuit consisting of a capacitor CCP and diodes DCP1 and DCP2 supplies a low side driver voltage to the drive circuit on connection VS. During circuit turn-on, it is desirable to ensure that the high-side voltage supply is charged to an appropriate value prior to turning on the high-side switch M1. Thus, in order to provide sufficient time to charge the high side supply circuit before the first pulse is applied on signal HO, signal LO is first switched when switching in the switching half bridge is initiated. Provide an oscillation pulse.

  During the UVLO mode, the control circuit 100 is placed in a safe mode and the high and low side driver outputs HO and LO are both turned off or tied low. Furthermore, the line VCO is pulled down to a common voltage on the line COM so as to reset the starting frequency of the VCO 21 to the maximum value.

  Referring now to FIG. 5, a circuit block diagram of an electronic ballast according to the present invention is shown with elements specific to the operation of the frequency sweep circuit. The frequency sweep mode is typically involved when the electronic ballast is powered and begins to operate. When VCC exceeds the UVLO positive threshold, control circuit 100 enters a frequency sweep mode. The internal current source 31 charges a capacitor CVCO connected on the line VCO of the control circuit 100. As the capacitor CVCO charges, the voltage supplied to the VCO 21 begins to ramp up exponentially. As the voltage on the line VCO increases, the frequency of the VCO 21 correspondingly decreases and ramps down (decreases) towards the resonant frequency of the resonant circuit consisting of, for example, the inductor LRES and the capacitor CRES. The voltage on line VCO is initially zero, which sets the output frequency of VCO 21 to the maximum frequency of the circuit. During preheat and ignition (or start-up), in frequency sweep mode, the voltage on the line VCO ramps up in the form of an exponential waveform defined by equation (1) below.

v (t) = V (1-e- ^{t / RC} ) (1)

  The voltage on line VCO approaches 5 volts as it ramps up, which equals the minimum frequency as programmed by resistor RFMIN provided on signal FMIN connected to VCO 21. The voltage on line VCO ramps exponentially due to the charge placed on capacitor CVCO via an internal nonlinear current source 31. Alternatively, the voltage on line VCO can be ramped up linearly as programmed by capacitor CVCO.

  As the frequency of the VCO 21 approaches the resonant frequency of the electronic ballast output stage, and as the half bridge switches M1 and M2 oscillate at a frequency approaching the resonant frequency, the output voltage and load supplied to the connection node 2 The current tends to increase. The switching frequency continues to decrease until, for example, the output current and voltage reach a level at which the lamp 33 ignites (or starts) or until an output current limit is achieved. If the lamp 33 is ignited (or started) successfully, the input voltage to the VCO 21 will continue to increase to reach a value of approximately 4.6 volts. When the input voltage to the VCO 21 reaches 4.6 volts, the control circuit 100 switches to the adaptive drive mode to maintain zero voltage and minimum current switching (ZVMCS).

  During the frequency sweep mode, the switching frequency can be reduced via the resonant frequency. Thus, the minimum frequency for VCO 21 is programmed by resistor RFMIN to obtain a minimum frequency that is lower than that of the resonance frequency expected from the resonance circuit consisting of inductor LRES, capacitor CRES and lamp 33. In the case of a gas discharge lamp 33 as a load controlled by the hybrid ballast control 20, the resonant load circuit provides a high Q resonance, so the programmed minimum switching frequency should be lower than the high Q resonant frequency. is there. If the input voltage to the VCO 21 ramps exponentially, the VCO 21 ramps (slopes) rapidly through higher frequencies if the gain across the resonant output stage is low. If there is a low gain for the resonant output stage, less current can be used for preheating purposes. Therefore, as VCO 21 outputs lower frequencies, more current is available for preheating, allowing good response and increasing component life.

  The exponential shape of the input voltage to the VCO 21 produces a slower ramp (slope) through a lower frequency that approaches resonance. At lower frequencies, the resonant output stage gain is higher and more stable. Thus, preheating is performed at a higher current and under better control. The input voltage to the VCO 21 may be linearly ramped (ramped) to drive the oscillator frequency further simplified towards the resonant frequency.

  As the frequency approaches resonance, the lamp typically ignites (or starts) at a frequency above resonance. This is because the gain across the resonant tank increases abruptly near the resonant frequency to achieve an output voltage for igniting the lamp. When the lamp ignites, the load becomes overdamped and the resonant frequency decreases. Since the circuit enters running mode after the lamp ignites, the output of the VCO 21 typically remains above the resonant frequency.

  It can happen that the switching frequency can run below the resonance frequency for a number of cycles, even up to the point where it reaches FMIN, however, the ZVS circuit brings that frequency backwards during the running mode. The period below the resonant switching frequency is short and should not cause any problems or damage to the circuit.

  As the frequency decreases towards the high Q resonance frequency during the frequency sweep mode, the lamp filament is preheated until the lamp voltage increases to a sufficiently high point where the lamp ignites. As described above, the minimum frequency is programmed by resistor RFMIN connected to signal FMIN of control circuit 100. The maximum frequency is internally set to a fixed margin higher than the minimum frequency to ensure that the initial start-up lamp voltage is low to prevent unwanted “flashes” from occurring across the lamp. The amount of preheating and lighting time is programmed by selecting the capacitor CVCO appropriately.

  Referring now to FIG. 5A, a circuit diagram illustrating electronic ballast operation during the adaptive travel mode is shown. The adaptive travel mode is enabled when the input voltage to the VCO 21 is increased to approximately 4.6 volts or more. At this point, the frequency is typically swept through the resonant frequency and the lamp is ignited. When the lamp ignites, the output stage is a low Q RCL circuit and the switching frequency is adjusted via the VCO 21 to a desired operating point slightly above the resonant frequency. According to adaptive travel mode control, the operating frequency is set as close as possible to the resonance frequency of the low Q RCL output stage while maintaining ZVS in the half-bridge switching stage. With a switching frequency close to the resonant frequency, the output current is almost in phase with the half-bridge output voltage, resulting in MCS. Thus, the control provides an adaptive travel mode with ZVS and MCS that minimizes switching losses of the half-bridge switches M1 and M2.

  The VS sense 15 obtains feedback from the half bridge driver 13 to determine the output voltage and phase on line VS. The VS sensing 15 is provided internally in the control circuit 100 to allow good closed loop operating characteristics with high noise immunity. This closed-loop control is half-frequency at a frequency close to the resonant frequency that allows the electronic ballast to operate at ZVS and MCS, even when the tolerances of components and lamps that can occur through the manufacturing and production process change. The bridge 22 is operated. Further, closed loop control provides ZVS and MCS as input line voltage changes and as component tolerances change over time, for example, as the characteristics of lamp 33 can change over its lifetime.

  Closed loop ZVS and MCS control is achieved by sensing the half bridge voltage output on line VS during the non-overlapping dead time for half bridge switching. During each half-bridge switching cycle, the half-bridge voltage slews to the opposite rail during the dead time. The closed loop frequency control parameter is measured with respect to determining whether the voltage has completely slewed to the opposite rail prior to turning on the appropriate switch. That is, if the voltage did not slew to the opposite rail so that there was a zero voltage across the switch to be turned on, the switching frequency was too close to resonance and the closed loop control shifted the frequency slightly higher To do. The voltage slew measurement precedes the turn-on of the low-side switch M2 at the beginning of a short time interval of approximately 100 nanoseconds given prior to the switch turn-on to allow early error detection and provide a safety margin for response. Done. If the voltage did not slew to zero in approximately 100 nanoseconds prior to switch turn-on, a pulse of current is applied from the internal current source 61 to the VCO input 3. The current pulse discharges the capacitor CVCO slightly, decreasing the voltage input to the VCO 21 and causing the output frequency to increase slightly. During the remainder of the switching cycle, the external capacitor CVCO charges slowly with the current supplied by the internal current source 63. In this way, adaptive travel mode control adjusts the frequency slightly upward because the circuit operating frequency is driven to a lower frequency due to operating events such as line voltage changes or load characteristics, for example. These operating events tend to produce a reduced resonant frequency that can cause non-ZVS switching. The adaptive closed loop control circuit “nudges” the frequency to a high value slightly above resonance when a non-zero volt switch occurs. Closed-loop adaptive control switches near resonance in adaptive travel mode to obtain ZVS and MCS operation despite changing input line voltage and current conditions, component tolerance variations, and lamp / load variations. Maintain frequency.

  The manufacturing process used to develop the control circuit 100 is a 600 volt manufacturing process that is connected to the line VS to accurately measure voltage, particularly to measure zero volts during non-overlapping dead time. An internal high voltage transistor is provided. The internal transistor also withstands the high voltage of the DC bus during the part of the switching cycle when the high side switch M1 in the half bridge is turned on, ie when the line VS is at the DC bus potential.

  The control circuit 100 also includes defect protection that is determined via the defect logic 17 (FIG. 1). If the lamp filament is intact but the lamp does not ignite, and if a lamp non-ignition condition occurs, the lamp voltage and output stage current will be excessive during ignition start-up, as described above. To increase. If the output stage current and lamp voltage reach excessive amounts, or if the resonant inductor is saturated, it is considered that a defect has occurred during ignition. This condition is detected by making an internal measurement on line VS during the entire ON time of low side switch M2. The voltage measured on line VS during the ON time pulse applied on line LO is determined by the low side switch current, which indicates the output stage current. The current is measured as flowing through the ON resistance of the low side switch M2, and the voltage reading is taken across the ON resistance (RDSON) of the low side switch M2. By using the ON resistance inside the low side switch M2, the half bridge current is sensed without the need for an additional current sensing resistor and without the need for an additional current sensing input in the control circuit 100. . The RDSON value of the low side switch M2 serves as a current sensing resistor for defect detection, while the line VS serves as a current sensing input for the control circuit 100 during start-up. During start-up, the internal high-voltage switch described above is turned on when the voltage on line VS is low, i.e. when low-side switch M2 is ON, and the voltage measurement is obtained via the low-side circuit. Allows sensing to occur. The internal high voltage switch is turned off for the remainder of the switching cycle to withstand the high voltage applied on line VS when high side switch M1 is turned on, and a DC bus voltage is applied to line VS.

  Since the ON resistance inside the low side switch M2 has a positive temperature coefficient, the control circuit 100 detects excessive or dangerous current or inductor saturation that may occur during a non-ignition fault condition of the lamp. The crest factor is measured internally. The control circuit 100 performs a crest factor measurement to provide a relative current measurement that depends on the temperature and / or tolerance variation of the RDSON internal ON resistance of the low side half bridge switch M2. The crest factor measurement of the current waveform is typically defined as the ratio of the peak current in amperes to the RMS current in amperes. For example, the crest factor for a typical sine 60 Hz current waveform is 1.4. Thus, crest factor measurements provide an indication of current spikes in the output stage that can be excessive or dangerous if experienced for some amount of time. In the preferred embodiment of the present invention, a crest factor of 4, ie, the peak current is four times the average current, is used to determine the defect state.

  If the peak current exceeds the average current by a factor of 4 for approximately 50 switching cycles determined on line LO, control circuit 100 determines that a defect has occurred. At that point, during the ON time of the output pulse on line LO, the control circuit 100 enters a fault mode and both gate drivers for the line HO and LO driver outputs are latched low. This safe state persists until power is returned to the control circuit 100. Preferably, the supply voltage VCC is repeated below and above the internal UVLO threshold. The crest factor can be arbitrarily set to any given number depending on the application. Furthermore, the number of switching cycles for detecting crest factor defects can be set to any number depending on the application. One advantage over determining defects after multiple switching cycles is observed in the case of inductor saturation. During lamp ignition, the inductor can saturate for several cycles while the lamp arc is being created. A saturated inductor appears as a shutdown fault condition. However, the control circuit 100 waits for a given number of switching cycles before determining that a defect has occurred to avoid false defect detection in this situation.

  A further embodiment of crest factor detection is that it is only enabled during the LO on-time after a small delay (1 microsecond) after the LO rising edge. Crest factor detection is disabled during dead time and HO on time. This is because the inductor current saturates towards the end of the LO on-time. The crest factor detection is used for inductor current saturation detection. Other defect conditions, such as open filaments, are detected by non-ZVS shift and 1V VCO shutdown threshold. Since the frequency is sweeping towards resonance for ignition during crest factor detection, the circuit obtains the maximum voltage that can be output before the inductor saturates. Since inductor saturation is highly temperature dependent, the crest factor will then cause the maximum voltage output by the circuit to automatically adjust the tolerance based on temperature. For example, at low temperatures, the lamp requires a higher ignition voltage before igniting. Since the inductor can withstand higher currents before saturation at lower temperatures, the circuit generates a higher voltage before the crest factor detects saturation and shutdown. Thus, this adaptive feature provides a higher voltage at lower temperatures when needed. Also, if the inductor saturation level is low, or if a core material is used that varies greatly such that the saturation level is inconsistent during manufacture, the circuit will still shut down at saturation, thus damaging currents that may occur during saturation. It will protect the circuit against it.

  Another defect detected by the control circuit 100 is an open filament lamp defect. An open filament lamp defect can have a switching difficulty in the half bridge and can damage switches M1 and M2. This type of defect is detected via a non-zero volt switching circuit or crest factor circuit after approximately 50 switching cycles in the presence of a defect condition. The adaptive control enters the defect mode when this defect is determined, and the high and low gate driver outputs are latched low. As in the case of non-ignition defects, power must be returned to the control circuit 100 to remove the defect condition. Preferably, the voltage supplied to VCC is repeated below and above the internal UVLO threshold to reset control circuit 100 back to preheat mode.

  The control circuit 100 also provides protection against situations where power is lost and dimmed, that is, under voltage conditions. During a fault condition where the main power is reduced, the DC bus voltage can decrease, causing the amplitude of the voltage available to the resonant output stage of the lamp to decrease, and the lamp 33 goes off. In this situation, the control circuit 100 adjusts the switching frequency so that ZVS is maintained. The result is that the frequency increases as the DC bus voltage decreases. Increasing frequency and decreasing voltage cause lamp power to decrease, causing lamp 33 to dim, but not extinguish. If lamp 33 goes off when the DC bus is further reduced, the frequency is shifted high enough and the VCO voltage is reduced low enough so that the preheat / ignition sweep is reset. When the AC line voltage increases again, the frequency decreases again towards resonance and the lamp 33 reignites. In this way, the control circuit 100 can open filament, lamp removal, component tolerance, main power loss, and end of lamp life (in this case, the lamp voltage increases as the lamp ages and ZVS is maintained). The circuit is continuously adapted to prevent damage to the circuit).

  Now, referring to FIG. 6, a flowchart for explaining the operation of the control circuit 100 is shown. After power is turned on in block 51, DC power is supplied to both rails of the DC bus. In block 52, the control circuit 100 enters the UVLO mode, during which time the half bridge is maintained in the OFF state and the current supplied to the electronic ballast is approximately 150 microamperes. At this point, the voltage on line VCO is zero volts and VCO 21 is off. Similarly, the voltage on line FMIN of control circuit 100 is zero volts. When the voltage on line VCC is greater than the upper threshold level for UVLO mode, 11.5 volts, the condition at block 52 is issued. When the condition in block 52 is issued, the UVLO mode ends.

  At the end of the UVLO mode, the frequency sweep mode enters block 53, during which overcurrent protection is enabled and the voltage on the line VCO begins to increase exponentially. In a preferred embodiment, the voltage on line VCO can increase linearly. During this state, the frequency output of the VCO 21 begins to ramp down (slope down) as the VCO input ramps up (slopes up), leading the half bridge to oscillation, supplying current and voltage to the load. As a result, ignition of the lamp occurs. It is during this state that preheating occurs and maximum current is supplied to the load to allow preheating and ignition. If a defect such as a lamp ignition failure occurs during this condition, the control circuit 100 enters a defect mode condition at block 55 to protect the electronic ballast circuit. Furthermore, if a undervoltage condition occurs, ie, if VCC is below the low UVLO threshold of 9.5 volts, the state of control circuit 100 returns to the UVLO mode at block 52.

  Conventional ballast circuits remain at a fixed preheat frequency during the preheat period, and then rapidly ramp up (slope upward) the switching frequency for ignition. The preheating method achieved by the control circuit 100 preheats the filaments and ignites the lamps together in a single frequency sweep. The parameters of this method are simple to program by adjusting the value of the capacitor CVCO for sufficient preheating. This novel method substantially reduces the number of connections and external components used to program the preheating action. A conventional ballast control IC includes a first isolation pin for setting the preheat time and a second isolation for programming a higher start frequency to prevent flash on the lamp during the initial start-up of the half bridge. Requires a pin, a third separation pin for programming the preheat frequency, and a fourth separation pin for programming the ignition ramp (ramp) time. The method according to the invention uses a single connection and a single passive element, which greatly simplifies the circuit, function, system price, manufacturability, control circuit dimensions, number of connections, packaging requirements. , And reduce final inspection.

  In another situation, if the lamp 33 ignites normally, the control circuit 100 enters the adaptive mode state at block 54 with a voltage on the line VCO that is greater than approximately 4.6 volts. This condition allows zero volt switching and minimum current switching to be enabled near resonant operation. In the adaptive mode state at block 54, the closed loop feedback control operates to adjust the switching frequency based on the sensed voltage on line VS. Normal adaptive driving mode continues indefinitely or until a fault is detected or a undervoltage condition occurs. If undervoltage occurs, ie, VCC falls below 9.5 volts, control circuit 100 enters the UVLO mode at block 52, shuts off the half bridge driver, and disables VCO 21. To do. In this way, if the power is turned off, the half bridge and all electronic ballasts are shut down in a controlled mode to avoid further component wear.

  If the control circuit 100 is operating in adaptive mode at block 54 and a fault occurs, the fault mode state at block 55 is entered, the half bridge driver is disabled, and the VCO 21 is shut off. This state is similar to UVLO mode, except that the state in block 55 is achieved at crest factor defect determination, or at non-zero volt switching during approximately 50 switching cycles of the low side driver output LO. It is. The state transition condition from block 54 to 55 requires that the peak voltage representing the peak current be greater than four times the average voltage representing the average current value. This determination provides a crest factor of 4 for overcurrent or inductor saturation detection. In addition, the control circuit 100 detects non-zero volt switching to determine if a defect has occurred, typically resulting in a hard switching at the half bridge. In each of the above defect condition cases, if a defect is detected during 50 switching cycles of the low side driver output LO, a defect condition is created and the control circuit 100 enters a defect mode condition at block 55. The fault mode condition at block 55 is maintained until power is returned to the control circuit 100, that is, until VCC is lowered below the UVLO threshold below 9.5 volts, at which point the control circuit 100 blocks 52. Transition to the UVLO mode state at.

  The control circuit 100 detects an open load or a defective state of the open filament by detecting a change in the operation state. During an open defect condition, the control circuit 100 detects a non-ZVS condition and attempts to increase the frequency to return ballast operation to ZVS. If there is a fault condition where the load is removed and the filament is open, the voltage on line VCO is reduced to further increase the frequency output of VCO 21. When the voltage on line VCO reaches approximately 1 volt, the maximum frequency for VCO 21 is reached. If the voltage on line VCO decreases below 1 volt, a fault condition is deemed to have occurred and control circuit 100 latches the high and low side switch control outputs HO and LO to the OFF state. This fault condition for a line VCO with a 1 volt latch-off threshold is not energized until the voltage on the line VCO first increases from zero volts to more than 4.6 volts, ie after preheating and ignition. Delaying the enabling of the fault condition threshold does not immediately latch off the high and low output HO and LO OFF due to what would otherwise be determined to be a fault condition, The control circuit 100 is allowed to start.

  The open filament defect condition is handled by the control circuit 100 after a normal start sequence. The control circuit 100 turns on and the voltage on the line VCO normally ramps up (slopes upward) from zero volts to 4.6 volts during normal preheating and ignition. If the voltage on line VCO exceeds 4.6 volts and control enters adaptive drive mode, the non-ZVS protection will cause a 1 volt fault on line VCO to latch off half-bridge outputs HO and LO. Energized to be a state threshold. At this point, the frequency output of VCO 21 will open ZVS until the voltage on line VCO is reduced below 1 volt and until the control circuit safely latches off the output to control the half bridge. Continue to increase while trying to maintain state. As described above, the time to shut down the output during an open filament defect condition is approximately equal to the preheat time plus the time to discharge the voltage on the line VCO to below 1 volt. The total time for these events is typically approximately 10 milliseconds or less. The events in the time frame described above provide a total shutdown time that is short enough to avoid damage to the half-bridge switch and ballast circuit.

  Another feature of the present invention provided in the adaptive mode of travel at block 54 is the frequency for reducing noise generated by the ballast that reduces EMI filtering on the ballast input. Dither. When the input to VCO 21 on line VCO ramps up (upslope) to 5.1 volts, the voltage on line VCO is linearly discharged by approximately 200 millivolts to approximately 4.9 volts. As the voltage on line VCO decreases below 4.9 volts, the voltage on line VCO is then linearly charged again to 5.1 volts. This slight charge and discharge of only approximately 200 millivolts of voltage on the line VCO occurs continuously during the adaptive drive mode at block 54. Charging and discharging is such that the frequency is slightly dithered by a few kilohertz. As a result, the operating frequency of the half bridge is also dithered slightly, so that the switching frequency is spread by a few kilohertz, so the resulting EMI disturbance peak at the operating frequency is low. The resulting EMI interference will then be low, which in turn will reduce or possibly eliminate external EMI filtering on the ballast input. This reduction or removal of components provides the benefits of good system operation at low cost and with a low number of components for the entire system.

  Referring now to FIG. 7, the TO220 package 70 is shown in a front view and a side view. The package 70 includes a through hole 72 used when the package 70 is attached. In one embodiment of the package 70, the mounting clip 74 also serves as a heat sink to remove heat from the circuitry contained in the package 70. The package body 75 houses the circuit portion of the hybrid electronic ballast circuit according to the present invention. The all-hybrid electronic ballast circuit is housed within the body 75, including power switches, control circuits, and passive resistance and capacitor elements that form a switching half bridge.

  As shown in FIG. 3, the hybrid ballast control 20 can be implemented with only three connections in the lighting circuit. Package 70 includes three connector pins 77A, 77B, and 77C, which are all connections used by hybrid ballast control 20. Since package 70 houses a power switch, pins 77A-77C are of sufficient dimensions to carry the high current switched by the power switch. Although a TO220 package has been described in this application, it should be clear that many other types of packages can be used to accommodate the hybrid ballast control 20 according to the present invention. For commercial purposes, the package should be easily manufactured and easily handled and should have standard dimensions and mounting parts. By using a standard package to accommodate the hybrid ballast control 20, a number of high capacity applications can be realized commercially. For example, a package containing a hybrid ballast control 20 can be supplied to a lighting facility for manufacturing in a simple and cost effective format and presents an opportunity for automated assembly as it is a standard package form To do. Alternatively, the package containing the hybrid ballast control 20 can be supplied to a CFL lamp manufacturer, for example, for incorporation into a stand-alone lamp module. The simple three connection configuration of the hybrid ballast control 20 allows straight integration into the gas discharge lighting circuit, improving manufacturability and reducing manufacturing costs.

  Although the present invention has been described with reference to particular embodiments, many other variations, modifications, and other uses will become apparent to those skilled in the art. Accordingly, the invention is preferably limited not by the specific disclosure made herein but only by the appended claims.

2 is a block diagram of electronic ballast control according to the present invention. FIG. 1 is a schematic circuit diagram of a hybrid electronic ballast according to the present invention. 1 is a circuit diagram of a lighting application incorporating an electronic ballast according to the present invention. 1 is a schematic block diagram of a hybrid electronic ballast showing undervoltage protection according to the present invention. FIG. 2 is a schematic block diagram of a hybrid electronic ballast showing frequency operation according to the present invention. FIG. 3 is a schematic block diagram of hybrid ballast control according to the present invention showing an adaptive zero minimum current switching (ZVMCS) circuit. It is a state flowchart which shows the operation | movement flow of hybrid ballast control by this invention. It is the front view and side view of TO220 package which have three connection pins.

Explanation of symbols

DESCRIPTION OF SYMBOLS 13 ... Half bridge driver 15 ... VS sensing block 17 ... Defect logic 19 ... Adaptive zero voltage and minimum current switching control 20 ... Hybrid ballast control 21 ... Voltage control oscillator 22 ・ ・ ・ Half bridge M1 ・ ・ ・ High side switch M2 ・ ・ ・ Low side switch

Claims (14)

An electronic ballast circuit in a single package for driving a fluorescent lamp,
A power switch for switching power to the fluorescent lamp;
A drive circuit for driving the power switch;
A switching control circuit coupled to the drive circuit, the switching control circuit operating the power switch by supplying a signal to the drive circuit;
A feedback circuit coupled to the drive circuit and the switching control circuit and providing control information to the switching control circuit based on an output value of the drive circuit;
A defect response circuit coupled to the switching control circuit or the drive circuit to respond to a defect detected in the electronic ballast;
The defect response circuit is operable to disable the drive circuit upon detection of a defect, and the single package has at most three external connections;
A first external connection that receives power from a power source and powers the electronic ballast circuit;
A second external connection for supplying power to the fluorescent lamp;
An electronic ballast circuit with a third external connection that connects to a common reference to provide a return power path. The electronic ballast circuit includes a switching half bridge for supplying power to the fluorescent lamp, the electronic ballast circuit comprising a half bridge driver for supplying a control signal to the half bridge;
The switching control circuit is coupled to the half bridge driver and controls the half bridge driver to provide a control signal to the half bridge driver;
The feedback circuit is coupled to the half bridge driver and the switching control circuit, and modifies the operation of the switching control circuit based on an operating value of the half bridge driver or the half bridge;
The electronic ballast circuit is coupled to the half bridge driver and the feedback circuit to disable the output of the half bridge driver based on detection of excessive current drawn by the fluorescent lamp. The electronic ballast circuit of claim 1 comprising a crest factor detector.   The electronic ballast circuit of claim 1, further comprising an input modulation control coupled to the switching control circuit to modulate the input of the switching control circuit to change a signal applied to the drive circuit between specific ranges. .   The electronic ballast circuit of claim 1, further comprising a sensing signal coupled to the power switch and the feedback circuit and operative to provide current sensing by measuring a voltage across the power switch.   The electronic ballast circuit of claim 2, further comprising a high voltage switch in the feedback circuit for sensing current in the half bridge driver.   6. The electronic ballast circuit of claim 5, further comprising a delay prior to turning on the high voltage switch associated with the low side switch of the half bridge being turned on.   The electronic ballast circuit of claim 1, wherein the defect response circuit is operable to detect a minimum switching frequency defect.   The electronic ballast circuit of claim 7, wherein the minimum switching frequency defect is detectable as a low voltage on an input to the switching control circuit. An electronic ballast circuit for a fluorescent lamp;
A single package of the electronic ballast circuit, the package comprising:
A first external connection extending to the outside of the package for receiving power from a power source and powering the electronic ballast circuit;
A second external connection extending to the outside of the package for supplying power to the fluorescent lamp;
An electronic device comprising a third external connection extending to the outside of the package for connecting to a common reference to provide a return power path and no other external terminals.   The electronic ballast circuit of claim 9, wherein the single package is a TO220 package having three electrical connections. An electronic ballast circuit in a single package for driving a fluorescent lamp,
A power switch for switching power to the fluorescent lamp;
A drive circuit for driving the power switch;
A switching control circuit coupled to the drive circuit, the switching control circuit operating the power switch by supplying a signal to the drive circuit;
A feedback circuit coupled to the drive circuit and the switching control circuit and providing control information to the switching control circuit based on an output value of the drive circuit;
A defect response circuit coupled to the switching control circuit or the drive circuit to respond to a defect detected in the electronic ballast;
The defect response circuit is operable to disable the drive circuit upon detection of a defect, and the single package has at most three external connections;
A first external connection that receives power from a power source and powers the electronic ballast circuit;
A second external connection for supplying power to the fluorescent lamp;
A third external connection connecting to a common reference to provide a return power path,
An electronic ballast circuit, wherein the switching control circuit is connected to a capacitor used to program sufficient preheating of the filament of the fluorescent lamp. An electronic ballast circuit for a fluorescent lamp;
A single package of the electronic ballast circuit, the package comprising:
A switching control circuit connected to a capacitor used to program sufficient preheating of the filament of the fluorescent lamp;
A first external connection extending to the outside of the package for receiving power from a power source and powering the electronic ballast circuit;
A second external connection extending to the outside of the package for supplying power to the fluorescent lamp;
An electronic device comprising a third external connection extending to the outside of the package for connecting to a common reference to provide a return power path and no other external terminals.   The electronic ballast circuit of claim 1, wherein the switching control circuit is connected to a capacitor used to program sufficient preheating of the filament of the fluorescent lamp.   10. The electronic device according to claim 9, wherein the package comprises a capacitor used to program sufficient preheating of the filament of the fluorescent lamp.

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