JP2008153365A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an optimum processing method for swiftly recovering a plasma processor to a state that it is available for manufacturing a semiconductor device after maintenance without using a special wafer or the like. <P>SOLUTION: After such the maintenance as to clean a part, a reaction product obtained by etching a part (crude material part) constituting a processing chamber of the plasma processor is attached to another part (coating part) to form a depositional film before a product wafer is processed, and processing of stabilizing the formed depositional film is applied, thereby coating the coating part with a compound film made of a material of the crude material part. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device manufacturing technique, and more particularly to a technique effective when applied to the manufacture of a semiconductor device using a plasma processing apparatus.

  In JP 2004-235349 A (Patent Document 1), a dummy substrate (dummy wafer) is used to repeat an etching process (dummy process) that simulates an actual product process, and sensor data attached to the apparatus is used. A method of diagnosing that the processing state has returned to the state before maintenance is disclosed.

  Japanese Patent Laying-Open No. 2004-39935 (Patent Document 2) discloses that seasoning after maintenance is performed by processing about 50 dummy substrates under the same process conditions as the actual process.

Japanese Patent Laid-Open No. 2004-31380 (Patent Document 3) discloses a method of stabilizing the process performance by coating the surface of a quartz part with aluminum fluoride (AlF) by etching an aluminum wafer after maintenance. Yes.
JP 2004-235349 A JP 2004-39935 A JP 2004-31380 A

  In a semiconductor manufacturing line for forming a semiconductor device on a wafer, a dry processing process for processing a wafer by a plasma processing apparatus is frequently used. Plasma processing includes, for example, plasma etching in which a pattern is formed by scraping a thin film on a wafer with ions or radicals (active reactive species) in the plasma. When wafers are repeatedly etched using a plasma etching system, gas dissociated in the plasma and reaction products released by chemical reactions on the wafer adhere to the components that make up the plasma processing chamber and the wafer transport path. As a result, the deposited film grows. When this deposited film grows, the deposited film easily peels off, and the peeled deposited film becomes a foreign substance. When the foreign matter falls on the wafer, the processing is hindered.

  In order to prevent this, plasma cleaning using plasma having a property of removing a deposited film is performed. If the deposited film can be easily removed by plasma cleaning such as silicon or fluorocarbon, the deposited film can be removed by plasma cleaning. For example, silicon-based deposits can be removed by fluorine-based plasma.

  However, not all deposited films can be completely removed by plasma cleaning, and the deposited films often grow gradually. Typical examples that are difficult to remove by plasma cleaning are aluminum fluoride (AlF) and yttrium fluoride (YF). Aluminum fluoride and yttrium fluoride have low saturation vapor pressure and high binding energy between Al atoms, Y atoms, and F atoms, and are difficult to remove due to the chemical reaction of plasma. It is. In a plasma etching apparatus or the like used to process a gate electrode, when aluminum or yttrium is contained in a part constituting the plasma processing chamber, the part is scraped by the plasma and aluminum or yttrium is released into the plasma. . Aluminum fluoride or yttrium fluoride is generated when fluorine plasma is used for plasma cleaning of silicon. Examples of the parts containing aluminum or yttrium include a processing chamber side wall, a ground, a sample stage, and an electrostatic chuck for adsorbing a wafer.

  For this reason, after performing plasma discharge for a certain period of time or processing a certain number of wafers or more, maintenance is performed to open the plasma processing chamber and clean the components constituting the processing chamber. A flow of processing in a general apparatus is shown in FIG. As shown in FIG. 8, for maintenance, a chamber (processing chamber) placed under a low pressure is opened to the atmosphere (S1001), and parts are taken out and cleaned (S1002). Cleaning of parts at the time of maintenance involves attaching the deposited film to the solution to chemically remove it or physically wiping it off. In the cleaning process of parts, the deposited film is thoroughly removed using a cleaning solution such as water, alcohol or dilute hydrofluoric acid solution. When the component cleaning process is completed, the cleaned component or the clean replacement component is returned to the plasma processing chamber and the processing chamber is reassembled (S1003). And it returns to the gas pressure suitable for maintaining plasma (S1004), and it returns to the state which can restart plasma processing.

  However, in recent years when the processing accuracy required for plasma processing apparatuses has increased, there is a problem that when the wafer processing is resumed after maintenance, the same processing result is not obtained even under the same processing conditions as before maintenance. In particular, in a plasma etching apparatus for processing a gate electrode, the gate processing dimension of a transistor has to be adjusted to a target value with a variation of several nanometers, so that a change in processing dimension before and after maintenance is a serious problem.

  In order to eliminate such a difference in processing state before and after maintenance, a method has been implemented in which dummy processing called seasoning processing is repeatedly performed after maintenance to return the processing state to the state before maintenance. FIG. 8 also shows a procedure for performing seasoning before processing a product wafer (S1005). FIG. 9 shows a trend of variation in processing dimensions in a plasma etching apparatus for processing a gate electrode. As shown in FIG. 9, since the processing dimension largely fluctuates after the maintenance, the seasoning process is performed after the maintenance as described above. This seasoning process stabilizes the processing dimensions. The seasoning process is continued while confirming the processing dimension by the dimension inspection, and the product process can be started when the dimension inspection value becomes smaller than the upper limit of the product standard value. At this point, the seasoning process ends. For example, in FIG. 9, until the maintenance start time 100, the processing dimension of the plasma etching apparatus is between the processing dimension standard upper limit value 104 and the processing dimension standard lower limit value 103. Immediately after the maintenance end point 101 after the maintenance period 105 for cleaning the parts, the processing dimension of the plasma etching apparatus greatly exceeds the processing dimension standard upper limit 104. Therefore, the seasoning process is performed after the maintenance. By performing this seasoning process, the processing dimension approaches the standard range. Then, the seasoning process is performed until the processing dimension falls within the standard range. In FIG. 9, a seasoning processing period 106 is shown. The product processing period 107 is started from the product processing start time point 102 when the seasoning processing period 106 elapses and the machining dimension falls within the standard range. That is, the product wafer is processed (S1006). For example, plasma cleaning is performed every time one wafer is processed or each lot of wafers is processed (S1007). Even if the plasma cleaning is performed, if the wafer processing is repeated, the inside of the chamber becomes dirty, so that the next maintenance is required, and the above procedure is repeated (S1008). The timing for performing maintenance is determined by the number of processed wafers, the discharge time during which plasma is discharged, the count of the number of foreign matters, and the like.

  The cause of the fluctuation in the plasma processing result before and after the maintenance is that the surface state of each component in the processing chamber is changed by the cleaning in the maintenance. In fact, if the surface state of the processing chamber wall changes, the surface reaction of radicals changes, and the reaction products generated there change, resulting in changes in the state of radicals in the plasma, affecting the plasma treatment. Etc. are also known.

  In the methods disclosed in Patent Document 1 and Patent Document 2 that process dummy wafers as seasoning processing, it is necessary to process several hundred or more dummy wafers before the process state returns to the state before maintenance. Takes a long time. Since the plasma processing apparatus cannot be used for product production during the seasoning process, production efficiency decreases.

  Patent Document 1 further discloses a method of shortening the seasoning process by using an oxide film wafer (SiO wafer), but this is reported as an effective method for reducing metal contamination. A shortening method for suppressing performance fluctuations is not disclosed.

  Patent Document 3 discloses a method of completing a seasoning process in a very short time by etching a wafer made of aluminum. However, since aluminum is used in the wiring layer in normal semiconductor mass production lines, an AlCu film mixed with copper (Cu) is used to optimize its electrical characteristics, and it is fundamental to obtain a pure aluminum film. I can't do it. On the other hand, when an aluminum film mixed with copper is etched by a gate etching apparatus at the front end of a complementary metal oxide semiconductor (CMOS), a major obstacle such as shortening the life of the device occurs due to copper contamination. That is, in the method of etching a wafer made of aluminum for each maintenance, a wafer on which a pure aluminum film is formed only for seasoning processing must be prepared and maintained. Since this increases the manufacturing cost, it is practically difficult to implement.

  An object of the present invention is to provide an optimum processing method for recovering a plasma processing apparatus to a state usable for manufacturing a semiconductor device immediately after maintenance without using a special wafer or the like.

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

  The method of manufacturing a semiconductor device according to the present invention includes: (a) a step of cleaning a part constituting the processing chamber of the plasma processing apparatus and performing maintenance; and (b) a step of configuring the processing chamber after the step (a). Etching the first part, and forming a film having a material contained in the first part on a surface of the second part constituting the processing chamber.

  Among the inventions disclosed in the present application, effects obtained by typical ones will be briefly described as follows.

  The first part constituting the chamber of the plasma processing apparatus is etched during maintenance, and the reaction product generated there is adhered to the surface of the second part and stabilized, so that the surface condition of the second part is maintained during part cleaning during maintenance. It is possible to prevent process variations due to the result of exposure. By this process, the surface state in the chamber can be brought into a state suitable for manufacturing in a short time, and the product process can be started early, so that the throughput of the plasma processing apparatus is improved.

  In the following embodiments, when it is necessary for the sake of convenience, the description will be divided into a plurality of sections or embodiments. However, unless otherwise specified, they are not irrelevant to each other. There are some or all of the modifications, details, supplementary explanations, and the like.

  Further, in the following embodiments, when referring to the number of elements (including the number, numerical value, quantity, range, etc.), especially when clearly indicated and when clearly limited to a specific number in principle, etc. Except, it is not limited to the specific number, and may be more or less than the specific number.

  Further, in the following embodiments, the constituent elements (including element steps and the like) are not necessarily indispensable unless otherwise specified and apparently essential in principle. Needless to say.

  Similarly, in the following embodiments, when referring to the shape, positional relationship, etc., of components, etc., unless otherwise specified, and in principle, it is considered that this is not clearly the case, it is substantially the same. Including those that are approximate or similar to the shape. The same applies to the above numerical values and ranges.

  In all the drawings for explaining the embodiments, the same members are denoted by the same reference symbols in principle, and the repeated explanation thereof is omitted. In order to make the drawings easy to understand, even a plan view may be hatched.

(Embodiment 1)
A method for manufacturing a semiconductor device according to the first embodiment will be described with reference to the drawings. The first embodiment relates to a plasma processing apparatus. First, as an example of a manufacturing process of a semiconductor device, a manufacturing process of a CMISFET (Complementary Metal Insulator Semiconductor Field Effect Transistor) will be briefly described with reference to FIG. . FIG. 1 is a flowchart showing a manufacturing process of a CMISFET.

  First, a semiconductor substrate made of a silicon single crystal into which a p-type impurity such as boron (B) is introduced is prepared. At this time, the semiconductor substrate is in a state of a substantially wafer-shaped semiconductor wafer. Then, an element isolation region for isolating elements is formed in the CMISFET formation region of the semiconductor substrate (S101). The element isolation region is provided so that the elements do not interfere with each other. This element isolation region can be formed by using, for example, a LOCOS (local Oxidation of silicon) method or an STI (shallow trench isolation) method. For example, in the STI method, the element isolation region is formed as follows. In other words, the element isolation trench is formed in the semiconductor substrate using the photolithography technique and the etching technique. Then, a silicon oxide film is formed on the semiconductor substrate so as to fill the element isolation trench, and then an unnecessary silicon oxide film formed on the semiconductor substrate is formed by chemical mechanical polishing (CMP). Remove. Thereby, an element isolation region in which the silicon oxide film is embedded only in the element isolation trench can be formed.

  Next, a well is formed by introducing impurities into the active region isolated in the element isolation region (S102). For example, a p-type well is formed in an n-channel MISFET formation region in the active region, and an n-type well is formed in a p-channel MISFET formation region. The p-type well is formed by introducing a p-type impurity such as boron into the semiconductor substrate by ion implantation. Similarly, the n-type well is formed by introducing an n-type impurity such as phosphorus (P) or arsenic (As) into the semiconductor substrate by ion implantation.

  Subsequently, a semiconductor region for channel formation (not shown) is formed in the surface region of the p-type well and the surface region of the n-type well. This channel forming semiconductor region is formed to adjust the threshold voltage for forming the channel.

Next, a gate insulating film is formed on the semiconductor substrate (S103). The gate insulating film is formed of, for example, a silicon oxide film, and can be formed using, for example, a thermal oxidation method. However, the gate insulating film is not limited to the silicon oxide film and can be variously changed. For example, the gate insulating film may be a silicon oxynitride film (SiON). That is, a structure in which nitrogen is segregated at the interface between the gate insulating film and the semiconductor substrate may be employed. The silicon oxynitride film has a higher effect of suppressing generation of interface states in the film and reducing electron traps than the silicon oxide film. Therefore, the hot carrier resistance of the gate insulating film can be improved, and the insulation resistance can be improved. In addition, the silicon oxynitride film is less likely to penetrate impurities than the silicon oxide film. Therefore, by using a silicon oxynitride film for the gate insulating film, variation in threshold voltage due to diffusion of impurities in the gate electrode toward the semiconductor substrate can be suppressed. For example, the silicon oxynitride film may be formed by heat-treating the semiconductor substrate in an atmosphere containing nitrogen such as NO, NO _2, or NH ₃ . Alternatively, after forming a gate insulating film made of a silicon oxide film on the surface of the semiconductor substrate, the semiconductor substrate is heat-treated in an atmosphere containing nitrogen, and nitrogen is segregated at the interface between the gate insulating film and the semiconductor substrate. The effect of can be obtained.

  Further, the gate insulating film may be formed of a high dielectric constant film having a dielectric constant higher than that of a silicon oxide film, for example. Conventionally, a silicon oxide film has been used as a gate insulating film from the viewpoint of high insulation resistance and excellent electrical and physical stability at the silicon-silicon oxide interface. However, with the miniaturization of elements, the thickness of the gate insulating film is required to be extremely thin. When such a thin silicon oxide film is used as the gate insulating film, a so-called tunnel current is generated in which electrons flowing through the channel of the MISFET tunnel through the barrier formed by the silicon oxide film and flow to the gate electrode.

  Therefore, by using a material having a dielectric constant higher than that of the silicon oxide film, a high dielectric film capable of increasing the physical film thickness even with the same capacitance has been used. According to the high dielectric film, since the physical film thickness can be increased even if the capacitance is the same, the leakage current can be reduced.

For example, a hafnium oxide film (HfO ₂ film), which is one of hafnium oxides, is used as the high dielectric film. Instead of the hafnium oxide film, a hafnium aluminate film, an HfON film (hafnium oxynitride film) is used. ), HfSiO films (hafnium silicate films), HfSiON films (hafnium silicon oxynitride films), HfAlO films, and other hafnium-based insulating films can also be used. Further, a hafnium-based insulating film in which an oxide such as tantalum oxide, niobium oxide, titanium oxide, zirconium oxide, lanthanum oxide, or yttrium oxide is introduced into these hafnium-based insulating films can also be used. Since the hafnium-based insulating film has a dielectric constant higher than that of the silicon oxide film or the silicon oxynitride film, like the hafnium oxide film, the same effect as that obtained when the hafnium oxide film is used can be obtained.

  Subsequently, a polysilicon film is formed on the gate insulating film. The polysilicon film can be formed using, for example, a CVD method. Then, n-type impurities such as phosphorus and arsenic are introduced into the polysilicon film formed in the n-channel type MISFET formation region by using a photolithography technique and an ion implantation method. Similarly, a p-type impurity such as boron is introduced into the polysilicon film formed in the p-channel MISFET formation region.

  Next, the polysilicon film is processed by etching using the patterned resist film as a mask to form a gate electrode in the n-channel MISFET formation region and a gate electrode in the p-channel MISFET formation region (S104).

  Here, an n-type impurity is introduced into the polysilicon film at the gate electrode in the n-channel MISFET formation region. Therefore, the work function value of the gate electrode can be set to a value in the vicinity of the conduction band of silicon (4.15 eV), so that the threshold voltage of the n-channel MISFET can be reduced. On the other hand, a p-type impurity is introduced into the polysilicon film at the gate electrode in the p-channel MISFET formation region. Therefore, the work function value of the gate electrode can be set to a value in the vicinity of the valence band of silicon (5.15 eV), so that the threshold voltage of the p-channel MISFET can be reduced. Thus, in the first embodiment, the threshold voltage can be reduced in both the n-channel MISFET and the p-channel MISFET (dual gate structure).

  Subsequently, a shallow n-type impurity diffusion region aligned with the gate electrode of the n-channel MISFET is formed by using a photolithography technique and an ion implantation method. The shallow n-type impurity diffusion region is a semiconductor region. Similarly, a shallow p-type impurity diffusion region is formed in the p-channel type MISFET formation region. The shallow p-type impurity diffusion region is formed in alignment with the gate electrode of the p-channel type MISFET. This shallow p-type impurity diffusion region can be formed by using a photolithography technique and an ion implantation method (S105).

  Next, a silicon oxide film is formed over the semiconductor substrate. The silicon oxide film can be formed using, for example, a CVD method. Then, the silicon oxide film is anisotropically etched to form side walls on the side walls of the gate electrode (S106). The sidewall is formed from a single layer film of a silicon oxide film. However, the present invention is not limited to this. For example, a sidewall formed of a laminated film of a silicon nitride film and a silicon oxide film may be formed.

  Subsequently, by using a photolithography technique and an ion implantation method, a deep n-type impurity diffusion region aligned with the sidewall is formed in the n-channel MISFET formation region (S107). The deep n-type impurity diffusion region is a semiconductor region. A source region is formed by the deep n-type impurity diffusion region and the shallow n-type impurity diffusion region. Similarly, a drain region is formed by a deep n-type impurity diffusion region and a shallow n-type impurity diffusion region. By forming the source region and the drain region with the shallow n-type impurity diffusion region and the deep n-type impurity diffusion region in this way, the source region and the drain region can have an LDD (Lightly Doped Drain) structure.

  Similarly, a deep p-type impurity diffusion region aligned with the sidewall is formed in the p-channel type MISFET formation region. A source region and a drain region are formed by the deep p-type impurity diffusion region and the shallow p-type impurity diffusion region. Therefore, the source region and the drain region also have an LDD structure in the p-channel type MISFET.

  After forming the deep n-type impurity diffusion region and the deep p-type impurity diffusion region in this way, a heat treatment at about 1000 ° C. is performed. Thereby, the introduced impurities are activated.

  Thereafter, a cobalt film is formed on the semiconductor substrate. At this time, a cobalt film is formed so as to be in direct contact with the gate electrode. Similarly, the cobalt film is also in direct contact with the deep n-type impurity diffusion region and the deep p-type impurity diffusion region.

  The cobalt film can be formed using, for example, a sputtering method. Then, after the cobalt film is formed, heat treatment is performed to cause the polysilicon film constituting the gate electrode to react with the cobalt film, thereby forming a cobalt silicide film (S108). As a result, the gate electrode has a laminated structure of the polysilicon film and the cobalt silicide film. The cobalt silicide film is formed to reduce the resistance of the gate electrode. Similarly, by the heat treatment described above, the silicon silicide film reacts with the surface of the deep n-type impurity diffusion region and the deep p-type impurity diffusion region to form a cobalt silicide film. Therefore, the resistance can be reduced also in the deep n-type impurity diffusion region and the deep p-type impurity diffusion region.

  Then, the unreacted cobalt film is removed from the semiconductor substrate. In the first embodiment, the cobalt silicide film is formed. However, for example, a nickel silicide film or a titanium silicide film may be formed instead of the cobalt silicide film.

  Next, a silicon oxide film to be an interlayer insulating film is formed on the main surface of the semiconductor substrate (S109). This silicon oxide film can be formed using, for example, a CVD method using TEOS (tetraethyl orthosilicate) as a raw material. Thereafter, the surface of the silicon oxide film is planarized using, for example, a CMP (Chemical Mechanical Polishing) method.

  Subsequently, contact holes are formed in the silicon oxide film by using a photolithography technique and an etching technique. Then, a titanium / titanium nitride film is formed on the silicon oxide film including the bottom surface and inner wall of the contact hole. The titanium / titanium nitride film is composed of a laminated film of a titanium film and a titanium nitride film, and can be formed by using, for example, a sputtering method. This titanium / titanium nitride film has a so-called barrier property that prevents, for example, tungsten, which is a material of a film to be embedded in a later process, from diffusing into silicon.

  Subsequently, a tungsten film is formed on the entire main surface of the semiconductor substrate so as to fill the contact hole. This tungsten film can be formed using, for example, a CVD method. Then, by removing the unnecessary titanium / titanium nitride film and tungsten film formed on the silicon oxide film by, for example, CMP, a plug can be formed (S110).

  Next, a titanium / titanium nitride film, an aluminum film containing copper, and a titanium / titanium nitride film are sequentially formed on the silicon oxide film and the plug. These films can be formed by using, for example, a sputtering method. Subsequently, these films are patterned by using a photolithography technique and an etching technique to form wiring (S111). Furthermore, although wiring is formed in the upper layer of wiring, description here is abbreviate | omitted. In this manner, the semiconductor device according to the first embodiment can be formed.

  Etching techniques are frequently used in various manufacturing processes of the semiconductor device described above. This etching is performed using, for example, a plasma etching apparatus. For example, a plasma etching apparatus is used in the step of forming a gate electrode by etching a polysilicon film. In particular, in the gate electrode formation process, the gate processing dimension of the transistor has to be adjusted to the target value with a variation of several nanometers, so that the processing accuracy required for the plasma etching apparatus is very high. The configuration of the plasma etching apparatus will be described below.

  FIG. 2 shows the structure of a plasma etching apparatus as an example of a manufacturing apparatus suitable for carrying out the semiconductor device manufacturing method of the present invention. In the plasma etching apparatus shown in FIG. 2, the electromagnetic wave introduced from the electromagnetic wave introduction port 1 passes through the top plate 6 and the shower plate 5 and enters the processing chamber 13. On the other hand, the processing gas used for etching is introduced from the processing gas supply port 2 and flows into the processing chamber 13 from the gas ejection port 9 provided in the shower plate 5. The inside of the processing chamber 13 is maintained at a low pressure by an exhaust pump and a pressure valve (not shown).

  A wafer 12 is placed on the sample table 10 by an electrostatic chuck 11. The electromagnetic waves incident on the processing chamber 13 turn the processing gas into plasma, and ions and radicals in the generated plasma are incident on the wafer to perform plasma processing on the wafer. An inner cylinder 4 is installed in the processing chamber 13 for facilitating component cleaning during maintenance, and an earth 3 is also installed for grounding the plasma. The housing 8 and the electromagnetic wave shield 7 for containing the electromagnetic waves are made of a metal material such as SUS. Further, the top plate 6 and the shower plate 5 through which electromagnetic waves pass are often made of a dielectric such as quartz. The inner cylinder 4 can be made of various materials, and organic materials, silicon carbide, quartz, and the like are used. Since it is necessary to use a conductor material for the ground 3, an aluminum member anodized on an aluminum member or the like is used. In many cases, high-frequency bias power is applied to the sample stage 10 in order to process a semiconductor device. As a material for the sample stage 10, ceramic parts such as alumina, quartz, or the like is used. A ceramic material such as alumina is often used for the electrostatic chuck 11.

  The plasma etching apparatus configured as described above processes the film formed on the wafer (semiconductor substrate). That is, the processing gas is converted into plasma by the electromagnetic wave incident on the processing chamber 13, and ions and radicals in the generated plasma are incident on the wafer and the wafer is etched. Thereby, for example, a polysilicon film is processed to form a gate electrode.

  When the wafer is repeatedly processed by the plasma etching apparatus as shown in FIG. 2, the components obtained by decomposing the processing gas in the plasma and the components scraped from the wafer constitute the processing chamber 13 such as the inner cylinder 4 and the shower plate 5. A deposited film is formed on the surface of the component. Therefore, after the wafer processing, the deposited film is removed by plasma cleaning, and then the next wafer processing is performed. However, there are places where it is difficult to remove the deposited film by plasma cleaning, and the deposited film grows when wafer processing is repeated in such a place. When the deposited film becomes thick, the deposited film is peeled off and becomes a foreign substance. For this reason, maintenance is carried out before foreign matter is generated due to the deposited film.

  Hereinafter, a maintenance method for the plasma etching apparatus according to the first embodiment will be described. FIG. 3 is a flowchart showing processing of the maintenance method for the plasma etching apparatus according to the first embodiment. The maintenance method in the first embodiment will be described with reference to this flowchart.

  If it is determined that the maintenance time has come based on the number of processed wafers, the discharge time during which plasma is discharged, or the number of foreign objects (S208), the processing chamber 13 is opened to the atmosphere (S201). Then, components constituting the processing chamber 13, such as the inner cylinder 4 and the shower plate 5, are taken out and cleaned (S202). There are various ways of cleaning, soak the part in dilute hydrofluoric acid solution, or wipe the part with water, alcohol, acetone, etc. When the cleaning of the part is completed, the part is returned after being baked to dry the part and the plasma etching apparatus is assembled (S203). Thereafter, the processing chamber 13 is evacuated to exhaust the atmosphere in the processing chamber 13 (S204). In this process, water adhering to the parts constituting the processing chamber 13 and various substances used for cleaning are volatilized and removed, and the plasma etching apparatus is ready to discharge plasma.

  In the present invention, when the plasma can be discharged, a compound composed of the material of the part A is transferred from one part (first part) A to another part (second part) B in the processing chamber 13. A process of transferring (S205) is provided. This processing step will be referred to as an inter-part material transfer processing step. When the inter-part material transfer processing step is completed, the processing dimension of the plasma etching apparatus comes within the standard range, so that the processing of the product wafer (S206) can be started. When the processing of the product wafer is completed, plasma cleaning in the processing chamber 13 is performed (S207). Until the maintenance time comes, product wafer processing and plasma cleaning are repeated. Thereafter, even if plasma cleaning is performed, if the wafer processing is repeated, the inside of the chamber becomes dirty, so that the next maintenance is necessary, and the above procedure is repeated (S208).

  Next, the inter-part material transfer processing step that is one of the features of the first embodiment will be described. As described above, since the part A is a part including the material transferred to the part B, it is hereinafter referred to as a raw material part. The part B is called a coated part because it is covered with the compound of the material contained in the raw material part. In the inter-part material transfer process, plasma discharge is performed under conditions that facilitate etching of the raw material parts, and the etching reaction product generated by this etching reaction is adhered to the surface of the coated part. For this reason, the plasma discharge is preferably performed under conditions where the raw material parts are easily cut but the coated parts are hard to cut. For this purpose, it is preferable to perform the discharge under such a condition that the plasma density near the raw material parts becomes high. In order to adjust the distribution of plasma density, electric power, pressure, or the like may be used. When a magnetic field can be applied to the process chamber, it may be adjusted according to the magnetic field conditions. Further, when the raw material component is a metal material and the coated component is a non-metallic material, it is preferable to adjust the high frequency bias power applied to the sample stage 10 to promote the etching of the raw material component. The raw material component is, for example, the ground 3 in the plasma etching apparatus shown in FIG. 2, and the covering component is, for example, the inner cylinder 4 or the shower plate 5 in FIG. The most typical material configuration is when the raw material component is a component containing aluminum or yttrium and the coated component is quartz. In this case, a deposited film made of a compound of aluminum or yttrium removed from the raw material component is formed on the surface of the quartz component that is the coated component by the inter-component material transfer process, and the surface of the quartz component is exposed to plasma during maintenance. Variations in the machining state caused by the above are eliminated.

  Usually, it is known that when maintenance such as cleaning of parts of the plasma etching apparatus is completed, the processing dimensions of the plasma etching apparatus change significantly before and after the maintenance. The cause of the variation of the processing dimension before and after the maintenance is that the surface state of each part in the processing chamber is changed by the cleaning in the maintenance. In fact, if the surface state of the processing chamber wall changes, the surface reaction of radicals changes, and the reaction products generated there change, resulting in changes in the state of radicals in the plasma, affecting the plasma treatment. Etc. are also known. In other words, in order to prevent the generation of foreign substances, cleaning is performed to remove the film deposited on the parts in the processing chamber. However, if cleaning is performed, all the films attached to the parts are removed. The state changes. For example, although quartz is used as a material for parts constituting the processing chamber, when a product wafer is processed, it is performed in a state where a certain amount of film is already attached to the quartz part of the plasma etching apparatus. Accordingly, the surface condition is different between the quartz part at the stage of processing the product wafer and the quartz part at the stage of cleaning by maintenance.

  Since quartz is exposed on the surface of the quartz part that has been cleaned by maintenance, the quartz is removed by etching with plasma. Since quartz is formed of silicon oxide, oxygen is released as a reaction product when the quartz is plasma-etched. Since oxygen has the property of significantly changing the etching characteristics, the processing dimensions of the plasma etching apparatus tend to fluctuate.

  From the above, for example, when a film attached to a component such as a quartz component exceeds a certain thickness, the film is peeled off and foreign matter is generated. Therefore, it is necessary to remove the film. On the other hand, if all the films attached to the parts are removed by cleaning by maintenance, the surface state changes, the processing dimensions of the plasma etching apparatus vary, and the processing dimensions deviate from the standard value range.

  Here, in order to eliminate the difference between the processing states before and after the maintenance, a method is performed in which a dummy process called a seasoning process is repeatedly performed after the maintenance to return the processing state to the state before the maintenance. However, in the technique of processing dummy wafers as seasoning processing, it is necessary to process several hundred or more dummy wafers before the process state returns to the state before maintenance, and it takes a very long time. During this seasoning process, the plasma etching apparatus cannot be used for production of products, and there is a problem that production efficiency is lowered. Further, there is a method of stabilizing the process performance by coating the surface of the quartz part with aluminum fluoride (AlF) by etching the aluminum wafer after maintenance. However, since aluminum is used in the wiring layer in normal semiconductor mass production lines, an AlCu film mixed with copper (Cu) is used to optimize its electrical characteristics, and it is fundamental to obtain a pure aluminum film. I can't do it. On the other hand, when an aluminum film mixed with copper is etched by a gate etching apparatus, a major obstacle such as shortening the life of the device occurs due to copper contamination. That is, in the method of etching a wafer made of aluminum for each maintenance, a wafer on which a pure aluminum film is formed only for seasoning processing must be prepared and maintained. Since this increases the manufacturing cost, it is practically difficult to implement.

  Therefore, the first embodiment provides an optimal processing method for quickly recovering a usable state for manufacturing a semiconductor device after maintenance of the plasma etching apparatus without using a special wafer or the like. Specifically, in the first embodiment, an inter-part material transfer processing step is provided. In the inter-part material transfer process, the raw material parts (first parts) constituting the plasma etching apparatus are plasma etched after maintenance such as cleaning and before processing the product wafer. And the etching reaction product produced | generated by this etching reaction is made to adhere to the surface of a coating | coated component (2nd component) intentionally. By this inter-part material transfer processing step, the surface of the coated part is covered with a film made of an etching reaction product, so that the surface of the coated part can be prevented from being exposed. Therefore, by performing the inter-part material transfer process step without the need for the seasoning process, the product wafer can be quickly recovered after maintenance of the plasma etching apparatus. That is, the processing dimension of the plasma etching apparatus can be set within a specified value range. For this reason, the throughput of the plasma etching apparatus can be improved.

  In the first embodiment, there are a raw material part and a covering part as components of the plasma etching apparatus. In both the raw material part and the coated part, the film formed on the surface is removed by cleaning in maintenance. For this reason, a surface state changes in both a raw material component and a covering component. Since the coated part is covered with an etching reactive organism generated by plasma etching the raw material part, it is possible to suppress variation in the processing dimension due to the exposed surface of the coated part. On the other hand, the surface of the raw material part is exposed, but even if the surface of the raw material part is exposed, it does not affect the variation of the processing dimension. In other words, the components of the plasma etching apparatus include coated parts that affect the etching process dimensions when the surface condition changes due to cleaning, and raw material parts that do not affect the etching process dimensions even if the surface condition changes due to cleaning. There is. By distinguishing between the raw material parts and the covered parts, the inter-part material transfer process step can be effectively carried out. That is, by coating the coated part with an etching reaction product generated by plasma etching of the raw material part, it is possible to suppress variation in the processing dimension.

  The raw material component is, for example, the ground 3 shown in FIG. 2, and the covering component is, for example, the inner cylinder 4 and the shower plate 5 shown in FIG. More specifically, the material part is, for example, a part containing aluminum or yttrium, and the coated part is, for example, a part containing quartz.

(Embodiment 2)
In the second embodiment, a specific example of the inter-part material transfer process described in the first embodiment will be described. FIG. 4 is a flowchart showing the flow of the inter-part material transfer process in the second embodiment. Parts constituting a processing chamber (plasma chamber) of a plasma etching apparatus are generally made of a material that is not easily scraped by plasma. For this reason, it is not easy to form a compound deposition film made of the material of the raw material part on the surface of the coated part. For this reason, the inter-component material transfer processing step may be started from the raw material component surface protective film removing step S301 for removing the surface protective film of the raw material component. For example, when the raw material component is an aluminum member, a protective film called anodized is often formed on the surface. Since anodized is a porous material with columnar holes, if it is struck for a while with ions in the plasma, the underlying aluminum material will be easily scraped off. When the raw material component can be etched without providing the raw material component surface protective film removing step S301, the raw material component surface protective film removing step S301 need not be provided.

  Next, a raw material part etching step S302 for plasma etching the raw material parts is performed, and reaction products released from the raw material parts as a result of this etching reaction are deposited on the surface of the coated part. The film deposited on the surface of the coated part is called an adhesion product. Then, it is good to implement adhesion product stabilization process S303 which stabilizes an adhesion product by a chemical reaction, and does not peel. For example, when the raw material component contains aluminum or yttrium and the adhered product is an aluminum compound or yttrium compound, plasma discharge using a gas containing fluorine atoms is performed in the adhered product stabilization step S303. This promotes fluorination of the deposited product. By this treatment, when aluminum fluoride or yttrium fluoride is used, a very strong and stable film can be formed on the surface of the coated component. Alternatively, a strong film can be formed even when an attached product is oxidized by plasma discharge using a gas containing oxygen atoms to form an aluminum oxide film or an yttria film.

  When the raw material component is an aluminum member (for example, earth) covered with a protective film called anodized, the raw material component surface protective film removal step S301 and the raw material component etching step S302 described above are separate steps. On the other hand, when the raw material component is an aluminum member covered with a protective film called yttria, yttrium contained in yttria becomes the material of the raw material component. Therefore, the raw material component surface protective film removing step S301 is performed in the raw material component etching step S302. It becomes.

  In order to strengthen the deposited film on the surface of the coated part, as shown in FIG. 4, this sequence may be repeated many times (N times) to gradually grow the film of the deposited product (S304). If an adhering product stabilization step S303 such as fluorination or oxidation is carried out after adhering too much reaction product, the inside of the adhering product is not sufficiently fluorinated or oxidized, and the film becomes weak and plasma discharge occurs. It becomes easy to cut with. This repetition may be repeated several tens to several hundreds or more. The number of repetitions may be empirically set to a constant value, or may be changed as appropriate while interposing an inspection as to whether the processing dimensions are stable.

  In order to etch the raw material component as described here, a voltage is applied to the raw material component so that high-frequency power passes through the raw material component, and by this voltage, ions in the plasma are accelerated incident on the raw material component, It is convenient to have a structure that strikes the surface of the raw material part. In order for the high-frequency power to pass through the raw material component, the raw material component is preferably a conductor, or the surface of the conductor is covered with a thin insulating film. For example, if the raw material part is an aluminum part, an alumite-coated aluminum part, or a yttria-coated conductor part, etching is easy and effective. On the other hand, the coated component may have a structure in which high-frequency power is difficult to pass through because a film of a grown adhesion product is removed when high-frequency power is applied.

  The raw material component surface protective film removing step S301 is performed by, for example, discharge using plasma of halogen or hydrogen halide. For example, chlorine plasma, hydrogen bromide (HBr) plasma, hydrogen chloride (HCl) plasma, or a plasma of a mixed gas thereof is used. At this time, high frequency bias power applied to the sample stage 10 is applied. The higher the high frequency bias is, the better it is within the capability of the plasma etching apparatus. Although a wafer may be placed on the sample stage 10, the silicon film produced by etching the wafer mixes with the adhesion product of the coated component and weakens the film. It is good to install.

  Further, the raw material component etching step S302 is also processed by halogen plasma or plasma in which oxygen is added to hydrogen halide. When oxygen is added, a reaction product released by etching of the raw material part is easily fixed on the surface of the coated part. Therefore, when oxygen is added, the amount of the adhered product is increased and the effect is often improved. The adhesion product generated in the raw material component etching step S302 is AlCl or AlClO when the raw material component is aluminum.

Furthermore, in the raw material part surface protective film removing step S301 and the raw material part etching step S302, the raw material parts may be etched by using a mixed gas of boron trichloride (BCl ₃ ) and a halogen gas. This is because the reducing power of boron (B) released from BCl ₃ promotes the etching of the raw material parts.

In the adhesion product stabilization step S303, for example, plasma using a gas that easily releases fluorine by dissociation, such as sulfur hexafluoride (SF ₆ ) or nitrogen trifluoride (NF ₃ ), may be used. Alternatively, oxygen plasma, sulfur hexafluoride, nitrogen trifluoride, oxygen mixed plasma, or the like may be used. In this step, since the purpose is to promote the fluorination and oxidation of the deposited product, it is not necessary to apply a high frequency bias power. In particular, when fluorination is promoted by a plasma containing fluorine, if high frequency bias power is applied, the surface of the raw material component is fluorinated and inhibits etching of the raw material component in the next step. It is better not to. By this adhesion product stabilization step S303, the film covering the surface of the coated component becomes aluminum fluoride (AlF), which is a strong film made of AlCl, AlClO, or the like. In this way, the inter-component material transfer processing step can be specifically performed.

(Embodiment 3)
In the third embodiment, an example will be described in which the end of the inter-component material transfer processing step can be determined by measuring the amount of light by a photodetector. As shown in FIG. 5, the plasma etching apparatus normally includes a light observation port 14 for observing a plasma emission state and a photodetector 15 for measuring a change in plasma emission. Since the inner cylinder 4 is made of quartz, plasma light emission can be detected by the photodetector 15. When the plasma emission was observed through the inner cylinder (covered part) 4, an experiment was conducted to observe the plasma emission intensity under the same processing conditions during the inter-part material transfer processing step. FIG. 6 is a graph showing the relationship between the emission intensity of transmitted light and the elapsed time of the inter-part material transfer process. As can be seen from FIG. 6, it was found that the emission intensity gradually attenuated by repeatedly performing the inter-part material transfer process step. This is because the adhered product formed on the surface of the coated part (inner cylinder 4) absorbs the plasma emission, and it is found that the thickness of the adhered product formed on the coated part can be estimated by the amount of light absorption. It was. Furthermore, it has also been found that there is a strong correlation between the variation in emission intensity and the variation in processing dimensions. That is, by observing the plasma emission, the film thickness of the adhered product can be estimated, and it can be determined whether or not the product processing start state has been reached. Therefore, as shown in FIG. 7, after performing the raw material component surface protective film removal step S301, the raw material component etching step S302, and the adhered product stabilization step S303, the amount of light detected by the photodetector 15 is within the specified value range. Whether or not the product has entered the product processing start state can be determined in step S305 of observing plasma emission. As a result, the inter-part material transfer process after maintenance can be completed in a minimum amount of time, so that the throughput of the apparatus is improved.

  As described above, according to the first to third embodiments, by etching the raw material components constituting the chamber of the plasma etching apparatus in maintenance, and by stabilizing the generated reaction product on the surface of the coated component, It is possible to prevent process variations due to the result of exposing the surface state of the coated part by cleaning the part in maintenance. By this process, the surface state in the chamber can be brought into a state suitable for manufacturing in a short time, and the product process can be started early, so that the throughput of the plasma processing apparatus is improved.

  As mentioned above, the invention made by the present inventor has been specifically described based on the embodiment. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

  The present invention is not an essential part as long as it is an engineer familiar with the plasma processing apparatus, and can also be implemented by another method not described in the embodiment. For example, the shape of the raw material component can be devised to have an acute angle portion so that the material can be easily discharged, or the coating method can be devised. Thereby, the device which does not implement the raw material component surface protective film removal process of the material transfer process between components is also considered. The raw material parts are exemplified by those containing aluminum and yttria, but it is also possible to use a metal material having a compound that is difficult to etch other than these. The present invention can be widely applied not only to the manufacturing process of a semiconductor device but also to a processing apparatus using plasma. For example, a plasma etching apparatus has been described as an example of the plasma processing apparatus, but the present invention can also be applied to, for example, a plasma CVD apparatus.

  In the above-described embodiment, an example in which the inter-part material transfer process is performed instead of the seasoning process has been described. However, in addition to the inter-part material transfer process, the seasoning process may be performed.

  The present invention can be widely used in the manufacturing industry for manufacturing semiconductor devices.

4 is a flowchart showing a manufacturing process of the semiconductor device in the first embodiment of the present invention. 1 is a cross-sectional view illustrating a configuration of a plasma etching apparatus in a first embodiment. 4 is a flowchart showing a flow of maintenance of the plasma etching apparatus in the first embodiment. 10 is a flowchart showing a flow of an inter-part material transfer processing step in the second embodiment. FIG. 6 is a cross-sectional view showing a configuration of a plasma etching apparatus in a third embodiment. It is a graph which shows the relationship between the emitted light intensity of transmitted light, and the elapsed time of the material transfer process process between components. 12 is a flowchart showing a flow of an inter-part material transfer processing step in the third embodiment. It is a flowchart which shows the flow of the maintenance of the plasma etching apparatus which the present inventors examined. It is the figure which the present inventors examined, Comprising: It is a graph which shows the relationship between a maintenance and a process dimension.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Electromagnetic wave introduction port 2 Processing gas supply port 3 Ground 4 Inner cylinder 5 Shower plate 6 Top plate 7 Electromagnetic wave shield 8 Case 9 Gas ejection port 10 Sample stand 11 Electrostatic chuck 12 Wafer 13 Processing chamber 14 Light observation port 15 Light detection 100 Maintenance start point 101 Maintenance end point 102 Product processing start point 103 Processing dimension standard lower limit value 104 Processing dimension standard upper limit value 105 Maintenance period 106 Seasoning processing period 107 Product processing period

Claims (10)

(A) a step of cleaning the parts constituting the processing chamber of the plasma processing apparatus and performing maintenance;
(B) After the step (a), the first part constituting the processing chamber is etched to form a film having a material contained in the first part on the surface of the second part constituting the processing chamber. A method of manufacturing a semiconductor device. A method of manufacturing a semiconductor device according to claim 1,
The method (b) is performed by a process using plasma, and a method for manufacturing a semiconductor device. A method of manufacturing a semiconductor device according to claim 1,
The step (b)
(B1) etching a first part constituting the processing chamber;
(B2) After the step (b1), the step of stabilizing the film by changing the composition of the film formed on the surface of the second part constituting the processing chamber by etching the first part. A method for manufacturing a semiconductor device, comprising: A method of manufacturing a semiconductor device according to claim 3,
The method of manufacturing a semiconductor device, wherein the step (b1) and the step (b2) are alternately repeated. A method of manufacturing a semiconductor device according to claim 3,
In the step (b1), a plasma discharge using a gas containing a halogen atom is used. A method of manufacturing a semiconductor device according to claim 3,
In the step (b2), a plasma discharge using a gas containing fluorine atoms is used. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the first component is made of a material containing aluminum. A method of manufacturing a semiconductor device according to claim 1,
The method for manufacturing a semiconductor device, wherein the first component is made of a material containing yttrium. A method of manufacturing a semiconductor device according to claim 2, further comprising:
(C) A method for manufacturing a semiconductor device comprising a step of estimating the film thickness of the film by detecting a light emission phenomenon due to the plasma and determining the end of the step (b). A method of manufacturing a semiconductor device according to claim 1,
The method of manufacturing a semiconductor device, wherein the plasma processing apparatus is a plasma etching apparatus.

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