JP2008147766A - Interface circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To take a measure against static electricity while lowering the withstand voltage of a semiconductor integrated circuit and securing safety in an interface circuit constituting high-speed communication. <P>SOLUTION: In a universal serial bus, a ceramic capacitor is disposed between a node for which first and second resistors are connected between a VBUS terminal and the VBUS input terminal of the semiconductor integrated circuit and GND, a diode is disposed between the same node and DP and DM terminals with the DP and DM terminals on the anode side, a diode is disposed between the DP and DM terminals and the GND with the GND on the anode side, and a third resistor is disposed between the VBUS input terminal and the GND. When first, second and third resistance values are respectively defined as R1, R2 and R3, the forward voltage drop of the diode is defined as Vf, a VBUS voltage is defined as V1, the breakdown voltage of the VBUS input terminal is defined as V2 and the High level lowest voltage of the VBUS input terminal is defined as V3, an expression: V1*R3/(R1+R2+R3)>V3(V1-Vf)*R3/(R2+R3)<V2 is satisfied. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an interface circuit for connecting an external device for high speed communication represented by a universal serial bus.

  Many interface parts for connecting external devices have anti-static measures. This is to prevent the semiconductor integrated circuit connected to the interface unit from being destroyed by static electricity when a charged user touches the interface unit.

  Various parts are used for countermeasures against static electricity. For example, varistors and Zener diodes can take measures against static electricity with a single component.

  As a countermeasure method using a plurality of parts, there is a circuit using a diode and a capacitor as in Non-Patent Document 1. The circuit shown in FIG. 14 of Non-Patent Document 1 is a general one.

  Usually, the circuit shown in Non-Patent Document 1 is more effective in preventing static electricity than a circuit using a varistor or a Zener diode. In the case of a varistor or a Zener diode, the voltage that can be clamped varies depending on the current caused by the applied static electricity, and if the current is large, the clamp voltage increases and a sufficient countermeasure effect may not be obtained. In the case of a circuit using a diode and a capacitor as in Non-Patent Document 1, since the forward voltage drop of the diode does not depend on the amount of current so much, if the capacitance of the capacitor is sufficiently large, the amount of static electricity is large. However, the countermeasure effect can be demonstrated.

  FIG. 4 shows a conventional universal serial bus interface circuit using a diode and a capacitor, which is provided with countermeasures against static electricity.

  In FIG. 4, VBUS, DM, DP, and GND are the upstream side interface terminals of the universal serial bus. IC2 is a semiconductor integrated circuit constituting the physical layer of the universal serial bus, and terminals VBUSP, DMP, and DPP are terminals of IC2 connected to VBUS, DM, and DP, respectively. D1, D2, D3 and D4 are diodes. C1 is a ceramic capacitor, and usually 0.1 uF to several uF is attached. In the universal serial bus, VBUS is 5V, and a voltage of 0 to 3.3V is applied to DM and DP at full speed. In the case of the universal serial bus, since it is required to withstand short circuits between the terminals of the interface unit, the withstand voltages of the terminals VBUSP, DMP, and DPP must be able to withstand the VBUS voltage of 5V.

  However, with the recent miniaturization of semiconductor processes, the withstand voltage of terminals tends to decrease. By adopting the circuit of FIG. 5, it is possible to reduce the withstand voltage of the VBUSP terminal.

In FIG. 5, IC3 is a semiconductor integrated circuit constituting the physical layer of the universal serial bus, and terminals VBUSP, DMP, and DPP are terminals of IC3 connected to VBUS, DM, and DP, respectively. The withstand voltage of VBUSP is 3.6V, and DMP and DPP can withstand 5V. D1, D2, D3, D4 and C1 are the same elements as in FIG. R4 and R5 are resistors, and are set such that 5V applied to VBUS is 3.6V or less that VBUSP of IC3 can withstand and VBUSP is equal to or higher than a slice level for recognizing a high level.
"STMicroelectronics USBLC6-2 Datasheet Ver.1" STMicroelectronics March 14, 2005

  However, in the above conventional example, the capacitor C1 is directly connected to the VBUS terminal.

  Along with the recent increase in circuit density, surface mount multilayer ceramic capacitors are often used for the capacitor C1.

  Surface mount multilayer ceramic capacitors are vulnerable to physical stress, and if a short circuit occurs due to physical breakdown, the surface mount multilayer ceramic capacitors may generate heat due to leakage of the VBUS current.

  An object of the present invention is to provide a safe interface circuit in which a ceramic capacitor does not generate heat even if the ceramic capacitor causes an interlayer short circuit.

In order to achieve the above object, the invention according to the present application includes a connection unit connectable to an external device having at least three contacts,
The external device connected to the contact has at least one connection capable of supplying power to the contact,
The external device connected to the contact has at least one ground potential connection to the contact,
The external device connected to the contact has at least one signal connection to the contact,
The contact that is a signal is connected to the first terminal of the semiconductor integrated circuit directly or through a resistor or inductance,
In the interface circuit in which the input withstand voltage of the semiconductor integrated circuit is lower than the voltage of the connection portion capable of supplying power to the external device except for the first terminal,
The first and second resistors are connected from the contact point at which the external device of the connection part can supply power to the second terminal of the semiconductor integrated circuit,
There is a third resistor that connects the node between the second resistor and the second terminal of the semiconductor integrated circuit and the ground potential,
A capacitor exists between the node to which the first resistor and the second resistor are connected and the ground potential;
Between the node to which the first resistor and the second resistor are connected and the node of the contact that is the signal of the connection portion, there is a diode whose anode is the node side of the contact that is the signal of the connection portion,
There is a diode whose anode is the ground potential between the node of the contact that is the signal of the connection part and the ground potential
The first resistance, the second resistance, and the third resistance value are R1, R2, and R3, respectively, the forward voltage drop of the diode is Vf, the voltage of the connection part that can supply power to the external device is V1, and the second resistance value. An interface circuit characterized in that the following equation is established, where V2 is the breakdown voltage of the terminal and V3 is the minimum high level voltage of the second terminal.

V1 * R3 / (R1 + R2 + R3)> V3
(V1-Vf) * R3 / (R2 + R3) <V2

  As described above, according to the present invention, it is possible to take a countermeasure against static electricity of a semiconductor integrated circuit constituting a physical layer with a simple configuration, and to realize a reduction in the withstand voltage of the semiconductor integrated circuit. It is possible to improve the safety of the capacitors constituting the circuit.

(Example 1)
FIG. 1 shows a first embodiment of the present invention.

  In FIG. 1, VBUS, DM, DP, and GND are the upstream side interface terminals of the universal serial bus. IC1 is a semiconductor integrated circuit constituting the physical layer of the universal serial bus, and terminals VBUSP, DMP, and DPP are terminals of IC1 connected to VBUS, DM, and DP, respectively. D1, D2, D3 and D4 are diodes. C1 is a ceramic capacitor, and usually 0.1 uF to several uF is attached. R1, R2, and R3 are resistors. The forward voltage drop of the diodes D1 and D3 is Vf, the VBUS voltage supplied from the external device is V1, the VBUSP breakdown voltage is V2, and the VBUSP high level minimum voltage is V3. Then, the following formula is set.

V1 * R3 / (R1 + R2 + R3)> V3
(V1-Vf) * R3 / (R2 + R3) <V2
The resistor R1 is set to several kΩ.

  Specifically, R1 is 3.48kΩ ± 1%, R2 is 6.49kΩ ± 1%, R3 is 18kΩ ± 1%, VBUS standard voltage 4.4V ~ 5.25V, Vf is 0.6V ~ 0.8V Then, V2 is 3.44V or more and V3 is 2.81V or less.

  When the power supply voltage of IC1 is 3.3V, when V2 is 3.3V + 0.3V and V3 is about 2.31V which is 70% of 3.3V, the above resistance value setting sufficiently satisfies the above formula.

  In the case of this resistance value setting, even if the ceramic capacitor C1 causes a rare short-circuit, the loss of the ceramic capacitor C1 is only 1.8 mW at most, so that no heat is generated.

(Example 2)
FIG. 2 shows a second embodiment of the present invention.

  FIG. 2 shows the addition of a Zener diode ZD1 between VBUS and GND in the circuit of FIG. Zener voltage is about 6V.

  When static electricity is applied to VBUS, the circuit shown in FIG. 1 can absorb the static electricity with the filter of the resistor R1 and the capacitor C1, and the IC1 semiconductor integrated circuit can be used as a dust. However, since all the electrostatic voltage is applied to the resistor R1 at the moment when static electricity is applied, there is a possibility that the resistor R1 will be destroyed if the electrostatic voltage exceeds the resistance of the resistor R1. In this embodiment, by adding the Zener diode ZD1, the electrostatic voltage applied to VBUS is clamped, and the electrostatic capacity of VBUS is improved.

  Further, a varistor may be used instead of the Zener diode ZD1.

(Example 3)
FIG. 3 shows a third embodiment of the present invention.

  FIG. 3 shows a configuration in which a Zener diode ZD2 is added in parallel with the resistor R1 of FIG. The Zener voltage may be about 3V.

  When static electricity is applied to VBUS, the circuit shown in FIG. 1 can absorb the static electricity with the filter of the resistor R1 and the capacitor C1, and the IC1 semiconductor integrated circuit can be used as a dust. However, since all the electrostatic voltage is applied to the resistor R1 at the moment when static electricity is applied, there is a possibility that the resistor R1 will be destroyed if the electrostatic voltage exceeds the resistance of the resistor R1. In this embodiment, by adding the Zener diode ZD2, the voltage applied across the resistor R1 is clamped, and the electrostatic resistance of VBUS is improved.

  A varistor may be used instead of the Zener diode ZD2.

1 is an interface circuit according to a first embodiment of the present invention. It is an interface circuit which applied the 2nd Example of this invention. It is an interface circuit which applied the 3rd Example of this invention. It is a figure explaining a prior art example. It is a figure explaining a prior art example.

Explanation of symbols

  IC1, IC2, IC3 Semiconductor integrated circuit constituting the physical layer of universal serial bus

Claims (1)

A connection portion connectable to an external device having at least three contacts;
The external device connected to the contact has at least one connection capable of supplying power to the contact,
The external device connected to the contact has at least one ground potential connection to the contact,
The external device connected to the contact has at least one signal connection to the contact,
The contact that is a signal is connected to the first terminal of the semiconductor integrated circuit directly or through a resistor or inductance,
In the interface circuit in which the input withstand voltage of the semiconductor integrated circuit is lower than the voltage of the connection portion capable of supplying power to the external device except for the first terminal,
A contact that can supply power to the external device of the connecting portion is connected to the second terminal of the semiconductor integrated circuit via the first and second resistors,
There is a third resistor that connects the node between the second resistor and the second terminal of the semiconductor integrated circuit and the ground potential,
A capacitor exists between the node to which the first resistor and the second resistor are connected and the ground potential;
Between the node to which the first resistor and the second resistor are connected and the node of the contact that is the signal of the connection portion, there is a diode whose anode is the node side of the contact that is the signal of the connection portion,
There is a diode whose anode is the ground potential between the node of the contact that is the signal of the connection part and the ground potential
The first resistance, the second resistance, and the third resistance value are R1, R2, and R3, respectively, the forward voltage drop of the diode is Vf, the voltage of the connection part that can supply power to the external device is V1, and the second resistance value. An interface circuit characterized in that the following equation is established, where V2 is the breakdown voltage of the terminal and V3 is the minimum high level voltage of the second terminal.
V1 * R3 / (R1 + R2 + R3)> V3
(V1-Vf) * R3 / (R2 + R3) <V2

Images