JP2008135851A - Image processing apparatus and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent an unnatural image from being output in reading the image to the end and outputting the read image. <P>SOLUTION: An image processing unit applies predetermined processing to image data inputted from a pre-stage and outputs the image to the post-stage. The unit is provided with an interpolation operation means 26l for executing interpolation operation while using the inputted image data for ends also as the image data of edge pixels in interpolation operation, for image data insufficient for interpolating the end of one line of the inputted image data. A register for storing the image data transmitted from a line memory is cascaded, and the interpolation operation means 26l executes interpolation operation on the basis of the image data stored in the register. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an image processing apparatus that performs a process associated with a scaling process, and an image forming apparatus including the image processing apparatus.

  In the process when scaling such as enlargement / reduction is performed on the image, for example, the process shown in the conceptual diagram of FIG. 15 is executed. FIG. 15A conceptually shows an input pixel having a pixel density of 600 dpi in the main scanning direction. The dot pitch of 600 dpi is 0.0423 mm / dot. In FIG. 15A, pixels (dots) are arranged at intervals of 0.0423 mm / dot.

  FIG. 15B is a diagram illustrating a state of pixels in the main scanning direction when 300% enlargement is performed. In the case of 300% enlargement, if it remains as it is, adjacent pixels will be separated by 3 pixels compared to the case of FIG. In other words, the image is enlarged, but the density becomes 1/3 (equivalent to 200 dpi). Therefore, the pixels are interpolated to 600 dpi as shown in FIG. In this example, since the magnification is 300%, the pixel density is increased by 3 pixels per pixel, and two pixels are filled between the pixels shown in FIG. 15B so that the pixel density is the same as that in FIG. ing.

  FIG. 16 is an explanatory diagram showing an outline of the interpolation calculation at the time of enlargement as shown in FIG. The value (density) of the interpolation pixel is calculated by interpolation from some of the original 600 dpi input pixel values. For this interpolation, a convolution interpolation method that can perform scaling processing with relatively high accuracy is generally used based on the sampling theorem. This method is a well-known method and is calculated in consideration of a coefficient depending on an interpolation position based on two known pixels before and after the pixel stored on the same line, in the case of FIG. 16, in the case of FIG. For example, the fifth output pixel (see FIG. 15C) corresponds to the pixel between the second input pixel and the third pixel in terms of the input pixel, and therefore the pixels used for the calculation are from the first input pixel to the fourth pixel. The pixel value of the fifth output pixel is calculated from the second pixel to the position 1/3 as the interpolation pixel position coefficient. In the case of the 6th output pixel, the pixel value of the 6th pixel is calculated from 4 pixels from the 1st input pixel to the 4th pixel and the position 2/3 from the 2nd pixel.

  FIG. 17 is a diagram illustrating a state of pixels in the main scanning direction at the time of reduction of 66.66%. Also in this case, the input pixel is 600 dpi (FIG. 17A). When it is simply reduced by 66.66%, it becomes as shown in FIG. 17B, and if it is output as it is, it will be equivalent to 900 dpi instead of 600 dpi. Therefore, in order to obtain 600 dpi, the number of pixels is reduced and interpolation is performed. In this case, since it is reduced to 66.66%, 3 pixels are reduced to 2 pixels.

  FIG. 18 is a diagram illustrating pixel deletion and interpolation when the 66.66% reduction is performed. As shown in FIG. 18 (b), the pixels actually required when the input shown in FIG. 18 (a) is input are skipped by two pixels, such as the first input pixel, the fourth input pixel, and the seventh input pixel. This is an intermediate pixel between every pixel and every three pixels. Therefore, as shown in FIG. 18C, the first output pixel is used as it is for the first output pixel, and the second output pixel is at the position 1/2 with four pixels from the first input pixel to the fourth pixel. The pixel value is calculated.

  Note that the invention described in Patent Document 1 or 2 is known as such an interpolation technique. Among these, the invention described in Patent Document 1 provides an image processing apparatus that does not perform unintentional enhancement processing in interpolation processing when an image is enlarged or reduced. In an image processing apparatus for outputting a scaled image in accordance with the scale factor, a storage means for sequentially storing input continuous pixels on the same line and at least four pixels sequentially stored in the storage means are operated as variables. Determining whether the state of at least four pixels sequentially stored in the storage means is a gradation pattern in which another value continues for a certain period after a certain value continues, And a selection means for selecting the output of the calculation means in accordance with the determination result of the determination means.

In addition, the invention described in Patent Document 2 provides an image processing method capable of always performing highly accurate scaling regardless of the value of the enlargement / reduction ratio, similar to the invention described in Patent Document 1. Therefore, when a plurality of pixels that are continuous from a pixel on a certain period are set as sampling pixels and a virtual pixel between the pixels is obtained by a cubic function using a distance as a parameter, a magnification that satisfies a specific condition is used. The image processing method is characterized by changing the position and scaling the input pixel.
JP 2000-307850 A JP 2001-119568 A

By the way, in the interpolation method, in the case of enlargement, as shown in FIG. 15C, an interpolation pixel is required between the first output pixel and the second output pixel at the leading pixel. At this time, the calculation requires the first through third pixels of the input and the pixel immediately before the first input pixel. Hereinafter, this previous pixel is referred to as the 0th pixel. The state at this time is shown in FIG. FIG. 19 shows the position of the interpolation pixel between the first input pixel and the second input pixel. In FIG. 19, the position X of the interpolation pixel is
First pixel ≦ X <second pixel. In this case, the values of the four pixels of the input 0 pixel, the input 1 pixel, the input 2 pixel, and the input 3 pixel are used for the interpolation calculation.

  In such a case, conventionally, even if the leading pixel is output on paper and becomes an image edge and is erased or masked, there is no problem even if the 0th pixel in FIG. 19 uses a black or white value. In recent image reading apparatuses, since the image data is output even at the end of the image, the value of the first pixel is too far from the values of the other three pixels, and the output value of the interpolation operation is the pixel value of the actual image. In some cases, the images did not match and an unnatural image was output.

  Therefore, a problem to be solved by the present invention is to prevent an unnatural image from being output when the image is read to the end of the image and output.

  In order to solve the above-described problem, the first means performs a predetermined process on the image data input from the preceding stage and outputs the processed image data to the subsequent stage, at the end of one line of the input image data. Interpolation calculation means for performing interpolation calculation by using the input edge image data as image data of the leading edge pixel at the time of interpolation calculation for image data that is insufficient for the interpolation calculation is provided. .

  The second means is characterized in that, in the first means, the end portion is a front end portion or a rear end portion.

  The third means includes a register for holding image data transferred from a line memory in which the input image data is stored when the interpolation calculation means performs interpolation calculation in the first or second means. It is connected to a cascade.

  According to a fourth means, in either the first or third means, when processing is performed in duplicate, the register has an end portion held by a line memory that supplies image data until an output trigger is inputted. It is updated by image data.

  The fifth means is characterized in that the image forming apparatus includes the image processing apparatus according to any one of the first to fourth means.

  In the embodiment described later, the image processing apparatus is in the image processing unit 2, the interpolation calculation means is in the interpolation calculation processing unit 26l, the line memory is in the first and second line memories 26j and 26k, and the register is in the first to the second. The image forming apparatuses correspond to the fourth registers 31 to 34, respectively, to the image processing unit 2 and the printer unit 3.

  According to the present invention, with respect to image data that is insufficient for the interpolation calculation at the end of one line of the input image data, the input end image data is used as the image data of the tip pixel at the time of the interpolation calculation. Since the interpolation calculation is performed, it is possible to prevent an unnatural image from being output when the image is read to the end of the image and output.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

  FIG. 1 is a block diagram functionally showing a schematic configuration of an image forming apparatus according to an embodiment of the present invention. In FIG. 1, the image forming apparatus includes a scanner unit 1, an image processing unit 2, and a printer unit 3. The scanner unit 1 optically reads a document image, converts it into an electrical signal, and outputs it. The image processing unit 2 executes a process for converting the read image signal input from the scanner unit 1 into a printable print signal in each step, and outputs the print signal to the printer unit 3. The printer unit 3 forms a visible image on a recording medium such as recording paper based on the print signal output from the image processing unit 2.

  The image processing unit 2 includes a shading correction unit 21, a line correction unit 22, a scanner γ correction unit 23, a character / photo determination unit 24, a color correction unit 25, a scaling processing unit 26, a movement processing unit 27, and a printer γ unit correction unit 28. And a gradation processing unit 29, which are controlled by a CPU (not shown). In accordance with a program stored in a ROM (not shown), the CPU executes the following processing based on the program while using a ram (not shown) as a work area.

  The shading correction unit 21 corrects the relationship between the input density and the output density, and the interline correction unit 22 corrects the shift between the lines. The scanner γ correction unit 23 performs γ correction on the basis of the characteristics of the image signal input from the scanner unit 1, and the character / photo determination unit 24 determines whether the image region or the character region in order to change the image processing method. Is done. The color correction unit 25 performs a correction to cope with the conversion from the RGB color system to the YMCK color system, and the magnification processing unit 26 performs image data corresponding to the magnification when the magnification instruction is given. Is created. When there is an instruction to move or rotate the image, the movement processing unit 27 performs coordinate conversion corresponding to the instruction, and the printer γ correction unit 28 performs γ correction corresponding to the characteristics of the output printer unit 3. Is called. Finally, gradation processing for each color is performed by the gradation processing unit 29 and output to the printer unit 3 as a print signal.

  FIG. 2 is a block diagram showing an internal configuration of the scaling processing unit 26. The scaling unit 26 includes first to eighth multiplexers 26b, 26c, 26d, 26e, 26f, 26g, 26h, and 26i (hereinafter referred to as MUX (1) to (8)), first and second , 26j and 26k, an interpolation calculation processing unit 26l, and a post-processing unit 26m. The preprocessing unit 26a to which the color corrected signal is input from the color correction unit 25 is connected to the first MUX 26b, the first MUX 26b is connected to the second MUX 26c and the third MUX 26d, and the second MUX 26c is The fourth MUX 26e and the third MUX 26d are respectively connected to the interpolation calculation processing unit 26l and transmit signals to the subsequent stage. Further, the fourth MUX 26e is connected to the first and second line memories 26j and 26k, respectively, and the first and second line memories 26j and 26k are respectively connected to the fifth MUX 26f and transmit signals to the subsequent stage. . Further, the fifth MUX 26f is connected to the sixth MUX 26g, and the sixth MUX 26d is connected to the third and eighth MUXs 26i, respectively, and transmits signals to the subsequent stage. The interpolation calculation processing unit 26l is connected to the seventh MUX 26k, and the seventh MUX is connected to the second MUX 26c and the eighth MUX 26i, respectively, and transmits a signal to the subsequent stage. The eighth MUX 26i is connected to the post-processing unit 26m, and the post-processing unit 26m is connected to the movement processing unit 27, and each outputs a signal to the subsequent stage.

  FIG. 3 is a block diagram showing signal connection paths during enlargement processing in the scaling unit 26. At the time of enlargement, the signal received from the color correction processing unit 25 is the preprocessing unit 26 → the first MUX 26b → the second MUX 26c → the fourth MUX 26d → the first or second line memory 26j, 26k → the fifth MUX 26f. The data is output to the movement processing unit 27 through a route of the sixth MUX 26g → the third MUX 26d → the interpolation calculation processing unit 26l → the seventh MUX 26h → the eighth MUX 26i → the post-processing unit 26m. In this process, the interpolation calculation processing unit 26l executes the interpolation processing described with reference to FIG. At that time, as described with reference to FIG. 19, the value of the input 0th pixel becomes a problem. Therefore, in the example shown in FIG. 19, the black or white pixel value is used. However, in this embodiment, the pixel value of the pixel at the head of the line is used redundantly as shown in FIG. That is, as shown in FIG. 4, the same pixel value (density value) as that of the input first pixel is used as the value of the input zeroth pixel, and the input zeroth pixel, input first pixel, input second pixel, and input third pixel Are interpolated using the four pixels. This avoids unnatural pixel value output.

  In the digital image processing system, for example, in 200%, 1 pixel is increased by 2 pixels and in 300%, 1 pixel is increased by 3 pixels, so the same pixel is used many times. Although the calculation is performed, the input pixels are input one after another during this time, so that the input pixels are once taken into the memory. Therefore, in the present embodiment, the first and second line memories 26j and 26k use the first and second FIFO memories as shown in FIG. The minutes are toggled for each line for calculation output. FIG. 5 is an explanatory diagram showing a configuration for performing a toggle operation using a line memory.

  FIG. 6 is a diagram showing a configuration of the interpolation calculation processing unit 26l, and corresponding pixels are shown on the lower side. In this embodiment, the first through fourth four calculation registers 31, 32, 33, and 34 are used as the interpolation calculation system in the calculation processing unit 26l. In the four calculation registers 31, 32, 33, 34, the fourth calculation register 34 takes charge of the input from the first or second line memory 26j, 26k, and the input values are sequentially transferred to the third register. The calculation register 33 → second calculation register 32 → first calculation register 31 is taken over as shown by the arrow in FIG. Then, interpolation is performed between the second calculation register 32 and the third calculation register 33 from the four input pixel values inputted to the first to fourth calculation registers 31, 32, 33, 34. Calculate and output the pixel value.

This series of operations will be described with reference to FIGS.
(1) Input of Value of First Input Pixel FIG. 7 is a diagram showing a state of input of a value of the first input pixel. In this figure, in this operation, first, the value of the first input pixel recorded in the line memory 26j or 26k is continuously input to the arithmetic register every clock until a pixel output trigger is received. That is, as shown in FIG. 7, the value of the first input pixel is input to the fourth, third, second, and first calculation registers 34, 33, 32, and 31 for each clock. Hold.

(2) Input of Value of Second Input Pixel FIG. 8 is a diagram showing a state of input of the value of the second input pixel. When a pixel output trigger is received from the state (1), the value of the second input pixel recorded in the line memory 26j or 26k is input to the fourth arithmetic register 34. The value of each register is successively transferred to the subsequent register.

(3) Input of Value for Third Input Pixel FIG. 9 is a diagram showing a state of input of the value of the third input pixel. A value for the first pixel output is input to each register two clocks after receiving the trigger for pixel output. Here, the first output pixel is calculated and output. In the calculation, since the output is the first pixel, the position coefficient is 0, and the output value is the same as the value of the second calculation register 32. In FIG. 9, the pixel of the output first pixel is shown at the position of the input first pixel.

(4) Calculation of the value of the second output pixel FIG. 10 is a diagram showing the state of the register when the value of the second output pixel is calculated. Three clocks after receiving the pixel output trigger (the next clock in the state of (3)), for example, in the case of 300% enlargement magnification output, the first to fourth arithmetic registers 31, 32, 33 and 34 hold the values in the case of (3) as they are, and as described with reference to FIG. 16, the values of the input pixels 0 to 3 (accordingly, the values of the four pixels of the input pixels 1, 1, 2, 3). ) And the position coefficient 1/3 and output as the second output pixel. This value is a value calculated by overlapping the first input pixel. In FIG. 10, the pixel of the second output pixel is shown at a position that is 1/3 from the first input pixel to the second input pixel.

(5) Calculation of the value of the third output pixel FIG. 11 is a diagram showing the state of the register when the value of the third output pixel is calculated. In this example, since the enlargement / magnification output is 300%, the register holds the value of the state (4) (or the state (3) in other words) even at the next clock of the state (4), and the input pixel 0 Or a value of 3 (therefore, values of four pixels of input pixels 1, 1, 2, and 3) and a position coefficient 2/3, and output as the third output pixel. This value is also a value calculated by overlapping the first input pixel. In FIG. 11, the pixel of the second output pixel is shown at a position that is 2/3 closer to the second input pixel from the first input pixel.

(6) Calculation of the value of the fourth pixel of output FIG. 12 is a diagram showing the state of the register when the value of the fourth pixel of output is calculated. In the next clock in the state (5), the first to fourth arithmetic registers 31, 32, 33, and 34 are updated, and the value of the fourth input pixel is input from the line memory 26j or 27k. This value is calculated with the input pixels 1 to 4 and the position coefficient 0, and output as the fourth output pixel. The output value is the same as the value in the second arithmetic register 32 because the position coefficient is 0. In FIG. 12, the pixel of the output fourth pixel is shown at the position of the input second pixel.

(7) Calculation of the value of the fifth output pixel FIG. 13 is a diagram showing the state of the register when calculating the value of the fourth output pixel. In the next clock in the state (6), the first to fourth calculation registers hold the values as they are, and are calculated using the input pixels 1 to 4 and the position coefficient 1/3, and output as the fifth output pixel. . In FIG. 13, the pixel of the fifth output pixel is illustrated at a position that is 1/3 from the second input pixel to the third input pixel.

  In this way, the interpolation operation is performed on the pixel values of the sequentially input images from the sixth pixel onward, and an unnatural image is output.

  In the reduction process, for example, as shown in FIG. 18, in 66.66%, 3 pixels are reduced to 2 pixels, and interpolation is performed. At the time of this reduction processing, the same pixel is not used many times for the calculation, so the interpolation calculation processing is executed first, and the line memory is toggled at the subsequent stage to output one line at a time. FIG. 14 is a block diagram showing signal connection paths during the enlargement process during the reduction process.

  In the figure, the signal is a preprocessing unit 26a → first MUX 26b → third MUX 26d → interpolation calculation processing unit 26l → seventh MUX 26h → second MUX 26c → fourth MUX 26e → first or second line memory. 26j or 26k → 5th MUX 26f → 6th MUX 26g → 8th MUX 26i → post-processing unit 26m and then output to the movement processing unit 27. In this process, the interpolation calculation processing unit 26l executes the interpolation processing described with reference to FIG.

  In the present embodiment, the image data on the front end side of the line is described. However, if the image data is insufficient for the interpolation operation on the rear end side of the line, the last end image data (pixel value) is duplicated. Used to perform interpolation calculations.

  In the present embodiment, the image data that is insufficient for the interpolation calculation at the front end of the image data for the scaling process (enlargement) is used by overlapping the transferred image data (pixel value) at the front end. Similar use of the image data at the leading end of the line can be applied not only to the scaling process but also to the filter process.

As described above, according to this embodiment,
(1) Since the pixel value of the leading end portion (pixel of the first input pixel of one line) is used redundantly for the image data (pixel value) that is insufficient for interpolation calculation at the leading end portion of the image data at the time of enlargement / reduction scaling, The output of unnatural interpolation output data can be avoided. As a result, an unnatural image does not appear at the leading edge of the image.
(2) Since the registers used for the interpolation calculation are connected in cascade, the control when the pixel values are used redundantly during the calculation becomes easy.
(3) Since the register is updated with the data at the leading end of the image in the line memory until the output trigger is input in the overlap processing of the pixel value at the time of the interpolation calculation, it is easy to control when the pixel value is used redundantly. Thus, no special circuit is required.
(4) Since the image value of the rear end portion (pixel of the input final pixel of one line) is used redundantly for the image data (pixel value) that is insufficient for the interpolation calculation at the rear end portion of the image data at the time of zooming, The output of unnatural interpolation output data at the rear end can be avoided. As a result, an unnatural image does not appear at the rear end of the image.
There are effects such as.

1 is a block diagram functionally showing a schematic configuration of an image forming apparatus according to an embodiment of the present invention. It is a block diagram which shows the internal structure of the scaling process part of FIG. FIG. 3 is a block diagram illustrating signal connection paths during enlargement processing in the scaling processing unit of FIG. 2. It is explanatory drawing which shows a state when using the image data (pixel value) of a top pixel redundantly. It is explanatory drawing which shows the structure which performs toggle operation | movement using a line memory. It is explanatory drawing which shows the state of the pixel corresponding to the structure of the interpolation calculation process part of FIG. It is explanatory drawing which shows the state at the time of the input of the value of the input 1st pixel in FIG. It is explanatory drawing which shows the state at the time of the input of the value of the 2nd input pixel in FIG. It is a figure which shows the state at the time of the input of the value of the input 3rd pixel in FIG. It is explanatory drawing which shows the state of a register when calculating the value of the output 2nd pixel in FIG. It is explanatory drawing which shows the state of a register when calculating the value of the output 3rd pixel in FIG. It is explanatory drawing which shows the state of a register when calculating the value of the 4th output pixel in FIG. It is explanatory drawing which shows the state of a register when calculating the value of the 5th output pixel in FIG. FIG. 3 is a block diagram illustrating signal connection paths during enlargement processing during reduction processing in the scaling processing unit of FIG. 2. It is a figure which shows notionally the input pixel whose pixel density of the main scanning direction is 600 dpi. It is explanatory drawing which shows the outline of the interpolation calculation at the time of the expansion currently implemented conventionally. It is a figure which shows the state of the pixel of the main scanning direction at the time of the pixel density of the main scanning direction reducing 66.66%. It is a figure which shows the deletion and interpolation of the pixel at the time of 66.66% reduction implemented conventionally. It is a figure which shows the position of the interpolation pixel between the input 1st pixel and the input 2nd pixel.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Scanner unit 2 Image processing apparatus unit 3 Printer unit 26 Scaling processing part 26j, 26k Line memory 26l Interpolation salt mountain processing part 31-34 Register

Claims (5)

In an image processing apparatus that performs predetermined processing on image data input from the previous stage and outputs the processed data to the subsequent stage,
For image data that is insufficient for the interpolation calculation at the end of one line of the input image data, the input image data at the end is used as the image data of the leading pixel at the time of the interpolation calculation, and the interpolation calculation is performed. An image processing apparatus comprising an interpolation calculation means. The image processing apparatus according to claim 1.
An image processing apparatus, wherein the end is a front end or a rear end. The image processing apparatus according to claim 1 or 2,
An image processing apparatus, wherein a register for holding image data transferred from a line memory in which the input image data is stored when the interpolation calculation means performs interpolation calculation is connected in cascade. The image processing apparatus according to any one of claims 1 to 3,
The image processing apparatus according to claim 1, wherein the register is updated with image data at an end held by a line memory that supplies image data until an output trigger is input when processing is repeated.   An image forming apparatus comprising the image processing apparatus according to claim 1.

Images