JP2008135051A - Electronic device, data processing method, and computer program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To drastically shorten the startup time of an electronic device. <P>SOLUTION: The electronic device has a copied area management table 107 for storing whether data have been copied from areas storing initial values in data segments of a ROM 1003 to corresponding areas (RAM 1004) of data segments. When an access is detected to an area in the data segments of the RAM 1004 where data copy from the ROM 103 has been not performed yet, a program being performed is interrupted, data copy is performed by the processing of an NMI interrupt handler, the information in the copied area management table 107 is updated, and the performance of the program is restarted. Thus, the initial values in the data segments are distributedly copied on demand from the ROM 1003 to the RAM 1004. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electronic device, a data processing method, and a computer program, and is particularly suitable for use in starting up an electronic device.

  In recent years, in the field of digital cameras and the like, large-scale software including a GUI (Graphical User Interface) using a window system is incorporated into a ROM (Read Only Memory) and executed. It was. In such a system, a 32-bit RISC (Reduced Instruction Set Computer) processor and a large-capacity DRAM (Dynamic Random Access Memory) must be driven by a small battery.

  For this reason, it is normal to turn off the power completely when not in use and turn on the power just before use. In the case of a digital camera, in order not to miss the timing at which it is desired to shoot, it is better that the time from when the power is turned on until it becomes usable is as short as possible. Therefore, a computer system that shortens the startup time of the system is desired. The system startup time includes not only the initialization of the OS (Operating System) and driver, but also the part of transferring the initial value of the data segment of a high-level language such as C language. These are necessary before the initialization for operation as a digital camera, and are called overhead. Further, there is Patent Document 1 as a prior art relating to the activation of a high-level language from a ROM.

  As described above, when a ROMized program using a high-level language such as C language is configured, initialization is required to enable operation as a high-level language. In particular, the time for setting the initial value in the variable area tends to become longer depending on the scale of the program. In C language, what is called a static variable with initialization corresponds to it. The variable area is an area called a data segment, and is assigned (assigned) to a predetermined address in the RAM by the programmer.

  The initial value is written in a predetermined address of the ROM, and is copied from the ROM to the data segment of the RAM by a C language startup routine. In the case of the C language, the specification is that static variables to which no initial value is assigned are initialized to 0, and these variables are arranged in an area on the RAM called a BSS area. In addition to transferring the initial value from the ROM to the RAM, setting a variable arranged in the BSS area to zero (0) (clearing to zero) is a time-consuming process at startup.

  In addition to this, there are many parts that require high-speed processing by the CPU, such as GUI representation that uses a lot of animation and image processing for file compression and printing by software.

<Speed difference between ROM and RAM>
RISC processor clocks tend to increase in speed year by year, and it is not uncommon to perform high-speed operations such as 100 Mhz and 200 Mhz. However, the ROM access speed is about 120 nanoseconds, which is very slow relative to the processor speed. In addition, in order to reduce the size of the camera, there is a case where connection is made using a 16-bit BUS instead of a connection using a 32-bit BUS, and it is rare that about 300 nanoseconds are required to fetch one machine instruction. Absent.

  On the other hand, the reading speed from the RAM such as SDRAM is very high for instruction fetch from the ROM because burst reading is possible. In such a system, a cache memory exists between the CPU and the memory. For this reason, reading and writing are always performed between the DRAM and the cache in the burst mode, and fetching can be performed at an average speed of about twice to several times (about 10 to several tens of nanoseconds) of the internal speed. In other words, when reading from the RAM when the cache misses, it can be read about 10 times faster than when reading from the ROM.

  For this reason, a method of copying all ROM programs to the RAM once is often used. However, since all ROM programs must be copied to the RAM at the time of startup, there is a disadvantage that the startup time becomes very long from several hundred milliseconds to several tens of seconds. For this reason, it is not suitable for a device such as a digital camera that requires a short startup time.

  Also, it is difficult to shorten the time for copying the initial values of variables from the ROM to the RAM, which is a very large factor in the startup time. The time is roughly several hundred milliseconds. In the meantime, the computer system could not execute the initialization of the OS as well as the effective user program.

For the same reason, a personal computer BIOS (Basic Input / Output System) is also copied to the RAM and executed. For example, a BIOS system as described in Patent Document 2 has been devised. Such a system is generally realized by transferring a drawing routine or the like included in the BIOS to the RAM and executing it by a technique called shadow BIOS. The shadow BIOS is operated by arranging the RAM at the address of the original ROM using the function of an MMU (Memory Management Unit). However, the shadow BIOS technique is not suitable for a digital camera because the transfer to the RAM is explicitly performed at the start-up as in the technique described above.

JP 2004-348677 A JP 2001-51858 A

As described above, the conventional technique has a problem that it is difficult to appropriately shorten the startup time of an electronic device such as a digital camera that executes large-scale software embedded in a ROM.
The present invention has been made in view of such a problem, and an object thereof is to drastically shorten the startup time of an electronic device.

An electronic apparatus according to the present invention is an electronic apparatus that executes the program using a page table that manages a virtual address and a physical address of the program in units of pages, and includes a physical area in a variable area described in the program. An initialization unit that sets the page table so that an address is not assigned and initializes the page table; and a program execution unit that executes a program after the page table is initialized by the initialization unit; When the program is executed by the program execution means and an area to which the physical address is not allocated is accessed, variable setting means for setting an initial value of a variable in the area is provided. .
Another feature of the present invention is an electronic device that copies and executes program data recorded on a first recording medium on a second recording medium. A detecting unit that detects an access to an uncopied area that is not copied from the first recording medium, and an access to the non-copied area is detected by the detecting unit; Copying means for interrupting execution and copying a program corresponding to the non-copied area from the first recording medium to an uncopied area of the second storage means; and a program copied by the copying means A management unit that manages an area of the second recording medium that is a data copy destination; and after the area of the second recording medium is managed by the management unit, the suspended program is And having a resuming program execution resuming means execution of grams.

A data processing method according to the present invention is a data processing method for executing a program by using a page table for managing a virtual address and a physical address of the program in units of pages, and includes a variable area described in the program. An initialization step for initializing the page table by setting the page table so that a physical address is not allocated in the program, and a program execution for executing the program after the page table is initialized by the initialization step And a variable setting step for setting an initial value of a variable in the area when an area to which the physical address is not assigned is accessed by executing the program in the program execution step. And
According to another aspect of the present invention, there is provided a data processing method for copying and executing program data recorded on a first recording medium on a second recording medium. A step of detecting an access to an uncopied area that is not copied from the first recording medium, and an access to the non-copied area is detected by the detecting step; And copying the program corresponding to the uncopied area from the first recording medium to the uncopied area of the second storage step, and the program copied by the copy step A management step for managing an area of the second recording medium that is a copy destination of the data, and an area of the second recording medium by the management step After being managed, and having a resume program execution resumes step execution of the interrupted program.

The computer program of the present invention is assigned a physical address in a variable area described in the program when the program is executed using a page table that manages the virtual address and physical address of the program in units of pages. An initialization step for initializing the page table by setting the page table so that there is no state, a program execution step for executing a program after the page table is initialized by the initialization step, and the program execution When an area to which the physical address is not assigned is accessed by executing the program in steps, the computer is caused to execute a variable setting step for setting initial values of variables in the area.
Another feature of the present invention is an area of the second recording medium when the program data recorded on the first recording medium is copied and executed on the second recording medium. A detection step for detecting an access to an uncopied area that has not been copied from the first recording medium; and if the access to the uncopied area is detected by the detection step, the execution of the program is interrupted. A copying step for copying a program corresponding to the uncopied area from the first recording medium to an uncopied area of the second storage step, and a copy destination of data of the program copied by the copying step A management step for managing the area of the second recording medium, and after the management step, the area of the second recording medium is managed Characterized in that to execute the resume program execution resumes step execution of the interrupted program in the computer.

  According to the present invention, it is possible to greatly reduce the time until the operation of the electronic device starts.

Next, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
First, a first embodiment of the present invention will be described.
<MMU>
In recent years, integration of LSI (Large Scale Integration) has increased, and it has become possible to mount SOC (System On Chip) with built-in MMU (Memory Management Unit) or paging hardware. . As will be described later, in the present embodiment, a technique using paging hardware is used. First, paging hardware will be described.

<Virtual memory>
The purpose of the original paging hardware is to enable virtual storage that expands main memory using an external storage device. The paging hardware operates between the processor and the memory, divides the program address space into fixed-size pages (for example, 4 Kbytes or 8 Kbytes), and divides the physical address of the computer into page frames of the same size. To divide.

  The paging hardware has a page table having one entry for each page in the address space as shown in FIG. This page table entry stores a physical address of an actual page frame corresponding to the page or a flag indicating that no page exists (no page frame is allocated).

  If the processor attempts to address a nonexistent page (an unallocated page frame), a page fault interrupt occurs. The program that handles the page fault interrupt reads the contents of the corresponding external storage device into the main memory, assigns them as frames, returns control, and resumes the original program. By allocating frequently used parts of the external storage device to the main memory using the LRU (longest unused) algorithm, it seems as if there is a memory larger than the main memory that actually exists from the viewpoint of the application. It becomes possible to operate. The details are explained in "Basics and Applications of OS" A.S.Tannenbaum = Author / Nobuyuki Hikiji, Mieko Hikiji = Translation, Toppan, etc.

<Position dependent>
Programs compiled into machine language generally have the feature of position dependent. If you move the address where the program is located, it means that the program does not work correctly. As a result, it is impossible to transfer a part of the program installed in the ROM to the RAM as it is and execute it. A program that does not depend on the position but cannot be executed is called a relocatable object.

  The relocatable object includes redundant information for changing the program to an executable form according to the position when the position is determined. In addition, a program called a loader or a relocator is used to make a relocatable object executable. However, program placement in the RAM by such a program is a very time-consuming process. This is a heavy processing.

<Application of MMU>
In the present embodiment, paying attention to the feature of the virtual address of the MMU, it is the same position as viewed from the CPU as a software, but by physically assigning the RAM, only a part of the program of the ROM is transferred to the RAM. To achieve high-speed program execution.

<Shadow assignment on request>
In this embodiment, instead of transferring the program from the ROM to the RAM at the start-up, only the part that is necessary during the execution of the application, that is, the part actually executed is transferred to the RAM and executed. To implement a simple program.

<Digital camera>
FIG. 2 is a diagram illustrating an example of a hardware configuration of a digital camera according to the first embodiment of this invention.
In FIG. 2, reference numeral 1001 denotes a processor that reads and executes a program. Reference numeral 1002 denotes paging hardware that manages virtual addresses and physical addresses. Reference numeral 1003 denotes a ROM that stores a digital camera program. Reference numeral 1004 denotes a RAM that stores images and variables. Reference numeral 1005 denotes an A / D converter for capturing a captured image. Reference numeral 1006 denotes a CCD (Charge-Coupled Device) that receives light from the lens 1007 and converts it into an electrical signal. Reference numeral 1007 denotes a lens that determines an image on the CCD 1006. Reference numeral 1008 denotes an interface for connecting the memory card 1009. Reference numeral 1009 denotes a memory card for storing images. Reference numeral 1011 denotes an I / O interface for driving peripheral circuits. Reference numeral 1010 denotes a lens driving mechanism for driving the lens 1007.

  When the power is turned on, the processor 1001 reads out an instruction at an address called a reset vector of a program stored in the ROM 1003 through the paging hardware 1002, and starts execution. The paging hardware 1002 is in an initial state immediately after reset, and a physical address and a virtual address are in agreement. Note that the process of taking an image and recording it on the memory card 1009 is not related to the essence of the present embodiment, and thus the description thereof is omitted.

<Initial state>
FIG. 3 is a diagram illustrating an example of states of the paging hardware 1002, the ROM 1003, and the RAM 1004 immediately after the system in the digital camera of the present embodiment is activated. As shown in FIG. 3, immediately after the system is started, physical addresses are assigned (assigned) to all virtual addresses.

<Application program>
FIG. 4 is a diagram showing a source code (in C language) which is an example of an application program. In the program 301 of FIG. 4, the 100th line is the first function that calls this program 301. The program 301 is not called when the system is started, but may be called when a module is used. For example, a module related to printing may be called only after a printer is connected.

  The 102nd line calls a function CreateShadow that creates a shadow, which is one of the characteristic programs of this embodiment. The parameters of this function CreateShadow are the start address and size. The address of the function on the 105th line is specified as the start address. Then, as the size, an address difference between the function EndModule on the 113th line and the function MyFirstFunc on the 105th line is calculated and given.

FIG. 5 is a flowchart for explaining an example of the operation of the function CreateShadow called on the 102nd line of the program 301 in FIG.
In FIG. 5, first, processing is started in step S801, and interrupts are prohibited in step S802. In step S803, the page memory is set so that all pages that include the address specified by the parameter of the function CreateShadow and that match the physical address are unassigned. In step S804, the interrupt inhibition is canceled, and the process ends in step S805.

The state of the paging hardware 1002, the ROM 1003, and the RAM 1004 at the time when the process of step S805 of FIG. 5 is completed, that is, when the execution of the 102nd line of the program 301 of FIG. It has become. All pages containing functions from the function MyFirstFunc to the function EndModule are unassigned. In FIG. 6, it can be seen that the physical address of the function MyFunc is not assigned.

Next, when the function MyFunc on the 109th line of the program 301 in FIG. 4 is called, a page fault interrupt occurs. Here, an example of the page fault interrupt process will be described with reference to the flowchart of FIG.
Interrupt processing is started in step S901 in FIG. 7, and an empty frame is secured in step S902. In step S903, the contents of the corresponding page in the ROM 1003 are copied to the empty frame secured in step S902.
FIG. 8 is a diagram showing an example of the states of the paging hardware 1002, the ROM 1003, and the RAM 1004 when the contents of the corresponding page in the ROM 1003 are copied to an empty frame. In FIG. 8, it can be seen that a copy of the function MyFunc is created in a frame on the RAM 1004.

After the content of the corresponding page in the ROM 1003 is copied to the empty frame in this way, a frame is set in the page table in step S904 in FIG. FIG. 9 is a diagram illustrating an example of the states of the paging hardware 1002, the ROM 1003, and the RAM 1004 at the time when a frame is assigned to the page table in step S904. Since the program copied to the RAM 1004 is read from the same virtual address as the original address, even a position-dependent program can be executed.
In step S905, the page fault interrupt is terminated.

  When the program 301 is resumed from the page fault interrupt as described above and the 109th line in FIG. 3 is executed, the program 301 itself is fetched from the RAM 1004, so that it can be read at high speed. . When the 109th line of the program 301 in FIG. 4 is executed again, no page fault interrupt occurs because the frame has already been assigned.

FIG. 10 is a diagram illustrating an example of states of the paging hardware 1002, the ROM 1003, and the RAM 1004 at the time when the above-described processing is executed for the page including the function EndModule and a frame is assigned.

  By configuring as described above, there is no loss of waiting time for transferring a program from the ROM 1003 to the RAM 1004 at the time of system startup, and a part of the position-dependent program can be expanded to the RAM 1004. It is possible to configure a computer system that easily realizes part of the program being executed by the RAM 1004 that can be executed at high speed.

In particular, the elements constituting the start-up time of the digital camera include a long wait time of the processor (CPU) 1001 such as movement of the lens 1007 to the initial position and data reading from the memory card 1009. On the other hand, a GUI (graphical user interface) using a window system is a program that consumes a lot of processing time of the processor (CPU) 1001 and does not operate at all when activated.
Therefore, it can be said that it is efficient to transfer the application program from the ROM 1003 to the RAM 1004 when the application program is requested, that is, at the time of execution. With such a configuration, it is possible to save the time required for transfer from the ROM 1003 to the RAM 1004 required at the start-up, and it is possible to arrange and operate a program that requires high-speed operation in the RAM 10004.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. In the description of the present embodiment, the same parts as those in the first embodiment described above are denoted by the same reference numerals as those in FIGS.

<Data segment copy upon request>
Also in this embodiment, paging hardware is applied as in the first embodiment described above. By shortening the time required for variable initialization at computer language startup, an embedded software framework that can be started at high speed is provided.

  The power-on reset is canceled, and the initialization program operates as the first program that performs a cold start, and initializes the page table of the paging hardware. At this time, the setting is performed so that the page frame is not assigned to the area serving as the address of the data segment and the BSS.

  Then, the computer language variable initialization routine is skipped, and a jump is made to the entry point to the first computer language program while the variables are not initialized. When a program written in a computer language accesses a static variable, a page fault occurs, a page fault interrupt program is called, and the program starts. Assign a page frame to the page where the page fault occurred. If the page where the page fault has occurred is a BSS area, the memory contents in the page frame are initialized to zero (0), and control is returned to the original program. If the page where the page fault has occurred is a data segment area, the initial value is copied from the ROM corresponding to the memory in the page frame, and control is returned to the original program. The present embodiment is realized using such a program. Details of this embodiment will be described below with reference to the drawings.

  The hardware configuration of the digital camera is the same as that of the first embodiment described above, for example. When the power is turned on, the processor 1001 reads out an instruction at an address called a reset vector of a program stored in the ROM 1003 and starts execution, or the paging hardware 1302 is in an initial state immediately after reset. The physical address and the virtual address are in the same state as in the first embodiment described above. Note that the process of taking an image and recording it on the memory card 1009 is not related to the essence of the present embodiment, and thus the description thereof is omitted.

<Variable>
FIG. 11 is a diagram showing an example of a program written in C language. FIG. 12 is a diagram showing an example of an assembler list as a result of compiling the program 1101 of FIG. In the program 1101 of FIG. 11, the 100th line is a variable with initialization, which means that when the program 1101 starts, the value “TRUE” has already been assigned to the variable “fFirstAccess”.

  The variable “fFirstAccess” is described in the 0002th line in the assembler list 1201 of FIG. The area between the 0001th line and the 0003th line is a data segment area. As a result of compilation, the data segment of the program 301 is only “fFirstAccess”. However, since the data segments of all the programs are collected in one area by the linker, different variables of modules described by a plurality of sources are adjacent to each other in the data segment.

  In the 101st line of the program 1101 in FIG. 11, a variable “Count” is declared, but the initial value is not substituted. In the C language specification, a variable whose initial value is not declared is to be initialized with 0, so the initial value of “Count” should be 0. The 0007th line in the assembler list 1201 in FIG. 12 is the compilation result of “Count”. Since lines 0006 to 0008 in the assembler list 1201 in FIG. 12 are BSS areas, it can be seen that “Count” is compiled as a variable in the BSS area. Similarly to the data segment, the BSS area is also gathered by the linker, and a plurality of module variables exist adjacent to each other.

<Conventional startup>
Prior to describing the startup of this embodiment, the conventional startup will be described again. FIG. 13 is a flowchart illustrating a conventional technique and explaining an operation at the time of start-up.
When the reset is released in step S1101, 0 (zero) is written in the BSS area in step S1102, and an initial value is transferred from the ROM to the data segment. In step S1103, the C language program starts to be executed.
In step S1104, the OS is started as a C language program. When the OS starts up, the application program starts in step S1105. The operation as a digital camera can be started from step S1105. There is a loss of several hundred milliseconds from step S1101 to step S1105.

<Startup of this embodiment>
An example of the operation at the time of start-up in the present embodiment will be described using the flowchart of FIG.
When the reset is released in step S1001, the page table in the paging hardware 1002 shown in FIG. 2 is set in step S1002. At this time, the physical address is not assigned to both the data segment and the BSS areas. Then, the C language is started in step S1003, the OS is started in step S1004, and the application program is started in step S1005.

<Description of operation during execution>
The manner in which the application program is executed in step S1005 of the flowchart of FIG. 14 will be described using the program 1101 shown in FIG. 11 as an example.
The application program is executed from the 103rd line of the program 1101 in FIG. The first valid line executed is line 105. The 105th line is a branching routine that executes the 106th line if the variable “fFirstAccess” is true, and executes the 108th line if the variable “fFirstAccess” is false. By executing this line, the value of the variable “fFirstAccess” declared in the 100th line is read. FIG. 15 is a diagram illustrating a state where the variable “fFirstAccess” is addressed by the processor 1001. In step S1002 of FIG. 14, the physical space of the data segment area and the physical space of the BSS area of the page table are not assigned. If an address to which physical space is not assigned is addressed, a page fault interrupt is generated. When a page fault interrupt occurs, the program starts.

<Page fault processing>
An example of the processing operation by the program that operates by the page fault interrupt will be described with reference to the flowchart of FIG.
First, in step S1201, a page fault interrupt is generated and the program is started. In step S1202, a physical memory not yet assigned is secured.
In step S1203, it is determined whether the page in which the page fault has occurred is a data segment or a BSS, and whether a data segment and a BBS are mixed. In the program 1101 shown in FIG. 11, since the 105th line is being executed, the variable “fFirstAccess” is a data segment, and the process branches to step S1204. In step S1204, the initial value is transferred from the corresponding address in the ROM 1303.

FIG. 17 is a diagram illustrating an example of a state in which the value “1” that is the initial value of the variable “fFirstAccess” stored in the ROM 1003 is transferred to the physical address of the RAM 1004. Besides the variable “fFirstAcces”, all the initial values of 4 Kbytes in the same page are transferred. And
In step S1207, a physical address is set for the page table.
FIG. 18 is a diagram illustrating an example of a state in which a physical address is set in the page table. In step S1208, control returns to the original program. As shown in FIG. 18, the variable “fFirstAccess” is assigned to the physical memory, and control is returned to the 105th line of the program 1101 shown in FIG. 11 in a state where the initial value 1 is assigned as the value. .

Since the variable “fFirstAccess” is true, the 106th line of the program 1101 shown in FIG. 11 is executed, and the value “FALSE” is substituted for the variable “fFirstAccess” on the 107th line. When the substitution on the 107th line is performed, the variable “fFirstAccess” is assigned to the physical memory, and therefore a page fault does not occur again.
When the 109th line is executed, the variable “Count” declared in the 101st line is accessed. The variable “Count” is in the BSS area, and a page fault interrupt occurs again for the first accessed page. FIG. 19 is a diagram illustrating an example of a state when a page fault occurs. The subsequent operation will be described again using the flowchart of FIG.

In step S1201 of FIG. 16, a page fault interrupt occurs, and free memory is secured in step S1202. In step S1203, the page address is determined. Since the variable “Count” is a BSS area variable, the process branches to step S1206. In step S1206, the physical memory secured in step S1202 is filled with zero (0).
FIG. 20 is a diagram illustrating an example of a state immediately after the reserved physical memory is filled with zero (0). In step S1207, a physical address is set in the page table. FIG. 21 is a diagram illustrating an example of a state immediately after the page table is updated in step S1207.

  The processor 1301 can access a variable initialized to zero (0) called “Count” in the physical memory. When the control returns to the original program in step S1208, the process returns to the 109th line of the program 301 in FIG. In this line, zero (0) which is the initial value of the variable “Count” is read, and the value is incremented and assigned. Since physical memory is assigned when assigned, the page fault interrupt will not occur again.

<Background transfer>
With the configuration described above, the C language can be started without waiting for the data segment transfer and the BSS zero clearing. And user applications can be started at high speed. However, the start-up as a digital camera starts after the user application starts.

  As a digital camera, there are many processes including a waiting time for the device to react, such as turning on the power to the image sensor, driving the lens 1007 to the initial position, and reading file information from the memory card 1009. By using these waiting times to transfer initial values to untransferred data segments and to initialize uninitialized BSSs, it is possible to reduce the overhead of on-demand transfer as much as possible.

An example of the operation of a program that performs initialization in the background will be described with reference to the flowchart of FIG.
In step S1401, the task is started. This task is activated so as to operate with a task having the lowest priority (priority order). In step S1402, the page table is searched for an address to which no physical address is assigned. In step S1403, it is determined whether there is an address to which no physical address is assigned.

  Since all addresses should not be assigned when execution is started, the process proceeds to step S1404 as a result of the determination in step S1403. In step S1404, an empty physical memory is secured. In step S1414, the page address is checked. If the page address is a BSS address, the process proceeds to step S1407, and the reserved physical memory is filled with zero (0).

If the page address is a data segment as a result of examining the page address in step S1414, the process branches to step S1406, and the initial value of the data segment is transferred from the ROM 1003 to the secured physical memory.
Further, as a result of checking the page address in step S1414, if the page address is a mixture of BSS and data segment, the process branches to step S1408, and for the BSS, the reserved physical memory is filled with zero (0) and the data For the segment, the initial value is transferred from the ROM 1003.

  When step S1406 or S1407 or S1408 has been executed, valid initial data is stored for the reserved physical memory. In step S1409, interrupts are prohibited, and in step S1410, it is confirmed again that a physical address has not been assigned to the page. Because this program is executed as the task with the lowest priority, the physical memory is already assigned to the page that has been accessed by the operation of another high priority program during the execution of steps S1402 to S1409. Because there is a possibility that has been.

If the physical address has already been assigned to the corresponding page, the physical address is released as a free area in step S1411, the interrupt prohibition is canceled in step S1413, and the process returns to step S1402.
On the other hand, if the physical address has not yet been assigned to the page in step S1410, the physical address is assigned to the page table in step S1412. In step S1413, the interrupt prohibition is canceled, and the process returns to step S1402. During steps S1409 to S1413, it is necessary to disable the interrupt and access the page table exclusively. By repeatedly executing steps S1402 to S1413, physical addresses are assigned to all pages, so that the process branches from step S1403 to step S1405, and the task ends.

  As described above, in this embodiment, a physical address is not assigned to both the data segment and BSS areas, the page table in the paging hardware 1002 is set, and the application program is started. Thereafter, when an address to which a physical address is not assigned is addressed, a page fault interrupt occurs, and a physical memory to which a physical address has not yet been assigned is secured. If the page where the page fault has occurred is a data segment, the initial value is transferred from the corresponding address of the ROM 1003 to the reserved physical memory. On the other hand, if the page in which the page fault has occurred is BSS, the reserved physical memory is filled with zero (0). As a result, the waiting time for transferring the data segment variable and clearing the BSS to 0 can be saved, and the execution of the application program can be started without waiting for the initialization of the variable area of the programming language. Therefore, for example, it is possible to significantly reduce the time from when the digital camera is turned on until it can be photographed.

  In this embodiment, the paging hardware 1002 having a virtual address is used. However, a similar system can be configured by using an MMU for the purpose of protection only, which does not have a virtual address / physical address conversion function. . In that case, the C language is started with the data segment and BSS registered as the protection target, and the initial value is transferred from the ROM to the data segment and the BSS is initialized by interruption of the protection fault. That's fine. Since other configurations are the same as those of the second embodiment described above, description thereof is omitted.

(Third embodiment)
Next, a third embodiment of the present invention will be described. In the description of the present embodiment, the same parts as those in the first and second embodiments described above are denoted by the same reference numerals as those in FIGS.
<Data segment copy upon request>
Also in this embodiment, as in the second embodiment described above, an embedded software framework that can be started at high speed is provided by reducing the time required for variable initialization at the time of computer language startup. I have to. However, in the second embodiment described above, the paging hardware 1302 is used, but in this embodiment, a data segment management unit described later is used.

  When the power-on reset is canceled, the initialization program operates as the first program to perform a cold start, and the data segment management unit is set. At this time, as the addresses covered by the copied area storage register and the non-copied area access detection unit, an area serving as a computer language data segment and BSS address is set, and the non-copied area access detection unit is validated. Then, control is transferred to an application program written in a high-level language suddenly without performing the process of copying the initial value of the data segment existing in the ROM 1003 to the RAM 1004 and the process of filling the BSS area with 0.

  When the processor (CPU) 1001 tries to access the data segment according to the execution of the application program, the program is stopped by the uncopied area access detection unit. Then, the initial value of the portion in the data segment accessed by the processor 1001 is copied from the ROM 1003 by the initial data copying unit, the management information in the copied area management table is updated, and control is returned to the program. When the processor 1001 accesses the same area of the data segment again, since the fact that copying has already been recorded is recorded in the copied area management table, the program is not interrupted by the uncopied area access detection unit. The present embodiment is realized using such a program. Hereinafter, details of the present embodiment will be described with reference to the drawings.

<Digital camera>
FIG. 23 is a diagram illustrating an example of a hardware configuration of a digital camera according to the third embodiment of this invention.

  In FIG. 23, reference numeral 2302 denotes a data segment management unit which is a hardware processing part. The data segment management unit 2302 manages both the data segment and the BSS by dividing them into fixed-length pages, and is designed as a removable computer peripheral device of the type connected to the bus. Other parts are the same as those shown in FIG. Similarly to the first and second embodiments, when the power is turned on, the processor 1001 reads out an instruction at an address called a reset vector of a program stored in the ROM 1003 and starts execution. Further, the data segment management unit 2302 is in an initial state immediately after reset, and is in a non-copied area access detection function stop state. Note that the process of taking an image and recording it on the memory card 1009 is not related to the essence of the present embodiment, and thus the description thereof is omitted.

<Data segment management unit>
FIG. 24 is a block diagram showing the configuration of the data segment management unit 2302 in detail according to the third embodiment of the present invention.
In FIG. 24, 101 is a data bus, and 102 is an address bus. The data bus 101 and the address bus 102 are connected to the data segment management unit 2302.

Reference numeral 103 denotes an address latch that takes in an address when an uninitialized area is detected. Reference numeral 104 denotes a programmable address decoder that can set the address where the data segment and the BSS start. Reference numeral 105 denotes an AND circuit group including a plurality of AND circuits for detecting that an address corresponding to the stored area storage bit 108 of the copied area management table 107 is accessed. Reference numeral 106 denotes an OR circuit that outputs when a signal is output from one of the AND circuits of the AND circuit group 105. Reference numeral 107 denotes a copied area management table which is a bit group for holding whether or not the area is an uncopied area. Note that the copied area management table 107 of this embodiment is a register that is written and read by the processor 101, for example.

  Reference numeral 108 denotes a stored area storage bit corresponding to one area of the copied area management table 107. Reference numeral 109 denotes a special bit, which is a data segment management unit enable bit for enabling or disabling the function of the data segment management unit 2302. 110 is an AND circuit that outputs a signal when the OR circuit 106 outputs a signal and the data segment management unit enable bit 109 outputs a bit that permits the function of the data segment management unit 2302. Reference numeral 111 denotes a NOT circuit that inverts the bit output from the data segment management unit enable bit 109.

<Page unit>
FIG. 25 is a diagram conceptually illustrating an example of the configuration of the copied area management table 107.
In FIG. 25, each bit of the copied area management table 107 corresponds to an area of the RAM 1004. The RAM 1004 is divided into pages of 4K bytes, and each copied area storage bit 108 of the copied area management table 107 corresponds to the divided page. Therefore, for example, in order to manage an area of 800 Kbytes, a 200-bit latch is sufficient.

<Copyed area management table>
FIG. 26 shows an example of the configuration of the copied area management table 107 in detail.
In FIG. 26, reference numeral 201 denotes an address decoder (Address Decoder) that decodes an address for reading and writing bits from the processor (CPU) 101. Reference numeral 204 denotes a latch corresponding to the copied area storage bit 108 shown in FIG. 207 is a reset signal (/ RESET), 208 is a read strobe signal (RD), and 209 is a write strobe signal (WR). 202 outputs a write signal when both the write strobe signal 209 and the address decoder 201 become true so that the latch 204 corresponding to a specific address takes in the data D0 to D3 from the data bus 101. AND circuit. An AND circuit 203 outputs a read signal when both the read strobe signal 208 and the address decoder 201 become true, and outputs data Q0 to Q3 of the latch 204 corresponding to a specific address to the data bus 101. is there. Reference numeral 205 denotes a NOT circuit that inverts the output of the latch 204.

  When the processor 101 is a 32-bit CPU, since the data bus 101 is 32 bits, 32 bits can be read and written at a time. In this case, AND circuits 202 and 203 and 32 latches 204 are connected to one output of the address decoder 201. The inverted output of each latch 204 is input to the AND circuit 105 shown in FIG. Further, the value of the latch 204 at the time of reset is 0, and the inverted output is high.

  Note that an example of a program processed in this embodiment and an example of an assembler list obtained by compiling the program are the same as those shown in FIGS. 11 and 12, respectively.

<Startup of this embodiment>
An example of the operation at the time of start-up in this embodiment will be described with reference to the flowchart of FIG.
When the reset is canceled in step S2701, the data segment management unit 2302 shown in FIG. 23 is set in step S2702. At this time, the management start address is set so that the data segment management unit 2302 is valid for both the data segment and BSS areas, and the uncopied area access detection function is enabled. Then, the C language is started in step S2703, the OS is started in step S2704, and the application program is started in step S2705.

<Data segment access>
The manner in which the application program in step S2705 of the flowchart of FIG. 27 is executed will be described by taking the program 1101 shown in FIG. 11 as an example. The application program is executed from the 103rd line of the program 1101 in FIG. The first valid line executed is line 105. The 105th line is a branching routine that executes the 106th line if the variable “fFirstAccess” is true, and executes the 108th line if the variable “fFirstAccess” is false. By executing this line, the value of the variable “fFirstAccess” declared in the 100th line is read. FIG. 28 is a diagram illustrating an example of a state where the variable “fFirstAccess” is addressed by the processor 1001. Since the bit of the copied area management table 107 corresponding to the variable “fFirstAccess” is not copied, the output of the AND circuit 110 in FIG. 24 becomes active, and the address of the variable “fFirstAccess” is recorded in the address latch 103. The Then, an NMI (non-maskable interrupt) signal 2801 is output to the processor 1001 shown in FIG. 23, and the NMI interrupt handler is activated.

<NMI interrupt handler processing (initial data copying means)>
FIG. 29 is a flowchart for explaining an example of processing of the NMI interrupt handler.
When NMI interrupt processing starts in step S2901, the address latched in the address latch 103 shown in FIG. 23 is checked in step S2902. Since the variable “fFirstAccess” described above is a variable in the data segment, the process branches to step S2903. In step S 2903, the initial value for 4 Kbytes of the page including the variable “fFirstAccess” is transferred from the address of the corresponding ROM 1003. FIG. 30 is a diagram illustrating an example of a state in which “TRUE”, which is an initial value, is transferred from the ROM 1003 to the RAM 1004 in the variable “fFirstAccess”.

In step S2904, the information in the copied area management table 107 is updated. FIG. 31 is a diagram showing an example of a state where the information in the copied area management table 107 is updated.
In step S2905, control is returned to the original program, but the program counter is set so as to start over from the instruction that caused the NMI interrupt, and then control is returned to the original program.

In step S2902, if the address latched in the address latch 103 is a page in which 4K bytes of the page including the variable “fFirstAccess” includes both the data segment and the BSS, the process proceeds to step S2906, and the initial data segment is initialized. The value is transferred from the ROM 1003 to the RAM 1004, and the data in the BSS area is initialized to zero.
When the program 1101 shown in FIG. 11 advances to the 107th line, the variable “fFirstAccess” is accessed again. However, since the information in the copied area storage register shown in FIG. The interrupt handler will not occur again.

<Access to BSS>
Then, when the program 1101 shown in FIG. 11 advances to the 109th line and accesses the variable “Count”, the NMI interrupt handler is started again, and the processing of the NMI interrupt hand and the like in FIG. 29 is executed. In this case, the address latched by the address latch 103 is a BBS area. Therefore, the process proceeds from step S2902 to step S2907. In step S2907, the 4K bytes of the page including the variable “Count” are initialized with all zeros. In step S2904, the information in the copied area management table 107 is updated, and control is returned to the original program in step S2905.

<Background transfer>
With the configuration described above, the C language program 1101 can be started without waiting for the data segment transfer and the BSS zero clearing. And user applications can be started at high speed. However, the start-up as a digital camera starts after the user application starts.

  For a digital camera, there are many processes including a waiting time for the device to react, such as turning on the power to the image sensor, driving the lens 1007 to the initial position, and reading file information from the memory card 1009. Therefore, by using these waiting times, it is possible to reduce the transfer overhead at the time of request as much as possible by transferring initial values to untransferred data segments and initializing uninitialized BSS. Become.

  FIG. 32 is a flowchart for explaining an example of background processing in the present embodiment. The program that starts the background processing is executed as a task with the lowest priority. Since this program operates only when there is no other program to be processed, the operation as a digital camera is not affected.

  When the task starts in step S3201, the start address of the data segment is set in the pointer in step S3202. In step S3203, the pointer value is read. As a result, the same thing occurs when the variable “fFirstAccess” is accessed in the 105th line of the program 1101 shown in FIG. 11, and the copied area storage bit 108 of the copied area management table 107 is not copied. If there is, the NMI interrupt handler process shown in FIG. 31 is activated, and the initial value is transferred from the ROM 1003 to the RAM 1004.

In step S3204, the pointer is advanced by 4 Kbytes which is the page size.
Next, in step S3205, it is determined whether or not the pointer has exceeded the last address of the BSS. If so, the process returns to step S3203. When the initialization of all areas of the data segment and BSS is completed by repeating the processing from step S3203 to step S3205, the process proceeds from step S3205 to step S3206, and the background task itself is terminated.

  As described above, in the present embodiment, the copied area management table 107 that stores whether data is copied from the area in the ROM 1003 where the initial value of the data segment is stored to the area (RAM 1004) corresponding to the data segment is stored. If an access to an area in the data segment of the RAM 1004 that has not yet been copied from the ROM 103 is detected, the program being executed is interrupted, and the ROM 1003 to the RAM 1004 is interrupted in the processing of the NMI interrupt handler. After the data copy, the operation of copying the initial value of the data segment from the ROM 1003 to the RAM 1004 by updating the information in the copied area management table 107 and restarting the execution of the program is performed on demand (when requested). ) It was to perform a distributed manner.

  This makes it possible to initialize all data segments that were previously required before program execution by distributing only the necessary parts as the program progresses, reducing the time lag from startup to program execution. It can be greatly shortened.

  The copied area management table 107 of this embodiment is a register that can be written to and read from the processor 1001 that is a CPU, and each copied area storage bit 108 is a block of a certain size starting from a specific address in the RAM 1004. It corresponds. When the output of the copied area management table 107 and the address bus 102 are monitored and it is detected that the address matches an uncopied area in the management information of the copied area management table 107, an exception such as NMI (non-maskable interrupt) is detected. A process is generated, and the detected address is automatically stored in a register that can be read and written by the processor 1001, which is a CPU. A software exception is that the program being executed is interrupted by the occurrence of this NMI exception, and after copying data from the ROM 1003 to the RAM 1004, the information in the copied area management table 107 is updated to resume the execution of the program. Since it is realized with a processing handler, a system can be constructed with a small circuit scale.

  Since the start address of the address covered by the copied area management table 107 and the non-copied area section for detecting access to the uncopied area can be dynamically set, the copied area management table 107 and the non-copied area are set. The area covered by the access detector can be configured with an optimal size.

  The uncopied area access detection unit is provided with an uncopied area access detection prohibition function for stopping the detection function, and automatically enters an uncopied area access detection prohibition state at power-on reset (cold start). . The copied area storage register automatically sets all areas as uncopied areas at power-on reset (cold start). By doing so, it is possible to reduce the time required for the initial setting by software, and it is possible to start up the computer in a shorter time.

  At the time of start-up of the digital camera, there is a short period of time during which the processor 1001, which is a CPU, is in a waiting state, such as driving the lens 1007 and reading a file. Therefore, in this embodiment, when an idle state in which there is no valid program to be executed, data copy from the ROM 1003 to the RAM 1004 and information update in the copied area management table 107 are performed. Thereby, when the program accesses the data segment, the possibility that the copying from the ROM 1003 to the RAM 1004 has already been completed is improved, and the processing can be performed at a higher speed.

(Other embodiments of the present invention)
In order to operate various devices to realize the functions of the above-described embodiments, program codes of software for realizing the functions of the above-described embodiments are provided to an apparatus or a computer in the system connected to the various devices. What is implemented by operating the various devices according to a program supplied and stored in a computer (CPU or MPU) of the system or apparatus is also included in the scope of the present invention.

  In this case, the program code of the software itself realizes the functions of the above-described embodiments, and the program code itself and means for supplying the program code to the computer, for example, the program code are stored. The recorded medium constitutes the present invention. As a recording medium for storing the program code, for example, a flexible disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a magnetic tape, a nonvolatile memory card, a ROM, or the like can be used.

  Further, by executing the program code supplied by the computer, not only the functions of the above-described embodiments are realized, but also the OS (operating system) or other application software in which the program code is running on the computer, etc. It goes without saying that the program code is also included in the embodiment of the present invention even when the functions of the above-described embodiment are realized in cooperation with the embodiment.

  Further, after the supplied program code is stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, the CPU provided in the function expansion board or function expansion unit based on the instruction of the program code Needless to say, the present invention includes a case where the functions of the above-described embodiment are realized by performing part or all of the actual processing.

It is the figure which showed the 1st Embodiment of this invention and showed an example of the concept of a page table. It is the figure which showed the 1st Embodiment of this invention and showed an example of the hardware constitutions of a digital camera. FIG. 2 is a diagram illustrating an example of states of paging hardware, a ROM, and a RAM immediately after the system in the digital camera is activated according to the first embodiment of this invention. It is the figure which showed the 1st Embodiment of this invention and showed the source code which is an example of an application program. It is a flowchart which shows the 1st Embodiment of this invention and demonstrates an example of operation | movement of the function CreateShadow. It is the figure which showed the 1st Embodiment of this invention and showed an example of the state of the paging hardware, ROM, and RAM when the operation | movement of the function CreateShadow was complete | finished. 5 is a flowchart illustrating an example of a page fault interrupt process according to the first embodiment of this invention. It is a figure showing a 1st embodiment of the present invention and showing an example of a state of paging hardware, ROM, and RAM at the time of copying contents of a corresponding page of a ROM to an empty frame. It is the figure which showed the 1st Embodiment of this invention and showed an example of the state of the paging hardware at the time of assigning a frame to a page table, ROM, and RAM. It is a figure showing a 1st embodiment of the present invention and showing an example of a state of paging hardware, ROM, and RAM at the time of assigning a frame to page memory. It is the figure which showed the 2nd Embodiment of this invention and showed an example of the program written in C language. It is the figure which showed the 2nd Embodiment of this invention and showed an example of the assembler list. It is a flowchart which shows the 2nd Embodiment of this invention and demonstrates the conventional operation | movement at the time of start-up. It is a flowchart which shows the 2nd Embodiment of this invention and demonstrates an example of the operation | movement at the time of startup. It is a figure which shows the 2nd Embodiment of this invention and shows a mode that the physical address is not assigned to the page table of a variable area | region. It is a flowchart which shows the 2nd Embodiment of this invention and demonstrates an example of the processing operation by the program which operate | moves by a page fault interruption. It is the figure which showed the 2nd Embodiment of this invention and showed an example of the mode that the initial value of the variable stored in ROM was transferred to the physical address of RAM. It is the figure which showed the 2nd Embodiment of this invention and showed an example of a mode that the physical space address was set to the page table. It is the figure which showed the 2nd Embodiment of this invention and showed an example of the mode when the page fault generate | occur | produced. It is the figure which showed the 2nd Embodiment of this invention and showed an example immediately after a physical memory was filled with zero (0). It is the figure which showed the 2nd Embodiment of this invention and showed an example of the mode immediately after updating a page table. It is a flowchart which shows the 2nd Embodiment of this invention and demonstrates an example of the operation | movement of the program which initializes in background. It is the figure which showed the 3rd Embodiment of this invention and showed an example of the hardware constitutions of a digital camera. It is the block diagram which showed the 3rd Embodiment of this invention and showed the structure of the data segment management unit in detail. FIG. 10 is a diagram conceptually illustrating an example of a configuration of a copied area storage register according to the third embodiment of this invention. It is the figure which showed the 3rd Embodiment of this invention and showed an example of the structure of the copied area storage register in detail. It is a flowchart which shows the 3rd Embodiment of this invention and demonstrates an example of the operation | movement at the time of startup. It is the figure which shows the 3rd Embodiment of this invention and showed an example of a mode that the variable "fFirstAccess" is addressed by the processor. 10 is a flowchart illustrating an example of processing of an NMI interrupt handler according to the third embodiment of this invention. FIG. 15 is a diagram illustrating an example in which “TRUE” that is an initial value of a variable “fFirstAccess” is transferred from the ROM to the RAM according to the third embodiment of this invention. It is the figure which showed the 3rd Embodiment of this invention and showed an example of the mode of the state in which the information of the copied area storage register was updated. It is a flowchart which shows the 3rd Embodiment of this invention and demonstrates an example of background processing.

Explanation of symbols

101 data bus 102 address bus 103 address latch 104 programmable address decoder 105 AND circuit 106 OR circuit 107 copied area management table 108 stored area storage bit 109 data segment management unit enable bit 110 AND circuit 201 address decoder 202, 203 AND circuit 204 Latch 207 Reset signal 208 Read strobe signal 209 Write strobe signal 1001 Processor 1002 Paging hardware 1003 ROM
1004 RAM
1005 A / D converter 1006 CCD
1007 Lens 1008 Interface 1009 Memory card 1011 I / O interface 1010 Lens drive mechanism 2302 Data segment management unit

Claims (17)

An electronic device that executes the program using a page table that manages a virtual address and a physical address of the program in units of pages,
Initialization means for setting the page table and initializing the page table so that a physical address in an area of a variable described in the program is not assigned;
Program execution means for executing a program after the page table is initialized by the initialization means;
When the program is executed by the program execution means, when an area to which the physical address is not allocated is accessed, variable setting means for setting an initial value of a variable in the area is provided. machine. The variable setting means includes an interrupt process execution means for executing a page fault interrupt process when a page fault occurs when an area to which the physical address is not allocated is accessed by executing the program by the program execution means. Have
The electronic device according to claim 1, wherein an initial value of a variable in an area to which the physical address is not assigned is set in the page fault interrupt process.   The electronic apparatus according to claim 1, further comprising a physical address setting unit that sets a physical address in an area in which the initial value of the variable is set in the page table.   The initialization section sets the page table so that physical addresses of the data segment area and the BSS area are not allocated, and initializes the page table. The electronic device of Claim 1.   When the area to which the physical address is not assigned is a BSS area, the variable setting means sets 0 as an initial value of a variable in the area, and the area to which the physical address is not assigned is a data segment area 5. The electronic device according to claim 4, wherein the initial value of the variable is read from a predetermined storage medium, and the read initial value is set as the initial value of the variable in the area.   The electronic apparatus according to claim 1, wherein the program execution unit executes the program as a task having a low priority. An electronic device that copies and executes program data recorded on a first recording medium on a second recording medium,
Detecting means for detecting access to an area of the second recording medium that is not copied from the first recording medium;
When the detection means detects an access to an uncopied area, the execution of the program is interrupted, and the uncopied area from the first recording medium to the uncopied area of the second recording medium is handled. A copying means for copying the program of the part;
Management means for managing an area of the second recording medium that is a copy destination of program data copied by the copying means;
An electronic apparatus comprising: program execution restarting means for restarting execution of the suspended program after the management unit manages the area of the second recording medium. The management means includes a register, and each bit of the register corresponds to a block of a certain size starting from a specific address of the second recording medium,
The detecting means is the address of the area of the second recording medium managed by the managing means, and the address of the uncopied area where the program data is not copied matches the address being accessed. Is detected using the value of the bit of the register,
The electronic device according to claim 7, wherein the management unit stores an address detected by the detection unit as a match.   At least one of the start address of the address indicating the area of the second recording medium managed by the management unit and the start address of the address to be detected by the detection unit is variable. The electronic device according to claim 8. The detection means includes detection stop means for stopping the detection,
The electronic device according to claim 9, wherein the detection stop unit stops the detection when the electronic device is activated from a power-off state.   When the management unit is started from a power-off state, the management unit sets the area of the second recording medium to an uncopied area where copying from the first recording medium is not performed. The electronic device according to claim 9 or 10. Among the programs, there is a state detection means for detecting an idle state where there is no effective program to be executed,
When the idle state is detected by the state detecting unit, the copying unit transfers program data corresponding to the non-copied area from the first recording medium to the non-copied area of the second recording medium. The electronic device according to claim 7, wherein the electronic device is copied.   The electronic device according to claim 1, wherein the program is an application program. A data processing method for executing the program using a page table for managing the virtual address and physical address of the program in units of pages,
An initialization step of initializing the page table by setting the page table so that a physical address in the variable area described in the program is not assigned;
A program execution step for executing the program after the page table is initialized by the initialization step;
A variable setting step for setting an initial value of a variable in the area when an area to which the physical address is not allocated is accessed by executing the program in the program execution step. Processing method. A data processing method for copying and executing program data recorded in a first recording medium on a second recording medium,
A detection step of detecting access to an area of the second recording medium that is not copied from the first recording medium;
When an access to an uncopied area is detected by the detecting step, execution of the program is interrupted, and the uncopied area from the first recording medium to the uncopied area of the second recording medium is handled. A copying step for copying the program of the part;
A management step of managing an area of the second recording medium which is a copy destination of the program data copied in the copying step;
A data processing method comprising: a program execution restarting step for restarting execution of the interrupted program after the management step manages the area of the second recording medium. When executing the program using a page table that manages the virtual address and physical address of the program in units of pages,
An initialization step of initializing the page table by setting the page table so that a physical address in the variable area described in the program is not assigned;
A program execution step for executing the program after the page table is initialized by the initialization step;
When an area to which the physical address is not assigned is accessed by executing the program in the program execution step, the computer is caused to execute a variable setting step for setting an initial value of a variable in the area. Computer program. When copying and executing the program data recorded on the first recording medium to the second recording medium,
A detection step of detecting access to an area of the second recording medium that is not copied from the first recording medium;
When an access to an uncopied area is detected by the detecting step, execution of the program is interrupted, and the uncopied area from the first recording medium to the uncopied area of the second recording medium is handled. A copying step for copying the program of the part;
A management step of managing an area of the second recording medium which is a copy destination of the program data copied in the copying step;
A computer program causing a computer to execute a program execution resuming step of resuming execution of the interrupted program after the management step manages the area of the second recording medium.

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