JP2008124682A - Receiving device and receiving method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a receiving device capable of receiving analog broadcasting and digital broadcasting and improving an S/N ratio. <P>SOLUTION: The receiving device is provided with a frequency conversion part 20 for inputting an analog broadcasting signal and a digital broadcasting signal and frequency-converting the analog broadcasting signal into a digital intermediate frequency signal, an analog demodulation circuit 40, a digital demodulation circuit 50, a signal SLEEP1 for controlling the operation of the analog demodulation circuit 40, and a controller 60 for outputting a signal SLEEP2 for controlling the operation of the digital demodulation circuit 50. Wherein, by controlling the SLEEP1 and SLEEP2, the analog demodulation circuit 40 is operated and the digital demodulation circuit 50 is stopped during the reception of the analog broadcasting, and during the reception of the digital broadcasting, the digital demodulation circuit 50 is operated and the analog demodulation circuit 40 is stopped. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a plurality of signal receiving apparatuses, and more particularly to a digital / analog receiving apparatus capable of selectively receiving a digitally modulated television signal and an analog modulated television signal.

  Digitization of television broadcasts such as digital CS (Communication Satellite) broadcasts, BS (Broadcast Satellite) broadcasts, and digital terrestrial broadcasts has been promoted, and gradually, from analog television broadcasts to digital television broadcasts. Transition is progressing.

  However, even if television broadcasting is digitized, existing analog television broadcasting will not be stopped immediately. For this reason, analog television broadcasts and digital television broadcasts coexist in a transitional period from analog television broadcasts to digital television broadcasts.

  Thus, when both analog television broadcasting and digital television broadcasting are performed, a television receiver capable of receiving both analog television broadcasting and digital television broadcasting is desired. .

  FIG. 7 shows an example of a receiving apparatus of a conventional television receiver that can receive both digital television broadcasting and analog television broadcasting. As shown in FIG. 7, the conventional television receiver mainly includes an antenna 10, a tuner circuit 20, SAW filters 30, 31, an analog demodulation circuit 40, and a digital demodulation circuit 50.

  The high-frequency signal received by the antenna 10 selects a desired channel frequency by the digital / analog common tuner circuit 20, is converted into an intermediate frequency signal, and is distributed to a system for performing analog demodulation processing and a system for performing digital demodulation processing. .

  When analog broadcasting is received, the intermediate frequency signal passes through a band-pass filter (generally a SAW filter) 30 and is demodulated by an analog demodulation circuit 40 to output an analog video detection output and an audio output. .

  On the other hand, when a digital broadcast is received, the intermediate frequency signal passes through a band pass filter (generally a SAW filter) 31 and is demodulated by the digital demodulation circuit 50.

  The controller 60 outputs the frequency setting data to the tuner circuit 20 according to the reception channel, and the output RFAGC1 of the analog demodulation circuit 40 to the AGC switching circuit 61 according to whether the reception channel is analog broadcasting or digital broadcasting. An AGC switching signal for switching the output RFAGC2 of the digital demodulation circuit 50 is output.

For example, Patent Document 1 is known as prior art document information relating to the invention of this application.
Japanese Patent No. 3741648

  However, in the conventional receiving apparatus, the digital demodulation circuit 50 operates even when analog broadcasting is received, and the analog demodulation circuit 40 operates even when digital broadcasting is received. Since the analog demodulator circuit 40 and the digital demodulator circuit 50 are arranged on the same substrate, the analog demodulator circuit 40 is affected by the noise generated from the digital demodulator circuit 50 when receiving an analog broadcast. The circuit 50 is affected by noise generated from the analog demodulation circuit 40, and problems such as deterioration of the S / N ratio and deterioration of sensitivity occur.

  In recent years, with the spread of thin TVs, tuner packs and boards are demanded to be small and have low power consumption, and the distance between the analog demodulator circuit 40 and the digital demodulator circuit 50 has become short, causing the above-mentioned problems. It has become easier.

  The present invention solves the above-described conventional problems, and suppresses the influence of noise generated from each other of the analog demodulation circuit 40 and the digital demodulation circuit 50, and is small in power consumption capable of receiving both analog broadcasting and digital broadcasting satisfactorily. An object of the present invention is to provide a receiving apparatus having a small size.

In order to solve the above problems, a receiving apparatus of the present invention inputs a first input signal and a second input signal, converts the first input signal into a first intermediate frequency signal, and converts the second input signal to the second intermediate frequency signal. A frequency converter that converts the frequency of the input signal into a second intermediate frequency signal;
A first demodulation circuit for demodulating a first demodulated signal from the first intermediate frequency signal;
A second demodulation circuit for demodulating a second demodulated signal from the second intermediate frequency signal;
A signal for controlling the operation of the first demodulation circuit; and a controller for outputting a signal for controlling the operation of the second demodulation circuit;
The receiving apparatus is characterized in that when one of the input signals is received by controlling the output signal of the controller, the demodulating circuit on the receiving signal side operates and the operation of the other demodulating circuit stops.

  According to this configuration, when the first input signal is received or the second input signal is received, the other demodulation circuit is not operated, so that it is not affected by noise and has a good S / N ratio. There is an effect that can be obtained.

Here, the first input signal is an analog television broadcast,
The second input signal is a digital television broadcast;
The first demodulation circuit can demodulate an analog video signal from an analog television broadcast,
2. The receiving apparatus according to claim 1, wherein the second demodulating circuit can demodulate a digital signal from a digital television broadcast.

  According to this configuration, both analog broadcast and digital broadcast can be received satisfactorily.

Here, at the time of channel search, the analog demodulator circuit as the first demodulator circuit and the digital demodulator circuit as the second demodulator circuit operate together under the control of the output signal of the controller. The receiving apparatus according to claim 2 may be used.

  According to this configuration, the channel search can be performed in the same manner as in the prior art.

4. The receiving apparatus according to claim 2, wherein the analog demodulating circuit which is the first demodulating circuit minimizes the gain of the amplifier and stops the voltage controlled oscillator when the operation is stopped. It is good.

  According to this configuration, it is possible to obtain a good S / N ratio when receiving digital broadcasting. Furthermore, there is an effect that power consumption is low.

Here, the digital demodulating circuit as the second demodulating circuit may fix the input / output when the operation is stopped, and may be a receiving apparatus according to any one of claims 2 to 4.

  According to this configuration, a good S / N ratio can be obtained even when receiving an analog broadcast.

  The receiving method of the present invention also has the same means as described above, and has the same effect.

  According to the present invention, both analog broadcasting and digital broadcasting can be received well. This is particularly effective for a small receiver.

  The receiving apparatus according to the present embodiment is configured such that the analog demodulation circuit 40 is stopped when a digital broadcast is received, and the digital demodulation circuit 50 is stopped when an analog broadcast is received. That is, there is no influence of noise from the digital demodulation circuit 50 when receiving an analog broadcast, and no influence of noise from the analog demodulation circuit 40 when receiving a digital broadcast. As a result, both analog broadcasting and digital broadcasting can be received well.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same part in a figure, or an equivalent part, and the description is not repeated.

  FIG. 1 is a block diagram showing a receiving apparatus according to an embodiment of the present invention. 2 shows an example of the digital / analog shared tuner 20, FIG. 3 shows an example of the analog demodulation circuit 40, and FIG. 4 shows an example of the digital demodulation circuit 50.

  FIG. 2A is an example of a single conversion type digital analog shared tuner circuit. The high-frequency signal received by the antenna 10 is amplified to a predetermined level by the high-frequency amplifier 201 and given to the mixer 202. The mixer 202 is controlled by the PLL circuit 204, mixed with the local oscillation signal from the local oscillation circuit 203, and frequency-converted to an intermediate frequency signal. The oscillation frequency setting data of the local oscillation signal is output as a channel selection signal from a controller 60 such as a microcomputer, and is set in the PLL circuit 204 through the decoder 205.

  FIG. 2B is an example of a double-conversion digital / analog shared tuner circuit, and performs frequency conversion from a high frequency signal to an intermediate frequency signal in the same manner as in the single conversion method. The high-frequency signal received by the antenna 10 is amplified to a predetermined level by the first high-frequency amplifier 206 and is supplied to the first mixer 207. The first mixer 207 is controlled by the first PLL circuit 209 to be mixed with the first local oscillation signal from the first local oscillator 208 and up-converted to the first intermediate frequency signal. The first intermediate frequency signal is band-limited by the band-pass filter 210, amplified by the second high-frequency amplifier 211, and mixed with the second local oscillation signal from the second local oscillator 213 by the second mixer 212. , Downconverted to a second intermediate frequency signal.

  Next, the intermediate frequency signal output from the digital / analog common tuner circuit 20 is distributed to a system for performing analog demodulation processing and a system for performing digital demodulation processing.

  When analog broadcasting is received, the intermediate frequency signal passes through a band pass filter (generally a SAW filter) 30 and is input to the analog demodulation circuit 40. FIG. 3 shows an example of the analog demodulation circuit 40. The intermediate frequency signal is amplified to a certain level by the VIF amplifier 401 and input to the video detector 402. The VIF detector 402 multiplies the output signal from the VIF amplifier 401 and the output signal from the VCO (voltage controlled oscillator) 404, and outputs a video detection output. This video detection output is output to the outside and fed back to the internal AGC circuit 403. The AGC circuit 403 detects the level of the video detection output signal, controls the gain of the VIF amplifier 401, and maintains the output at a constant level. Also, RFAGC1 is output to control the gain of the high-frequency amplifier 201. At the time of analog broadcast reception, the AGC switching circuit 61 selects RFAGC 1 based on the switching signal from the controller 60 and inputs it to the high-frequency amplifier 201. The audio intermediate frequency signal separated from the video signal by the SAW filter 30 is amplified by the QIF amplifier 406, multiplied by the output oscillation signal of the VCO 404 by the audio mixer 407, and converted into an SIF signal. Thereafter, the SIF signal is subjected to voice processing and output.

  On the other hand, when a digital broadcast is received, the intermediate frequency signal output from the digital / analog shared tuner circuit 20 passes through a band pass filter (generally a SAW filter) 31 and is input to the digital demodulation circuit 50. The An example of the digital demodulation circuit 50 is shown in FIG. The intermediate frequency signal is amplified to a certain level by the IF amplifier 501, converted to a digital signal by the A / D converter 502, and demodulated such as QAM, VBM, OFDM by the demodulation circuit 503. Further, the AGC detection circuit 504 controls the gain of the IF amplifier 501 so that digital demodulation is appropriately performed, and outputs RFAGC2 that controls the gain of the RF amplifier 201 (206, 211). At the time of digital broadcast reception, the AGC switching circuit 61 selects RFAGC2 based on the switching signal from the controller 60 and inputs it to the high frequency amplifier 201 (206, 211).

  The controller 60 outputs PLL frequency setting data set in the PLL circuit 204 (209, 214) in order to frequency-convert the received high frequency signal into an intermediate frequency signal according to the reception channel. Also, based on the reception channel, it is determined whether the broadcast is analog broadcast or digital broadcast, and an AGC switching signal for switching between RFAGC1 and RFAGC2 is output to the AGC switching circuit 61. Further, a signal SLEEP1 for controlling the operation of the analog demodulation circuit 40 and a signal SLEEP2 for controlling the operation of the digital demodulation circuit 50 are output. These frequency setting data, AGC switching signal, analog demodulation circuit control signal SLEEP1, and digital demodulation circuit control signal SLEEP2 are output as a bus such as IIC and control each circuit through a decoder.

  Next, the operation of the receiving apparatus of the present invention configured as described above will be described. FIG. 5 shows the state of SLEEP1 and SLEEP2 in each broadcast reception state of the present invention.

  At the time of analog broadcast reception, the analog demodulation circuit 40 is controlled by the SLEEP1 signal. Further, the operation of the digital demodulation circuit 50 is controlled to stop by the SLEEP2 signal. On the other hand, at the time of digital broadcast reception, the digital demodulation circuit 50 is operated by the signal of SLEEP2, and the analog demodulation circuit 40 is controlled to stop the operation by the signal of SLEEP1. Further, at the time of channel search, the analog demodulation circuit 40 and the digital demodulation circuit 50 are controlled to operate by SLEEP1 and SLEEP2.

  The analog demodulation circuit 40 is configured to operate as follows when the operation is stopped by SLEEP1.

  (1) The bus interface 410 receives the SLEEP1 signal transmitted from the controller 60 via a bus such as I2C, and outputs a signal for controlling each circuit. Therefore, this bus interface 410 is always operated. As a result, the SLEEP1 signal can always be received.

  (2) Minimize the gain of the amplifier (VIF amplifier 401, QIF amplifier 406, etc.). For example, if the IFAGC1 voltage decreases as the input intensity increases as shown in FIG. 6, the gain of the VIF amplifier 401 can be minimized by decreasing the IFAGC1 voltage. If the gain of the amplifier is reduced, even if noise or a digital signal is input, the outputs of the video detector 402 and the audio mixer 407 are reduced, and the generation of noise can be suppressed.

  (3) Stop the oscillation operation of the VCO (VCO 404, etc.). FIG. 7 shows an example of the VCO 404. In many VCOs such as the VCO in FIG. 7, when the current (I1 in FIG. 7) is turned OFF, the VCO stops. By stopping the VCO, the VCO component unnecessary for the output of the video detector 402 and the audio mixer 407 and its high frequency component are not output.

  (4) Reduce current. For example, it is effective to reduce the current of the VIF amplifier 401, the VCO 404, the phase detector, etc. with a large current. By reducing the current, the power consumption can be reduced and the reliability of the semiconductor device is improved.

  (5) The voltage and impedance of the input terminal and output terminal of the analog demodulation circuit 40 are not changed during sleep and reception. This is because, depending on the peripheral circuits connected to the preceding stage and the subsequent stage, the voltage and impedance change, thereby increasing the current and impairing the reliability of the semiconductor device.

  As described above, the analog demodulating circuit 40 controlled to stop the operation by the signal of the SLEEP 1 at the time of digital broadcasting reception has a substantially constant output voltage even when there is no input or an analog signal input, and hardly generates noise. The digital demodulation circuit 50 can accurately demodulate without being affected by noise. In addition, power consumption can be reduced by stopping the operation of an amplifier or VCO that consumes a large amount of current, and the reliability of the semiconductor device can be improved.

  On the other hand, when the operation of the digital demodulation circuit 50 is stopped by SLEEP2, for example, the following operation is performed.

  (1) The bus interface 505 inputs the SLEEP2 signal transmitted from the controller 60 through a bus such as I2C, and outputs a signal for controlling each circuit. Therefore, this bus interface 505 is always operated. Therefore, the SLEEP2 signal can always be received.

  (2) Fix the logic input and output. FIG. 8 shows an example of a circuit in which input / output is fixed. In this way, it can be fixed by adding an AND circuit or an OR circuit to the input / output. By fixing the input, it is possible to reduce changes in the internal circuit of the digital circuit, and by fixing the output, even if the output fluctuates due to noise from the inside of the digital circuit, it can be made constant. it can. For this reason, noise from the digital circuit and the output of the digital circuit can be reduced.

  (3) Stop the clock. As in the case of fixing the input, the clock can be stopped by adding an AND circuit or an OR circuit, and the change in the internal circuit can be reduced. Therefore, noise can be reduced. Further, by stopping the clock, the current that flows when changing is reduced, and power consumption can be reduced.

  At the time of analog broadcast reception, the digital demodulation circuit 50 controlled to stop the operation by the signal of SLEEP2 hardly generates noise even when there is no input or an analog signal input, and the analog demodulation circuit 40 is affected by the noise. A good S / N ratio can be obtained without this. Further, by stopping (fixing) the clock and input of the digital demodulation circuit, the current is reduced and the power consumption can be reduced.

  Further, at the time of channel search, control is performed so that both the analog demodulation circuit 40 and the digital demodulation circuit 50 operate by SLEEP1 and SLEEP2. For this reason, it is possible to detect both digital and analog broadcast channels with a single channel search operation, and the time can be reduced. Usually, the channel search time takes several tens of minutes, so that the time is greatly shortened compared to channel search for digital and analog broadcasting. In this case, since it is not necessary to display the received video on the screen, there is no problem with a slight deterioration in the S / N ratio.

  At the time of channel switching between analog broadcast reception and digital broadcast reception, since the power is not completely turned off, the transition time from the stop state to the reception state can be shortened. Conversely, if the power is completely turned off, the power consumption is reduced, but the transition time becomes longer, which may cause inconvenience for TV viewers.

  As described above, in the receiving apparatus of the present invention, when one is being received, the other is stopped. Therefore, it can be received well without being affected by noise.

  Note that the receiving apparatus in FIG. 1 is typically mounted on a receiving apparatus such as a television set. In particular, it is suitable for TV tuner packs that have been downsized in recent years.

  Further, in this example, the reception signal has been described as being input from the antenna, but it goes without saying that the reception signal is input from the cable during reception by the cable TV.

  The receiving apparatus of the present invention is useful for a receiving apparatus having a plurality of demodulating circuits, particularly a digital / analog common receiving apparatus having an analog demodulating circuit and a digital demodulating circuit, such as a television tuner pack and a television set.

The block diagram which shows the receiver by one embodiment of this invention 1 is a block diagram showing a configuration example of a digital / analog shared tuner circuit 20 shown in FIG. 1 is a block diagram showing a configuration example of the analog demodulation circuit 40 shown in FIG. 1 is a block diagram showing a configuration example of the digital demodulation circuit 50 shown in FIG. The figure which shows the state of signal SLEEP1 and SLEEP2 which are shown in FIG. 1 in each broadcast reception state The figure which shows an example of the relationship between the voltage of the output IFAGC1 of the AGC circuit 403 shown in FIG. The figure which shows an example of the circuit of VCO404 shown in FIG. The figure which shows an example of the input / output fixed circuit of the digital demodulation circuit 503 shown in FIG. Block diagram showing a conventional receiver

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Antenna 20 Digital analog tuner pack 30, 31 SAW filter 40 Analog demodulation circuit 50 Digital demodulation circuit 60 Controller 61 AGC switching circuit 201 High frequency amplifier 202 Mixer 203 Local oscillator 204 PLL circuit 205 Decoder 401 VIF amplifier 402 VIF detector 403 AGC circuit 404 VCO (Voltage Controlled Oscillator)
405 PLL circuit 406 QIF amplifier 407 QIF mixer 408 Audio processing circuit 501 Digital IF amplifier 502 A / D converter 503 Digital demodulation circuit (QAM, VBM, OFDM, etc.)
504 AGC circuit

Claims (6)

A first input signal and a second input signal are input, the first input signal is frequency converted to a first intermediate frequency signal, and the second input signal is frequency converted to a second intermediate frequency signal. A frequency converter;
A first demodulation circuit for demodulating a first demodulated signal from the first intermediate frequency signal;
A second demodulation circuit for demodulating a second demodulated signal from the second intermediate frequency signal;
A signal for controlling the operation of the first demodulation circuit; and a controller for outputting a signal for controlling the operation of the second demodulation circuit;
A receiving apparatus characterized in that when one of the input signals is received by controlling the output signal of the controller, the demodulator circuit on the received signal side operates and the operation of the other demodulator circuit stops. The first input signal is an analog television broadcast;
The second input signal is a digital television broadcast;
The first demodulation circuit can demodulate an analog video signal from an analog television broadcast,
The receiving apparatus according to claim 1, wherein the second demodulation circuit can demodulate a digital signal from a digital television broadcast. Further, at the time of channel search, the analog demodulation circuit as the first demodulation circuit and the digital demodulation circuit as the second demodulation circuit operate together under the control of the output signal of the controller. The receiving device described. 4. The receiving apparatus according to claim 2, wherein the analog demodulating circuit which is the first demodulating circuit minimizes the gain of the amplifier and stops the voltage controlled oscillator when the operation is stopped. 5. The receiving apparatus according to claim 2, wherein the digital demodulating circuit which is the second demodulating circuit fixes input and output when the operation is stopped. The frequency converter converts the first input signal into a first intermediate frequency signal, converts the second input signal into a second intermediate frequency signal,
Demodulating a first demodulated signal from the first intermediate frequency signal in a first demodulating circuit;
A second demodulator circuit demodulates the second demodulated signal from the second intermediate frequency signal;
A receiving method, wherein when one of the input signals is received by controlling the output signal of the controller, the demodulating circuit on the receiving signal side operates and the operation of the other demodulating circuit stops.

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