JP2008118829A - Protective device of inverter device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a protective device of an inverter device that uses a micro computer, capable of preventing breakage of a main circuit semiconductor element even if a clock signal stops while suppressing the occurrence of burnout or degraded insulation of a motor coil. <P>SOLUTION: The clock signal output of a clock oscillator 31 is supplied to a clock signal stop judging circuit 41. When the clock signal stop judging circuit 41 judges that the clock signal has stopped, it transmits stop judgement output. Then, a switch SW1 inserted into an electric path of an electromagnetic contact device MC2, which is provided outside the inverter device and operates on an external command, is turned OFF by the stop judgement output. Therefore an electromagnetic contact device MC2 is turned OFF as well, and its contact point 12 is opened. Since the AC power of an AC power source 11 is not supplied to a forward conversion circuit 13, the current that flows a main circuit semiconductor element of a reverse conversion circuit 17 expires by such amount of energy as accumulated in an electrolytic capacitor 16. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a protection device for an AC variable speed drive PWM inverter device controlled using a microcomputer.

  FIG. 8 shows a configuration diagram of an AC variable speed drive PWM inverter device using a microcomputer (hereinafter referred to as a microcomputer). This type of inverter device operates while maintaining a constant relationship between output voltage and frequency. This is an example of a device that obtains a voltage output by a sine wave-triangular wave comparison method with a constant V / f control method.

  In FIG. 8, 11 is an AC power supply, and the AC power of the AC power supply 11 is supplied to a forward conversion circuit (rectifier circuit) 13 via a contact 12 of an electromagnetic contactor MC2 that operates according to an external command. The positive side of the DC power source converted into DC power by the forward conversion circuit 13 is connected to an electrolytic capacitor 16 and an inverse conversion circuit (inverter) 17 via a parallel circuit of a contact 14 and a precharging resistor 15 of an electromagnetic contactor MC1 described later. Further, the negative side of the forward conversion circuit 13 is connected to the negative side of the electrolytic capacitor 16 and the reverse conversion circuit 17.

  The inverse conversion circuit 17 is composed of, for example, a main circuit semiconductor element made of IGBT or the like, and these semiconductor elements are ON / OFF controlled by a gate voltage from the gate drive unit 18. The voltage across the electrolytic capacitor 16 is supplied to the gate drive unit 18 via the insulation circuits 18a to 18d. The U, V, and W phase arms of the inverse conversion circuit 17 are connected to the electric motor 22 via lines 19, 20, and 21. The lines 19, 20, and 21 are provided with a U-phase current detector 23, a V-phase current detector 24, and a W-phase current detector 25, respectively. The currents detected by these current detectors 23, 24, and 25 are The absolute value calculation and its maximum value detection are calculated by the calculation unit 26 to obtain the current value Iac at the output.

The inverse conversion circuit 17 is provided with a temperature detector 27, and a temperature detection value Tmp is output via the converter 28. Reference numeral 29 denotes an insulation amplifier, which detects the voltage detection value Vdc of the electrolytic capacitor 16. The current value Iac, the temperature detection value Tmp, and the voltage detection value Vdc are compared with a protection level, which will be described later, and used for failure determination.

  A microcomputer 30 includes a precharge MC (electromagnetic contactor) control unit 30a, a dead time generation circuit 30b, a failure determination unit 30c, a program for controlling the inverter, and the like, and a dead time generation circuit. A control output is supplied to 30b. A clock oscillator 31 is supplied to the microcomputer 30.

  The output of the dead time generation circuit 30b is distributed and supplied to the respective phase gate drive circuits 18u, 18v, 18w, 18x, 18y, and 18z constituting the gate drive unit 18 via the three-state logic circuit 32. Reference numerals 33a, 33b, and 33c are comparators. The comparators 33a, 33b, and 33c are given the above-described current value Iac, temperature detection value Tmp, and voltage value Vdc, and are compared with the protection level. When the reverse conversion circuit (inverter) is abnormal, the output from the failure determination unit 30c becomes “High” level.

  The inverter device configured as described above has various protection functions for protecting the main circuit semiconductor element. For example, when an abnormal current or voltage exceeding the tolerance of the main circuit semiconductor element is detected due to an abnormality in the load or usage error, or an abnormal temperature has occurred in the cooling system, and a high temperature condition exceeding the tolerance of the semiconductor element has been detected. In some cases, the operation of the inverter device is interrupted. Usually, in these protection operations, the output of the current detector, voltage detector, and temperature detector is compared with an abnormality determination value by a comparator, and the result is taken into a microcomputer or hardware logic to stop the operation of the inverter device.

  The microcomputer operates using a clock signal. When the clock signal stops for some reason, the operation of the microcomputer stops. Therefore, when the stop of the clock signal of the microcomputer is detected, it is necessary to fix the main circuit semiconductor element to all phases OFF or to quickly cut off the power supply to the inverter device. For this reason, a circuit for determining that the clock signal has been stopped has been developed.

FIG. 9 shows such a clock signal stop determination circuit. In FIG. 9, the normal clock signal is a square wave 81 having the same amplitude as the power source of the microcomputer, and is approximately 50% duty. Here, as a state when the clock signal is stopped, it is assumed that the state is fixed in a state approaching the voltage level of either 0 V or the power supply voltage, and as a method for extracting the state, the clock signal waveform is converted to the low-pass filter 82. The window comparator 83 determines whether or not the output signal is within the allowable range, and is “0 V” for the normal range and “High” for the abnormal range.
JP 2003-060490 A Japanese Patent Laid-Open No. 2001-268791

  As described above, when the clock signal of the microcomputer stops for some reason, the operation of the microcomputer stops. Therefore, even if it can be recognized from the comparator output that the clock signal is abnormal, it is not possible to take subsequent measures. In particular, when the clock is stopped by the sine wave-triangle wave comparison method, the ON / OFF states of the six main circuit elements are fixed. For example, when the U phase is ON and the Y phase and the Z phase are fixed to ON, If the phase winding resistance is “r”, a current of DC circuit voltage / 1.5r continues to flow through the U-phase main circuit semiconductor element and the motor winding. For this reason, there is a problem in that the main circuit semiconductor element is broken or the insulation winding is deteriorated due to the temperature rise of the motor winding or the disconnection is caused by burnout.

  The present invention has been made in view of the above circumstances, and in an inverter device using a microcomputer, even when a clock signal is stopped, the main circuit semiconductor element is prevented from being damaged and the insulation of the motor winding is deteriorated. It is an object of the present invention to provide a protection device for an inverter device in which no burnout occurs.

In order to achieve the above object, according to the first aspect of the present invention, an AC power source is rectified by a forward conversion circuit and supplied to an electrolytic capacitor and an inverse conversion circuit, and the electric circuit is controlled by a microcomputer. In an inverter device that drives at a variable speed,
Means for detecting a stop of the clock signal from the clock signal oscillator supplied to the microcomputer by the signal stop judgment circuit, and when the stop of the clock signal is detected by the detection means, the AC power supply to the forward conversion circuit And means for stopping the supply.

  According to a second aspect of the present invention, there is provided an electric circuit connecting the means for detecting the stop of the clock signal from the clock signal oscillator supplied to the microcomputer by the signal stop determination circuit and the output terminal of the forward conversion circuit and the input terminal of the electrolytic capacitor. And means for restricting power supply from the forward conversion circuit to the electrolytic capacitor when the detecting means detects the stop of the clock signal.

  According to a third aspect of the present invention, there is provided means for detecting a stop of a clock signal from a clock signal oscillator supplied to a microcomputer by a signal stop determination circuit and a gate drive for supplying a gate voltage to a main circuit semiconductor element constituting the inverse conversion circuit. And an opening / closing means inserted in the electric circuit to which the voltage across the electrolytic capacitor is supplied to the gate driving section, and when the clock signal stop is detected by the means for detecting by the clock signal stop determination circuit, the opening / closing means is It is characterized by opening.

  According to a fourth aspect of the present invention, the gate signal is distributed and supplied from the microcomputer to the gate driving unit via the three-state logic circuit, and the temperature of the temperature detector provided in the inverse conversion circuit is equal to or higher than the protection set level. When the output current of the circuit is equal to or higher than the protection setting level or the voltage across the electrolytic capacitor is equal to or higher than the protection setting level, the inverse conversion circuit determines that there is a failure and connects the failure determination circuit to the three-state logic circuit. When the clock signal stop is detected by the means for detecting by the clock signal stop determination circuit, the open / close means inserted in the electric circuit is opened to stop the operation of the three-state logic circuit. .

  According to a fifth aspect of the present invention, each phase gate drive circuit constituting the gate drive unit is provided with an opening / closing means in an electric circuit for supplying a current from the logic power supply unit, and the open / close means is detected by the clock signal stop determination circuit. When the stop is detected, the opening / closing means is opened.

  According to a sixth aspect of the present invention, there is provided means for detecting a stop of the clock signal from the clock signal oscillator supplied to the microcomputer by the signal stop determination circuit and the forward conversion circuit when the detection means detects the stop of the clock signal. The power supply from the forward conversion circuit to the electrolytic capacitor inserted in the electric circuit connecting the output terminal of the forward conversion circuit and the input terminal of the electrolytic capacitor, and the gate drive unit Opening / closing means inserted in the electric circuit to which the voltage between both ends of the electrolytic capacitor is supplied to, an opening / closing means inserted in the electric circuit connecting the failure determination circuit and the three-state logic circuit, and each phase gate drive constituting the gate driving unit The circuit is characterized in that an opening / closing means is opened in a circuit for supplying current from a logic power supply unit.

  As described above, according to the present invention, in the inverter device using the microcomputer, even when the clock signal is stopped, the main circuit semiconductor element is prevented from being damaged, and the insulation winding and the burnout of the motor winding are prevented. There is an advantage that can be prevented.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. The same parts as those in FIG. 8 are denoted by the same reference numerals, and detailed description thereof will be omitted.
[First Embodiment]
FIG. 1 is a configuration diagram showing the first embodiment. In FIG. 1, the clock signal output of the clock oscillator 31 is supplied to a clock signal stop determination circuit 41. As the clock signal stop determination circuit 41, a circuit as shown in FIG. 9 is used. When the clock signal stop determination circuit 41 determines the stop of the clock signal, it outputs the stop determination output. Then, the switch SW1 inserted in the electric circuit of the magnetic contactor MC2 that operates according to an external command provided outside the inverter device is turned OFF by the stop determination output.

For this reason, the electromagnetic contactor MC2 is also turned OFF, and the contact 12 thereof is opened. Then, since the AC power of the AC power supply 11 is not supplied to the forward conversion circuit 13, the current flowing through the main circuit semiconductor element of the reverse conversion circuit 17 is terminated only by the energy stored in the electrolytic capacitor 16. . Accordingly, since the current flowing through the main circuit semiconductor element constituting the inverse conversion circuit 17 is very small, the influence of the element damage, the temperature rise of the winding of the electric motor 22 is eliminated, the winding burns out, the insulation deteriorates, etc. Will no longer occur.
[Second Embodiment]
FIG. 2 is a block diagram showing the second embodiment. Also in the second embodiment, when the clock signal stop determination circuit 41 determines the stop of the clock signal as in the first embodiment, the stop determination output is sent out. Then, the switch SW2 inserted in the control signal circuit from the precharge MC control unit 30a configured in the microcomputer 30 is turned OFF by the determination output.

For this reason, in order to turn off the pre-charging electromagnetic contactor MC1 provided in the inverter device, the contact 14a is opened. As a result, the current flowing through the main circuit semiconductor element of the inverse conversion circuit 17 is limited by the precharge resistor, and the current flowing through the main circuit semiconductor element is also limited, thereby preventing the element from being damaged. Since the current allowable loss of the precharging resistor is small, the resistor may be disconnected, but damage to the expensive main circuit semiconductor element can be avoided.
[Third Embodiment]
FIG. 3 is a block diagram showing the third embodiment. Also in this third embodiment, when the clock signal stop determination circuit 41 determines the stop of the clock signal as in the first embodiment, the stop determination output is sent out. Based on this stop determination output, the switch SW3 inserted in the supply circuit 42 for the voltage across the electrolytic capacitor 16 supplied to the gate drive unit 18 is turned OFF. As a result, the gate voltage of the main circuit semiconductor element of the inverse conversion circuit 17 becomes 0 V and is not in the ON state. However, since the gate OFF voltage (about −10 V) cannot be secured, the main circuit semiconductor element may be turned ON again due to the influence of external noise.
[Fourth Embodiment]
FIG. 4 is a configuration diagram showing the fourth embodiment. Also in this fourth embodiment, when the clock signal stop determination circuit 41 determines the stop of the clock signal as in the first embodiment, the stop determination output is sent out. With this stop determination output, the switch SW4 inserted in the electric circuit 43 connecting the three-state logic circuit 32 and the failure determination unit 30c configured in the microcomputer 30 is turned off. As a result, the primary drive logic of the gate drive isolation circuit is set to high impedance. As a result, the gate drive unit 18 cannot be turned on unless a certain amount of current is passed. Therefore, when the primary drive logic is set to high impedance, the gate OFF voltage of the main circuit semiconductor element is secured and the gate drive unit 18 is stably turned off. Note that when the output level of the failure determination unit 30c is “Low”, it is normal, and when it is “High”, it is abnormal.
[Fifth Embodiment]
FIG. 5 is a block diagram showing the fifth embodiment. Also in this fifth embodiment, when the clock signal stop determination circuit 41 determines the stop of the clock signal as in the first embodiment, the stop determination output is sent out. Based on this stop determination output, the switch SW5 inserted in the electric circuit 44 supplied from the logic power supply to the gate drive unit 18 is turned off, and the primary power supply of the gate drive insulating circuit is turned off. As a result, the gate OFF voltage of the main circuit semiconductor element is secured, and a stable OFF state is obtained.

  FIG. 6 is a configuration diagram of a photocoupler showing an input unit of each phase gate drive circuit, and FIG. 7 is a configuration diagram showing a U-phase gate drive circuit in the above embodiment. In FIG. 7, reference numeral 71 denotes a buffer element that outputs drive signal logic. When the EN terminal of the element 71 is set to “H”, the output becomes high impedance. 72 is a photocoupler that insulates the logic output of the buffer element 71, 73 is a resistor that limits the current flowing through the photocoupler 72, and 74 is a resistor that limits the current flowing through the output side transistor of the photocoupler 72.

  75 is an insulated power supply dedicated to the gate drive circuit, and this power supply 75 normally outputs three-level voltages of “+”, “0”, and “−”. A conversion circuit 76 amplifies the isolated logic output PWM signal and sends out a gate signal (Gu, Eu). The switches SW3, SW4, SW5 are those described in the above embodiments.

  Further, even if the protection functions (switches SW1 to SW5) of the above embodiments are combined individually or all protection functions are used, protection can be performed in the same manner.

The block diagram which shows 1st Embodiment of this invention. The block diagram which shows 2nd Embodiment of this invention. The block diagram which shows 3rd Embodiment of this invention. The block diagram which shows 4th Embodiment of this invention. The block diagram which shows 5th Embodiment of this invention. The block diagram of the input part of each phase gate drive circuit. The block diagram which shows the gate drive circuit of a U phase. The block diagram of the PWM inverter apparatus for alternating current variable speed drive which uses a microcomputer. The block diagram of a clock signal stop determination circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 13 ... Forward conversion circuit 16 ... Electrolytic capacitor 17 ... Reverse conversion circuit 18 ... Gate drive part 22 ... Electric motor 27 ... Temperature detector 29 ... Insulation amplifier 30 ... Microcomputer 30a ... Precharge MC control part 30c ... Failure determination part 31 ... Clock Oscillator 32 ... 3-state logic circuit 41 ... Clock signal stop determination circuit

Claims (6)

In an inverter device that rectifies an AC power source with a forward conversion circuit and supplies it to the electrolytic capacitor and the reverse conversion circuit, and controls the reverse conversion circuit with a microcomputer to drive the motor at a variable speed.
Means for detecting a clock signal stop from a clock signal oscillator supplied to the microcomputer by a signal stop determination circuit;
And a means for stopping supply of AC power to the forward conversion circuit when a stop of the clock signal is detected by the detecting means. In an inverter device that rectifies an AC power source with a forward conversion circuit and supplies it to the electrolytic capacitor and the reverse conversion circuit, and controls the reverse conversion circuit with a microcomputer to drive the motor at a variable speed.
Means for detecting a clock signal stop from a clock signal oscillator supplied to the microcomputer by a signal stop determination circuit;
Means for restricting power supply from the forward conversion circuit to the electrolytic capacitor when the stop of the clock signal is detected by the means for detection inserted in an electric circuit connecting the output end of the forward conversion circuit and the input end of the electrolytic capacitor And a protective device for an inverter device. In an inverter device that rectifies an AC power source with a forward conversion circuit and supplies it to the electrolytic capacitor and the reverse conversion circuit, and controls the reverse conversion circuit with a microcomputer to drive the motor at a variable speed.
Means for detecting a clock signal stop from a clock signal oscillator supplied to the microcomputer by a signal stop determination circuit;
A gate driver for supplying a gate voltage to a main circuit semiconductor element constituting the inverse conversion circuit;
The gate driving unit is provided with opening / closing means inserted in an electric circuit to which the voltage across the electrolytic capacitor is supplied,
The protection device for an inverter device, wherein when the clock signal stop is detected by the means for detecting by the clock signal stop determination circuit, the opening / closing means is opened. The protection device for an inverter device according to claim 3,
A gate signal is distributed and supplied from the microcomputer to the gate drive unit via a three-state logic circuit, and the temperature of the temperature detector provided in the inverse conversion circuit is equal to or higher than a protection set level, or the output current of the inverse conversion circuit When the voltage exceeds the protection setting level or the voltage across the electrolytic capacitor exceeds the protection setting level, the reverse conversion circuit determines that there is a failure and is inserted into the electrical circuit connecting the failure determination circuit and the three-state logic circuit. A protection device for an inverter device, wherein when the clock signal stop is detected by the means for detecting by the clock signal stop determination circuit, the opened / closed means is opened to stop the operation of the three-state logic circuit. The protection device for an inverter device according to claim 3 or 4,
Each phase gate drive circuit constituting the gate drive unit is provided with an opening / closing means in an electric circuit for supplying current from the logic power supply unit, and the clock signal stop is detected by means for detecting the open / close means by the clock signal stop determination circuit. And opening and closing the opening / closing means. In an inverter device that rectifies an AC power source with a forward conversion circuit and supplies it to the electrolytic capacitor and the reverse conversion circuit, and controls the reverse conversion circuit with a microcomputer to drive the motor at a variable speed.
Means for detecting a clock signal stop from a clock signal oscillator supplied to the microcomputer by a signal stop determination circuit;
When the stop of the clock signal is detected by this detection means, the supply of AC power to the forward conversion circuit is stopped, and the insertion is inserted in the electric circuit connecting the output terminal of the forward conversion circuit and the input terminal of the electrolytic capacitor An electric circuit that limits the power supply from the forward conversion circuit to the electrolytic capacitor and connects the open / close means and the failure determination circuit inserted in the electric circuit to which the voltage across the electrolytic capacitor is supplied to the gate drive unit and the three-state logic circuit A protection device for an inverter device, wherein the opening / closing means is opened to an electric circuit for supplying a current from a logic power supply section to the opening / closing means inserted in the gate and each phase gate driving circuit constituting the gate driving section.

Images