JP2008118078A - Three-terminal capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a three-terminal capacitor capable of removing high-frequency noise that appears on a high-frequency wave transmission line by reducing ESL as much as possible. <P>SOLUTION: The capacitor has a structure in which two grounding internal electrodes 2-1, 2-2 and one signaling internal electrode 3 are accommodated in a rectangular parallelepiped dielectric 10 and the signaling internal electrode 3 and a pair of signaling external electrodes 4-1, 4-2 are attached to the outside of the dielectric 10. Then, by connecting via holes 6-1 to 6-4 to the grounding internal electrodes 2-1, 2-2 and a grounding external electrode 5, the ESL of an entire three-terminal capacitor 1 is reduced. Preferably, the via holes 6-1, 6-3 (6-2, 6-4) are put as close as possible to the side of the signaling internal electrode 3. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a three-terminal capacitor for removing noise that has entered a power supply or the like, and more particularly to a chip laminated type three-terminal capacitor.

This type of three-terminal capacitor has a structure in which a ground internal electrode sandwiches a signal internal electrode, and is different from the structure of a two-terminal capacitor in which a signal internal electrode and a ground internal electrode are simply opposed to each other ( For example, see Patent Document 1).
Since the three-terminal capacitor has such a structure, the equivalent series inductance (hereinafter referred to as “ESL”) is smaller than the ESL of the two-terminal capacitor. For this reason, a three-terminal capacitor is often used as a filter or bypass for a high-frequency transmission line into which high-frequency noise enters.

Japanese Patent Laid-Open No. 11-144997

However, the above-described conventional three-terminal capacitor has the following problems.
Recently, ultra-high speed interfaces such as DVI, HDMI, Serial-ATA, and PCI-Express have emerged. In these interfaces, noise with an extremely high frequency frequently appears on the transmission path.
However, the conventional three-terminal capacitor has not been provided with sufficient ESL countermeasures to remove such high-frequency noise.
Therefore, the conventional three-terminal capacitor cannot exhibit a sufficient noise removal function even when applied to a high-speed transmission line such as PCI-Express.

  The present invention has been made to solve the above-described problem, and an object of the present invention is to provide a three-terminal capacitor capable of reducing ESL as much as possible and removing high-frequency noise appearing on a high-frequency transmission line. .

In order to solve the above problems, a three-terminal capacitor according to the invention of claim 1 is an n-number (n = natural number) ground layer that is laminated in a rectangular parallelepiped dielectric body and both ends thereof are exposed on both side surfaces of the dielectric body. N−, which is disposed in the dielectric body and through a gap between n number of ground internal electrodes, faces in the direction perpendicular to the ground internal electrode, and both ends thereof are exposed on the front and rear surfaces of the dielectric, respectively. One signal internal electrode, a pair of signal external electrodes formed on the front and rear surfaces of the dielectric and electrically connected to both ends of the n−1 signal internal electrodes, and a lower surface and an upper surface of the dielectric And one or more ground external electrodes electrically connected to both ends of the n number of ground internal electrodes and extending from the upper surface of the ground external electrode, and on both sides of the signal internal electrodes. Projected and its end is external for ground It has a configuration comprising a via hole reaching the lower surface of the ground external electrode through a state of being connected to a portion of the internal electrode for grounding connected to the pole.
With this configuration, a pair of signal external electrodes can be connected to the power supply line and the signal line, and one or more ground external electrodes can be connected to the ground line. When high-frequency noise enters the power supply line or signal line, the three-terminal capacitor functions as a bypass capacitor, and the high-frequency noise of the power supply line or the like is converted into a signal external electrode, a signal internal electrode, a ground internal electrode, and a ground line. It flows to the ground line through the external electrode.
At this time, if the noise frequency is extremely high and the ESL of the ground internal electrode of the three-terminal capacitor is large as in the conventional three-terminal capacitor, the bypass function may be lowered.
However, in the three-terminal capacitor of the present invention, the via hole is suspended from the upper surface portion of the ground external electrode and penetrated in a state of being connected to the ground internal electrode portion to reach the lower surface portion of the ground external electrode. Therefore, the high-frequency noise that has flowed out from the signal internal electrode to the ground internal electrode is diverted to the via hole and reaches the ground external electrode, and the high-frequency noise is efficiently discharged to the outside.
That is, the ESL in the portion of the ground internal electrode between the connection point with the via hole and the ground external electrode and the ESL of the via hole are connected in parallel to the ground external electrode. The ESL between the connection point with the via hole and the ground external electrode becomes small, and the ESL as the entire three-terminal capacitor becomes extremely small as compared with the conventional three-terminal capacitor.

According to a second aspect of the present invention, in the three-terminal capacitor according to the first aspect, the via hole is close to the side edge of the signal internal electrode in a non-contact state.
With this configuration, the portion of the ground internal electrode connected to the ground external electrode in parallel with the via hole can be made as long as possible.

  As described above in detail, according to the three-terminal capacitor according to the first aspect of the present invention, the ESL of the entire three-terminal capacitor can be made extremely small. As a result, the self-resonance frequency becomes high and the high-frequency transmission line is There is an excellent effect that high-frequency noise that appears can be removed.

  In particular, according to the invention of claim 2, since the portion of the ground internal electrode connected to the ground external electrode in parallel with the via hole can be made as long as possible, the ESL can be further reduced. it can.

  The best mode of the present invention will be described below with reference to the drawings.

  1 is an exploded perspective view showing a three-terminal capacitor according to a first embodiment of the present invention, FIG. 2 is an external view of the three-terminal capacitor, and FIG. 3 is a cross-sectional view taken along line AA in FIG. FIG. 4 is a cross-sectional view taken along the line BB in FIG.

  As shown in FIGS. 1 and 2, the three-terminal capacitor 1 of this embodiment includes two ground internal electrodes 2-1, 2-2 and one signal internal electrode 3 in a rectangular parallelepiped dielectric. 10, a pair of signal external electrodes 4-1 and 4-2 and a single ground external electrode 5 are attached to the outside of the dielectric 10.

As shown in FIGS. 3 and 4, the ground internal electrodes 2-1 and 2-2 are stacked in the dielectric 10 in the vertical direction of the drawing, and each ground internal electrode 2-1 (2-2). Both ends 2a and 2b are exposed on both side surfaces 11 and 12 of the dielectric 10, respectively.
FIG. 5 is a plan view showing the ground internal electrodes 2-1 and 2-2.
As shown in FIG. 5, the ground internal electrodes 2-1 and 2-2 have the same cross shape, and as shown in FIG. 1 and FIG. The dielectric 10 is laminated.

  The signal internal electrode 3 is a long electrode for passing a desired power supply or signal. As shown in FIG. 3, the gap G between the ground internal electrodes 2-1 and 2-2 in the dielectric 10 is provided. Is inserted. Specifically, as shown by a broken line in FIG. 4, the signal internal electrode 3 is oriented in the length direction of the dielectric 10 (the left-right direction in FIG. 4), and the ground internal electrodes 2-1 and 2-1. -2 is inserted into the gap G and faces the direction perpendicular to both ends 2a, 2b of the ground internal electrode 2-1 (2-2). Then, both ends 3a and 3b of the signal internal electrode 3 are exposed on the front surface 13 and the rear surface 14 of the dielectric 10, respectively.

  The signal external electrodes 4-1 and 4-2 are disposed outside the front surface 13 and the rear surface 14 of the dielectric 10 including the ground internal electrodes 2-1 and 2-2 and the signal internal electrode 3 as described above. Is formed. Thereby, the signal external electrodes 4-1 and 4-2 are electrically connected to the exposed ends 3 a and 3 b of the signal internal electrode 3.

  As shown in FIG. 1, the ground external electrode 5 has a rectangular cylindrical shape. That is, as shown in FIG. 3, the ground external electrode 5 is formed outside the ground external electrode 5 across the lower surface 15, the upper surface 16, and both side surfaces 11, 12 of the dielectric 10. Thereby, the ground external electrode 5 is electrically connected to both ends 2a and 2b of the exposed ground internal electrodes 2-1 and 2-2.

In this embodiment, as shown in FIG. 1, four via holes 6-1 to 6-4 are connected to the ground internal electrodes 2-1 and 2-2.
Specifically, as shown in FIG. 5, via holes 6-1 and 6-3 and via holes 6-2 and 6-4 are respectively connected to the ground internal electrodes 2-1 protruding on both sides of the signal internal electrode 3. , 2-2 are connected to the portions A and B, respectively, and as shown in FIGS. 3 and 4, the upper end portion 6a and the lower end portion 6b of the via holes 6-1 to 6-4 are connected to the upper surface portion 5a of the ground external electrode 5. And the lower surface portion 5b.
That is, the via holes 6-1 and 6-3 (6-2 and 6-4) hang down from the upper surface portion 5 a of the ground external electrode 5, protrude to both sides of the signal internal electrode 3, and It penetrates in a state of being connected to the parts A (B) 1 and 2-2 and reaches the lower surface part 5 b of the ground external electrode 5.

  Therefore, the via holes 6-1 and 6-3 (6-2 and 6-4) extend from the ends 2a (2b) of the ground internal electrodes 2-1 and 2-2 to the side edge 3c (3d) of the signal internal electrode 3. In this embodiment, the via holes 6-1 and 6-3 (6-2 and 6-4) can be formed on the side edge 3c (3d) of the signal internal electrode 3 in this embodiment. The distance D from the via holes 6-1 and 6-3 (6-2 and 6-4) to the ends 2a (2b) of the ground internal electrodes 2-1 and 2-2 is made as long as possible.

Next, the operation and effect of the three-terminal capacitor of this embodiment will be described.
FIG. 6 is a perspective view illustrating an example in which the three-terminal capacitor 1 is mounted on the power supply line, and FIG. 7 is a cross-sectional view illustrating a mounted state of the three-terminal capacitor 1.
As shown in FIG. 6, the signal external electrodes 4-1 and 4-2 are soldered and connected to the power supply line 100 of the semiconductor integrated device or the like, and the ground external electrode 5 is soldered to the ground line 110. The three-terminal capacitor 1 can be mounted on the power supply line 100.
As a result, as shown in FIG. 7, the signal internal electrode 3 of the three-terminal capacitor 1 is connected to the power supply line 100 via the signal external electrodes 4-1, 4-2, and the ground internal electrode 2-1, 2-2 is connected to the ground line 110 via the ground external electrode 5.

When a power supply current is supplied to the power supply line in such a mounted state, the power supply current enters the signal internal electrode 3 of the three-terminal capacitor 1. Since the power supply current is direct current, the capacitance between the ground internal electrode 2-1 (2-2) and the signal internal electrode 3 prevents outflow to the ground external electrode 5. As a result, the power source current flows out to the power source line 100 through the signal inner electrode 3 and the signal outer electrode 4-1 (4-2).
When the high frequency noise N enters the power supply line 100, the three-terminal capacitor functions as a bypass capacitor, and the high frequency noise N that has entered the signal internal electrode 3 of the three-terminal capacitor 1 from the power supply line 100 is converted into the ground internal electrode. 2-1, 2-2 and the ground external electrode 5 are allowed to flow out to the ground line 110.
By the way, if the ESL of the three-terminal capacitor 1 is large, the high frequency noise N cannot be effectively removed. In particular, when a three-terminal capacitor is used for the power line of an ultra-high-speed interface such as DVI, HDMI, Serial-ATA, PCI-Express, etc., extremely high frequency noise N frequently appears on the power line, resulting in a large ESL. A three-terminal capacitor cannot be used.
However, in the three-terminal capacitor 1 of this embodiment, as described above, the four via holes 6-1 to 6-4 are connected to the ground internal electrodes 2-1 and 2-2. 1 The overall ESL is kept very small.

FIG. 8 is a cross-sectional view for explaining the ESL of the three-terminal capacitor.
As shown in FIG. 8, the inductance of the portion A of the ground internal electrode 2-1 (2-2) is L1, and the ground external electrode from the connection point P between the portion A and the via hole 6-1 (6-3). Assuming that the inductance up to 5 is L2, since the inductance of the via hole 6-1 (6-3) and the portion A is connected in parallel, the via hole 6-1 (6-3) and the portion A The inductance is extremely small compared to the inductance of only the portion A where there is no via hole 6-1 (6-3). Similarly, the inductance of the right via hole 6-2 (6-4) and the portion B is also smaller than the inductance of only the portion B without the via hole 6-2 (6-4). As a result, the ESL of the entire three-terminal capacitor 1 is smaller than that of the conventional three-terminal capacitor without via holes 6-1 and 6-3 (6-2 and 6-4), and noise of extremely high frequency is also removed. Will be able to.
Moreover, as described above, the distance from the connection point P to the via holes 6-1 and 6-3 (6-2 and 6-4) to the ends 2a (2b) of the ground internal electrodes 2-1 and 2-2. D (refer to FIG. 5) is made as long as possible, and the portion A of the ground internal electrodes 2-1 and 2-2 in parallel with the via holes 6-1 and 6-3 (6-2 and 6-4) ( The protruding length of B) was increased. For this reason, the ESL of the entire three-terminal capacitor 1 is extremely small.
That is, the high-frequency noise flowing into the ground internal electrodes 2-1 and 2-2 from the signal internal electrode 3 of the three-terminal capacitor 1 is caused by the ground internal electrodes 2-1 and 2-2 as shown in FIG. The portion A (B) and the via holes 6-1 and 6-3 (6-2 and 6-4) are divided into N1 and N2, and flow out from the ground external electrode 5 to the outside.

Thus, according to the three-terminal capacitor 1 of this embodiment, the ESL as the whole capacitor can be made extremely small. As a result, the self-resonant frequency is increased, and high-frequency noise appearing on the high-frequency transmission line is efficiently reduced. There is an effect that it can be removed.
The inventor conducted the following simulation to confirm the effect.
In this simulation, in the three-terminal capacitor 1 of this embodiment, the conventional three-terminal capacitor excluding the via holes 6-1 to 6-4 and the three-terminal capacitor 1 of this embodiment were targeted.
FIG. 9 is a plan view for explaining the dimensions of each part of the three-terminal capacitor 1 to be simulated.
That is, the chip size of the conventional three-terminal capacitor and the three-terminal capacitor 1 of this embodiment was both set to 2010. Then, as shown in FIG. 9, the thickness of each ground internal electrode 2-1 (2-2) of the three-terminal capacitor 1 is set to 0.001 mm, and the ground internal electrodes 2-1 and 2-2 are The interval was set to 0.006 mm. Further, the width d1 and the projecting length d4 of the end 2a (2b) of the portion A (B) of the ground internal electrode 2-1 (2-2) are set to 0.6 mm and 0.2 mm, respectively. The width d2 and the protruding length d3 of the end 2c in the length direction of the electrode 2-1 (2-2) were set to 0.6 mm and 0.4 mm. Further, the diameter of each via hole 6-1 (6-3 to 6-4) is set to 0.2 mm, and the via holes 6-2 and 6-4 (6-1 and 6-3) from the end 2b (2a) are set. The center position d5 and the center interval d6 were set to 0.13 mm and 0.3 mm. The signal internal electrode 3 was arranged at the center of the ground internal electrodes 2-1, 2-2, and the width d7 was set to 0.28 mm. Under such conditions, a high frequency of 100 MHz to 3 GHz was input to each of these three-terminal capacitors, and each insertion loss characteristic was analyzed.
FIG. 10 is an insertion loss characteristic diagram showing a result of the simulation.
As indicated by a broken line S1 in FIG. 10, the conventional three-terminal capacitor has a self-resonance frequency of about 450 MHz. On the other hand, in the three-terminal capacitor 1 of this embodiment, as shown by the solid line S2 in FIG. 10, the self-resonant frequency is about 580 MHz and the insertion loss is 70 dB, and the insertion loss characteristic is the conventional three-terminal. Compared to the capacitor, it was improved by 5 dB or more.

The inventor further determines that the inductance L2 of the via holes 6-1 and 6-3 (6-2 and 6-4) is 5 of the inductance L1 of the portion A (B) of the ground internal electrode 2-1 (2-2). When the same simulation was performed with the ratio set to 1/2, the insertion loss characteristic of the three-terminal capacitor 1 was improved by 10 dB or more compared to the conventional three-terminal capacitor.
Conversely, the inductance L2 of the via holes 6-1 and 6-3 (6-2 and 6-4) is twice the inductance L1 of the portion A (B) of the ground internal electrode 2-1 (2-2). When the same simulation was performed, the insertion loss characteristic of the three-terminal capacitor 1 was better than that of the conventional three-terminal capacitor.

Next explained is the second embodiment of the invention.
FIG. 11 is a cross-sectional view showing a main part of a three-terminal capacitor according to the second embodiment of the present invention.
In the first embodiment, one signal internal electrode 3 is inserted between two ground internal electrodes 2-1 to 2-2 to form a two-element three-terminal capacitor 1. In this embodiment, as shown in FIG. 11, a large number of signal internal electrodes 3-1 to 3- (n-1) are inserted between a large number of ground internal electrodes 2-1 to 2-n, respectively. A three-terminal capacitor 1 ′ having a large number (n number) of elements is formed.
When the number of elements is large, the frequency of the self-resonance point is lowered, but the loss characteristic beyond the resonance point is larger than that without the via holes 6-1 to 6-4 as in the case of the first embodiment. For the insertion loss characteristics at a frequency lower than the self-resonance point, the ground internal electrode 2-1 (2-2 to 2-n) and the signal internal electrode 3-1 (3-2 to 3- (n-1) are used. )), The insertion loss characteristics are not different depending on the number of elements.
Since other configurations, operations, and effects are the same as those in the first embodiment, description thereof is omitted.

In addition, this invention is not limited to the said Example, A various deformation | transformation and change are possible within the range of the summary of invention.
In the above embodiment, the via holes 6-1 and 6-3 (6-2 and 6-4) are provided in parallel with the portion A (B) of the ground internal electrodes 2-1 and 2-2, Although the ESL is reduced, in order to reduce the ESL of this portion, the ESL of the via holes 6-1 and 6-3 (6-2 and 6-4) itself may be reduced, and various methods are available. is there. For example, the ESL of the via holes 6-1 and 6-3 (6-2 and 6-4) can be reduced by increasing the diameter of the via holes or using a plurality of via holes.
In the above embodiment, one cylindrical ground external electrode 5 is applied. However, the present invention is not limited to this, and the ground external electrode is arranged at the center of the three-terminal capacitor 1 as shown in FIG. A pair of U-shaped external ground electrodes 5-1 and 5-2 facing both sides of the line L may be used.

1 is an exploded perspective view showing a three-terminal capacitor according to a first embodiment of the present invention. It is an external view of a 3-terminal capacitor. It is arrow AA sectional drawing of FIG. It is arrow BB sectional drawing of FIG. It is a top view which shows the internal electrode for grounds. It is a perspective view which shows the example which mounted the 3 terminal capacitor | condenser in the power supply line. It is a schematic sectional drawing which shows the mounting state of a 3-terminal capacitor. It is sectional drawing for demonstrating ESL of a 3 terminal capacitor | condenser. It is a top view for demonstrating the dimension of each part of 3 terminal capacitor made into the object of simulation. It is an insertion loss characteristic diagram which shows the result of simulation. It is sectional drawing which shows the principal part of the 3 terminal capacitor based on 2nd Example of this invention. It is sectional drawing which shows one modification.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1,1 '... 3 terminal capacitor, 2-1 to 2-n ... Internal electrode for ground, 2a, 2b, 3a, 3b ... Both ends, 3,3-1 to 3- (n-1) ... Internal electrode for signal 3c, 3d ... side edges, 4-1, 4-2 ... signal external electrodes, 5 ... ground external electrodes, 5a ... upper surface portions, 5b ... lower surface portions, 6-1 to 6-4 ... via holes, 6a ... Upper end, 6b ... Lower end, 10 ... Dielectric, 11, 12 ... Both sides, 13 ... Front, 14 ... Rear, 15 ... Lower, 16 ... Upper, 100 ... Power line, 110 ... Ground line, A, B ... Part, G ... Gap, N ... High frequency noise.

Claims (2)

N number of ground internal electrodes (n = natural number) that are stacked in a rectangular parallelepiped dielectric body and both ends thereof are exposed on both side surfaces of the dielectric,
N-1 which is arranged in the dielectric body, passes through the gaps of the n number of ground internal electrodes, faces in the direction perpendicular to the ground internal electrode, and both ends thereof are exposed on the front and rear surfaces of the dielectric, respectively. A number of signal internal electrodes,
A pair of signal external electrodes formed on the front and back surfaces of the dielectric and electrically connected to both ends of the n-1 number of signal internal electrodes;
One or more ground external electrodes formed across the lower surface, upper surface, and side surfaces of the dielectric and electrically connected to both ends of the n number of ground internal electrodes;
It hangs down from the upper surface of the ground external electrode, protrudes on both sides of the signal internal electrode, and penetrates in a state where its ends are connected to the portion of the ground internal electrode connected to the ground external electrode. And a via hole reaching the lower surface of the ground external electrode. The three-terminal capacitor according to claim 1,
The via hole is close to the side edge of the signal internal electrode in a non-contact state;
A three-terminal capacitor.

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