JP2008117800A - Electrostatic chuck - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electrostatic chuck capable of increasing cooling efficiency in a substrate and preventing residual attraction force in the removal of the substrate from remaining easily. <P>SOLUTION: The electrostatic chuck has a ceramic dielectric layer 3 having a placement surface for holding a substrate 2 to be held on a surface, and a holding electrode 4 provided opposing the placement surface of the ceramic dielectric layer 3. The placement surface of the ceramic dielectric layer 3 has irregularities according to surface roughness. The average interval of the irregularities is not more than the thickness of the substrate 2 to be held. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an electrostatic chuck.

Conventionally, in semiconductor manufacturing methods such as etching, CVD, and sputtering, an electrostatic chuck is used as a jig for holding a wafer.

In general, an electrostatic chuck is composed of a dielectric layer made of ceramic having a mounting surface of a substrate to be held such as a wafer, and an electrostatic electrode provided at a position facing the mounting surface. Is placed on the mounting surface, the held substrate can be sucked and held by the electrostatic force between the held substrate and the electrostatic electrode.

Conventional electrostatic chucks have a desired surface roughness on the mounting surface of the electrostatic chuck, thereby making the in-plane temperature uniformity of the substrate to be held and the release response when releasing the substrate to be held from the electrostatic chuck. It has been reported to improve sex. For example, by setting the surface roughness of the central portion of the mounting surface of the electrostatic chuck to 0.7 to 1.2 μm and the surface roughness of the peripheral portion to 0.7 μm or less, the in-plane temperature of the substrate to be held is uniform. (See, for example, Patent Document 1).
).

However, if the surface roughness of the mounting surface of the electrostatic chuck is made too small, a uniform attracting force can be obtained within the surface, but the residual attracting force remains when the held substrate is attached and detached, and the electrostatic chuck is held by the held substrate. There is a problem that it is difficult to peel off when removing.

Further, the outermost surface roughness of the mounting surface of the electrostatic chuck is 0.3 μm or less, and the width of the convex portion of the groove formed on the mounting surface is set to 1 to 20 mm. It has been reported that adhesion of foreign matter on the substrate to be held can be reduced (see, for example, Patent Document 2).

However, if the width of the convex portion of the groove is increased in this way, the difference in thermal conductivity between the contact portion and the non-contact portion of the substrate to be held becomes remarkable, so that the cooling efficiency of the substrate is lowered and the substrate to be held is reduced. There arises a problem that in-plane temperature non-uniformity of the substrate occurs.
JP 2002-261157 A JP-A-9-213777

An object of the present invention is to provide an electrostatic chuck that can increase the cooling efficiency of a substrate and can make it difficult to retain a residual adsorption force when the substrate is removed.

A semiconductor device of one embodiment of the present invention includes a ceramic dielectric layer having a mounting surface for holding a substrate to be held on a surface, and a holding provided so as to face the mounting surface of the ceramic dielectric layer. The mounting surface has irregularities according to surface roughness, and an average interval between the irregularities is equal to or less than a thickness of the substrate to be held.

According to the present invention, the cooling efficiency of the substrate can be increased, and the residual adsorption force when removing the substrate can be made difficult to remain.

  Embodiments of the present invention will be described below with reference to the drawings.

  1 is a cross-sectional view showing the structure of an electrostatic chuck according to Embodiment 1 of the present invention.

As shown in FIG. 1, the electrostatic chuck 1 includes a ceramic dielectric layer 3 having a mounting surface for holding a semiconductor substrate 2 as a substrate to be held on the surface, and a mounting surface of the ceramic dielectric layer 3. A holding electrode 4 provided so as to face each other, and an RF electrode 6 connected to the ceramic dielectric layer 3 via an adhesive 5 are provided.

The ceramic dielectric layer 3 is made of a disk-shaped ceramic substrate, and is made of, for example, ceramics such as alumina, aluminum nitride, and silicon nitride having high insulating properties.

The holding electrode 4 is made of a conductive material such as tungsten, and is embedded in the ceramic dielectric layer 3 in this embodiment. The holding electrode 4 is connected to the DC power supply circuit 7. By applying a DC voltage to the holding electrode 4, an electrostatic force is generated between the semiconductor substrate 2 and the holding electrode 4, and the semiconductor substrate 2 is adsorbed on the mounting surface of the ceramic dielectric layer 3.

The RF electrode 6 is connected to the high frequency power supply circuit 8, and by applying a high frequency voltage to the RF electrode 6, active radicals are generated between the semiconductor substrate 2 and the counter electrode outside the figure, and the semiconductor substrate 2
The silicon oxide film on the surface is etched.

Further, a through hole 9 for supplying a gas such as He is provided in the disc-shaped central portion of the electrostatic chuck 1. The through hole 9 can pass through the RF electrode 6, the holding electrode 4, and the ceramic dielectric layer 3, and supply gas to the mounting surface of the ceramic dielectric layer 3. Thus, by supplying gas to the mounting surface of the ceramic dielectric layer 3, the heat conduction efficiency of the gap between the semiconductor substrate 2 and the ceramic dielectric layer 3 is improved. However, compared with the case where the ceramic dielectric and the semiconductor substrate are in direct contact, the cooling efficiency is inferior when the gas is passed because the thermal conductivity is lowered. In addition, the cooling efficiency decreases as the gap between the ceramic dielectric layer and the semiconductor substrate increases. These are due to the fact that the thermal conductivity of the gas is much lower than that of the ceramic dielectric layer. In some cases, the semiconductor substrate 2 is also easily attached and detached from the mounting surface of the ceramic dielectric layer 3.

Next, FIG. 2 shows the mounting surface of the ceramic dielectric layer of the electrostatic chuck according to Example 1 of the present invention.
a) Relationship between the surface roughness Ra and the distance from the central portion of the semiconductor substrate 2, and (b) the unevenness S
The relationship between m and the distance from the center part of the semiconductor substrate 2 is shown.

The mounting surface of the ceramic dielectric layer 3 of the electrostatic chuck 1 configured as described above has irregularities corresponding to a predetermined surface roughness, and the surface roughness changes within the mounting surface of the ceramic dielectric layer 3. I am letting.
Specifically, as shown in FIG. 2A, the surface roughness of the ceramic dielectric layer 3 is large at the central portion, for example, the average roughness Ra = 600 μm at the central portion, The surface roughness is gradually reduced as it goes to the portion, and the outer peripheral portion has the smallest surface roughness. For example, in this embodiment, the average roughness Ra of the outer peripheral portion is set to 150 μm.

Here, the average roughness Ra represents an average value of absolute value deviations from the average line of the roughness curve of the unevenness. Further, the average roughness Ra can be reduced to about 0.2 μm.

In this way, by varying the surface roughness of the mounting surface of the ceramic dielectric layer 3 in the plane, it is possible to suppress variations in the substrate temperature between the central portion of the semiconductor substrate 2 and the outer peripheral portion of the semiconductor substrate 2. More specifically, since the contact area between the semiconductor substrate 2 and the ceramic dielectric layer 3 is small in the central portion of the semiconductor substrate 2, the cooling efficiency is lowered and the substrate temperature can be kept relatively high. is there. Further, at the outer periphery of the semiconductor substrate 2, the semiconductor substrate 2 and the ceramic dielectric layer 3 are provided.
Therefore, a high cooling efficiency can be obtained as compared with the central portion. as a result,
Since there is plasma heat input from both the front surface and the side surface of the semiconductor substrate 2 and the temperature rise at the outer periphery of the semiconductor substrate 2 having a large heat input can be suppressed, the central portion of the semiconductor substrate 2 and the outer periphery of the semiconductor substrate 2 can be suppressed. Variations in substrate temperature can be suppressed.

Next, the mounting surface of the ceramic dielectric layer 3 of the electrostatic chuck 1 changes the average interval of the unevenness within the surface. Specifically, the average interval between the irregularities is equal to or less than the thickness of the substrate to be held. For example,
When the thickness of the semiconductor substrate 2 is 775 μm, the interval between the irregularities on the mounting surface of the ceramic dielectric layer 3 is 775 μm or less. Then, as shown in FIG. 2B, the unevenness interval Sm in the central portion of the mounting surface of the ceramic dielectric layer 3 is large. For example, the unevenness interval Sm = 775 μm, and as it goes to the outer peripheral portion. The surface roughness is gradually reduced. For example, in the outer peripheral portion, the unevenness interval Sm = 150 μm.

Here, the average interval Sm of unevenness represents an average value of intervals between peaks and valleys (cycles) obtained from the intersection where the roughness curve of the unevenness intersects the average line.

In this way, by changing the interval of the unevenness of the mounting surface of the ceramic dielectric layer 3 within the surface, it is possible to suppress the variation in the substrate temperature with the central portion of the semiconductor substrate 2. More specifically, since the contact area between the semiconductor substrate 2 and the ceramic dielectric layer 3 is small in the central portion of the semiconductor substrate 2, the cooling efficiency is lowered and the substrate temperature can be kept relatively high. is there. Further, since the contact area with the semiconductor substrate 2 can be kept large at the outer peripheral portion of the semiconductor substrate 2, higher cooling efficiency can be obtained compared to the central portion. As a result, there is heat input of plasma from both the surface and the side of the semiconductor substrate 2, and it is possible to suppress the temperature rise at the outer periphery of the semiconductor substrate 2 where the heat input is large,
Variations in the substrate temperature with the central portion of the semiconductor substrate 2 can be suppressed.

Here, it is desirable that the average interval Sm of the unevenness is equal to or less than the thickness of the substrate. The reason is,
For example, RIE, film formation, or the like is performed on the surface of a non-processed substrate. At that time, the temperature at the substrate surface is important. Therefore, in order for the temperature of the substrate surface to be unaffected by the presence or absence of unevenness, it is necessary that the unevenness density appear to be uniform according to the distance from the surface. It is desirable to create an average interval. For example, diameter 300m
In the case of the m semiconductor substrate 2, the thickness of the semiconductor substrate 2 is 775 μm, and therefore the average interval Sm of the unevenness of the electrostatic chuck 1 is desirably 775 μm or less.

In this case, for example, the chucking method of the electrostatic chuck 1 is roughly classified into two types, that is, the chucking by the Coulomb force and the chucking by the Johnson-Rahbek force. Since the average interval Sm is large, not only the adsorption using the Coulomb force but also the adsorption using the Johnson-Rahbek force is possible, and the adsorption can be performed in a state where both are mixed.

The electrostatic chuck according to Example 1 of the present invention configured as described above is a semiconductor substrate having a large amount of heat input by changing the surface roughness of the mounting surface of the ceramic dielectric layer and the average interval of the irregularities in the plane. The cooling efficiency at the outer peripheral portion can be increased to suppress the temperature rise, and the variation in the substrate temperature with the central portion of the semiconductor substrate can be suppressed.

In addition, since the surface roughness of the mounting surface of the ceramic dielectric layer of the electrostatic chuck is made larger than before, the residual attracting force remains when the substrate to be held is attached / detached, and it is held from the electrostatic chuck. The problem that it was difficult to peel off when removing the substrate can be solved, and the held substrate can be easily peeled off even when the substrate is attached or detached.

Here, in Example 1, an example in which both the surface roughness of the mounting surface of the ceramic dielectric layer and the average interval of the irregularities is mixed is not limited thereto, but the surface roughness or irregularities Either one of the average intervals may be changed in the plane of the ceramic dielectric layer mounting surface.

FIG. 3 shows (a) the relationship between the residence time of the reaction product and the distance from the central portion of the semiconductor substrate on the mounting surface of the ceramic dielectric layer of the electrostatic chuck according to Example 2 of the present invention, and (b). Unevenness S
The relationship between m and the distance from the center part of a semiconductor substrate is shown. The configuration of the electrostatic chuck according to the second embodiment of the present invention is the same as that shown in FIG.

The difference between the second embodiment and the first embodiment of the present invention is that the ceramic dielectric layer 3 is mounted according to the density of the reaction product in the vicinity of the mounting surface of the ceramic dielectric layer 3 as shown in FIG. That is, the interval Sm between the unevenness of the mounting surface is changed in the plane. Here, the density of the reaction product is a reaction product that has become a gas due to the reaction on the surface of the semiconductor substrate, but until the reaction product is exhausted from the reaction vessel, Because of the influence of the gas flow, the density of the reaction product near the surface of the semiconductor substrate varies depending on the location.

Specifically, for example, as shown in FIG. 3 (a), the density of the reaction product on the mounting surface of the ceramic dielectric layer 3 is the reaction product at a location between the outer peripheral portion and the central portion. The density of may increase. In this case, redeposition of the reaction product is more likely to occur in the portion between the outer peripheral portion and the central portion where the density of the reaction product is high than in the outer peripheral portion and the central portion. Further, since the density is low at the outer peripheral portion and the central portion, it is difficult for redeposition of the reaction product to occur, and uniform redeposition cannot be obtained within the surface of the mounting surface of the ceramic dielectric layer 3.

Therefore, as shown in FIG. 3B, the reaction product redeposition is suppressed, that is, the temperature of the semiconductor substrate is increased at a position between the outer peripheral portion and the central portion where reaction product redeposition tends to occur. Therefore, the average interval of the unevenness of the placement surface is increased. Then, in the outer peripheral portion and the central portion where reaction product redeposition is unlikely to occur, reaction product redeposition is likely to occur, that is, the average interval of unevenness is reduced in order to lower the semiconductor substrate temperature. Thereby, the difference of the density of the reaction product on the mounting surface of the ceramic dielectric layer 3 can be changed to change the establishment of redeposition, and the amount of redeposition can be made uniform.

The electrostatic chuck according to the second embodiment of the present invention configured as described above can react by changing the average interval of the unevenness of the mounting surface of the ceramic dielectric layer in the plane according to the density of the reaction product. The density of the product can be made uniform, and the redeposition of the reaction product on the semiconductor substrate can be made uniform in the plane. That is, the yield can be improved.

Here, in the present embodiment, the explanation has been made by changing the average interval of the unevenness of the mounting surface of the ceramic dielectric layer in the plane. However, as in the first embodiment, the average roughness is changed in the plane. It doesn't matter.

FIG. 4 shows the relationship between the unevenness spacing Sm of the electrostatic chuck according to the third embodiment of the present invention and the distance from the outer peripheral portion a to the outer peripheral portion a ′ of the electrostatic chuck of FIG. The sectional view of the electrostatic chuck according to the third embodiment of the present invention is the same as that shown in FIG.

As shown in FIG. 1, the electrostatic chuck 1 of each of the above embodiments of the present invention has the holding electrode 4 for attracting the semiconductor substrate 2 to the mounting surface of the ceramic dielectric layer 3 as described in the first embodiment. Have
A DC voltage is supplied from the DC power supply circuit 7. In addition, the semiconductor substrate 2 has an RF electrode 6 to which a high frequency voltage for etching a silicon oxide film or the like is applied. The RF electrode 6 is connected to the high frequency power supply circuit 8 and a high frequency voltage is applied to the RF electrode 6.

As described above, the cooling efficiency is lowered at the place where the direct current voltage or the high frequency voltage is applied to the mounting surface of the ceramic dielectric layer 3, so that the substrate temperature varies within the mounting surface.

Therefore, in the electrostatic chuck according to Example 3 of the present invention, as shown in FIG. 4, the interval Sm between the concaves and convexes in the DC voltage supply unit 7 and the high-frequency voltage supply unit 8 with low cooling efficiency is compared with other portions. And making it smaller. For example, in this embodiment, the average interval of the irregularities in the DC voltage supply unit 7 and the high-frequency voltage supply unit 8 with low cooling efficiency is set to 5 μm, and is set to 25 μm in other portions. Thus, since the contact area with the semiconductor substrate 2 can be kept large by reducing the average interval of the unevenness of the portions with low cooling efficiency as compared with the portions with high cooling efficiency, high cooling efficiency can be obtained. That is, the substrate temperature can be made uniform in the mounting surface of the ceramic dielectric layer 3.

The electrostatic chuck according to the third embodiment of the present invention configured as described above is obtained by changing the surface roughness of the mounting surface of the ceramic dielectric layer and the average interval of the irregularities in the plane only at a location where the cooling efficiency is low, A temperature rise in the DC voltage supply unit and the high-frequency voltage supply unit with low cooling efficiency can be suppressed, and variations in the substrate temperature in the semiconductor substrate surface can be suppressed.

Here, in the present embodiment, the explanation has been made by changing the average interval of the unevenness of the mounting surface of the ceramic dielectric layer in the plane. However, as in the first embodiment, the average roughness is changed in the plane. It doesn't matter. In addition, the DC voltage supply unit and the high-frequency voltage supply unit have been described as examples of the low cooling efficiency, but if there are other low cooling efficiency or high heat input, the average of the unevenness in that part. The interval may be changed in the plane.

The present invention is not limited to the embodiments described above, and various modifications can be made without departing from the spirit of the present invention. For example, in the above embodiments,
Although the specific average roughness and the average interval value of the unevenness are set and described, the average roughness and the average interval value of the unevenness can be set according to the implementation of each electrostatic chuck.

Sectional drawing which shows the structure of the electrostatic chuck which concerns on Example 1 of this invention. (A) the relationship between the surface roughness Ra of the mounting surface of the ceramic dielectric layer of the electrostatic chuck according to Example 1 of the present invention and the distance from the center of the semiconductor substrate, and (b) the unevenness spacing Sm Relationship with the distance from the center of the semiconductor substrate. (A) the relationship between the density of the reaction product on the mounting surface of the ceramic dielectric layer of the electrostatic chuck according to Example 2 of the present invention and the distance from the center of the semiconductor substrate, and (b) the unevenness spacing Sm. And the distance from the center of the semiconductor substrate. The relationship between the uneven | corrugated space | interval Sm of the electrostatic chuck which concerns on Example 3 of this invention, and the distance from the outer peripheral part a of the electrostatic chuck of FIG. 1 to outer peripheral part a '.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Electrostatic chuck 2 Semiconductor substrate 3 Ceramic dielectric layer 4 Holding electrode 5 Adhesive 6 RF electrode 7 DC power supply circuit 8 High frequency power supply circuit 9 Through-hole

Claims (5)

A ceramic dielectric layer having a mounting surface for holding the substrate to be held on the surface;
A holding electrode provided to face the mounting surface of the ceramic dielectric layer;
The electrostatic chuck is characterized in that the mounting surface has irregularities according to surface roughness, and an average interval between the irregularities is equal to or less than a thickness of the substrate to be held. 2. The electrostatic chuck according to claim 1, wherein the average interval between the unevenness decreases stepwise from a central region of the mounting surface toward an outer peripheral region. 3. The electrostatic chuck according to claim 1, wherein an average interval of the unevenness of the mounting surface is 775 μm or less. 4. The electrostatic according to claim 1, wherein the surface roughness of the mounting surface decreases stepwise from a central region of the mounting surface toward an outer peripheral region. 5. Chuck. The surface roughness of the mounting surface is from 600 μm from the central region of the mounting surface to the outer peripheral region.
The electrostatic chuck according to claim 4, wherein the electrostatic chuck decreases in a stepwise manner at a value between 2 μm and 5 μm.

Images