JP2008117135A5

JP2008117135A5 -

Info

Publication number: JP2008117135A5
Application number: JP2006299182A
Authority: JP
Filing date: 2006-11-02
Publication date: 2009-12-03
Anticipated expiration: 2026-11-02

Claims

A memory control device comprising memory means for storing data and controlling access made to the memory means,
First access means for continuously writing to a two-dimensional area of the memory means;
Second access means for reading from a divided area obtained by dividing the two-dimensional area of the memory means written by the first access means ;
Memory control means for controlling the first and second access means,
The memory control means has a constant interval between an address of the memory means last written by the first access means and an address of the memory means read next by the second access means. When it is smaller, the reading by the second access means is not performed,
The memory control device , wherein when the interval is larger than a certain interval, reading by the second access means is performed .

The first access means, the relative two-dimensional region, when performing continuous writing for each horizontal line, the regular intervals, required for the first access means is advanced one line in the vertical direction The memory control device according to claim 1, wherein the number is an address number.

A memory control device comprising memory means for storing data and controlling access made to the memory means,
First access means for continuously reading from a two-dimensional area of the memory means;
Second access means for writing to a divided area obtained by dividing the two-dimensional area of the memory means, read by the first access means;
Memory control means for controlling the first and second access means,
The memory control means is configured such that an interval between an address of the memory means last read by the first access means and an address of the memory means to be written next by the second access means is a constant interval. When it is smaller, the writing by the second access means is not performed,
The memory control device according to claim 1, wherein when the interval is larger than a certain interval, the writing by the second access means is performed .

In the case where the first access means continuously reads out the two-dimensional area for each line in the horizontal direction, the fixed interval is required for the first access means to advance one line in the vertical direction. 4. The memory control device according to claim 3, wherein the number is an address number.

A memory control device comprising memory means for storing data and controlling access made to the memory means,
First access means for writing to a first divided area obtained by dividing a two-dimensional area of the memory means;
Second access means for reading from a second divided area that is divided from the first divided area into the area written by the first access means;
Memory control means for controlling the first and second access means,
The memory control means is configured such that an interval between an address of the memory means to be written next by the first access means and an address of the memory means to be read next by the second access means is a predetermined interval. When it is small, reading by the second access means is not performed,
The memory control device according to claim 1, wherein when the interval is larger than a predetermined interval, reading by the second access means is performed .

Before Symbol regular intervals, and wherein one of the first divided region and the second divided regions, a number of addresses required for the two traveling region towards the length of the vertical direction is greater in said vertical direction The memory control device according to claim 5 .

6. The memory control unit according to claim 1, further comprising a latch circuit that disables the control of the second access unit according to the size of the interval after the processing of the first access unit is completed . The memory control device according to any one of the above.

A memory control device according to claim 1;
Imaging means for outputting incident subject light as image data,
The first access means writes the image data obtained by the imaging means to the memory means, and the second access means reads the written image data from the memory means for signal processing. An imaging device .

A memory control device according to claim 3;
Imaging means for outputting incident subject light as image data;
A scaling means for scaling the image data;
Modulation means for modulating the image data,
The first access means, the image data written in said memory means, and read out from said memory means to be modulated by the modulating means,
The imaging apparatus according to claim 2, wherein the second access unit writes the image data subjected to the scaling process by the scaling unit into the memory unit .

A memory control device according to claim 5;
Imaging means for outputting incident subject light as image data;
Processing means for performing signal processing on the image data;
A scaling means for scaling the image data,
The first access means writes the image data subjected to signal processing by the processing means to the memory means,
The imaging apparatus according to claim 2, wherein the second access unit reads the written image data from the memory unit in order to perform a scaling process by the scaling unit .

A memory control method for controlling access to a memory means for storing data,
A first access step of continuously writing to a two-dimensional area of the memory means;
A second access step of reading from the divided area obtained by dividing the two-dimensional area of the memory means written in the first access step ;
When the interval between the address of the memory means last written in the first access step and the address of the memory means read next in the second access step is smaller than a certain interval, Suspend reading in 2 access steps,
And a memory control step for continuing reading in the second access step when the interval is greater than a certain interval .

  A memory control method for controlling access to a memory means for storing data,
  A first access step for continuously reading into a two-dimensional area of the memory means;
  A second access step of writing in a divided area obtained by dividing the two-dimensional area of the memory means read in the first access step;
  In the memory control step, an interval between the address of the memory unit that was last read in the first access step and the address of the memory unit that is next written in the second access step is a constant interval. When it is smaller, the writing in the second access step is paused,
  And a memory control step of continuing writing in the second access step when the interval is greater than a certain interval.

  A memory control method for controlling access to a memory means for storing data,
  A first access step for writing to a first divided region obtained by dividing a two-dimensional region of the memory means;
  A second access step of reading from the second divided area that is divided from the first divided area into the area written in the first access step;
  When the interval between the address of the memory means to be written next in the first access step and the address of the memory means to be read next in the second access step is smaller than a predetermined interval, the second Suspend reading at the access step,
  And a memory control step for continuing reading in the second access step when the interval is greater than a certain interval.