JP2008110059A - Ultrasonic transducer, method for manufacturing ultrasonic transducer, and ultrasonic endoscope - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an ultrasonic transducer of high durability, prevented from peeling at a junction interface part of two wafers forming a cavity part between a pair of electrodes. <P>SOLUTION: The ultrasonic transducer 25 comprises the cavity part 51 disposed between the electrodes 31 and 35, a vibrating film 38 in contact with the cavity part to be an ultrasonic wave transmitting/receiving surface, a substrate positioned to face the vibrating film through the cavity part, and a parting wall part forming the circumference of the cavity part. The parting wall part and the substrate surface part in contact with the parting wall part are formed of the same insulation material at least partly. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a capacitive microfabricated ultrasonic transducer manufactured by bonding two semiconductor substrates, a method for manufacturing the ultrasonic transducer, and an ultrasonic transducer including the ultrasonic transducer in an ultrasonic transmission / reception unit. The present invention relates to a sonic endoscope.

  In recent years, an ultrasonic diagnostic method in which an ultrasonic wave is irradiated into a body cavity and an internal state is imaged from the echo signal to make a diagnosis is widely used. A medical device used for such an ultrasonic diagnostic method includes, for example, an ultrasonic echo device that can image the state of the body from the body surface, an ultrasonic transducer unit that transmits and receives ultrasonic waves at the tip, There are ultrasonic endoscopes that can be inserted into the camera to image the state of the body.

  Among these medical devices for ultrasonic diagnosis, in particular, an ultrasonic endoscope has been devised in various ways to reduce the diameter in order to improve insertion into a body cavity and reduce patient pain. For this reason, the ultrasonic transducer part has also been miniaturized, and various devices have been made for that purpose.

  Such a conventional ultrasonic transducer used for an ultrasonic endoscope may contain lead. For this reason, in view of recent environmental problems, there is a demand for lead-free ultrasonic transducers provided in an ultrasonic endoscope that is inserted into a body cavity and used.

Thus, it is preferable to use a c-MUT (Capacitive Micromachined Ultrasonic Transducer) as an ultrasonic transducer that can be miniaturized without using lead. It is said. The ultrasonic transducer including the c-MUT is formed by processing a silicon substrate. For example, as described in Patent Document 1 and Patent Document 2, two wafers are bonded at the time of manufacture to form a pair of electrodes. There is disclosed a structure in which a cavity that is a gap is formed therebetween.
International Publication No .: WO2004 / 016036 A2 Publication JP 2003-153391 A

  However, in the ultrasonic transducers of Patent Document 1 and Patent Document 2, when two wafers are bonded to form a cavity between a pair of electrodes, different materials, for example, In patent document 1, it joins using the anodic bonding etc. by SiO2 (silicon dioxide) -Si (silicon).

  Therefore, the two wafers bonded with these different materials are bonded to each other in a manufacturing process in which high-temperature heat is applied by CVD (chemical vapor deposition) or the like to form a protective film or the like on the surface to be performed later. There was a problem that the interface part of the film would peel off. Moreover, even if no peeling occurs at the interface portion of the joint surface in this manufacturing process, the high temperature heat causes the peeling at the interface portion during the high pressure steam sterilization process in the reprocessing process of the ultrasonic endoscope that is a medical device. May occur.

  Therefore, the present invention has been made in view of the above-described circumstances, and the object of the present invention is to provide a durability in which the bonding interface between two wafers forming a cavity between a pair of electrodes prevents damage due to peeling. It is to realize a highly reliable ultrasonic transducer, a method for manufacturing the ultrasonic transducer, and an ultrasonic endoscope including the ultrasonic transducer.

  In order to achieve the above object, an ultrasonic transducer according to the present invention includes a gap disposed between a pair of electrodes, a vibration film in contact with the gap and serving as an ultrasonic transmission / reception surface, and the gap through the gap. A substrate at a position facing the vibration film; and a partition wall portion that forms an outer periphery of the gap portion, and the partition wall portion and at least a part of the substrate surface portion in contact with the partition wall portion are made of the same insulating material It is formed by.

  In addition, the ultrasonic transducer manufacturing method of the present invention joins two substrates to form a gap between a pair of electrodes, on the first substrate on which the first electrode is formed. Forming a partition wall serving as an outer peripheral wall of the gap with the same insulating member as the bonding film on the second substrate on which the second electrode is formed; and Each of the bonding film of the first substrate and the partition wall portion of the second substrate is surface-activated bonded so as to face the second electrode with the gap interposed therebetween. And

  Furthermore, the ultrasonic endoscope of the present invention is characterized in that one or a plurality of the above-described ultrasonic transducers are arranged in the endoscope insertion portion.

  According to the present invention, a highly durable ultrasonic transducer in which a bonding interface between two wafers forming a gap between a pair of electrodes prevents damage due to peeling, a method of manufacturing the ultrasonic transducer, and An ultrasonic endoscope provided with this ultrasonic transducer can be provided.

Embodiments of the present invention will be described below with reference to the drawings.
(First embodiment)
1 to 17 show a first embodiment of the present invention, FIG. 1 is a diagram for explaining a schematic configuration of an ultrasonic endoscope, and FIG. 2 shows a schematic configuration of a tip portion of the ultrasonic endoscope 3 is a diagram illustrating the configuration of the ultrasonic transducer unit, FIG. 4 is a top view of the ultrasonic transducer, FIG. 5 is an enlarged view of a circle V in FIG. 4, and FIG. 6 is a VI-VI line in FIG. 7 is a cross-sectional view of the c-MUT cell taken along line VII-VII in FIG. 5, FIG. 8 is a cross-sectional view of the wafer with a thick oxide film, and FIG. 9 is a thick oxide. 10 is a cross-sectional view showing a state where a lower electrode is formed on a wafer with a film, FIG. 10 is a cross-sectional view showing a wafer with a thick oxide film in a state where a first insulating layer is formed, FIG. 11 is a cross-sectional view showing an SOI wafer, and FIG. FIG. 13 is a cross-sectional view showing a state in which a silicon thermal oxide film is formed on an SOI wafer, and FIG. FIG. 14 is a cross-sectional view showing a manufacturing process of a c-MUT cell in a state where a wafer with a thick oxide film and an SOI wafer are bonded together, and FIG. 15 is a diagram showing etching removal of the base silicon of the SOI wafer. FIG. 16 is a cross-sectional view showing the manufacturing process of the c-MUT cell with the insulating film formed on the upper surface, and FIG. 17 is a cross-sectional view showing the manufacturing process of the c-MUT cell. It is a flowchart which shows.

  As shown in FIG. 1, an ultrasonic endoscope 1 according to this embodiment includes an elongated insertion portion 2 that is inserted into a body cavity, an operation portion 3 that is located at the proximal end of the insertion portion 2, and the operation portion 3. And a universal cord 4 extending from the side of the main body.

  An endoscope connector 4a connected to a light source device (not shown) is provided at the base end of the universal cord 4. The endoscope connector 4a is detachably connected to a camera control unit (not shown) via an electrical connector 5a and detachably connected to an ultrasound observation device (not shown) via an ultrasonic connector 6a. The ultrasonic cable 6 is extended.

  The insertion portion 2 is located at the distal end rigid portion 7 formed of a hard resin member in order from the distal end side, the bendable bending portion 8 positioned at the rear end of the distal end rigid portion 7, and the rear end of the bending portion 8. Thus, a flexible tube portion 9 having a small diameter and a length that reaches the tip of the operation portion 3 is provided. On the distal end side of the distal rigid portion 7, an ultrasonic transducer section 20, which is an ultrasonic transmission / reception section in which a plurality of electronic scanning ultrasonic transducers that transmit and receive ultrasonic waves are arranged, is provided.

  In addition, as a material of the said front-end | tip rigid part 7, the polysulfone with favorable chemical resistance or biocompatibility is used. The operation unit 3 includes an angle knob 11 for controlling the bending portion 8 to bend in a desired direction, an air supply / water supply button 12 for performing air supply and water supply operations, a suction button 13 for performing suction operations, A treatment instrument insertion port 14 or the like serving as an entrance for a treatment instrument introduced into the body cavity is provided.

  As shown in FIG. 2, an illumination lens cover 21 constituting an illumination optical system and an observation lens cover constituting an observation optical system are provided on the distal end surface 7a of the distal end rigid portion 7 provided with the ultrasonic transducer portion 20. 22, a forceps port 23 also serving as a suction port, and an air / water supply nozzle (not shown) are arranged.

  The ultrasonic transducer unit 20 is a vibration film of a c-MUT (Capacitive Micromachined Ultrasonic Transducer) formed by processing a silicon semiconductor substrate using a silicon micromachining technology. 3 is a transducer element (hereinafter sometimes simply referred to as an element) 25 having a rectangular surface with a minimum drive unit composed of a plurality of c-MUT cells. In addition, a plurality of electronic radial type vibrator tip portions arranged in a cylindrical shape are formed.

  In the ultrasonic transducer section 20, an electrode pad electrically connected to each element 25 and a cable connection board section 24 provided with a GND (ground) electrode pad are connected to the base end side. A coaxial cable bundle 26 in which each signal line is electrically connected to the cable connection board portion 24 extends from the ultrasonic transducer portion 20. The coaxial cable bundle 26 is inserted into the distal end rigid portion 7, the bending portion 8, the flexible tube portion 9, the operation portion 3, the universal cord 4, and the ultrasonic cable 6, and is connected to an ultrasonic wave (not shown) via the ultrasonic connector 6 a. Connected with a sound wave observation device.

  The electrodes on the application (signal) side between the elements 25 have a structure in which an electric signal is individually fed from each cable of the coaxial cable bundle 26, and is electrically disconnected. It has become.

  As shown in FIG. 4, a plurality of c-MUT cells (hereinafter simply referred to as cells) 30 are arranged in each element 25. Each cell 30 in one element 25 has a structure in which an application side electrode and a feedback (grounding) side electrode are electrically connected to an application side and a return side electrode of the adjacent cell 30, respectively. . As will be described later, the cell 30 includes a pair of electrodes, a membrane that is a vibrating membrane, and a partition wall 41 formed around the pair of electrodes, and a substantially disk formed in a surface circular shape between the pair of electrodes. It becomes a drive unit element provided with the cavity 51 which is a space | gap of a shape.

  In addition, each upper electrode 31 serving as a return electrode of the pair of electrodes of the present embodiment is a single plate-like electrode plate having substantially the same shape as the surface shape of the element 25. On the other hand, the lower electrode 35 serving as the application electrode of the pair of electrodes has a substantially circular surface, and is electrically connected to the adjacent lower electrode 35 by the conductive portion 35a in one cell 30. Yes. In the present embodiment, these conductive portions 35a extend from the four sides of the edge portion of the lower electrode 35 formed in a disk shape to the four sides at substantially equal intervals of 90 degrees. For example, the upper electrode 31 may have a shape corresponding to the lower electrode 35 and divided, for example, in a surface circular shape for each cell 30.

  Here, the cross-sectional structure of the cell 30 cut along the VI-VI line and the VII-VII line shown in FIG. 5 will be described in detail with reference to FIGS. 6 and 7 show a cross-sectional structure of only the structure of two adjacent cells 30. FIG.

  As shown in FIG. 6, the cell 30 of the present embodiment includes a lower electrode 35 and a surface of the lower electrode 35 formed on a wafer 39 with a thick oxide film as a first substrate. A first insulating layer 34 constituting a bonding film to be formed, the upper electrode 31 disposed on the lower electrode 35 with a predetermined separation distance by a cavity 51, and the upper electrode 31 formed on the upper electrode 31. The second insulating layer 32 and the protective film 33 formed on the second insulating layer 32 are mainly configured. In the present embodiment, in the description of the upper part and the lower part, the ultrasonic scanning region side in the generated ultrasonic vibration is the upper part.

  In the cell 30 of the present embodiment, the upper electrode 31, the second insulating layer 32, and the protective film 33 constitute a membrane 38 that is a vibration film serving as an ultrasonic transmission / reception surface. Further, the cavity 51 described above is a vacuum gap portion whose upper and lower sides are closed by the first insulating layer 34 and the upper electrode 31 and whose periphery is closed by the partition wall portion 41, and serves as a braking layer for the membrane 38 in this embodiment.

  Further, as shown in FIG. 7, each cell 30 of one element 25 has a lower electrode 35 and a conductive portion 35a which are continuously formed integrally and electrically connected to the lower electrode 35 of the adjacent cell 30. Yes. The first insulating layer 34 is also formed on the upper surface of the conductive portion 35a.

  In the present embodiment, the wafer 39 with a thick oxide film is formed on the surface of a silicon (Si) substrate 37 having a thickness of 525 μm, for example, on a silicon thermal oxide film having a thickness of 1.5 μm (for example, a silicon dioxide film: SiO 2). A low resistance silicon (Si) substrate on which a (film) 36 is formed is used. The lower electrode 35 formed on one surface of the silicon thermal oxide film 36 of the wafer 39 with a thick oxide film is made of an electrically conductive metal, a semiconductor, or the like. 4 μm of platinum (Pt) is used. The electrically conductive material forming the lower electrode 35 is not limited to platinum (Pt), but may be molybdenum (Mo) or titanium (Ti), for example. The conductive portion 35 a formed integrally with the lower electrode 35 is also made of the same material as the lower electrode 35.

  The first insulating layer 34 covering the surface of the lower electrode 35 and the wafer 39 with a thick oxide film is, for example, a silicon thermal oxide film (for example, silicon dioxide film: SiO 2 film) having a thickness of 0.15 μm. 35 protective films are formed. The first insulating layer 34 protects the lower electrode 35 and serves as an electrical insulating film for the upper electrode 31.

  The cavity 51 is, for example, a substantially cylindrical (substantially disk-shaped) void portion set to a diameter of 40 μm and a height of 0.8 μm. The upper electrode 31 forming the upper surface of the cavity 51 is made of, for example, low-resistance silicon (Si) having a thickness of 2.0 μm and conductivity. The second insulating layer 32 formed on the upper electrode 31 is formed of, for example, a silicon thermal oxide film having a thickness of 0.3 μm (for example, silicon dioxide film: SiO 2 film).

  Further, a protective film 33 having a thickness of, for example, 1.0 μm is formed on the second insulating layer 32 by using, for example, parylene as a biocompatible outer film. In addition, if the thing containing a fluorine is used for the parylene which forms the protective film 33, it will be difficult to adhere dirts, such as protein, and the ultrasonic endoscope 1 of this Embodiment is an ultrasonic transducer | vibrator. It becomes the structure which can perform more reliable washing | cleaning, disinfection, and sterilization of the part 20. FIG. Of course, the protective film 33 is not limited to the parylene film, and may be, for example, a silicon nitride film (SiN film) or a polyimide film (PI film), or may be laminated.

  A manufacturing method of the element 25 in which a plurality of cells 30 of the present embodiment configured as described above are arranged will be described based on step (S) of the flowcharts of FIGS. 8 to 16 and FIG. 17. 8 to 16 show cross sections of the two c-MUT cells 30 to be formed. In the following description, the silicon micromachining technique is used to form a cross section on a single wafer 39 with a thick oxide film. Is a step of forming a plurality of elements 25 including a plurality of c-MUT cells 30 in the form of fine diaphragms. The number of c-MUT cells 30 of one element 25 is not limited to a plurality, and may be one.

  First, as shown in FIG. 8, a wafer 39 with a thick oxide film, which is a low resistance silicon (Si) substrate on which an oxide film (a thermal oxide film of 1.5 μm) is formed, is prepared as a first substrate (S1). ). First, here, platinum (Pt) is formed by sputtering, in this embodiment, to a thickness of 0.4 μm, patterned by photolithography, and etched, as shown in FIG. A lower electrode 35 as a first electrode is formed (S2). At this time, as shown in FIG. 7, each of the adjacent lower electrodes 35 is patterned so as to be electrically connected by the integrally formed conductive portion 35 a.

Next, the wafer 39 with a thick oxide film on which the lower electrode 35 is formed is thermally oxidized, and here, a silicon thermal oxide film (SiO 2 film) having a thickness of 0.15 μm is formed on the lower electrode 35. The first insulating layer 34 is formed (S3). This silicon thermal oxide film may be formed on the entire surface of the thick oxide film-attached wafer 39 or only on one surface on which the lower electrode 35 is formed.
The first substrate in which the lower electrode 35 and the first insulating layer 34 are formed on the wafer 39 with the thick oxide film is manufactured by the steps S1 to S3 described so far.

  Next, as shown in FIG. 11, an SOI (Silicon on Insulator) wafer 45 is prepared as a second substrate (S4). The SOI wafer 45 of the present embodiment is a second insulating layer which is a BOX (Burried Oxide) made of a silicon thermal oxide film (SiO 2 film) having a thickness of 0.3 μm on one surface of the base silicon (Si) 43. An upper electrode 31 made of low resistance silicon (Si) having a thickness of 2.0 μm is formed on the second insulating layer 32 and the second insulating layer 32.

  This SOI wafer 45 is further thermally oxidized to form a silicon thermal oxide film (SiO 2 film) 44 having a thickness of 0.8 μm as shown in FIG. 12 (S5). Next, a resist is applied to the silicon thermal oxide film 44 on the upper electrode 31 side, and is etched away to a shape that forms the outer shape of the cavity 51 by photolithography, here using BHF (hydrofluoric acid buffer solution) (S6). ).

  The remaining silicon thermal oxide film 44 that has been etched and patterned in the process of step S6 becomes a partition wall 41 that forms the side peripheral surface of the cavity 51, as shown in FIG.

  The second substrate having the partition wall 41 formed on one surface (surface on the upper electrode 31 side) of the SOI wafer 45 is manufactured by the steps S4 to S6 described so far.

  Next, the surfaces that are formed on the respective wafers 39 and 45 and serve as bonding portions of the first insulating layer 34, which is a silicon thermal oxide film, and the partition wall 41 are activated (S7). Here, in the present embodiment, the surface activation step is performed by, for example, O 2 plasma. The surface activation of the silicon thermal oxide film may use not only O2 plasma but also UV irradiation, ion gas, argon (Ar) plasma, or the like.

  Then, as shown in FIG. 14, the surface-activated first insulating layer 34 and the partition wall 41 are mutually connected at the positions where the wafers 39 and 45 are in predetermined positions and the cavity 51 is on the lower electrode 35. Bonding bonding is performed on the bonding surface to be the surface (S8). That is, the surface of the partition wall portion 41 formed on the activated SOI wafer 45 and the surface of at least a part of the surface in contact with the first insulating layer 34 formed on the activated wafer 39 with a thick oxide film are chemically bonded. , Firmly joined.

  Next, as shown in FIG. 15, the base silicon 43 of the unnecessary SOI wafer 45 is used together with a silicon thermal oxide film (SiO 2 film) 44 using KOH (potassium hydroxide solution) and BHF (hydrofluoric acid buffer solution). Etching is removed (S9).

  Finally, as shown in FIG. 16, a fluorine-based parylene HT is vapor-deposited on the second insulating layer 32 to a thickness of 1.0 μm here, thereby forming a protective film 33 (S10).

Through the series of steps as described above, the transducer element 25 constituting the ultrasonic transducer in which the c-MUT cell 30 is formed is manufactured.
As described above, the transducer element 25 of the present embodiment is formed on the lower electrode 35 and the thick oxide film wafer 39 that form the cavity 51 provided between the pair of electrodes of the c-MUT cell 30. In the joining of the formed first insulating layer 34 and the partition wall portion 41 formed on the surface of the upper electrode 31, the first insulating layer 34 and the partition wall portion 41 are made of the same material {silicon thermal oxide film (SiO2 film). }, The surface activation makes it easy for atoms on each bonding surface to form a chemical bond, so that the bonding strength at the bonding interface can be strengthened.

  As a result, the vibrator element 25 according to the manufacturing method as described above, the first insulating layer 34 and the partition wall are formed in the manufacturing process for applying the high temperature heat such as CVD for forming the protective film 33 performed in step S10. It becomes a structure which can fully prevent peeling of the interface part of the joint surface with the part 41. In addition, since the first insulating layer 34 and the partition wall 41 are firmly bonded, the ultrasonic endoscope 1 according to the present embodiment has the first insulation due to the high heat during the high-pressure steam sterilization process during reprocessing. Separation of the interface portion of the joint surface between the layer 34 and the partition wall portion 41 is less likely to occur.

  Furthermore, surface activation of the bonding surface enables bonding with low humidity, and when the flatness of each bonding surface of the first insulating layer 34 and the partition wall portion 41 of each wafer 39, 45 is improved, Room temperature bonding is possible. When low-temperature bonding is possible in this way, the choice of conductive material that can be used as the lower electrode 35 increases, and thus cost reduction can be realized.

  In the present embodiment, a thick oxide film-attached wafer 39 that is a low-resistance silicon substrate is used as a base substrate on which the c-MUT cell 30 is formed. This is because the low resistance silicon substrate itself can be used as a wiring path. However, in order to reduce parasitic capacitance as much as possible, it is preferable to use a high-resistance substrate. Therefore, the base substrate is not limited to a low-resistance silicon substrate, and a high-resistance substrate may be used. In any case, thermal oxidation can be carried out in the same way regardless of which substrate is used, and the first insulating layer 34 and the partition wall 41 can be firmly bonded by using the above-described manufacturing method. The vibrator element 25 having a strong bonding strength can be manufactured.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIGS.
18 to 29 relate to the second embodiment, FIG. 18 is a cross-sectional view of a c-MUT cell, FIG. 19 is a cross-sectional view of a c-MUT cell cut in a direction different from FIG. 18, and FIG. FIG. 21 is a cross-sectional view showing a state where a recess is formed on one surface of the low-resistance silicon substrate, FIG. 22 is a cross-sectional view showing a state where a thermal oxide film is formed on the low-resistance silicon substrate, and FIG. FIG. 24 is a cross-sectional view showing a state in which a conductive material is formed on the one surface side where the concave portion of the low-resistance silicon substrate is formed, FIG. 24 is a cross-sectional view showing the low-resistance silicon substrate in which the lower electrode is formed by etching the conductive material, 25 is a cross-sectional view showing a low-resistance silicon substrate having an insulating film formed on the lower electrode, and FIG. 26 is a cross-sectional view showing a manufacturing process of the c-MUT cell in a state where the low-resistance silicon substrate and the SOI wafer are bonded together. Is the base silicon of SOI wafer FIG. 28 is a cross-sectional view showing the manufacturing process of the c-MUT cell with the insulating film formed on the upper surface, and FIG. 29 is a cross-sectional view showing the manufacturing process of the c-MUT cell with the insulating film formed on the upper surface. It is a flowchart which shows this manufacturing process.

  In the following description, the same components as those in the first embodiment are denoted by the same reference numerals, description thereof is omitted, and only different portions are described.

  As shown in FIG. 18, the transducer element 25 in which the c-MUT cells 30 according to the present embodiment are arranged is formed on a low-resistance silicon (Si) substrate 60 that forms a base substrate and serves as a first substrate. In this embodiment, a substrate-side recess 60 a having a depth of 0.4 μm is formed under each cavity 51 corresponding to each c-MUT cell 30. A silicon thermal oxide film (SiO 2 film) 61 (61a, 61b) is formed on the surface of the low resistance silicon (Si) substrate 60 with a thickness of 0.5 μm here. Thus, the electrode recess 61A is formed on the surface of the silicon thermal oxide film 61a on the upper surface side along the substrate-side recess 60a.

  A lower electrode 35 is disposed in the electrode recess 61 </ b> A, and an insulating film 55 is formed on the lower electrode 35. In the silicon thermal oxide film 61 of the present embodiment, one surface side where the lower electrode 35 is formed is an upper surface side silicon thermal oxide film 61a constituting the bonding film, and the other surface side is a lower surface side silicon thermal oxide film 61b. To do.

  In addition, an insulating film 55 is formed on the upper surface of the lower electrode 35 to maintain insulation from the upper electrode 31 with the cavity 51 interposed.

  Furthermore, also in this embodiment, as shown in FIG. 19, each lower electrode 35 is integrally formed so as to be electrically connected to each lower electrode 35 of each adjacent cell 30 by a conductive portion 35a. Yes.

  A manufacturing method of the element 25 in which a plurality of cells 30 of the present embodiment configured as described above are arranged will be described based on step (S) of the flowcharts of FIGS. 20 to 28 and FIG. 29. Here, steps S16 to S18 in the flowchart of FIG. 29 and steps S4 to S6 of the flowchart of FIG. 17 in the first embodiment are the manufacturing process of the same SOI wafer 45. Will be omitted, and only the steps different from those of the first embodiment will be described.

  First, as shown in FIG. 20, a low resistance silicon (Si) substrate (wafer) 60 to be a first substrate is prepared (S11). The low-resistance silicon substrate 60 is the same as that of the first embodiment, for example, having a thickness of 525 μm, and of course may be a high-resistance substrate.

  Next, a substrate-side recess 60a having a depth of 0.4 μm is formed by etching using tetramethylammonium hydroxide (TMAH) at a portion that is the position of the lower electrode 35 on one surface of the low-resistance silicon substrate 60 (see FIG. S12).

  Then, the surface of the low-resistance silicon substrate 60 is thermally oxidized to form a silicon thermal oxide film (SiO 2 film) 61 having a thickness of 0.5 μm as shown in FIG. 22 (S13). At this time, a recess is formed on the surface of the upper surface side silicon thermal oxide film 61a in accordance with the shape of the substrate-side recess 60a, and this portion becomes the electrode recess 61A.

  Subsequently, as shown in FIG. 23, a platinum (Pt) film 67 is formed here on the upper surface side silicon thermal oxide film 61a by a sputtering method. At this time, the platinum film 67 is formed in accordance with the surface shape of the upper surface side silicon thermal oxide film 61a, and the surface is formed in an uneven shape.

  Then, the convex portion of the platinum film 67 is polished by CMP (Chemical Mechanical Polishing) until the surface of the upper surface side silicon thermal oxide film 61a is exposed. Thus, by polishing the platinum film 67, as shown in FIG. 24, the lower electrode 35 is formed by the platinum film 67 formed on the electrode recess 61A (S14).

  Next, in accordance with the shape of the lower electrode 35, a resist is applied onto the upper surface side silicon thermal oxide film 61a, photolithography is performed, silicon dioxide (SiO 2) is formed by a sputtering method, and lift-off is performed. As shown in FIG. 5, an insulating film 55 of silicon dioxide is formed on the lower electrode 35 (S15).

  The first electrode in which the lower electrode 35 and the insulating film 55 are formed on the low-resistance silicon substrate 60 that is the wafer on which the silicon thermal oxide film 61 is formed by the steps S11 to S15 described so far. A substrate is produced.

  Next, as in the first embodiment, the second substrate in which the partition wall 41 is formed on one surface (surface on the upper electrode 31 side) of the SOI wafer 45 is manufactured by the processes of Step S16 to Step S18. The

  Next, the exposed upper surface side silicon thermal oxide film 61a formed on each of the wafers 60 and 45 and the surface of the partition wall 41 are activated (S19). Here, in the present embodiment, in the surface activation step, the two wafers 60 and 45 are placed in the chamber and are carried out by, for example, ion gas.

  Then, as shown in FIG. 26, the upper surface side silicon thermal oxide film whose surface has been activated at a position where the cavities 51 are located on the lower electrode 35, as shown in FIG. 61a and the bonding surfaces which are the surfaces of the partition wall 41 are bonded to each other (S20). Thus, the cavity 51 is formed between the pair of electrodes 31 and 35.

  Next, in the same manner as in the first embodiment, as shown in FIG. 27, the base silicon 43 of the unnecessary SOI wafer 45 is combined with a silicon thermal oxide film (SiO 2 film) 44, KOH (potassium hydroxide solution), and Etching is removed using BHF (hydrofluoric acid buffer solution) (S21).

  Finally, as shown in FIG. 28, polyimide (PI) is deposited on the second insulating layer 32 at a thickness of 1.0 μm, for example, PVD (physical vapor deposition) or CVD (chemical vapor deposition). Then, a protective film 33 is formed (S22).

Through the series of steps as described above, the transducer element 25 constituting the ultrasonic transducer in which the c-MUT cell 30 of the present embodiment is formed is manufactured.
According to the configuration of each cell 30 of the present embodiment formed as described above, the bonding surfaces of the wafers 60 and 45 are made of the same material, here silicon dioxide (SiO 2). The transducer element 25 having stable characteristics can be produced because the structure has the same effect in terms of shape and the void shape of the cavity 51, in particular, the surface on which the electrodes 31 and 35 face each other is not uneven. Can do.

(Third embodiment)
Next, a third embodiment of the present invention will be described with reference to FIGS.
30 to 42 relate to the third embodiment, FIG. 30 is a cross-sectional view of a wafer with a thick oxide film, and FIG. 31 is a cross-sectional view showing a state in which a silicon nitride film is formed on the wafer with a thick oxide film. 32 is a sectional view showing a wafer with a thick oxide film in which a silicon nitride film is formed on a lower electrode formed by etching a conductive material. FIG. 33 is a sectional view showing a wafer with a thick oxide film in which a flat layer is formed. 34 is a cross-sectional view showing a wafer with a thick oxide film in which a flat layer is polished until the lower electrode is exposed, FIG. 35 is a cross-sectional view showing a wafer with a thick oxide film in which a flat layer is further formed on the lower electrode, and FIG. FIG. 37 is a sectional view showing an SOI wafer in which the silicon thermal oxide film on the upper electrode is etched, FIG. 37 is a sectional view showing a manufacturing process of the c-MUT cell in a state in which the pressure oxide film wafer and the SOI wafer are joined, and FIG. SOI wafer base silicon FIG. 39 is a cross-sectional view showing the manufacturing process of the c-MUT cell with the upper electrode etched, FIG. 39 is a cross-sectional view showing the manufacturing process of the c-MUT cell with the upper electrode etched, and FIG. 41 is a cross-sectional view showing the manufacturing process of the c-MUT cell, FIG. 41 is a cross-sectional view showing the manufacturing process of the c-MUT cell on which the protective film is formed, and FIG. 42 is a flowchart showing the manufacturing process of the c-MUT cell.
In the following description, the same components as those in the first and second embodiments are denoted by the same reference numerals, description thereof is omitted, and only different portions are described.

  Further, this embodiment is an example of a manufacturing method different from the above-described embodiments of the c-MUT cell 30 formed on the silicon substrate, and the element 25 in which a plurality of the cells 30 according to this embodiment are arranged. A manufacturing method is demonstrated based on step (S) of the flowchart of FIGS. 30-41 and FIG. Here, steps S46 to S48 of the flowchart of FIG. 42 and steps S4 to S6 of the flowchart of FIG. 17 in the first embodiment are the same SOI wafer 45 manufacturing process. Will be omitted, and only the steps different from those of the first embodiment will be described.

  First, as shown in FIG. 30, a wafer 39 with a thick oxide film is prepared (S41). In the wafer 39 with a pressure oxide film of the present embodiment, a silicon oxide film 36 having a thickness of 15 μm to 20 μm is formed on a silicon substrate 37 having a thickness of 525 μm. Next, as shown in FIG. 31, a silicon nitride film 71 for preventing the oxidation of a conductive film, which will be described later, is formed on one surface of the wafer 39 with a thick oxide film here, with a thickness of 0.1 μm here. Then, a film is formed (S42).

  Next, a conductive material, for example, molybdenum (Mo) is formed on the silicon nitride film (SiN film) 71 with a thickness of 0.4 μm here, and then patterned by a photolithographic method to form a lower portion. The electrode 35 is formed (S43). At this time, although not shown, the conductive portion 35a is also patterned as in the respective embodiments.

  Then, as shown in FIG. 32, a silicon nitride film (SiN film) 72 serving as a first insulating layer is formed on one surface of the thick oxide film wafer 39 on which the lower electrode 35 is formed, with a thickness of 0.05 μm here. A film is formed (S44). That is, the entire surface of the lower electrode 35 is covered with the silicon nitride films 71 and 72. Accordingly, the silicon nitride films 71 and 72 can prevent the lower electrode 35 from being oxidized during the heating process performed later.

  Next, as shown in FIG. 33, a silicon oxide film (SiO 2 film) 73 serving as a second insulating layer is formed on the silicon oxide film 72 of the wafer 39 with a thick oxide film on which the lower electrode 35 is formed to a thickness of 2.0. The film is formed by a CVD method using tetraethoxylane (TEOS) to about ~ 3.0 μm. Then, as shown in FIG. 34, this silicon oxide film 73 is once polished until the lower electrode 35 is exposed, and the surface is flattened. Then, here again, a silicon oxide film having a thickness of 0.6 μm is TEOS. As shown in FIG. 35, a flat layer 74 constituting a bonding film made of a silicon oxide film is formed (S45). That is, in the wafer 39 with a thick oxide film, a silicon oxide film having a thickness of 0.6 μm is formed on the lower electrode 35, and the silicon oxide having a thickness of 1.0 μm whose surface is continuously flat in other portions. An oxide film is formed. The film thickness of the flat layer 74 can be freely controlled by re-stacking the silicon oxide film using TEOS.

  The first substrate in which the lower electrode 35 surrounded by the silicon nitride films 71 and 72 and the flat layer 74 are formed on the wafer 39 with the thick oxide film by the steps S41 to S45 described so far. Is produced.

  Next, as in the first embodiment, the partition wall 41 is formed on one surface (surface on the upper electrode 31 side) of the SOI wafer 45 by the steps S46 to S48. The substrate is manufactured. In FIG. 36, reference numeral 31a is used to denote a low resistance silicon layer here.

  Next, the surfaces of the flat layer 74 and the partition wall 41 formed on each of the wafers 39 and 45 are activated (S49). Here, in the present embodiment, the upper electrode 35 formed on the wafer 39 with the thick oxide film is covered with the silicon nitride films 71 and 72, so that even if heating up to about 900 ° C. is performed, Oxidation is prevented.

  Then, as shown in FIG. 37, the respective surfaces of the flat layer 74 and the partition wall portion 41 which are surface activated at the positions where the respective wafers 39 and 45 are in a predetermined position and the cavity 51 is on the lower electrode 35. The bonding surfaces to be bonded are bonded (S50). Thus, the cavity 51 is formed between the pair of electrodes 31 and 35.

  Next, as shown in FIG. 38, the unnecessary base silicon 43 of the SOI wafer 45 is back grindered in this embodiment, and then etched away with a chemical such as TMAH (tetramethylammonium hydroxide) (S51).

  Next, the low resistance silicon layer 31a is chemically dry-etched (CDE) here together with the silicon thermal oxide film (second insulating layer 32) that is BOX by a photolithographic method, and as shown in FIG. The electrode 31 is formed (S52).

  Then, aluminum (Al) is formed on the surface of the upper electrode 31 on the wafer 39 with a thick oxide film and the partition wall 41 by a sputtering method to a thickness of 1.0 μm, and then patterned by a photolithographic method. The wiring 80 electrically connected to the upper electrode 31 shown in FIG. 40 is formed by etching (S53). The wiring 80 becomes a wiring pattern for electrically connecting the upper electrodes 31 of the c-MUT cells 30 adjacent in one transducer element 25.

  Finally, a protective film 81, which is a silicon nitride film (SiN film) here, is formed on the upper electrode 31 and the wiring 80 (S54). The protective film 81 may be a parylene film.

Through the series of steps as described above, the transducer element 25 constituting the ultrasonic transducer in which the c-MUT cell 30 of the present embodiment is formed is manufactured.
According to the configuration of each cell 30 of the present embodiment formed as described above, the bonding surfaces of the wafers 39 and 45 are made of the same material, here silicon dioxide (SiO 2). In addition, the activation method in which the bonding surfaces are heated in the bonding process of the wafers 39 and 45 can prevent oxidation of the lower electrode 35 formed using the metal material. . That is, the lower electrode 35 can be formed of a low melting point metal material such as aluminum (Al).

  As described above, as described in each embodiment, the vibrator element 25 formed by bonding two substrates (wafers) is the same material having the same thermal expansion coefficient and the like while the bonding portion between both substrates is dense. By using a thermal oxide film made of the above, it becomes a structure that is sufficiently resistant to a high-temperature reprocessing treatment (autoclave or the like) specific to the medical device to be installed. Further, since the thermal oxide film is unlikely to vary in thickness at the time of film formation, the thermal oxide film becomes the transducer element 25 which is a highly accurate ultrasonic transducer in which the vibration characteristics of each c-MUT cell 30 are made uniform.

  In each of the above-described embodiments, the surface activated bonding between the silicon oxide films (SiO2 films) is described. However, any material can be used as long as they are the same insulating material, for example, a silicon nitride film (SiN film). Alternatively, a silicon carbide film (SiC film), tartan oxide (Ta2O5), rutile (TiO2), or the like may be used.

  The invention described in the above embodiment is not limited to the embodiment and modifications, and various modifications can be made without departing from the scope of the invention in the implementation stage. Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent elements.

  For example, even if some constituent elements are deleted from all the constituent elements shown in the embodiment, the problems described in the column of problems to be solved by the invention can be solved, and the effects described in the effects of the invention can be achieved. In the case of being obtained, a configuration from which this configuration requirement is deleted can be extracted as an invention.

  The ultrasonic transducers described in the above embodiments have the characteristics described in the following supplementary notes.

(Appendix 1)
In an ultrasonic transducer manufactured by joining two substrates,
A gap disposed between a pair of electrodes;
A bonding film formed on the first substrate;
A partition wall formed on a second substrate and bonded to the bonding film to form an outer periphery of the void;
Have
An ultrasonic transducer in which the bonding film and the partition wall are formed of the same insulating material.

(Appendix 2)
The ultrasonic transducer according to appendix 2, wherein the bonding portion between the bonding film and the partition wall is surface activated bonded.

(Appendix 3)
The ultrasonic transducer according to appendix 1 or appendix 2, wherein the same insulating material is silicon oxide.

(Appendix 4)
The ultrasonic transducer according to appendix 3, wherein the silicon oxide is thermally oxidized silicon in which at least one of the bonding film and the partition wall is formed by thermal oxidation.

(Appendix 5)
The ultrasonic wave according to any one of appendix 1 to appendix 4, wherein the second substrate is made of an SOI wafer having low-resistance silicon that functions as one of the pair of electrodes. Transducer.

(Appendix 6)
A method of manufacturing an ultrasonic transducer in which two substrates are joined to form a gap between a pair of electrodes,
Forming a bonding film on the first substrate on which the first electrode is formed;
Forming a partition wall as an outer peripheral wall of the gap by the same insulating member as the bonding film on the second substrate on which the second electrode is formed,
Surface-activate each of the bonding film of the first substrate and the partition wall of the second substrate so that the first electrode and the second electrode face each other with the gap interposed therebetween. Joining
An ultrasonic transducer manufacturing method characterized by the above.

(Appendix 7)
An ultrasonic endoscope comprising an ultrasonic transducer arranged on the distal end side of a distal end rigid portion constituting the distal end of an endoscope insertion portion and having a configuration in which one or a plurality of ultrasonic transducer elements are arranged. ,
A gap disposed between a pair of electrodes;
A bonding film formed on the first substrate;
A partition wall formed on a second substrate and bonded to the bonding film to form an outer periphery of the void;
Have
An ultrasonic endoscope characterized in that the bonding film and the partition wall are formed of the same insulating material.

(Appendix 8)
The ultrasonic endoscope according to appendix 7, wherein the bonding portion between the bonding film and the partition wall is surface activated bonded.

The figure explaining schematic structure of the ultrasonic endoscope based on 1st Embodiment The figure which shows schematic structure of the front-end | tip part of an ultrasonic endoscope same as the above The figure explaining the structure of an ultrasonic transducer | vibrator part similarly The top view of the ultrasonic transducer Same as above, enlarged view of circle V in FIG. FIG. 5 is a cross-sectional view of the c-MUT cell taken along line VI-VI in FIG. FIG. 5 is a cross-sectional view of the c-MUT cell taken along line VII-VII in FIG. Sectional view showing a wafer with a thick oxide film Sectional drawing which shows the state which formed the lower electrode on the wafer with a thick oxide film similarly Sectional drawing which shows the wafer with a thick oxide film of the state which formed the 1st insulating layer similarly Sectional view showing SOI wafer Sectional drawing which shows the state which formed the silicon thermal oxide film in the SOI wafer similarly Sectional drawing which shows the SOI wafer of the state which etched the silicon thermal oxide film on an upper electrode similarly Sectional drawing which shows the manufacturing process of the c-MUT cell of the state which joined the wafer with a thick oxide film, and the SOI wafer same as the above Sectional drawing which shows the manufacturing process of the c-MUT cell of the state which removed the base silicon of the SOI wafer by the same etching Sectional drawing which shows the manufacturing process of the c-MUT cell of the state in which the insulating film was formed in the upper surface similarly The flowchart which shows the manufacturing process of c-MUT cell, the same Sectional drawing of c-MUT cell based on 2nd Embodiment, FIG. 18 is a cross-sectional view of a c-MUT cell cut in a direction different from FIG. Cross section of low resistance silicon substrate Sectional drawing which shows the state which formed the recessed part in the same surface of the low resistance silicon substrate Sectional view showing a state where a thermal oxide film is formed on a low-resistance silicon substrate Sectional drawing which shows the state which formed the conductive material into the same surface side in which the recessed part of the low resistance silicon substrate was formed similarly Sectional view showing a low-resistance silicon substrate on which a lower electrode is formed by etching a conductive material Sectional view showing a low-resistance silicon substrate with an insulating film formed on the lower electrode Sectional drawing which shows the manufacturing process of the c-MUT cell of the state which joined the low resistance silicon substrate and SOI wafer same as the above Sectional drawing which shows the manufacturing process of the c-MUT cell of the state which removed the base silicon of the SOI wafer by the same etching Sectional drawing which shows the manufacturing process of the c-MUT cell of the state in which the insulating film was formed in the upper surface similarly The flowchart which shows the manufacturing process of c-MUT cell, the same Sectional drawing of the wafer with a thick oxide film based on a 3rd form Sectional view showing a state in which a silicon nitride film is formed on a wafer with a thick oxide film Sectional view showing a wafer with a thick oxide film in which a silicon nitride film is formed on a lower electrode formed by etching a conductive material Sectional view showing a wafer with a thick oxide film on which a flat layer is formed Sectional drawing which shows the wafer with a thick oxide film which polished the flat layer until the lower electrode was exposed Sectional view showing a wafer with a thick oxide film in which a flat layer is further formed on the lower electrode Sectional drawing which shows the SOI wafer of the state which etched the silicon thermal oxide film on an upper electrode similarly Sectional drawing which shows the manufacture process of the c-MUT cell of the state which joined the pressure oxide film wafer and SOI wafer same as the above Sectional drawing which shows the manufacturing process of the c-MUT cell of the state which removed the base silicon of the SOI wafer by the same etching Sectional drawing which shows the manufacture process of the c-MUT cell of the state which etched the upper electrode similarly Sectional drawing which shows the manufacture process of c-MUT cell which formed the wiring of the upper electrode similarly Sectional drawing which shows the manufacturing process of c-MUT cell which formed the protective film similarly The flowchart which shows the manufacturing process of c-MUT cell, the same

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Ultrasound endoscope 7 ... Hard tip part 20 ... Ultrasonic transducer part 25 ... Transducer element 26 ... Coaxial cable bundle 30 ... Cell 31 ... Upper electrode 32 ... 1st insulating layer 33 ... Protective film 34 ... 2nd insulating layer 35 ... Lower electrode 35a ... Conducting part 36 ... Silicon thermal oxide film 37 ... Silicon substrate 38 ..Membrane 39... Thick oxide film wafer 41... Partition wall 43... Base silicon 44... Silicon thermal oxide film 45.

Claims (6)

A gap disposed between a pair of electrodes;
A vibrating membrane that is in contact with the gap and serves as an ultrasonic wave transmitting and receiving surface;
A substrate in a position facing the vibrating membrane via the gap,
A partition wall forming an outer periphery of the gap,
Have
The ultrasonic transducer according to claim 1, wherein at least a part of the partition wall portion and the substrate surface portion in contact with the partition wall portion are formed of the same insulating material.   The ultrasonic transducer according to claim 1, wherein the same insulating material is silicon oxide.   3. The ultrasonic transducer according to claim 2, wherein one or both of the partition wall and the silicon oxide on at least a part of the surface portion of the substrate is thermally oxidized silicon.   The ultrasonic transducer according to any one of claims 1 to 3, wherein at least one of the pair of electrodes is made of low-resistance silicon.   5. The ultrasonic transducer according to claim 1, wherein the ultrasonic transducer is disposed in an endoscope insertion portion and has a configuration in which one or a plurality of ultrasonic transducer elements are arranged. Ultrasound endoscope. A method of manufacturing an ultrasonic transducer in which two substrates are joined to form a gap between a pair of electrodes,
Forming a bonding film on the first substrate on which the first electrode is formed;
Forming a partition wall as an outer peripheral wall of the gap by the same insulating member as the bonding film on the second substrate on which the second electrode is formed,
Surface-activate each of the bonding film of the first substrate and the partition wall of the second substrate so that the first electrode and the second electrode face each other with the gap interposed therebetween. A method for manufacturing an ultrasonic transducer, characterized by comprising:

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