JP2008108017A - Communication system - Google Patents

Communication system Download PDF

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JP2008108017A
JP2008108017A JP2006289379A JP2006289379A JP2008108017A JP 2008108017 A JP2008108017 A JP 2008108017A JP 2006289379 A JP2006289379 A JP 2006289379A JP 2006289379 A JP2006289379 A JP 2006289379A JP 2008108017 A JP2008108017 A JP 2008108017A
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leakage current
resistor
communication system
signal
receiving
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JP4888705B2 (en
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Hisashi Saito
久 齋藤
Kimihide Aoyama
公英 青山
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Yokogawa Electric Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a communication system for quickly detecting disturbance caused by a leakage current. <P>SOLUTION: A signal processing unit 20 applies A-D conversion to voltage signals V2 generated from signal reception resistors 13, 14 to output the converted signals as process values. The processing unit 20 executes computation based on voltage signals V1, V2, and detects a leakage current caused by a failure of a HART transmission/reception circuit 11 or a coupling capacitor 12. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、直流電流と交流信号とを重畳した通信を行う通信システムに関する。   The present invention relates to a communication system that performs communication in which a direct current and an alternating signal are superimposed.

プロセスオートメーション用制御機器として、ＨＡＲＴ通信協会が提唱しているＨＡＲＴ機器が各社より各種販売されている。ＨＡＲＴ機器では、古くからの業界標準であったアナログ４−２０ｍＡ信号に１．２ｋＨｚおよび２．２ｋＨｚの周波数信号を重畳した信号により外部と通信を行うことができる。   Various HART devices proposed by the HART Communication Association are sold by various companies as process automation control devices. The HART device can communicate with the outside by a signal obtained by superimposing frequency signals of 1.2 kHz and 2.2 kHz on an analog 4-20 mA signal, which has been an industry standard for a long time.

図３は、伝送器などの外部機器からの直流電流信号を受ける電流入力モジュールの構成を示している。外部機器３０からの直流電流信号は、通信バス３１を介して電流入力モジュール４０に入力され、受信抵抗４３により電圧信号Ｖ０に変換される。その電圧信号Ｖ０をＡＤ変換した値をプロセス値として取り扱う。   FIG. 3 shows a configuration of a current input module that receives a DC current signal from an external device such as a transmitter. A DC current signal from the external device 30 is input to the current input module 40 via the communication bus 31 and converted into a voltage signal V0 by the reception resistor 43. A value obtained by AD converting the voltage signal V0 is handled as a process value.

一方、電流入力モジュール４０には、上記の周波数信号を送受信するＨＡＲＴ送受信回路４１が設けられ、直流信号を遮断するための結合コンデンサ４２を介して通信バス３１に接続されている。   On the other hand, the current input module 40 is provided with a HART transmission / reception circuit 41 for transmitting / receiving the above frequency signal, and is connected to the communication bus 31 via a coupling capacitor 42 for blocking a DC signal.

特許文献１には、ＨＡＲＴ機器を分散型制御システムに接続するためのＨＡＲＴ機器通信装置が記載されている。   Patent Document 1 describes a HART device communication apparatus for connecting a HART device to a distributed control system.

特開２００１−３１８８３７号公報JP 2001-318837 A

しかし、ＨＡＲＴ送受信回路４１や結合コンデンサ４２の故障により発生した漏洩電流により、直流電流信号に外乱が与えられた場合、外部機器３０の真のプロセス値とは異なる値がプロセス値として認識される。図４は直流電流信号への外乱を例示しており、故障により生じた漏洩電流により直流電流信号がオフセットし、プロセス値が誤認される様子を示している。このような場合には、電流入力モジュール４０から誤った入力値（プロセス値）が上位に伝達されてしまう。   However, when a disturbance is given to the DC current signal due to the leakage current generated by the failure of the HART transmission / reception circuit 41 or the coupling capacitor 42, a value different from the true process value of the external device 30 is recognized as the process value. FIG. 4 exemplifies a disturbance to the DC current signal, and shows a state in which the DC current signal is offset by a leakage current caused by a failure and the process value is erroneously recognized. In such a case, an incorrect input value (process value) is transmitted from the current input module 40 to the upper level.

本発明の目的は、漏洩電流による外乱を速やかに検出できる通信システムを提供することにある。   An object of the present invention is to provide a communication system that can quickly detect disturbance caused by leakage current.

本発明の通信システムは、直流電流と交流信号とを重畳し、通信バスを介して通信を行う通信システムにおいて、前記バスを介して伝送された直流電流を受信する受信手段と、前記交流信号を、前記通信バスを介して送受信する送受信回路と、前記送受信回路からの、前記受信手段へ影響を与える漏洩電流を検出する検出手段と、を備えることを特徴とする。
この通信システムによれば、送受信回路からの漏洩電流を検出するので、漏洩電流に基づく外乱を速やかに検出することができる。 The communication system of the present invention is a communication system in which a direct current and an alternating current signal are superimposed and communication is performed via a communication bus, receiving means for receiving the direct current transmitted through the bus, and the alternating current signal. And a transmission / reception circuit that transmits and receives via the communication bus, and a detection unit that detects a leakage current from the transmission / reception circuit that affects the reception unit.
According to this communication system, since the leakage current from the transmission / reception circuit is detected, a disturbance based on the leakage current can be quickly detected.

前記検出手段は、前記漏洩電流が流れる経路上に配置された抵抗器と、前記抵抗器に発生する電圧に基づいて前記漏洩電流を検知する信号処理部と、を具備してもよい。   The detection unit may include a resistor disposed on a path through which the leakage current flows, and a signal processing unit that detects the leakage current based on a voltage generated in the resistor.

前記受信手段は、前記抵抗器を用いて構成されていてもよい。   The receiving means may be configured using the resistor.

本発明の通信システムによれば、送受信回路からの漏洩電流を検出するので、漏洩電流に基づく外乱を速やかに検出することができる。   According to the communication system of the present invention, since the leakage current from the transmission / reception circuit is detected, a disturbance based on the leakage current can be quickly detected.

以下、図１および図２を参照して、本発明による通信システムの一実施形態について説明する。   Hereinafter, an embodiment of a communication system according to the present invention will be described with reference to FIGS. 1 and 2.

図１は、一実施形態の通信システムの構成を示すブロック図である。   FIG. 1 is a block diagram illustrating a configuration of a communication system according to an embodiment.

図１に示すように、本実施形態の通信システムは、通信バス３１を介して外部機器３０に接続された電流入力モジュール１０を備える。   As shown in FIG. 1, the communication system of this embodiment includes a current input module 10 connected to an external device 30 via a communication bus 31.

電流入力モジュール１０は、１．２ｋＨｚおよび２．２ｋＨｚの周波数信号を送受信するＨＡＲＴ送受信回路１１と、ＨＡＲＴ送受信回路１１および通信バス３１間で直流成分を遮断する結合コンデンサ１２と、直列接続された受信抵抗器１３および受信抵抗器１４と、受信抵抗器１３および受信抵抗器１４により発生する電圧信号Ｖ１および電圧信号Ｖ２に基づく演算を行う信号処理部２０と、を備える。   The current input module 10 includes a HART transmission / reception circuit 11 that transmits / receives frequency signals of 1.2 kHz and 2.2 kHz, a coupling capacitor 12 that blocks a direct current component between the HART transmission / reception circuit 11 and the communication bus 31, and a reception connected in series. A resistor 13 and a receiving resistor 14; and a signal processing unit 20 that performs an operation based on the voltage signal V1 and the voltage signal V2 generated by the receiving resistor 13 and the receiving resistor 14.

受信抵抗器１３、受信抵抗器１４および信号処理部２０は検出手段として機能する。   The reception resistor 13, the reception resistor 14, and the signal processing unit 20 function as detection means.

信号処理部２０では、受信抵抗器１３および受信抵抗器１４により発生する電圧信号Ｖ２または電圧信号Ｖ１をＡＤ変換し、プロセス値として出力する。   In the signal processing unit 20, the voltage signal V2 or the voltage signal V1 generated by the reception resistor 13 and the reception resistor 14 is AD-converted and output as a process value.

また、信号処理部２０では、電圧信号Ｖ１および電圧信号Ｖ２に基づく演算を実行し、ＨＡＲＴ送受信回路１１や結合コンデンサ１２の故障により発生する漏洩電流を検出する。   Further, the signal processing unit 20 performs an operation based on the voltage signal V1 and the voltage signal V2, and detects a leakage current generated due to a failure of the HART transmission / reception circuit 11 or the coupling capacitor 12.

漏洩電流は受信抵抗器１４のみに流れ、受信抵抗器１３には流れないため、受信抵抗器１３の抵抗値をＲ２、受信抵抗器１４の抵抗値をＲ１、外部機器３０が出力する電流信号をＩ、漏洩電流をＩａとすると、
電圧信号Ｖ１＝（Ｉ＋Ｉａ）×Ｒ１
電圧信号Ｖ２＝（Ｉ＋Ｉａ）×Ｒ１＋Ｉ×Ｒ２
である。 Since the leakage current flows only to the reception resistor 14 and does not flow to the reception resistor 13, the resistance value of the reception resistor 13 is R2, the resistance value of the reception resistor 14 is R1, and the current signal output by the external device 30 is If I and leakage current are Ia,
Voltage signal V1 = (I + Ia) × R1
Voltage signal V2 = (I + Ia) × R1 + I × R2
It is.

したがって、漏洩電流がない場合には、電圧信号Ｖ２／電圧信号Ｖ１の値（電圧信号Ｖ１と電圧信号Ｖ２の比）が、（Ｒ１＋Ｒ２）／Ｒ１となる。しかし、漏洩電流がある場合には、電圧信号Ｖ１と電圧信号Ｖ２の比に誤差が生じ、上記の値からずれる。このため、漏洩電流を速やかに検出することができる。漏洩電流が検出されるとプロセス値の出力を停止することにより、上位側への誤ったプロセス値の出力を回避できる。   Therefore, when there is no leakage current, the value of voltage signal V2 / voltage signal V1 (ratio of voltage signal V1 to voltage signal V2) is (R1 + R2) / R1. However, if there is a leakage current, an error occurs in the ratio between the voltage signal V1 and the voltage signal V2, which deviates from the above value. For this reason, the leakage current can be detected promptly. When the leakage current is detected, the output of the process value is stopped, so that an erroneous process value output to the upper side can be avoided.

図２は、別の構成例を示すブロック図である。   FIG. 2 is a block diagram showing another configuration example.

図２の例では、電流入力モジュール１０Ａは、１．２ｋＨｚおよび２．２ｋＨｚの周波数信号を送受信するＨＡＲＴ送受信回路１１と、ＨＡＲＴ送受信回路１１および通信バス３１間で直流成分を遮断する結合コンデンサ１５と、結合コンデンサ１５と直列に接続された検出抵抗器１６と、直流電流を電圧に変換する受信抵抗器１７と、検出抵抗器１６および受信抵抗器１７により発生する電圧信号Ｖ３および電圧信号Ｖ４に基づく演算を行う信号処理部２０Ａと、を備える。   In the example of FIG. 2, the current input module 10 </ b> A includes a HART transmission / reception circuit 11 that transmits and receives 1.2 kHz and 2.2 kHz frequency signals, and a coupling capacitor 15 that blocks a DC component between the HART transmission / reception circuit 11 and the communication bus 31. Based on a detection resistor 16 connected in series with the coupling capacitor 15, a reception resistor 17 for converting a direct current into a voltage, and a voltage signal V3 and a voltage signal V4 generated by the detection resistor 16 and the reception resistor 17 And a signal processing unit 20A for performing a calculation.

検出抵抗器１６および信号処理部２０Ａは検出手段として機能する。また、受信抵抗器１７は検出手段として機能する。   The detection resistor 16 and the signal processing unit 20A function as detection means. The reception resistor 17 functions as a detection unit.

信号処理部２０Ａでは、受信抵抗器１７により発生する電圧信号Ｖ３をＡＤ変換し、プロセス値として出力する。   In the signal processing unit 20A, the voltage signal V3 generated by the reception resistor 17 is AD converted and output as a process value.

また、信号処理部２０Ａでは、検出抵抗器１６に発生する電圧信号Ｖ３−電圧信号Ｖ４をモニタし、漏洩電流を検出する。正常時には電圧信号Ｖ３−電圧信号Ｖ４がゼロであるため、電圧信号Ｖ３−電圧信号Ｖ４の値に基づいて漏洩電流の発生を迅速に検出することができる。漏洩電流が検出されるとプロセス値の出力を停止することにより、上位側への誤ったプロセス値の出力を回避できる。   In the signal processing unit 20A, the voltage signal V3-voltage signal V4 generated in the detection resistor 16 is monitored to detect a leakage current. Since the voltage signal V3 to the voltage signal V4 is zero at the normal time, the occurrence of the leakage current can be quickly detected based on the value of the voltage signal V3 to the voltage signal V4. When the leakage current is detected, the output of the process value is stopped, so that an erroneous process value output to the upper side can be avoided.

以上説明したように、上記実施形態の通信システムによれば、漏洩電流に基づく電圧変動を検知して漏洩電流を検出しているので、故障検出に関する自己診断機能を向上させることができる。また、誤った情報の出力を防止することができる。   As described above, according to the communication system of the above-described embodiment, since the leakage current is detected by detecting the voltage fluctuation based on the leakage current, the self-diagnosis function regarding the failure detection can be improved. Also, erroneous information output can be prevented.

本発明の適用範囲は上記実施形態に限定されることはない。本発明は、直流電流と交流信号とを重畳したバスを介して通信を行う通信システムに対し、広く適用することができる。   The scope of application of the present invention is not limited to the above embodiment. The present invention can be widely applied to communication systems that perform communication via a bus in which a direct current and an alternating signal are superimposed.

一実施形態の通信システムの構成を示すブロック図。The block diagram which shows the structure of the communication system of one Embodiment. 別実施形態の通信システムの構成を示すブロック図。The block diagram which shows the structure of the communication system of another embodiment. 従来の通信システムの構成を示すブロック図。The block diagram which shows the structure of the conventional communication system. 直流電流信号への外乱を例示する図。The figure which illustrates the disturbance to a direct current signal.

符号の説明Explanation of symbols

１１ ＨＡＲＴ送受信回路（送受信回路）
１３，１４，１６ 受信抵抗器（受信手段、検出手段）
１７ 検出抵抗器（検出手段）
２０ 信号処理部（検出手段）
３１ 通信バス 11 HART transceiver circuit (transceiver circuit)
13, 14, 16 Receiving resistor (receiving means, detecting means)
17 Detection resistor (detection means)
20 Signal processor (detection means)
31 Communication bus

Claims (3)

直流電流と交流信号とを重畳し、通信バスを介して通信を行う通信システムにおいて、
前記バスを介して伝送された直流電流を受信する受信手段と、
前記交流信号を、前記通信バスを介して送受信する送受信回路と、
前記送受信回路からの、前記受信手段へ影響を与える漏洩電流を検出する検出手段と、
を備えることを特徴とする通信システム。 In a communication system in which direct current and alternating current signals are superimposed and communication is performed via a communication bus,
Receiving means for receiving a direct current transmitted via the bus;
A transmission / reception circuit for transmitting and receiving the AC signal via the communication bus;
Detecting means for detecting leakage current from the transmitting / receiving circuit that affects the receiving means;
A communication system comprising: 前記検出手段は、前記漏洩電流が流れる経路上に配置された抵抗器と、
前記抵抗器に発生する電圧に基づいて前記漏洩電流を検知する信号処理部と、
を具備することを特徴とする請求項１に記載の通信システム。 The detection means includes a resistor disposed on a path through which the leakage current flows,
A signal processing unit for detecting the leakage current based on a voltage generated in the resistor;
The communication system according to claim 1, further comprising: 前記受信手段は、前記抵抗器を用いて構成されていることを特徴とする請求項２に記載の通信システム。 The communication system according to claim 2, wherein the receiving unit is configured using the resistor.
JP2006289379A 2006-10-25 2006-10-25 Communications system Active JP4888705B2 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012205270A (en) * 2011-03-28 2012-10-22 Azbil Corp Hart communication compatible apparatus
JP2013149256A (en) * 2012-01-20 2013-08-01 Ls Industrial Systems Co Ltd Analog input/output module

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001318837A (en) * 2000-05-11 2001-11-16 Yokogawa Electric Corp Hart equipment communication device to be used for distributed control system
JP2006046983A (en) * 2004-08-02 2006-02-16 Chudenko Corp Insulation monitoring system using power-line carriage
JP2006157865A (en) * 2004-11-01 2006-06-15 Yokogawa Electric Corp Field device, and method for transmitting signal of the field device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001318837A (en) * 2000-05-11 2001-11-16 Yokogawa Electric Corp Hart equipment communication device to be used for distributed control system
JP2006046983A (en) * 2004-08-02 2006-02-16 Chudenko Corp Insulation monitoring system using power-line carriage
JP2006157865A (en) * 2004-11-01 2006-06-15 Yokogawa Electric Corp Field device, and method for transmitting signal of the field device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012205270A (en) * 2011-03-28 2012-10-22 Azbil Corp Hart communication compatible apparatus
JP2013149256A (en) * 2012-01-20 2013-08-01 Ls Industrial Systems Co Ltd Analog input/output module
US10158505B2 (en) 2012-01-20 2018-12-18 Lsis Co., Ltd. Analog input and output module

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