JP2008103442A5 - - Google Patents
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- Publication number
- JP2008103442A5 JP2008103442A5 JP2006283315A JP2006283315A JP2008103442A5 JP 2008103442 A5 JP2008103442 A5 JP 2008103442A5 JP 2006283315 A JP2006283315 A JP 2006283315A JP 2006283315 A JP2006283315 A JP 2006283315A JP 2008103442 A5 JP2008103442 A5 JP 2008103442A5
- Authority
- JP
- Japan
- Prior art keywords
- forming
- oxide film
- insulating film
- silicon oxide
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 3
- 239000004065 semiconductor Substances 0.000 claims 3
- 229910052710 silicon Inorganic materials 0.000 claims 3
- 239000010703 silicon Substances 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 3
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
Claims (3)
前記シリコン基板の表面をオゾンガス溶解液で処理することにより、前記表面にシリコン酸化膜を形成する工程と、
前記シリコン酸化膜上に高誘電率絶縁膜を形成する工程と、
を具備し、
前記表面に前記シリコン酸化膜を形成する工程は、前記自然酸化膜を除去する工程と同一の装置内で行われる半導体装置の製造方法。 Removing the natural oxide film from the surface of the silicon substrate using a chemical solution;
By treating the surface of the silicon substrate with the ozone gas dissolved solution, forming a silicon oxide film on said surface,
Forming a high dielectric constant insulating film on the silicon oxide film;
Equipped with,
The method of manufacturing a semiconductor device , wherein the step of forming the silicon oxide film on the surface is performed in the same apparatus as the step of removing the natural oxide film .
前記シリコン酸化膜上に高誘電率絶縁膜を形成する工程と、
を具備する半導体装置の製造方法。 Forming a silicon oxide film on the surface by treating the surface of the silicon substrate with a mixed gas of water vapor and ozone gas; and
Forming a high dielectric constant insulating film on the silicon oxide film;
A method for manufacturing a semiconductor device comprising:
前記高誘電率絶縁膜を形成する工程の後に、前記ゲート絶縁膜上にゲート電極を形成する工程を具備する請求項１又は２に記載の半導体装置の製造方法。 The high dielectric constant insulating film is a gate insulating film of a transistor;
Said high after the step of forming the dielectric insulating film, a method of manufacturing a semiconductor device according to claim 1 or 2 comprising the step of forming a gate electrode on the gate insulating film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006283315A JP2008103442A (en) | 2006-10-18 | 2006-10-18 | Process for fabricating semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006283315A JP2008103442A (en) | 2006-10-18 | 2006-10-18 | Process for fabricating semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008103442A JP2008103442A (en) | 2008-05-01 |
| JP2008103442A5 true JP2008103442A5 (en) | 2009-11-05 |
Family
ID=39437561
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006283315A Withdrawn JP2008103442A (en) | 2006-10-18 | 2006-10-18 | Process for fabricating semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2008103442A (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6806145B2 (en) * | 2001-08-31 | 2004-10-19 | Asm International, N.V. | Low temperature method of forming a gate stack with a high k layer deposited over an interfacial oxide layer |
| JP4483364B2 (en) * | 2004-03-24 | 2010-06-16 | ソニー株式会社 | Manufacturing method of semiconductor device |
-
2006
- 2006-10-18 JP JP2006283315A patent/JP2008103442A/en not_active Withdrawn
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