JP2008079074A - Data transmitter - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data transmitter capable of compensating delay of a signal using a simple circuit in the data transmitter adopting a differential transmission control system. <P>SOLUTION: The data transmitter uses the differential transmission control system which has a transmitting circuit which transmits data, a receiving circuit which receives the data transmitted from the transmitting circuit and a transmission path which connects the transmitting circuit with the receiving circuit using two signal lines electromagnetically and tightly coupled to each other and transmits two phases of signals, a non-inverted signal and an inversion signal via the transmission path. The data transmitter has a detection means for detecting voltage variation generated resulting from input capacity which the receiving circuit has on the side of the transmitting circuit and a control means for controlling transmission timing for transmitting a signal on the side of the transmitting circuit based on propagation speed information obtained based on the voltage variation detected by the detection means on the side of the transmitting circuit. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an information device such as a personal computer, a large-scale LSI or the like used in an electronic device such as a printer connected to the personal computer, or an electronic device such as an image forming apparatus such as a copying machine or a facsimile. The present invention relates to a data transmission device for an electronic circuit comprising a printed wiring board on which the semiconductor integrated circuit is mounted.

JP 2004-171254 A JP 2005-244479 A

  Conventionally, in information devices such as personal computers, electronic devices such as printers connected to the personal computers, and image forming apparatuses such as copiers and facsimiles, LSIs used in the electronic devices are used. Along with the increase in processing capability, there is an increasing need to exchange a plurality of large-scale data between LSIs at high speed.

  In this way, in a digital data transmission apparatus that exchanges a plurality of data between LSIs, for example, when data is sent in a single transmission line by sending data in parallel through a plurality of n transmission lines. In comparison, the amount of data transmission per unit time is n times. Therefore, a parallel data transmission system as described above has been developed in a data transmission path such as a memory bus of a CPU.

  However, in the case of a parallel data transmission apparatus, when the data transmission speed is increased, timing skew caused by variations in a semiconductor integrated circuit itself such as an LSI becomes a problem and is approaching the limit. The transmission time per bit is, for example, 400 ps (pico sec) at a transmission rate of 2.5 Gbps (bit per sec), but the transmission line length varies, the timing variation in the semiconductor integrated circuit, or the load Considering a margin such as variation in capacity, 1 Gbps (500 MHz) is considered to be the limit.

  Among the above data transmissions, so-called serial transmission systems are used for medium-to-long distance data transmission such as between boards, between units, and between devices, in which parallel data is converted into serial data and transmitted at high speed.

  However, in data transmission that requires high throughput over a short distance, such as a memory bus of a CPU, for example, there are limitations on transmission speed per channel and serial / parallel conversion latency (latency: signal delay due to processing). Because of the problem, serial data transmission cannot be applied.

  Therefore, in order to perform parallel data transmission at high speed, a means for correcting variations in transmission time between channels is required, which is disclosed in Japanese Patent Application Laid-Open Nos. 2004-171254 and 2005-244479. As described above, various techniques have already been proposed.

The data transfer device according to the above Japanese Patent Laid-Open No. 2004-171254 includes a transmission device, an inter-device wiring including a plurality of signal lines for transmitting a signal from the transmission device in a parallel system, and the inter-device wiring. In a data transfer device comprising a receiving device for receiving a signal sent via
The transmission device outputs an adjustment signal having a step-like change point when an adjustment mode selection signal instructing an adjustment mode for correcting delay variation occurring between the plurality of signal lines is input. A signal output means, and a transmission means for synchronizing and outputting the adjustment signal output from the adjustment signal output means to all of the plurality of signal lines,
The receiving apparatus includes: adjustment signal detection means for detecting that the step-like change point has arrived for all of the reception adjustment signals received via each of the plurality of signal lines and outputting a change point detection signal; A delay means for generating a delay signal provided for each of the plurality of signal lines and giving a plurality of different delay amounts to the reception adjustment signal for each signal line; and provided for each of the delay means. A selection means for selecting and outputting one of the delay signals output by the delay means, and a delay signal output by the delay means when the adjustment signal detection means outputs the change point detection signal. A delay amount determining means for detecting a delay signal having the largest delay amount among the step-like change points and controlling the selection means to select the detected delay signal;
The receiving device inputs each of the signals received via the plurality of signal lines to each of the delay means during normal operation other than the adjustment mode, and is controlled by the delay amount determination means among the outputs of the delay means. The delay signal selected by the selecting means is input to the data fetching means.

Also, a transmission apparatus according to Japanese Patent Laid-Open No. 2005-244479 generates a plurality of circuit blocks including a skew adjustment circuit, a transmitter, a transmission path, and a receiver, and deskew amount information for each circuit block. An adjustment circuit, wherein the skew adjustment circuit supplies a signal, which is skew-adjusted based on the deskew information generated by the adjustment circuit, to the transmitter;
The circuit block is
A deskew signal generation circuit that generates a deskew signal composed of edges and supplies the deskew signal to the transmitter;
A reflected wave detection circuit for detecting a reflected wave by the deskew signal;
A time measuring circuit for measuring a time from generation of the deskew signal to detection of the reflected wave;
With
The time data measured by the time measurement circuit is supplied to the adjustment circuit.

  In the case of the data transfer device according to the above-mentioned Japanese Patent Application Laid-Open No. 2004-171254, the delay signal having the largest delay amount among the delay signals output from the delay means is included, although the step-like change point is included. It has a delay amount determination means that detects and controls the selected delay signal to be selected by the selection means, and automatically corrects the delay variation of the signal time in parallel data transfer, so that even a signal line with a delay variation is high-speed It can be transferred.

  Here, the automatic correction synchronizes the adjustment signal that changes stepwise from the transmission side and outputs it to the inter-device wiring, and on the reception side, between the multiple channels based on the adjustment signal via each signal line It has an adjusting means for correcting the timing error.

  However, in the case of the data transfer device according to the above Japanese Patent Application Laid-Open No. 2004-171254, for example, every time an event such as a change in characteristics due to a temperature change occurs, an adjustment signal must be generated and corrected. Furthermore, while the same clock is used on the receiving side, there is a problem that a buffer operation for timing correction must be further added to data received once for all channels.

  Further, in the case of the data transfer device according to the above-mentioned Japanese Patent Application Laid-Open No. 2004-171254, there is a problem that it is not practical to perform with one timing arbitration means, such as when synchronizing with a plurality of receiving elements. ing.

  On the other hand, in the case of the transmission apparatus according to the above Japanese Patent Application Laid-Open No. 2005-244479, a deskew signal including edges is generated, a reflected wave due to the deskew signal is detected, and a time from generation of the deskew signal to detection of the reflected wave Is measured by a time measuring circuit, and the skew amount information for each circuit block is generated and adjusted by a skew adjusting circuit provided in the circuit block.

  However, in the case of the transmission apparatus according to Japanese Patent Laid-Open No. 2005-244479, as described in claim 2, the receiving end has a high impedance with respect to the impedance of the transmission line, and the energy of the received signal is almost equal. Is ringing due to the requirement of signal integrity, and cannot be used for a receiving end matching bus which has become mainstream in recent years.

  On the other hand, the differential transmission method is a method of transmitting two-phase signals of a non-inverted signal and an inverted signal using two signal lines that are electromagnetically tightly coupled. In this differential transmission method, the non-inverted signal and the inverted signal have a relationship between the signal current and the return current path, so that the differential signal component has a smaller loop area and is in a differential mode than the single-ended transmission method. It has the feature that electromagnetic radiation noise can be reduced and high-speed transmission is possible.

  Even in a high-speed differential parallel bus, as disclosed in Non-Patent Document 1, the driver circuit side controls the data transfer timing and adjusts the output timing so that the receiver receives parallel data simultaneously. Is used. In this case, the skew correction information from the reception side is performed via a transmission means added separately including a transmission line on the transmission side.

  On the other hand, the technique disclosed in Non-Patent Document 2 encodes correction information based on the waveform extracted on the receiving side, including information for performing waveform equalization on the transmitting side as well as skew information, This is configured such that a signal is superimposed on the differential signal line in the common mode and sent to the transmission side.

  However, the conventional technique has the following problems. That is, in the case of the technique disclosed in Non-Patent Document 2, correction information encoding means and transmission means are provided on the data reception side, and correction information signal reception means and decoding are provided on the data transmission side. Means must be provided, resulting in a complicated circuit and an increase in cost. Further, the common code signal has a problem that a radiated electric field is generated larger than a differential signal even with a weak current.

  Furthermore, in the case of the technique disclosed in Non-Patent Document 2, in order to support a configuration having a plurality of receiving elements, including a change in circuit configuration such as module insertion / removal, further from these receiving elements. Therefore, it is necessary to provide an arbitration means for the correction information signal, which causes further problems of circuit complexity and cost increase.

  As described above, in order to increase the speed of the parallel bus, in order to perform skew adjustment between channels in differential transmission, it is necessary to control the transmission timing on the transmission side and match the timings of all channels on the reception side. desirable. In high-speed signal transmission, equalization on the transmission end side according to the characteristics of the transmission path and load is required.

  However, when the skew adjustment between these channels is performed based on the correction information based on the waveform extracted on the receiving side, means for sending the correction information based on the waveform extracted on the receiving side to the transmitting side is required. As described above, there are problems in that there are a plurality of receiving devices in one channel, and further, it cannot cope with a change in configuration such as module insertion and removal, and the circuit becomes complicated.

  Therefore, the present invention has been made to solve the above-described problems of the prior art, and the object of the present invention is to use a simple circuit in a data transmission device adopting a differential transmission control method, An object of the present invention is to provide a data transmission device capable of correcting a signal delay.

In order to achieve the above object, a data transmission apparatus according to claim 1 is electromagnetically coupled to a transmission circuit for transmitting data and a reception circuit for receiving data transmitted from the transmission circuit. A differential transmission control system using two signal lines, including a transmission line connecting the transmission circuit and the reception circuit, and transmitting a two-phase signal of a non-inverted signal and an inverted signal through the transmission line In the data transmission device using
When a signal is transmitted from the transmission circuit to the reception circuit, a voltage change caused by the input capacitance of the reception circuit is detected on the transmission circuit side and detected on the transmission circuit side. Control means for controlling transmission timing for transmitting a signal on the transmission circuit side on the basis of propagation velocity information obtained based on voltage change is provided.

  According to the present invention, in order to adjust the skew between data signals in the differential transmission control method, the transmission timing is controlled on the transmitter side, and information necessary for matching the timings of all data signals is transmitted to the transmitter side. Can be obtained.

According to a second aspect of the present invention, there is provided a data transmission apparatus comprising: a transmission circuit that transmits data; a reception circuit that receives data transmitted from the transmission circuit; and two signal lines that are electromagnetically coupled to each other. And a differential transmission control method in which a plurality of transmission paths connecting the transmission circuit and the reception circuit are provided, and a two-phase signal of a non-inverted signal and an inverted signal is transmitted through the plurality of transmission paths. In data transmission equipment,
Detecting means for detecting a voltage change caused by an input capacitance of each of the receiving circuits on the side of each transmitting circuit when transmitting a data signal from the plurality of transmitting circuits to the plurality of receiving circuits; Control means for controlling the transmission timing for transmitting a signal on the transmission circuit side based on propagation speed information obtained based on the voltage change detected by the detection means on the transmission circuit side.

Furthermore, the data transmission device according to the invention described in claim 3 is the data transmission device according to claim 1 or 2,
A voltage change caused by the input capacitance of the receiving circuit is detected on the transmission circuit side, and an equalizing process is performed on the transmission circuit side based on information on transmission path characteristics and input capacitance obtained from the voltage change. It is comprised as follows.

A data transmission device according to a fourth aspect of the present invention is the data transmission device according to the third aspect,
The input capacitance of the receiver is detected based on the integrated value of the voltage change.

Furthermore, the data transmission device according to the invention described in claim 5 is the data transmission device according to any one of claims 1 to 4,
The detecting means detects a voltage change caused by the input capacitance of the receiving circuit, and a two-phase signal of a non-inverted signal and an inverted signal caused by the input capacitance of the receiving circuit of the transmission path The difference signal of the voltage change at is used.

A data transmission device according to a sixth aspect of the present invention is the data transmission device according to any one of the first to fifth aspects,
The receiving circuit is configured so that the circuit configuration of the receiving circuit can be changed over a plurality of types,
A voltage change caused by an input capacitance of the reception circuit is detected on the transmission circuit side, and a change in the circuit configuration of the reception circuit is detected based on the voltage change.

  According to the present invention, it is possible to provide a data transmission apparatus that can correct a signal delay using a simple circuit in a data transmission apparatus that employs a differential transmission control method.

  Embodiments of the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to a first embodiment of the present invention.

  In FIG. 1, reference numeral 1 denotes a data transmission device. The data transmission device 1 is roughly divided into a transmission circuit 3 for transmitting a data signal 2 and a data signal 2 transmitted from the transmission circuit 3. The receiving circuit 4 is configured to include a plurality of transmission lines 5 that connect the transmitting circuit 3 and the receiving circuit 4 using two electromagnetically tightly coupled signal lines. The data signal 2 is transmitted using a differential transmission control method for transmitting a non-inverted signal and an inverted signal of two phases as shown in FIG.

  Each of the transmission circuits 3 includes a differential driver element 6 composed of a differential amplifier (op amp) or the like. From the differential driver element 6, a data signal 2 is transmitted as shown in FIG. Two-phase signals of the inverted signal 7 and the inverted signal 8 are output in a synchronized state.

  The transmission line 5 is constituted by a coaxial cable or the like including two signal lines 9 and 10 that are electromagnetically tightly coupled. The transmission line 5 has two phases of a non-inverted signal 7 and an inverted signal 8. The differential transmission line which transmits the signal of is comprised.

  On the other hand, each receiving circuit 4 similarly includes a differential receiver element 11 composed of a differential amplifier (op amp) or the like, and a data signal transmitted from the transmitting circuit 3 by the differential receiver element 11. 2 is received. The two differential transmission lines 9 and 10 input to the differential receiver element 11 are connected to the termination potential 14 via the termination resistance elements 12 and 13, respectively, and the energy of the input signal 2 is Matching termination is performed by the terminating resistor elements 12 and 13, and basically, a reflected wave is not generated.

  However, although the terminal of the differential receiver element 11 has a small value, it inevitably has an input capacitance, and the differential receiver element 11 is charged until the signal potential reached reaches the potential difference from the reference potential. The input potential 11 rises with a delay.

  That is, the potential difference due to the input capacitance of the terminal of the differential receiver element 11 is propagated back to each transmitter circuit 3 side as a voltage change 18 due to a negative reflectance with respect to the signal potential as shown in FIG. It becomes. Therefore, each of the transmission circuits 3 is provided with a voltage detection circuit 15 as voltage detection means for detecting the reversely propagated voltage change. Further, the detection signal of the back-propagated voltage change detected by the voltage detection circuit 15 is input to the delay time detection circuit 17, and the data signal 2 is received from the differential driver element 5 in the delay time detection circuit 17. A delay time t from when the signal is output until the detection signal of the back-propagated voltage change is input is detected.

  The delay time detection signal 19 detected by the delay time detection circuit 17 is input to a timing correction circuit 20 connected to the preceding stage of each differential driver element 5, as shown in FIG. Thus, the output timing of the data signal 2 of each differential driver element 6 is corrected so that the data signal 2 output from each differential driver element 6 is output simultaneously. In FIG. 1, for convenience, the delay time detection signal 19 is shown as a signal common to the differential driver elements 5, but the delay time detection signal 19 is different for each differential driver element 5. Of course.

  In the above configuration, the data transmission apparatus adopting the differential transmission control method according to the first embodiment uses a simple circuit in the data transmission apparatus adopting the differential transmission control method as follows. It is possible to correct the signal delay.

  That is, in this embodiment, as shown in FIG. 1, each differential driver element 6 outputs a data signal 2 composed of two-phase signals of a non-inverted signal 7 and an inverted signal 8. Is transmitted to each differential receiver element 11 via two differential transmission lines 9 and 10. A data signal 2 composed of two-phase signals of a non-inverted signal 7 and an inverted signal 8 transmitted from each differential driver element 6 is connected to a terminating resistor element 12 connected to the input end of each differential receiver element 11, The input signal energy is matched and terminated by the termination resistor elements 12 and 13 so that no reflected wave is generated.

  However, although the terminal of each differential receiver element 11 has a small value, it inevitably has an input capacitance, and each differential receiver element 11 is charged until it reaches a potential difference from the reference potential with respect to the reached signal potential. The input potential of the receiver element 11 rises with a delay. Therefore, the potential difference due to the input capacitance of the terminals of each differential receiver element 11 is propagated back to each transmitting circuit 3 as a voltage change due to a negative reflectance with respect to the signal potential.

  This back-propagated voltage change is detected by the voltage detection circuit circuit 15 provided on each transmission circuit 3 side. The detection signal of the back-propagated voltage change detected by the voltage detection circuit 15 is input to the delay time detection circuit 17, and the delay time detection circuit 17 receives data from the differential driver element 6 as shown in FIG. The delay time t from when the signal 2 is output to when the back-propagated voltage change detection signal 18 is input is detected.

  The delay time detection signal 18 detected by the delay time detection circuit 17 is input to a timing correction circuit 20 connected to the preceding stage of each differential driver element 6, and each timing driver 20 includes each differential driver. The output timing of the data signal 2 of each differential driver element 6 is corrected so that the data signal output from the element 5 is synchronized with the data signal 2 having the longest delay time t.

  Thus, in the above embodiment, as shown in FIG. 1, the data signal 2 is transmitted from the plurality of differential driver elements 6 to the plurality of differential receiver elements 11 via the plurality of differential transmission lines 5. Then, due to the input capacitance of the differential receiver element 11 based on the data signal 2, the voltage change is propagated back to the transmission circuit 3 side.

  Therefore, the voltage change that has propagated backward to the transmission circuit 3 side is detected by the voltage detection circuit 15 connected to each of the plurality of differential driver elements 6, and the detection signal 16 of the voltage change that has propagated backward is detected as a delay time detection. Input to the circuit 17.

  Then, the delay time detection circuit 17 is based on the detection signal 16 of the back-propagated voltage change detected by the voltage detection circuit 15 connected to each of the plurality of differential driver elements 6. The delay time t is detected, and the correction signal is sent to the timing correction circuit 20 so that the transmission timing of the data signal 2 is matched with the differential driver element 6 having the longest delay time among the delay times of the differential driver elements 6. 19 and then when the data signal 2 is output from the plurality of differential driver elements 6, the data signal 2 output from each differential driver element 6 is output simultaneously in synchronization. The timing is corrected.

  Therefore, in the above embodiment, as shown in FIG. 1, it is only necessary to provide the voltage detection circuit 15, the delay time detection circuit 17, and the timing correction circuit 20 on the transmission circuit 3 side, and on the reception circuit 4 side, Since there is no need to provide a special detection circuit, transmission circuit, adjustment circuit, or the like, it is possible to correct signal delay using a simple circuit.

Embodiment 2
FIG. 4 shows a second embodiment of the present invention. The same parts as those of the first embodiment will be described with the same reference numerals. In the second embodiment, the input of the receiver is shown in FIG. A voltage change caused by a capacity is detected on the transmitter side, and an equalizing process is performed on the transmitter side based on information on transmission path characteristics and input capacity obtained from the voltage change. .

  That is, in the second embodiment, as shown in FIG. 4, the equalizer element 30 is connected to the subsequent stage of the differential driver element 6 of the transmission circuit 3, and the differential signal output from the differential driver element 6. 2 is configured such that the waveform is equalized by the equalizer element 30 and transmitted to the differential receiver element 11 via the differential transmission line 5.

  As described above, the differential transmission line 5 is normally connected to the termination potential 14 by the termination resistance elements 12 and 13, and the input energy is matched and terminated to the termination elements 12 and 13. Further, the differential receiver element 11 has an input capacitance, and as described above, the voltage change due to the negative reflectance is propagated back to the transmission circuit 3 side. The back-propagated voltage change is detected by the voltage detection circuit 15. The voltage change obtained by the voltage detection circuit 15 is obtained by superimposing the characteristics of the differential transmission line 5 on the reflected voltage depending on the capacitance of the differential receiver element 11 as will be described later. An appropriate waveform equalization parameter of the transmission waveform is determined on the basis of the transmission path characteristic and capacity information obtained from the voltage change, and the waveform equalization parameter is sent to the equalizer element 30 placed in the subsequent stage of the differential driver. It is configured.

  The equalizer element 30 receives the data signal 2 having a normal waveform on the differential receiver element 11 side as the data signal 2 to be output to the differential transmission line 5, for example, as shown in FIG. In addition, waveform equalization processing is performed.

  Therefore, according to the second embodiment, even when there is a back-propagating voltage change due to the input capacitance of the differential receiver element 11, the regular data signal 2 on the differential receiver element 11 side. Can be received, and the operation on the receiving circuit 4 side can be stabilized.

  Since other configurations and operations are the same as those of the first embodiment, description thereof is omitted.

Embodiment 3
FIG. 6 shows a third embodiment of the present invention. The same reference numerals are given to the same parts as those of the second embodiment, and in this third embodiment, in the second embodiment, FIG. The input capacitance of the receiver is detected based on the integrated value of the voltage change.

  That is, in the third embodiment, as shown in FIG. 6, the differential signal 2 driven by the differential driver element 6 is waveform-equalized by the equalizer element 30 and is differentially transmitted via the differential transmission line 5. It is transmitted to the receiver element 11. The differential transmission line 5 is normally connected to the termination potential 14 by the termination resistance elements 12 and 13, and the energy of the input signal is matched and terminated to the termination elements 12 and 13. The differential receiver element 11 has an input capacitance, and as described above, the voltage change due to the negative reflectance is propagated back to the transmission circuit 3 side.

  This reversely propagated voltage change is detected by the voltage detection circuit 15. The voltage change 16 detected by the voltage detection circuit 15 is integrated by the integration circuit 33. As will be described later, this integration value is substantially proportional to the input capacitance, and the characteristic of the differential transmission line 5 is superimposed on this integration value. It is a thing.

  Therefore, the parameter determination circuit 32 determines an appropriate transmission current and an appropriate waveform equalization parameter for the transmission waveform based on the information on the transmission path characteristics and the input capacity obtained from the integral value, and compares the transmission current control information. The dynamic driver element 6 is configured to output a waveform equalization parameter to the equalizer element 30.

  With this configuration, a signal equal to a more regular data signal can be transmitted to the receiving circuit 4 side, and the operation on the receiving circuit 4 side can be further stabilized.

  Since other configurations and operations are the same as those of the first embodiment, description thereof is omitted.

Embodiment 4
FIG. 7 shows a fourth embodiment of the present invention. The same reference numerals are given to the same parts as those in the first embodiment, and in this fourth embodiment, a differential is used as a voltage detecting means. An amplifier is used.

  That is, in the fourth embodiment, as shown in FIG. 7, the differential signal 2 driven by the differential driver element 6 is waveform-equalized by the equalizer element 30 and is differentially transmitted via the differential transmission line 5. It is transmitted to the receiver element 11. The differential transmission line 5 is normally connected to the termination potential 14 by the termination resistance elements 12 and 13, and the energy of the input signal is terminated by the termination elements 12 and 13. The differential receiver element 11 has an input capacitance, and as described above, the voltage change due to the negative reflectance is propagated back to the transmission circuit 3 side.

  This back-propagated voltage change is detected by a differential voltage detection circuit 34 as voltage detection means. As will be described later, the voltage change 35 obtained by the differential voltage detection circuit 34 has a characteristic of the differential transmission line 5 in the addition signal of the differential channels of the reflected voltage depending on the capacitance of the differential receiver element 11. The parameter determination circuit 32 determines an appropriate waveform equalization parameter of the transmission waveform based on the transmission path characteristic and capacity information obtained from the voltage change, and the waveform equalization parameter is converted to the differential driver. It is configured to be sent to an equalizer element 30 placed after the element 6.

  Since other configurations and operations are the same as those of the first embodiment, description thereof is omitted.

Embodiment 5
FIG. 8 shows a fifth embodiment of the present invention. The same reference numerals are given to the same parts as those in the first embodiment, and in this fifth embodiment, the receiver A circuit configuration of the receiver is configured to be changeable over a plurality of types, a voltage change caused by an input capacity of the receiver is detected on the transmitter side, and the receiver circuit is based on the voltage change. Configured to detect configuration changes.

  In other words, in the fifth embodiment, as shown in FIG. 8, the transmission circuit 3 unit according to the differential transmission control system described in the first to fourth embodiments is mounted on the mother board 36, and the output is as follows. And connected to the receiving circuit 4 according to the differential transmission control system described in the first to fourth embodiments mounted on the plurality of daughter boards 38a and 38b connected to the mother board 36 through the plurality of connectors 37a and 37b. Yes.

  The transmission circuit 3 is configured to detect a change in load caused by insertion / removal of the daughter boards 38a and 38b by the voltage change described in the first to fourth embodiments.

  Therefore, in the fifth embodiment, it is possible to easily cope with a change in configuration such as insertion / removal of a module including the daughter boards 38a and 38b.

  In FIG. 8, for the sake of convenience, only one transmission path 5 is shown, but it is needless to say that the same applies even when there are a plurality of transmission paths 5.

  Since other configurations and operations are the same as those of the first embodiment, description thereof is omitted.

EXAMPLES Next, examples of the present invention will be described.

  FIG. 9 shows an example of a differential transmission system based on the differential transmission control method described in the second and fourth embodiments.

  The transmission circuit 3 is a circuit in which low impedance transistor switches 41 and 42 alternately turn on and off the current of a variable current source, which is connected to a constant voltage source by resistors 43 and 44 that match a differential transmission line 45, respectively. A so-called CML (Current Mode Logic) driver that matches the transmitting end is configured.

  In the receiving circuit 46, the differential signal is matched and terminated, but the voltage change due to the capacitance of the input part propagates back through the differential line 45 and is detected by the differential voltage detection means 47. In this embodiment, for example, waveform equalization such as pre-emphasis can be performed by controlling the current of the variable current source based on the capacity information of the receiving circuit 46 obtained from this voltage change. Here, pre-emphasis refers to modulation by emphasizing a specific component of a data signal in order to improve the signal-to-noise ratio, waveform characteristics, etc. of the signal received by the receiving circuit.

  FIG. 10 is a diagram showing waveforms at various parts in this embodiment.

  In FIG. 10, a waveform 47 and a waveform 48 are collector-side output waveforms of the transistor switches 41 and 42, respectively, and a waveform 49 and a waveform 50 are input waveforms of the receiving circuit 46. In the waveform 47 and the waveform 48, a voltage change due to the input capacitance of the receiving circuit appears. A waveform 53 is the output of the differential voltage detection means, and it is shown that the voltage change 54 due to the input capacitance of the receiving circuit appearing there is obtained at a voltage doubled by 52.

  FIG. 11 is a graph showing the relationship between the input capacitance of the receiving circuit according to this embodiment, the voltage change on the transmitting side, and the integral value thereof.

  As can be seen from FIG. 11, the integrated value of the voltage change is almost proportional to the input capacitance of the receiving circuit 46.

  As described above, according to the present invention, it is possible to detect all the information necessary for timing correction on the transmission side, such as timing skew, transmission line characteristics, and input element input capacity, and equalization on the transmitter side. The information transmission means is not required, and high-speed transmission is possible without complicating the circuit and bus structure. At the same time, it is possible to cope with changes in the characteristics of transmission lines and elements and changes in the configuration of receiving elements.

FIG. 1 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to Embodiment 1 of the present invention. FIG. 2 is a waveform diagram showing the operation of the data transmission apparatus employing the differential transmission control system according to the first embodiment of the present invention. FIG. 3 is a waveform diagram showing the operation of the data transmission apparatus employing the differential transmission control system according to the first embodiment of the present invention. 4 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to Embodiment 2 of the present invention. FIG. 5 is a waveform diagram showing the operation of the data transmission apparatus employing the differential transmission control system according to the second embodiment of the present invention. FIG. 6 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to Embodiment 3 of the present invention. FIG. 7 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to Embodiment 4 of the present invention. FIG. 8 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to Embodiment 5 of the present invention. FIG. 9 is a circuit diagram showing a data transmission apparatus employing a differential transmission control system according to an embodiment of the present invention. FIG. 10 is a waveform diagram showing the operation of the data transmission apparatus employing the differential transmission control system according to the embodiment of the present invention. FIG. 11 is a graph showing characteristics of a data transmission apparatus employing a differential transmission control system according to an embodiment of the present invention.

Explanation of symbols

  1: data transmission device, 2: data signal, 3: transmission circuit, 4: reception circuit, 5: transmission path, 15: voltage detection circuit, 17: delay time detection circuit, 20: timing correction circuit.

Claims (6)

A transmission path for connecting the transmission circuit and the reception circuit by using a transmission circuit for transmitting data, a reception circuit for receiving data transmitted from the transmission circuit, and two electromagnetically tightly coupled signal lines In a data transmission device using a differential transmission control system that transmits a two-phase signal of a non-inverted signal and an inverted signal through the transmission path,
When a signal is transmitted from the transmission circuit to the reception circuit, a voltage change caused by the input capacitance of the reception circuit is detected on the transmission circuit side and detected on the transmission circuit side. A data transmission apparatus comprising: control means for controlling transmission timing for transmitting a signal on the transmission circuit side based on propagation speed information obtained based on voltage change. A transmission path for connecting the transmission circuit and the reception circuit by using a transmission circuit for transmitting data, a reception circuit for receiving data transmitted from the transmission circuit, and two electromagnetically tightly coupled signal lines In a data transmission apparatus using a differential transmission control system that transmits a two-phase signal of a non-inverted signal and an inverted signal through the plurality of transmission paths,
Detecting means for detecting a voltage change caused by an input capacitance of each of the receiving circuits on the side of each transmitting circuit when transmitting a data signal from the plurality of transmitting circuits to the plurality of receiving circuits; Data transmission comprising control means for controlling transmission timing for transmitting a signal on the transmission circuit side based on propagation speed information obtained based on voltage change detected by the detection means on the transmission circuit side apparatus. In the data transmission device according to claim 1 or 2,
A voltage change caused by the input capacitance of the receiving circuit is detected on the transmission circuit side, and an equalizing process is performed on the transmission circuit side based on information on transmission path characteristics and input capacitance obtained from the voltage change. A data transmission apparatus characterized by that. The data transmission device according to claim 3, wherein
A data transmission apparatus, wherein an input capacitance of the receiving circuit is detected based on an integrated value of the voltage change. The data transmission device according to any one of claims 1 to 4,
The detecting means detects a voltage change caused by the input capacitance of the receiving circuit, and a two-phase signal of a non-inverted signal and an inverted signal caused by the input capacitance of the receiving circuit of the transmission path A data transmission apparatus using a difference signal of a voltage change in. The data transmission device according to any one of claims 1 to 5,
The receiving circuit is configured so that the circuit configuration of the receiving circuit can be changed over a plurality of types,
A data transmission device, wherein a voltage change caused by an input capacitance of the reception circuit is detected on the transmission circuit side, and a change in a circuit configuration of the reception circuit is detected based on the voltage change.

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