JP2008078160A - Plasma display panel and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a plasma display panel and its manufacturing method capable of preventing generation of display defects caused by defects and a shape failure of a barrier rib. <P>SOLUTION: The plasma display panel is provided with longitudinal barrier ribs 19a consisting of a display region and a non-display region formed to surround the display region, and extended in parallel with data electrodes 7 on an insulation substrate 1, and horizontal barrier ribs 19b extended in crossing the data electrodes 7. Then, at least a part of the horizontal barrier rib 19b of the display region is formed on a dielectric layer 24 formed on the insulation substrate 1, and the horizontal barrier rib 19b of the non-display region and the longitudinal barrier ribs 19a of the display region and the non-display region are formed to be in contact with the insulation substrate 1. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a plasma display panel and a manufacturing method thereof for preventing a display defect, and more particularly to a plasma display panel and a manufacturing method thereof that can prevent a display defect due to a defect of a partition wall and a shape defect.

  Plasma display panels (hereinafter also referred to as PDPs) have features such as being thin and capable of displaying large screens relatively easily, wide viewing angles, and fast response speeds. It is being advanced.

  FIG. 15 is a perspective view showing the configuration of one display cell in a conventional three-electrode surface discharge AC plasma display panel (PDP). As shown in FIG. 15, in this display cell, the back substrate and the front substrate are provided in parallel to each other. In the front substrate, an insulating substrate 2 made of a transparent material such as glass is provided, and a plurality of transparent scanning electrodes 3 and a common electrode 4 are arranged at a predetermined interval on the surface of the insulating substrate 2 facing the back substrate. Are alternately arranged with a gap between them. Trace electrodes 5 and 6 are formed on the scanning electrode 3 and the common electrode 4 in order to reduce the electrode resistance value of the electrodes. Further, a dielectric layer 12 is formed so as to cover the scanning electrode 3, the common electrode 4, and the trace electrodes 5 and 6, and a protective layer made of MgO or the like that protects the dielectric layer 12 from discharge on the dielectric layer 12. Layer 13 is formed.

  In addition, the rear substrate is provided with an insulating substrate 1 made of a transparent material such as glass, and on the surface of the insulating substrate 1 facing the front substrate, a plurality of pieces extending in a direction perpendicular to the scanning electrode 3 and the common electrode 4 are provided. A data electrode 7 is provided. A dielectric layer 54 is formed on the data electrode 7 so as to cover the data electrode 7.

  The rear substrate is provided with a partition wall 59 that secures a discharge gas space and partitions the display cells 8 (pixels). When viewed from the direction perpendicular to the surface of the insulating substrate 1, the shape of the barrier ribs 59 is a cross-like shape (lattice shape), and the vertical barrier ribs 59 a extending in the direction in which the data electrodes 7 extend and the direction orthogonal to the extending direction of the vertical barrier ribs 59 a And a horizontal partition wall 59b. The height of the vertical barrier rib 59a and the height of the horizontal barrier rib 59b are substantially equal to each other, and the height from the surface of the insulating substrate 1, that is, the total film thickness of the dielectric layer 54 and the barrier rib 59 is, for example, 120 μm. The display cell 8 is filled with a discharge gas composed of a rare gas such as helium, neon, or xenon, or a mixed gas of these rare gases. Further, a phosphor layer 11 that emits visible light 10 by ultraviolet rays generated by the discharge of the discharge gas is formed on the surface of the dielectric layer 54 and the side surfaces of the barrier ribs 59. The area between the front substrate and the rear substrate is divided into a central display area and a non-display area that is a peripheral part surrounding the display area, and an image is displayed in the display area. The barrier ribs formed in the non-display area are called dummy barrier ribs. When the PDP is manufactured, the barrier ribs of the display area are uniformly formed, and after the PDP is manufactured, the display area is protected and impurities are prevented from entering the display area. Is formed to do. The dummy partition walls are usually provided in about 1 to 2 rows.

  Next, a conventional method for manufacturing a PDP will be described. 16 (a) and 16 (b), 17 (a) and 17 (b), 18 (a) and 18 (b) are diagrams showing a method for manufacturing this conventional PDP, and FIG. Is a plan view showing a back substrate, and (b) is a cross-sectional view. Hereinafter, description will be made with reference to FIGS. 15, 16A and 16B, FIGS. 17A and 17B, and FIGS. 18A and 18B.

  As shown in FIG. 15, first, the scanning electrodes 3 and the common electrodes 4 are formed on the insulating substrate 2 so as to extend in directions parallel to each other and to be alternately arranged. Then, trace electrodes 5 and 6 are formed on the scanning electrode 3 and the common electrode 4, respectively. Next, the dielectric layer 12 is formed so as to cover these electrodes. Then, a protective layer 13 made of MgO or the like is formed on this dielectric layer. Thereby, a front substrate is produced.

  On the other hand, as shown in FIGS. 16A and 16B, the data electrode 7 extending in one direction is formed on the insulating substrate 1. Next, as shown in FIGS. 17A and 17B, a dielectric layer 24 is formed so as to cover the data electrode 7. Next, as shown in FIGS. 18A and 18B, a partition wall 59 is formed on the dielectric layer 54. The partition 59 is formed by a sandblasting method, a printing method, or the like. For example, the partition wall 59 is formed by a sandblasting method. First, a barrier rib paste in which a filler, glass powder, a binder and a solvent are mixed is prepared. Next, this barrier rib paste is applied onto the dielectric layer 54, and the solvent in the barrier rib paste is volatilized to form a barrier rib paste layer (not shown). Next, a dry film (not shown) is stuck on the partition paste layer. Then, this dry film is patterned. Next, sand blasting is performed using the patterned dry film as a mask, and the partition paste layer is selectively removed to perform patterning. Thereafter, the dry film is removed and the partition paste layer is fired. As a result, the binder in the partition paste layer evaporates and the glass powder is melted and re-solidified to form the partition 59 made of filler and glass. The partition wall 59 is formed in a cross beam shape. At this time, the height of the vertical barrier rib 59a and the height of the horizontal barrier rib 59b are substantially equal to each other.

  Next, as shown in FIG. 15, the phosphor layer 11 is formed on the surface of the dielectric layer 54 and the side surfaces of the partition walls 59. Then, the insulating substrate 1 is superposed on the insulating substrate 2, and the partition wall 59 formed on the insulating substrate 1 is brought into contact with the protective layer 13 formed on the insulating substrate 2. At this time, the direction in which the data electrode 7 extends is set to be orthogonal to the direction in which the scan electrode 3 and the common electrode 4 extend. Next, heat treatment is performed in a state where the insulating substrate 1 and the insulating substrate 2 are overlapped, and the ends of the insulating substrates 1 and 2 are fused together by frit. As a result, the space surrounded by the insulating substrate 1, the insulating substrate 2, and the sealing layer (not shown) made of the frit is hermetically sealed. Thereafter, the space is evacuated and the space is filled with a discharge gas. Thereby, PDP is produced.

  However, the above-described conventional PDP has a problem in that display defects occur due to shrinkage during baking of the barrier rib paste layer. Hereinafter, this display defect will be described in more detail. This display defect can be classified into two types. The first type of display failure is due to the fact that the vertical barrier rib 59a is different from the horizontal barrier rib 59b, and the vertical barrier rib 59a is longer and narrower than the horizontal barrier rib 59b. For this reason, the shrinkage behavior during firing differs between the vertical barrier ribs 59a and the horizontal barrier ribs 59b, and after firing, a part of the vertical barrier ribs 59a rises and becomes higher than the horizontal barrier ribs 59b. For this reason, when the insulating substrate 1 is overlapped with the insulating substrate 2, the raised portion of the vertical partition wall 59a is strongly pressed against the protective layer 13, and the vertical partition wall 59a is broken. When the vertical barrier ribs 59a are broken, the vertical barrier ribs 59a themselves and the phosphor layer 11 formed on the side surfaces of the vertical barrier ribs 59a are scattered in the display cells 8 and come into contact with the scanning electrodes 3 or the common electrodes 4. As a result, the display cell 8 does not operate normally, and a display defect occurs in which the display cell 8 continues to be lit regardless of the drive signal or is not lit at all.

  In addition, the second type of display failure is caused by the height of the partition walls increasing at the end portions in the longitudinal direction because the vertical partition walls 59a and the horizontal partition walls 59b contract during firing. FIGS. 19A to 19C are cross-sectional views showing the shrinkage behavior of the partition walls during firing, where FIG. 19A is before firing, FIG. 19B is after firing, and FIG. 19C is after the insulating substrate 2 is overlaid. Shows the state. In FIGS. 19A to 19C, the components other than the insulating substrates 1 and 2 and the partition wall 59 are not shown. As shown in FIG. 19A, the height of the partition wall 59 before firing is uniform. However, as shown in FIG. 19B, the partition wall 59 contracts and deforms as it is fired, and the longitudinal end portion 59c becomes higher than the central portion 59d.

  As shown in FIG. 19 (c), in this state, when the insulating substrate 2 is overlapped with the insulating substrate 1 and the discharge space is exhausted, the insulating substrates 1 and 2 are bent by the atmospheric pressure. Since it is different from the curved shape of 59, a gap 15 is formed between the partition wall 59 and the insulating substrate 2 in the vicinity of the end portion 59c. As a result, the volume of the display cell 8 (see FIG. 15) in the region where the gap 15 is formed increases, and the voltage required to generate the write discharge in the display cell 8 increases. As a result, in this display cell 8, write discharge does not occur in normal driving, and a write failure occurs. As a result, a display defect occurs in the PDP.

  Conventionally, several countermeasures have been proposed for the above-mentioned second type of display failure. However, the aforementioned first type of display failure has not yet been recognized, and therefore no countermeasure has been proposed. Patent Document 1 discloses a technique for directly forming a partition wall on a back substrate without providing a dielectric layer on the back substrate in a non-display area for the purpose of preventing the second type of display failure. Has been. In Patent Document 1, the height of the partition wall in the non-display area (peripheral part) is thereby made lower than the height of the partition wall in the display area (center part). It is described that even when the height is higher than the central portion, it is possible to prevent a gap from being formed between the entire substrate.

JP 2001-319580 A

  However, the conventional techniques described above have the following problems. According to the technique described in Patent Document 1, the second type of display failure can be prevented, but the first type of display failure cannot be prevented. In addition, since the dielectric layer is not formed in the non-display region, there is a problem in that when the barrier rib paste layer is patterned by sandblasting, the data electrode is not protected by the dielectric layer and is damaged. Patent Document 1 also discloses a technique in which two dielectric layers are formed, a lower dielectric layer is formed on the entire surface of the back substrate, and an upper dielectric layer is formed only in the display region. Accordingly, the height of the partition walls can be made different between the display area and the non-display area depending on the presence or absence of the upper dielectric layer while protecting the data electrode with the lower dielectric layer. However, in this method, the step of forming the dielectric layer has to be performed twice, which is not practical from the viewpoint of cost.

  The present invention has been made in view of such problems, and it is an object of the present invention to provide a plasma display panel and a method for manufacturing the same, which can prevent the occurrence of display defects due to partition wall defects and shape defects.

  The plasma display panel according to the present invention comprises a display area and a non-display area formed so as to surround the display area around the display area, and a vertical partition extending in parallel with the data electrode on the insulating substrate. In the plasma display panel having a horizontal barrier rib extending orthogonally to the data electrode, at least a part of the horizontal barrier rib in the display region is formed on a dielectric layer formed on the insulating substrate, and the non-display The horizontal barrier ribs in the region and the vertical barrier ribs in the display region and the non-display region are formed so as to be in contact with the insulating substrate.

  In this plasma display panel, the horizontal barrier rib formed on the dielectric layer is preferably formed such that the height from the surface of the insulating substrate is higher than the vertical barrier rib.

  The height of the vertical barrier ribs is substantially uniform in the longitudinal direction, and the height of the intersection of the vertical barrier ribs and the horizontal barrier ribs is substantially equal to the height of the vertical barrier ribs. Can do.

  Further, the height of the horizontal barrier rib in the display area is substantially uniform in the longitudinal direction, and the height of the intersection of the vertical barrier rib and the horizontal barrier rib in the display area is substantially equal to the height of the horizontal barrier rib. Can be configured to be equal.

  Another plasma display panel according to the present invention is a plasma display panel having a display region and a non-display region formed around the display region so as to surround the display region. At least one partition wall of the display region is provided. The portion is formed such that the height from the surface of the insulating substrate is higher than that of the partition wall of the non-display region, and the data electrode is covered with a dielectric layer or the partition wall except for a connection terminal at an end thereof. And

  In this plasma display panel, at least a part of the partition in the display region is formed on a dielectric layer formed on the insulating substrate, and the partition in the non-display region is formed in contact with the insulating substrate. Can be configured.

  A method of manufacturing a plasma display panel according to the present invention includes a step of forming a front substrate, a step of forming a back substrate, and a step of bonding the front substrate and the back substrate in parallel to each other, The step of forming the rear substrate includes a step of forming a plurality of data electrodes extending in parallel with each other on the surface of the insulating substrate, and a dielectric layer so as to cover a part of the data electrode other than the end portion. A partition paste is applied so as to cover part of the dielectric layer and a portion of the data electrode other than the connection terminal where the dielectric layer is not formed, and selectively forming the dielectric layer. And flattening the surface, and drying the barrier rib paste to form a grid-like barrier rib. In the step of forming the dielectric layer, the dielectric layer is formed in the display region. in front In a non-display region formed around at least a part of a region where a partition wall is to be formed and formed around the display region, the dielectric layer is at least a region other than the region where the partition wall is to be formed. It is characterized by forming in part.

  In the method of manufacturing the plasma display panel, the partition includes a vertical partition extending in a direction in which the data electrode extends and a horizontal partition extending in a direction orthogonal to the direction in which the vertical partition extends, and in the step of forming the dielectric layer In the display region, the dielectric layer may be formed in a region where the horizontal barrier rib is to be formed.

  According to the present invention, in the plasma display panel, the vertical barrier ribs are in strong contact with the front substrate when the front substrate and the rear substrate are bonded together by making the height of the vertical barrier ribs lower than that of the horizontal barrier ribs. It can be prevented from being damaged. Thereby, it is possible to prevent the occurrence of display defects due to the damage of the vertical partition walls.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, a first embodiment of the present invention will be described. 1 is a perspective view showing a rear substrate of the PDP according to the present embodiment, FIG. 2 is a plan view showing the rear substrate of the PDP, and FIG. 3 is a sectional view taken along line AA shown in FIG. 4 is a cross-sectional view taken along line BB shown in FIG.

  In the PDP according to the present embodiment, the configuration of the front substrate, that is, the configuration of the insulating substrate 2, the scan electrode 3, the common electrode 4, the trace electrodes 5 and 6, the dielectric layer 12 and the protective layer 13 shown in FIG. The conventional PDP (see FIG. 15) has the same configuration as that of the front substrate.

  As shown in FIGS. 1 to 4, the rear substrate is composed of the insulating substrate 1, the data electrode 7, the dielectric layer 14, and the partition walls 9. The insulating substrate 1 is made of glass or the like. On the surface of the insulating substrate 1 facing the insulating substrate 2, a display region 16 corresponding to the central portion of the insulating substrate 1 and a non-display region 17 corresponding to the peripheral portion are set so as to surround the display region 16. . The display area 16 is an area where an image is displayed.

  On the surface of the insulating substrate 1, a plurality of data electrodes 7 extending in a direction orthogonal to the direction in which the scanning electrode 3 and the common electrode 4 (see FIG. 15) extend on the front substrate are provided. A dielectric layer 14 is formed on the insulating substrate 1 so as to cover the data electrodes 7. Furthermore, on the insulating substrate 1, a partition wall 9 is provided for securing a discharge gas space and partitioning the display cells 8 (pixels). When viewed from the direction perpendicular to the surface of the insulating substrate 1, the shape of the barrier ribs 9 is a grid pattern (lattice shape), and the vertical barrier ribs 9 a extending in the direction in which the data electrodes 7 extend and the direction orthogonal to the extending direction of the vertical barrier ribs 9 a That is, it includes a horizontal partition wall 9b extending in a direction in which the scanning electrode 3 and the common electrode 4 extend, and an intersection portion 9c between the vertical partition wall 9a and the horizontal partition wall 9b. The partition wall 9 is provided in the entire display area 16 and in the area in contact with the display area 16 in the non-display area 17. The non-display area 17 is provided with two rows of vertical barrier ribs 9 a and horizontal barrier ribs 9 b so as to surround the display area 16, which are dummy barrier ribs. The dummy barrier ribs are used to uniformly form the barrier ribs 9 in the display area 16 during the PDP manufacturing, protect the display area 16 after the PDP manufacturing, and suppress the entry of impurities into the display area 16. A frit stopper 18 is provided around the partition wall 9 in the non-display area 17.

  The dielectric layer 14 is provided in a region other than the region where the vertical barrier rib 9a and the intersection portion 9c are provided in the display region 16 and a region where the barrier rib 9 is not provided on the data electrode 7 in the non-display region 17. (See FIG. 6 (a)). That is, the horizontal barrier rib 9 b in the display area 16 is provided on the dielectric layer 14. In contrast, the vertical barrier ribs 9a and the intersection portions 9c in the display area 16 and the non-display area 17 are provided directly on the insulating substrate 1, and the horizontal barrier ribs 9b and the frit stoppers 18 in the non-display area 17 are on the insulating substrate 1. Or directly on the data electrode 7.

  Thereby, the height of the horizontal partition wall 9b from the surface of the insulating substrate 1 in the display region 16 is relatively high, and the vertical partition wall 9a and the intersection portion 9c in the display region 16 and the partition wall 9 and the frit stopper 18 in the non-display region 17 are. The height from the surface of the insulating substrate 1 is relatively low. In the PDP of the present embodiment, the thickness of the dielectric layer 14 is, for example, 10 μm, the height of the horizontal partition wall 9b in the display region 16 from the surface of the insulating substrate 1 is, for example, 120 μm, and the vertical partition wall in the display region 16 The height of the vertical barrier ribs 9a and the horizontal barrier ribs 9b in the non-display area 17 from the surface of the insulating substrate 1 is, for example, 110 μm. Further, the end of the data electrode 7 is a connection terminal for connecting the data electrode 7 to the outside. The data electrode 7 is covered with at least one of the partition wall 9 and the dielectric layer 14 except for an end portion which is a connection terminal.

  The discharge gas space between the insulating substrate 1 and the insulating substrate 2 is filled with a discharge gas composed of a rare gas such as helium, neon, or xenon, or a mixed gas of these rare gases. The ratio of the vertical length of the display cell 8, that is, the length in the direction in which the vertical barrier rib 9a extends to the horizontal length, that is, the length in the direction in which the horizontal barrier rib 9b extends is, for example, 2: 1. Further, a phosphor layer 11 that emits visible light 10 by ultraviolet rays generated by the discharge of the discharge gas is formed on the surface of the dielectric layer 14 and the side surfaces of the partition walls 9. Thereby, the PDP of the present embodiment is formed.

  Next, a method for manufacturing the PDP according to the present embodiment will be described. FIG. 5A is a plan view showing the method for manufacturing the PDP according to the present embodiment, and FIG. 5B is a cross-sectional view taken along the line CC shown in FIG. 6A is a plan view showing the next step of FIG. 5 in the method for manufacturing the PDP, and FIG. 6B is a cross-sectional view taken along the line DD shown in FIG. FIGS. 7A to 7C are cross-sectional views showing the manufacturing method of this PDP in the order of the steps, and show the next step of FIG. The manufacturing method of the front substrate of the PDP according to the present embodiment is the same as the manufacturing method of the above-described conventional PDP (see FIG. 15).

  A method for manufacturing the back substrate will be described. First, as shown in FIGS. 5A and 5B, the data electrode 7 extending in one direction is formed on the insulating substrate 1. Next, as shown in FIGS. 6A and 6B, a dielectric layer 14 is formed so as to cover the data electrode 7. At this time, in the display region 16, the dielectric layer 14 is formed only in a region where the horizontal partition wall 9b is to be formed in a later process and a region where the display cell 8 is to be formed, and the vertical partition wall 9a and the intersection portion 9c. It is not formed in the region where is to be formed. Further, the non-display region 17 is formed only in a region other than a region where the partition wall 9 and the frit stopper 18 are to be formed in a later process and covering the data electrode 7.

  The dielectric layer 14 is formed, for example, by applying a photosensitive paste (not shown) on the insulating substrate 1 to form a photosensitive paste layer (not shown), and using a mask (not shown) to form the photosensitive paste. The layer is formed by selectively exposing, developing and selectively removing.

  Next, a partition paste in which filler, glass powder, binder and solvent are mixed is prepared. Then, as shown in FIG. 7A, a partition paste is applied on the insulating substrate 1 so as to cover the dielectric layer 14, thereby forming a partition paste layer 20. At this time, since the barrier rib paste is a highly viscous fluid, the surface of the barrier rib paste layer 20 becomes flat. For this reason, in the region where the dielectric layer 14 is not formed, the partition paste layer 20 is thicker than the region where the dielectric layer 14 is formed.

  Next, as shown in FIG. 7B, the partition paste layer 20 is dried. Thereby, the partition paste layer 20 contracts at a constant rate. At this time, in the region where the dielectric layer 14 is not formed, since the partition wall paste layer 20 is thicker than the region where the dielectric layer 14 is formed, the amount of shrinkage also increases. For this reason, after drying, the surface of the barrier rib paste layer 20 in the region where the dielectric layer 14 is not formed is lower than the surface of the barrier rib paste layer 20 in the region where the dielectric layer 14 is formed. 7A and 7B illustrate a case where the shrinkage rate of the partition wall paste layer 20 by drying is 50%.

  Next, as shown in FIG. 7C, a dry film 21 is pasted on the partition wall paste layer 20. The dry film 21 is made of a material that is cured by exposure. Next, the dry film 21 is selectively exposed using a mask and then developed. Thus, the unexposed portion of the dry film 21 is selectively removed, and the exposed portion is left to be cured, and the dry film 21 is patterned so as to cover a region where the partition wall 9 is to be formed.

  Next, sand blasting is performed using the patterned dry film 21 as a mask, and the partition wall paste layer 20 is selectively removed to perform patterning. Thereafter, the dry film 21 is removed, and the partition paste layer 20 is baked. Thereby, the binder in the partition paste layer 20 evaporates and the glass powder is melted and re-solidified to form the partition 9 made of filler and glass and the frit stopper 18. At this time, the barrier rib paste layer 20 contracts, and the longitudinal ends of the vertical barrier ribs 9a and the horizontal barrier ribs 9b after firing become thicker than the central portion.

  4, the height of the vertical barrier ribs 9a is lower than the height of the horizontal barrier ribs 9b in the display region 16, and the height of the horizontal barrier ribs 9b in the non-display region 17 is equal to the horizontal barrier ribs in the display region 16, as shown in FIG. A partition wall 9 lower than the height of 9b is formed.

  Next, a phosphor layer is formed on the surface of the dielectric layer 14 and the side surfaces of the barrier ribs 9 in the same manner as in the conventional PDP manufacturing method. Then, the front substrate and the rear substrate are overlapped with each other, and the partition wall 9 formed on the rear substrate is brought into contact with the protective layer 13 (see FIG. 15) formed on the front substrate. At this time, the direction in which the data electrode 7 extends is set to be orthogonal to the direction in which the scan electrode 3 and the common electrode 4 (see FIG. 15) extend. Next, heat treatment is performed in a state where the front substrate and the rear substrate are overlapped with each other, and the ends of the insulating substrates 1 and 2 are fused together by frit. As a result, the space surrounded by the insulating substrate 1, the insulating substrate 2, and the sealing layer (not shown) made of the frit is hermetically sealed. Thereafter, the space is evacuated and the space is filled with a discharge gas. Thereby, the PDP of this example is manufactured.

  As described above, in this embodiment, the dielectric layer formed on the back substrate is patterned into a predetermined shape, and then a partition is formed, whereby a part of the partition is formed on the dielectric layer, and the remainder Can be formed directly on the insulating substrate. Thereby, the height of a partition can be varied in two steps depending on the portion. That is, the portion formed on the dielectric layer can be made relatively high and the other portions can be made relatively low.

  That is, in this embodiment, the dielectric layer 14 is formed only in the region where the horizontal barrier rib 9b is to be formed in the display region 16 and the region where the discharge gas space 8 is to be formed, and the vertical barrier rib 9a and the intersection portion 9c are formed. It is not formed in a region to be formed, and is formed only in a region other than the region in which the partition wall 9 and the frit stopper 18 are not formed in the non-display region 17 and covering the data electrode 7. Thereby, in the display area | region 16, the height from the surface of the insulating substrate 1 of the vertical partition 9a and the intersection part 9c can be made lower than the height from the surface of the insulating substrate 1 of the horizontal partition 9b. As a result, even if a part of the vertical partition wall 9a is raised due to the firing of the partition wall 9, when the front substrate and the rear substrate are overlapped with each other, the raised portion is strongly applied to the protective layer 13 formed on the front substrate. It can contact | abut and can prevent that the vertical partition 9a is missing. Thereby, it is possible to prevent a display defect due to the loss of the vertical partition wall 9a, that is, the first type of display defect described above. Note that, by reducing the height of the vertical barrier ribs 9a, the pressure with which the horizontal barrier ribs 9b are pressed against the protective layer 13 increases. However, the horizontal barrier ribs 9b are shorter and longer than the vertical barrier ribs 9a, and thus are lost. In addition, even if the horizontal barrier rib 9b is lost, the horizontal barrier rib 9b is separated from the region where the scanning electrode 3 and the common electrode 4 are disposed in the display cell 8 and may cause a display defect. Low.

  In the present embodiment, the height of the horizontal barrier rib 9b in the non-display area 17 is set lower than the height of the horizontal barrier rib 9b in the display area 16. Thereby, even when the height of the end portion in the longitudinal direction is higher than that of the central portion during firing of the partition walls 9, it is possible to prevent a gap from being formed between the front substrate and the front substrate.

  Further, in this embodiment, the data electrode 7 is covered with at least one of the dielectric layer 14 and the partition wall 9 except for the end portion. Therefore, the data electrode 7 can be prevented from being damaged when the barrier rib paste layer 20 is patterned by sand blasting to form the barrier rib 9. Further, unlike the technique described in the aforementioned Japanese Patent Application Laid-Open No. 2001-319580, it is not necessary to use two dielectric layers in order to protect the data electrode during sandblasting.

  Next, a second embodiment of the present invention will be described. 8 is a perspective view showing a back substrate of the PDP according to the present embodiment, FIG. 9 is a plan view showing the back substrate of the PDP, and FIG. 10 is a cross-sectional view taken along line EE shown in FIG. 11 is a cross-sectional view taken along line FF shown in FIG. 9 is a cross-sectional view taken along the line G-G shown in FIG. 9 in which the vertical barrier ribs 9a, the horizontal barrier ribs 9b, and the dielectric layer 14 in FIG. 3 of the first embodiment are respectively replaced with the vertical barrier ribs 19a, the horizontal barrier ribs 19b, and the dielectric. The figure is replaced with the layer 24.

  In the present embodiment, the same components as those in the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. In the PDP according to the present embodiment, the configuration of the front substrate is the same as that of the conventional PDP (see FIG. 15) and the front substrate of the PDP according to the first embodiment.

  As shown in FIGS. 8 to 11, the back substrate of this embodiment is composed of an insulating substrate 1, a data electrode 7, a dielectric layer 24, and a partition wall 19. The surface of the insulating substrate 1 facing the insulating substrate 2 is composed of the display area 16 and the non-display area 17 as in the first embodiment.

  A plurality of data electrodes 7 are provided on the surface of the insulating substrate 1. As shown in FIGS. 9 and 10, between the data electrodes 7, an island-shaped metal layer 7 a that is in the same layer as the data electrodes 7 and is not connected anywhere is provided. A dielectric layer 24 is formed so as to cover the data electrode 7 and the metal layer 7a. Further, on the insulating substrate 1, a partition wall 19 is provided for securing a discharge gas space and partitioning the display cell 8 (pixel). When viewed from the direction perpendicular to the surface of the insulating substrate 1, the shape of the partition wall 19 is a cross-beam shape, and the partition wall 19 includes a vertical partition wall 19 a extending in the direction in which the data electrode 7 extends and a direction orthogonal to the direction in which the vertical partition wall 19 a extends. And the intersection 19c between the vertical partition 19a and the horizontal partition 19b. The metal layer 7 a described above is provided in a region corresponding to the intersection portion 19 c of the partition wall 19. Furthermore, as shown in FIG. 9, a frit stopper 18 is provided around the partition wall 19 in the non-display area 17.

  Unlike the dielectric layer 14 in the first embodiment, the dielectric layer 24 is also provided in a region corresponding to the intersection 19c of the partition wall 19 in the display region 16. That is, the dielectric layer 24 is provided in a region other than the region where the vertical barrier rib 19a is formed in the display region 16 and a region where the barrier rib 19 is not provided on the data electrode 7 in the non-display region 17 (FIG. 13 (a)). That is, the horizontal barrier rib 19 b and the intersection portion 19 c in the display area 16 are provided on the dielectric layer 24. On the other hand, the vertical barrier ribs 19 a in the display area 16 and the vertical barrier ribs 19 a and the intersection portions 19 c in the non-display area 17 are directly provided on the insulating substrate 1. Further, the horizontal barrier ribs 19 b and the frit stoppers 18 in the non-display area 17 are provided directly on the insulating substrate 1 or on the data electrode 7.

  As a result, as shown in FIGS. 8, 10, and 11, the height of the horizontal barrier rib 19b and the intersection 19c from the surface of the insulating substrate 1 in the display region 16 is relatively high, and the vertical barrier rib 19a in the display region 16 is relatively high. In addition, the height of the partition wall 19 and the frit stopper 18 in the non-display area 17 from the surface of the insulating substrate 1 is relatively low. In the PDP of this embodiment, the thickness of the dielectric layer 24 is, for example, 10 μm, the height of the horizontal partition wall 19b in the display region 16 from the surface of the insulating substrate 1 is, for example, 120 μm, and the vertical partition wall in the display region 16 19a and the height of the vertical partition wall 19 from the surface of the insulating substrate 1 in the non-display area 17 is, for example, 110 μm. The data electrode 7 is covered with at least one of the partition wall 19 and the dielectric layer 24 except for the end portion. The configuration other than the above in the PDP of the present embodiment is the same as the configuration of the PDP in the first embodiment described above.

  Next, a method for manufacturing the PDP according to the present embodiment will be described. FIG. 12A is a plan view showing a method for manufacturing a PDP according to the present embodiment, and FIG. 12B is a cross-sectional view taken along the line HH shown in FIG. FIG. 13A is a plan view showing the next step of FIG. 12 in the method for manufacturing the PDP, and FIG. 13B is a cross-sectional view taken along the line I-I shown in FIG. The manufacturing method of the front substrate of the PDP according to the present embodiment is the same as the manufacturing method of the conventional PDP and the PDP according to the first embodiment.

  A method for manufacturing the back substrate will be described. First, as shown in FIGS. 12A and 12B, the data electrode 7 extending in one direction is formed on the insulating substrate 1. Between the data electrodes 7, a metal layer 7a which is the same layer as the data electrodes 7 and is partitioned into islands is formed. Next, as shown in FIGS. 13A and 13B, a dielectric layer 24 is formed so as to cover the data electrode 7 and the metal layer 7a. At this time, in the display region 16, the dielectric layer 24 is formed only in a region where the horizontal partition wall 19b and the intersection portion 19c are to be formed in a later step and a region where the display cell 8 is to be formed, and the vertical partition wall 19a. It is not formed in the region where is to be formed. Further, the non-display area 17 is formed only in an area other than an area where the partition wall 19 and the frit stopper 18 are to be formed in a later process and covering the data electrode 7.

  Subsequent steps are the same as those in the first embodiment. That is, a barrier rib paste is applied on the insulating substrate 1 to form a barrier rib paste layer, which is dried, patterned by sandblasting, and fired. Thereby, the partition wall 19 is formed. As a result, as shown in FIG. 11, the height of the vertical barrier ribs 19 a in the display area 16 is lower than the height of the horizontal barrier ribs 19 b and the intersection portions 19 c, and the height of the horizontal barrier ribs 19 b in the non-display area 17 is in the display area 16. A PDP in which the barrier rib 9 lower than the height of the horizontal barrier rib 19b is formed can be manufactured.

  In this embodiment, the height of the intersection portion 19c of the partition wall 19 is made higher than that of the vertical partition wall 19a and the same height as that of the horizontal partition wall 19b as compared with the first embodiment described above. For this reason, the strength of the horizontal barrier rib 19b is improved as compared with the PDP of the first embodiment. In the first embodiment, the height of the intersection portion 9c is the same as the height of the vertical partition wall 9a and is lower than the horizontal partition wall 9b. For this reason, the exhaust efficiency in the display cell 8 is improved as compared with the PDP of the second embodiment. The effects of the present embodiment other than those described above are the same as the effects of the first embodiment described above.

  In the first and second embodiments described above, the method of changing the height of the partition wall in two steps for each portion by patterning the dielectric layer formed on the back substrate has been shown. However, the height of the partition wall may be varied by other methods.

  The third embodiment of the present invention will be described below. FIGS. 14A to 14C are perspective views showing the method of manufacturing the PDP according to the present embodiment in the order of steps. In this embodiment, the height of the partition walls is varied by patterning the partition paste layer using a three-dimensional mask. A technique using this three-dimensional mask is a technique developed by the present inventors and described in Japanese Patent Application No. 2001-323847.

  As shown in FIG. 14A, after a dielectric layer (not shown) is uniformly formed on the insulating substrate 1 and a partition paste layer 20 is formed uniformly, a three-dimensional mask is formed on the partition paste layer 20. 30 is arranged. The three-dimensional mask 30 includes a low portion 31 and a high portion 32. At this time, the lower portion 31 of the three-dimensional mask 30 is in contact with the surface of the barrier rib paste layer 20, and the higher portion 32 is not in contact with the surface of the barrier rib paste layer 20, and a gap is formed between the lower portion 31 and the barrier rib paste layer 20. ing. Then, sand blasting is performed using the three-dimensional mask 30.

  Then, as shown in FIG. 14B, the portion of the barrier rib paste layer 20 covered with the lower portion 31 of the three-dimensional mask 30 remains without being removed, and the height is equal to the height of the barrier rib paste layer. A partition wall 29b is formed. On the other hand, the portion of the barrier rib paste layer 20 corresponding to the portion immediately below the high portion 32 of the three-dimensional mask 30 is caused by the sandblast jet stream 33 flowing into the gap between the barrier rib paste layer 20 and the high portion 32, thereby separating the barrier rib paste layer. The upper part of 20 is shaved and the vertical partition 29a whose height is lower than the height of the partition paste layer 20 is formed. Thereby, as shown in FIG. 14C, the partition walls 29 in which the height of the vertical partition walls 29a is lower than the height of the horizontal partition walls 29b can be formed. The configuration and manufacturing method of the PDP of this embodiment other than those described above are the same as those in the first embodiment.

  In addition, the method of changing the height of the partition wall in two steps for each portion is conceivable in addition to the methods of the first to third embodiments described above. For example, the barrier rib has a two-layer structure, the first barrier rib is formed at a low height, the lower portion of the horizontal barrier rib and the vertical barrier rib are formed, and then the second barrier rib is overlapped only on the horizontal barrier rib portion. And you may form the upper part of a horizontal partition.

It is a perspective view which shows the back substrate of PDP which concerns on the 1st Example of this invention. It is a top view which shows the back substrate of this PDP. It is sectional drawing by the AA line shown in FIG. It is sectional drawing by the BB line shown in FIG. (A) is a top view which shows the manufacturing method of PDP which concerns on a present Example, (b) is sectional drawing by CC line shown to (a). (A) is a top view which shows the next process of FIG. 5 in the manufacturing method of this PDP, (b) is sectional drawing by the DD line | wire shown to (a). (A) thru | or (c) is sectional drawing which shows the manufacturing method of this PDP in the order of the process, and shows the next process of FIG. It is a perspective view which shows the back substrate of PDP which concerns on the 2nd Example of this invention. It is a top view which shows the back substrate of this PDP. It is sectional drawing by the EE line shown in FIG. It is sectional drawing by the FF line shown in FIG. (A) is a top view which shows the manufacturing method of PDP which concerns on a present Example, (b) is sectional drawing by the HH line | wire shown to (a). (A) is a top view which shows the next process of FIG. 12 in this manufacturing method of PDP, (b) is sectional drawing by the II line | wire shown to (a). (A) thru | or (c) is a perspective view which shows the manufacturing method of PDP which concerns on the 3rd Example of this invention in the order of the process. It is a perspective view which shows the structure of one display cell in the conventional 3 electrode surface discharge alternating current type plasma display panel (PDP). (A) is a top view which shows the manufacturing method of this conventional PDP, (b) is sectional drawing by the JJ line | wire shown to (a). (A) is a top view which shows the next process of FIG. 16 in the manufacturing method of this conventional PDP, (b) is sectional drawing by the KK line | wire shown to (a). (A) is a top view which shows the next process of FIG. 17 in this conventional manufacturing method of PDP, (b) is sectional drawing by the LL line | wire shown to (a). (A) thru | or (c) is sectional drawing which shows the shrinkage | contraction behavior at the time of baking of a partition, (a) is before baking, (b) is after baking, (c) is the state after superposing | stacking the insulating substrate 2. FIG. Indicates.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 2; Insulating substrate 3; Scan electrode 4; Common electrode 5, 6; Trace electrode 7; Data electrode 7a; Metal layer 8; Display cell 9; Barrier 9a: Vertical barrier 9b: Horizontal barrier 9c; Light 11; Phosphor layer 12, 14; Dielectric layer 13; Protective layer 15; Gaps 16; Display area 17; Non-display area 18; Frit stopper 19; Partition 19a; Vertical partition 19b; Horizontal partition 19c; Partition wall paste layer 21; Dry film 24; Dielectric layer 29; Partition wall 29a; Vertical partition wall 29b; Horizontal partition wall 30; Solid mask 31; Low part 32; High part 33; Jet flow 54; Dielectric layer 59; Bulkhead 59b; Horizontal bulkhead 59c; Longitudinal end 59d; Center

Claims (8)

A display area and a non-display area formed so as to surround the display area around the display area, a vertical partition extending in parallel with the data electrode on the insulating substrate, and extending perpendicular to the data electrode In the plasma display panel having a horizontal barrier rib, at least a part of the horizontal barrier rib in the display region is formed on a dielectric layer formed on the insulating substrate, the horizontal barrier rib in the non-display region, and the display The plasma display panel according to claim 1, wherein the vertical barrier ribs in the region and the non-display region are formed so as to be in contact with the insulating substrate. The plasma display panel according to claim 1, wherein the horizontal barrier rib formed on the dielectric layer is formed such that a height from a surface of the insulating substrate is higher than that of the vertical barrier rib. The height of the vertical partition wall is substantially uniform in the longitudinal direction, and the height of the intersection of the vertical partition wall and the horizontal partition wall is substantially equal to the height of the vertical partition wall. 3. The plasma display model according to 1 or 2. The horizontal partition wall height in the display region is substantially uniform in the longitudinal direction, and the height of the intersection of the vertical partition wall and the horizontal partition wall in the display region is substantially equal to the horizontal partition wall height. The plasma display panel according to claim 1, wherein the plasma display panels are equal. In a plasma display panel having a display region and a non-display region formed so as to surround the display region around the display region, at least a part of the partition wall of the display region has a height from the surface of the insulating substrate. Is formed higher than the partition wall of the non-display region, and the data electrode is covered with a dielectric layer or the partition wall except for a connection terminal at an end thereof. At least a part of the partition wall of the display region is formed on a dielectric layer formed on the insulating substrate, and the partition wall of the non-display region is formed in contact with the insulating substrate. The plasma display panel according to claim 5. A step of forming a front substrate, a step of forming a back substrate, and a step of bonding the front substrate and the back substrate in parallel to each other, and the step of forming the back substrate includes: A step of forming a plurality of data electrodes extending parallel to each other on the surface; a step of selectively forming a dielectric layer so as to cover a portion of the data electrode other than the end; and the dielectric layer Applying a barrier rib paste so as to cover a portion of the data electrode other than the connection terminal at the end of the data electrode and covering the portion where the dielectric layer is not formed, and flattening the surface, A step of drying the paste to form a grid-like partition wall, and in the step of forming the dielectric layer, in the display region, the dielectric layer is at least one of the regions where the partition wall is to be formed. Formed in the part In the non-display area formed around the display area, the dielectric layer is formed in at least a part of the area other than the area where the partition walls are to be formed. . The barrier rib includes a vertical barrier rib extending in a direction in which the data electrode extends and a horizontal barrier rib extending in a direction orthogonal to the direction in which the vertical barrier rib extends. In the step of forming the dielectric layer, the dielectric is formed in the display region. 8. The method of manufacturing a plasma display panel according to claim 7, wherein a body layer is formed in a region where the horizontal barrier rib is to be formed.

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