JP2008066649A - Voltage source circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a high-precision voltage source circuit wherein the variations in the output voltage is reduced. <P>SOLUTION: In the voltage source circuit, a first field effect transistor having a high-concentration n-type gate and a second field effect transistor having a heavily-doped p-type gate are connected in series to output a voltage depending on a difference of work functions of gate electrodes of the two field-effect transistors. The first field-effect transistor operates as a constant current source, as well as, is set at zero-temperature coefficient point where the current value does not vary in temperature. The same current flows through the two field-effect transistors. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a voltage source circuit.

  Conventionally, a voltage generation circuit using a field effect transistor or a reference voltage source circuit has been used. For example, in the reference voltage circuit described in FIG. 22 of Japanese Patent Laid-Open No. 2001-284464, for example, a first pair field effect transistor having gates having different conductivity types, a high conductivity and a low conductivity with the same polarity conductivity type. A second pair of field effect transistors having a concentration gate are connected in series, and a reference voltage is obtained by utilizing a work function difference between the respective gate materials. Here, the first field effect transistor operates as a constant current source by connecting the gate and the source, and the current value is determined by the field effect transistor which is a constant current source. In the field effect transistor of the constant current source, since the gate and the source are connected, a current corresponding to each temperature flows, and it also flows to the other field effect transistor. In order to function as a pair field effect transistor, the well of the substrate is made independent so that the substrate effect does not occur, and the potential of the substrate is made equal to the source potential. When the channel lengths L of the two field effect transistors are equal, the output voltage has a negative temperature coefficient. In this circuit, by using another pair of field effect transistors and source follower circuits, desired temperature characteristics can be arbitrarily set by changing the impurity concentration and resistance ratio of the gate.

JP 2001-284464 A

However, the output signal V _PN from the pair field effect transistor in the conventional example has a certain output voltage variation. When the output voltage varies at each temperature, not only the absolute value varies at each temperature, but also the temperature coefficient of the output signal V _PN varies. Therefore, in order to realize a high-accuracy voltage source circuit, it is an important issue to keep the variation in the output voltage as low as possible.

  An object of the present invention is to provide a high-accuracy voltage source circuit with reduced output voltage variation.

  In the voltage source circuit according to the present invention, a first field effect transistor having a high concentration n-type gate and a second field effect transistor having a high concentration p-type gate are connected in series, and the two field effect transistors are connected. A voltage depending on the work function difference of the gate electrode is output. The first field effect transistor operates as a constant current source, and the first field effect transistor is set to a zero temperature coefficient point where the temperature of the current value does not change. The same current flows through the two field effect transistors. Thereby, the output voltage variation is reduced. In this voltage source circuit, for example, the channel lengths L of the two field effect transistors are equal.

  In the voltage source circuit, for example, the channel lengths L of the two field effect transistors are different. Thereby, a voltage source circuit having a desired temperature coefficient can be formed. Further, preferably, both of the two field effect transistors are set to a zero temperature coefficient point. As a result, a reference voltage that does not depend on ambient temperature changes is output.

  According to the present invention, it is possible to provide a high-accuracy voltage source circuit in which variations in output voltage are reduced by setting a field effect transistor operating as a constant current source to a zero temperature coefficient point as a current flowing in a pair field effect transistor. .

ここで、μはキャリアの移動度であり、Ｃ_oxは酸化膜中の単位面積当たりの静電容量であり、Ｗはチャネル幅であり、Ｌはチャネル長である。式(１)で、温度依存性を持っているパラメータはキャリアの移動度（μ）としきい値（Ｖ_th）の二つであり、以下にそれぞれの温度依存性について考えてみる。 Embodiments of the invention will be described below with reference to the accompanying drawings.
First, the reason why a zero temperature coefficient (ZTC) point used for realizing a high-precision voltage source with reduced output voltage variation can be set in the present invention will be described. In general, in a MOSFET operating in a saturation region (V _ds > V _gs −V _th ), the drain-source current I _ds is expressed by the following equation (1).

Here, μ is the carrier mobility, C _ox is the capacitance per unit area in the oxide film, W is the channel width, and L is the channel length. In equation (1), there are two parameters having temperature dependency, carrier mobility (μ) and threshold value (V _th ), and the temperature dependency will be considered below.

ここで、φ_msはゲートの仕事関数と基板の仕事関数の差であり、Ｑ_fは酸化膜中の固定電荷であり、φ_fは基板のフェルミレベルであり、Ｑ_Dは反転層と基板間の空乏層内の単位面積当たりの電荷であり、Ｃ_oxは単位面積当たりの酸化膜の静電容量である。従って、しきい値の温度依存性を知るためには、式（２）を構成するそれぞれのパラメータの温度特性を調べればいいが、一般に周囲温度変化によるしきい値の変動は次式（３）のように表すことが出来る。

ここで、αは基板のドーピングレベルや注入量などプロセスに依存するパラメータであり、通常のＣＭＯＳプロセスの場合約１〜２mV／℃である。式(３）は、200〜400Kの温度範囲で有効である。上式から、しきい値は温度に対して反比例の関係にあることが分かる。このことは、温度が上昇するとしきい値が下がり、同じＶ_gsの条件では式（１）のドレイン・ソース電流（I_ds）が上昇することを意味する。 First, the threshold value is expressed as the following equation (2).

Here, φ _ms is the difference between the work function of the gate and the substrate, Q _f is the fixed charge in the oxide film, φ _f is the Fermi level of the substrate, and Q _D is between the inversion layer and the substrate. Is the charge per unit area in the depletion layer, and C _ox is the capacitance of the oxide film per unit area. Therefore, in order to know the temperature dependence of the threshold value, the temperature characteristics of the respective parameters constituting the equation (2) can be examined. Generally, the fluctuation of the threshold value due to the ambient temperature change is expressed by the following equation (3). It can be expressed as

Here, α is a process-dependent parameter such as the doping level of the substrate and the implantation amount, and is about 1 to 2 mV / ° C. in the case of a normal CMOS process. Formula (3) is effective in the temperature range of 200-400K. From the above equation, it can be seen that the threshold value is inversely proportional to the temperature. This means that the threshold value decreases as the temperature rises, and the drain-source current (I _ds ) in Equation (1) increases under the same V _gs conditions.

ここでｎの値は1〜2.5程度であり、酸化膜の成長条件や温度範囲に依存する。上式から分かるように、移動度の温度依存性μ(T)はＴ^-nに比例関係にあるため、温度上昇に伴って移動度μが下がり、その結果同じＶ_gsの条件では式（1）のドレイン・ソース電流（I_ds）は低下する。 Next, carrier mobility μ will be described. The carrier mobility μ has a strong dependence on temperature, and is expressed as follows.

Here, the value of n is about 1 to 2.5 and depends on the growth condition and temperature range of the oxide film. As can be seen from the above equation, since the temperature dependence of the mobility μ of (T) is proportional to T ^-n, the mobility μ decreases as the temperature increases, a condition resulting same V _gs formula (1 ) Drain-source current (I _ds ) decreases.

Therefore, the temperature characteristic of the drain-source current is determined by which becomes dominant under a given bias condition. As described above, the temperature coefficient of the threshold V _th (Equation (3)) and the mobility μ (Equation (4)) are opposite to the drain-source current I _ds (Equation (1)). Therefore, there is a tendency to cancel at a certain bias point, and the bias point at which these two effects are canceled becomes the zero temperature coefficient (ZTC) point. This zero temperature coefficient point depends on the transistor size, oxide film thickness, threshold value V _th and temperature coefficient of mobility μ. Accordingly, when the zero temperature coefficient point is set, the value of the current flowing through the field effect transistor is not affected by temperature.

  Next, the relationship between zero temperature coefficient (ZTC) and current variation will be described. FIG. 1 shows the relationship between the size of the field effect transistor M1 and the current variation. The horizontal axis represents the transistor size, the channel width W is fixed at 50 μm, and the channel length L is from 4 μm to 50 μm. The left side of the vertical axis shows the current difference between 85 ° C. and 35 ° C., and when this difference is zero, the transistor size is the zero temperature coefficient (ZTC) point. On the other hand, the right side of the vertical axis shows current variation at each temperature, and white circles and black circles show current variation data at 85 ° C. and 35 ° C., respectively.

  Looking at FIG. 1 from the viewpoint of the zero temperature coefficient (ZTC), it can be seen that as the L size increases, the current difference between the temperatures (triangles in the figure) decreases and approaches the zero temperature coefficient (ZTC). On the other hand, from the viewpoint of current variation, as in the case of the zero temperature coefficient (ZTC), the current variation (circle in the figure) tends to decrease as the L size increases at both 85 ° C and 35 ° C. When 4 is changed from 4 μm to 50 μm, the current variation is reduced by about 25%.

FIG. 2 shows the relationship between the size L of the field effect transistor M1 and the V _th variation. The behavior of the V _th variation due to the size change is very similar to the current variation result of FIG. 1, and when the L size is changed from 4 μm to 50 μm, the V _th variation is reduced to about 30%.

Current variation and V _th variation reduction effect of the field-effect transistor M1 by zero temperature coefficient of above (ZTC), since the V _PN signal is output as V _th difference between the two field-effect transistors, as a result, the V _PN signal This suggests that this is an effective means for improving output accuracy and reducing temperature coefficient variation.

Therefore, in the constant voltage source circuit, the constant current source field effect transistor has the effect that the threshold value (V _th ) decreases as the temperature rises and the drain and source currents increase, and the mobility and the drain and source currents decrease. The zero temperature coefficient (ZTC) point is set so that the current flowing through the constant current source and the pair field effect transistor does not vary with temperature. This “set to zero temperature coefficient point” means that, as described above, in the field effect transistor, the impurity concentration, the channel size, etc. are the carrier mobility (μ) temperature coefficient and the threshold temperature (V _th ) temperature coefficient. It means that they are set so as to cancel each other.

FIG. 3 shows a voltage source circuit according to the first embodiment of the present invention. This basic circuit is composed of two n-channel depletion type field effect transistors M1 and M2 connected in series, and the substrate and channel dope impurity concentrations are equal. The first field effect transistor M1 has a high concentration n-type gate, and the second field effect transistor M2 has a high concentration p-type gate. The two pair field effect transistors are connected between a power supply (VCC) and a ground (GND). The field effect transistor M1 having a high-concentration n-type gate is a constant current source by connecting the gate and the source since the impurity concentration of the channel dope is adjusted so as to perform a depletion operation. The field effect transistor M2 has a high-concentration p-type gate, and the gate and the drain are connected. The gate-source voltage of M2 is output as V _PN . Whether the gate of the first field effect transistor M1 is grounded or connected to the source side depends on whether the substrate is a P channel or an N channel. In this circuit, since the same current flows through the pair field effect transistors M1 and M2, the gate-source voltage of the field effect transistor M2 becomes a difference V _PN signal between V _th of the field effect transistors M1 and M2. The current flowing through the first field effect transistor is set to a zero temperature coefficient (ZTC) point. In the configuration of the first embodiment, the pair field effect transistors M1 and M2 having the same channel length L are used.

The circuit operation of the first embodiment will be described. Figure 4 shows a schematic diagram V _gs -I _ds characteristics of the V _PN signal in the first embodiment. The current flowing through the first pair field effect transistor M1 is determined by the field effect transistor M1 which is a constant current source. In this field effect transistor M1, since the gate and source are connected (V _gs = 0V) and set to the zero temperature coefficient point, a constant current flows through the field effect transistor M2 regardless of temperature change. Since the same current flows through the pair field effect transistors M1 and M2, the gate-source voltage of the field effect transistor M2 is the V _th difference between the two field effect transistors M1 and M2. Since this V _th difference becomes smaller as the temperature rises, as shown in the figure, the V _PN signal (= V _gs signal) becomes smaller as the temperature increases.

For comparison, FIG. 5 shows a schematic diagram of the V _gs -I _ds characteristics of a conventional voltage source circuit that is not set to the zero temperature coefficient (ZTC) point. Currents having different current values corresponding to the respective temperatures flow through the field effect transistor. In this case, since the field effect transistor of the constant current source is not set to the zero temperature coefficient point, the variation of the output voltage is larger than that of this embodiment. When the output voltage variation occurs at each temperature, not only the absolute value variation at each temperature but also the temperature coefficient of the V _PN signal varies.

  The second embodiment is a modification of the first embodiment described above. The basic circuit configuration is the same as that in FIG. 3, and the current flowing through the first field effect transistor is set to a zero temperature coefficient (ZTC) point. However, the difference is that two pair field effect transistors M1 and M2 having different channel lengths L are used. In this case, a voltage source circuit having a desired temperature coefficient can be formed by changing the channel length L of the two field effect transistors.

The third embodiment is a modification of the second embodiment described above, and the basic circuit configuration is the same as FIG. In this case, the channel length L of the two pair field effect transistors M1 and M2 is different, and the current flowing through the first field effect transistor and the current flowing through the second field effect transistor are equal to the zero temperature coefficient (ZTC) point. By setting, it is possible to form a reference voltage source in which the difference in V _th between the two field effect transistors M1 and M2 does not depend on the temperature change.

In the third embodiment in FIG. 5 shows a schematic diagram V _gs -I _ds characteristics of the V _PN signal. The current flowing through the first pair field effect transistor is determined by the field effect transistor M1 which is a constant current source. In this field effect transistor M1, since the gate and the source are connected (V _gs = 0V) and further set to a zero temperature coefficient (ZTC) point, a constant current flows through the field effect transistor M2 regardless of temperature change. . Further, since the field effect transistor M2 is also set to a zero temperature coefficient (ZTC) point, it outputs a reference voltage that does not depend on a temperature change.

The graph which shows the relationship between the size L and current variation in a field effect transistor The graph which shows the relationship between the size L of field effect transistor M1, and _Vth dispersion _| variation Circuit diagram of the first embodiment Schematic diagram of V _gs -I _ds characteristics of V _PN signal in the first embodiment Schematic diagram of V _gs -I _ds characteristics of conventional V _PN signal Schematic diagram V _gs -I _ds characteristics of the V _PN signal in the third embodiment

Explanation of symbols

  M1 first field effect transistor, M2 second field effect transistor.

Claims (4)

A first field effect transistor having a high-concentration n-type gate and a second field-effect transistor having a high-concentration p-type gate are connected in series, and the work function difference between the gate electrodes of the two field effect transistors is reduced. A voltage source circuit that outputs a dependent voltage,
The first field effect transistor operates as a constant current source, the first field effect transistor is set to a zero temperature coefficient point at which the current value does not change in temperature, and the voltage at which the same current flows in the two field effect transistors Source circuit.   2. The voltage source circuit according to claim 1, wherein channel lengths L of the two field effect transistors are equal.   2. The voltage source circuit according to claim 1, wherein channel lengths L of the two field effect transistors are different.   4. The voltage source circuit according to claim 3, wherein both of the two field effect transistors are set to a zero temperature coefficient point.

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