JP2008060100A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent cracks from being generated further on the interface between a solder ball and a support section for supporting the solder ball in a semiconductor device called CSP having the solder ball. <P>SOLUTION: An upper-layer protective film 13 made of a resin film is adhered onto the upper surface of a sealing film 10 via an adhesive layer 14. An upper-layer wire 17 made of copper foil is connected to first and second surface treatment layers 11, 12 provided on a columnar electrode 9 on the upper surface of the upper-layer protective film 13. A solder ball 20 is provided on the upper surface of the connection pad section of the upper wire 17. Then, stress can be relaxed by the upper-layer protective film 13 made of a resin film, thus preventing cracks from being generated further on the interface between the solder ball 20 and the connection pad of the upper-layer wire 17. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof.

  A conventional semiconductor device is called a CSP (chip size package). A wiring is provided on an upper surface of an insulating film provided on a semiconductor substrate, and a columnar electrode is provided on an upper surface of a connection pad portion of the wiring. In some cases, a sealing film is provided on the upper surface of the insulating film to be included so that the upper surface is flush with the upper surface of the columnar electrode, and a solder ball is provided on the upper surface of the columnar electrode (see, for example, Patent Document 1).

JP 2004-349461 A

  In the conventional semiconductor device described above, when a temperature cycle test or the like is performed after the semiconductor device is mounted on the circuit board, the stress generated due to the difference in thermal expansion coefficient between the semiconductor substrate and the circuit board is generated. Has the function of mitigating. That is, the columnar electrode itself has a function of absorbing the stress and preventing the occurrence of cracks at the interface between the columnar electrode and the solder ball by being appropriately elastically deformed and inclined.

  However, in the conventional semiconductor device, although the stress can be relieved by the columnar electrode, it has a limit. For this reason, for example, if the stress increases as the size of the semiconductor substrate increases, cracks may occur at the interface between the columnar electrode and the solder ball.

  In view of the above, an object of the present invention is to provide a semiconductor device and a method for manufacturing the same that can make cracks less likely to occur at the interface between a solder ball and a support portion that supports the solder ball.

  In order to achieve the above object, the present invention provides an upper protective film made of a resin on a sealing film including a columnar electrode, and an upper layer wiring is connected to the upper surface of the columnar electrode on the upper protective film. A solder ball is provided on the connection pad portion.

  According to the present invention, since the upper protective film made of resin is provided between the sealing film including the columnar electrode and the solder ball, the stress is relieved by the upper protective film made of resin in addition to the columnar electrode. As a result, cracks can be made more unlikely to occur at the interface between the solder ball and the supporting portion for supporting the solder ball, that is, the connection pad portion of the upper layer wiring.

(First embodiment)
FIG. 1 is a sectional view of a semiconductor device as a first embodiment of the present invention. This semiconductor device is generally called a CSP and includes a silicon substrate (semiconductor substrate) 1. An integrated circuit (not shown) having a predetermined function is provided on the upper surface of the silicon substrate 1, and a plurality of connection pads 2 made of aluminum-based metal or the like are provided on the periphery of the upper surface so as to be connected to the integrated circuit.

  An insulating film 3 made of silicon oxide or the like is provided on the upper surface of the silicon substrate 1 excluding the central portion of the connection pad 2, and the central portion of the connection pad 2 is exposed through an opening 4 provided in the insulating film 3. Yes. A protective film 5 made of polyimide resin or the like is provided on the upper surface of the insulating film 3. An opening 6 is provided in the protective film 5 at a portion corresponding to the opening 4 of the insulating film 3.

  A base metal layer 7 made of copper or the like is provided on the upper surface of the protective film 5. A wiring 8 made of copper is provided on the entire upper surface of the base metal layer 7. One end of the wiring 8 including the base metal layer 7 is connected to the connection pad 2 through the openings 4 and 6 of the insulating film 3 and the protective film 5. A columnar electrode 9 made of copper is provided on the upper surface of the connection pad portion of the wiring 8. A sealing film 10 made of an epoxy resin or the like is provided on the upper surface of the protective film 5 including the wiring 8 so that the upper surface is flush with the upper surface of the columnar electrode 9. On the upper surface of the columnar electrode 9, a first surface treatment layer 11 made of nickel and a second surface treatment layer 12 made of gold are provided.

  An upper protective film 13 made of a resin film is bonded to the upper surface of the sealing film 10 via an adhesive layer 14. The resin film is made of polyimide resin, silicone resin, epoxy resin, glass base epoxy resin, or the like. In this case, the first and second surface treatment layers 11 and 12 are disposed in the openings 15 and 16 provided in the upper protective film 13 and the adhesive layer 14. On the upper surface of the upper protective film 13, an upper wiring 17 made of copper foil (metal foil) is provided connected to the second surface treatment layer 12 through the opening 15 of the upper protective film 13.

  An overcoat film 18 made of a solder resist or the like is provided on the upper surface of the upper protective film 13 including the upper wiring 17. An opening 19 is provided in the overcoat film 18 in a portion corresponding to the connection pad portion of the upper wiring 17. A solder ball 20 is provided in the opening 19 of the overcoat film 18 and above the opening 19 so as to be connected to the connection pad of the upper wiring 17.

  Next, an example of a method for manufacturing this semiconductor device will be described. First, as shown in FIG. 2, on a silicon substrate (hereinafter referred to as a semiconductor wafer 21) in a wafer state, the connection pad 2, the insulating film 3, the protective film 5, the base metal layer 7, the wiring 8, the columnar electrode 9, and the sealing member. A material on which the stop film 10 is formed is prepared. In this state, the upper surface of the sealing film 10 is flush with the upper surface of the columnar electrode 9. In FIG. 2, an area indicated by reference numeral 22 is an area corresponding to a dicing line.

  Next, as shown in FIG. 3, the first surface treatment layer 11 made of nickel and the second surface treatment layer made of gold are formed on the upper surface of the columnar electrode 9 by electroless plating, sputtering using a metal mask, or the like. 12 is formed.

  Next, as shown in the upper side of FIG. 4, an adhesive layer 14 is formed on the lower surface of the upper protective film 13 made of a resin film, and an opening 15 is formed in the upper protective film 13 and the adhesive layer 14 in a portion corresponding to the columnar electrode 9. , 16 are formed, an upper wiring 17 is formed on the upper surface of the upper protective film 13 so as to cover the opening 15 of the upper protective film 13, and an overcoat film 18 is formed on the upper surface of the upper protective film 13 including the upper wiring 17. Then, an overcoat film 18 having an opening 19 formed in a portion corresponding to the connection pad portion of the upper wiring 17 is prepared.

  As an example of a method for forming the prepared material, first, a method in which a copper foil (metal foil) is laminated on the upper surface of the upper protective film 13 made of a resin film is prepared. Next, an opening 15 is formed by photolithography in the upper protective film 13 in a portion corresponding to the columnar electrode 9 (first and second surface treatment layers 11 and 12). Next, the upper layer wiring 17 is formed by patterning the copper foil by a photolithography method. Next, a tin layer (not shown) is formed on the surface of the upper wiring 17 and the lower surface exposed through the opening 15 of the upper protective film 13 by electroless plating.

  Next, an overcoat film 18 made of a solder resist or the like is formed on the upper surface of the upper protective film 13 including the upper wiring 17 by a screen printing method, a spin coating method, or the like. In this case, an opening 19 is formed in the overcoat film 18 in a portion corresponding to the connection pad portion of the upper wiring 17. Next, the adhesive layer 14 made of a thermosetting epoxy resin or the like is patterned on the lower surface of the upper protective film 13 by screen printing. In this state, an opening 16 is formed in the adhesive layer 14 in a portion corresponding to the opening 15 of the upper protective film 13. Thus, the one shown on the upper side of FIG. 4 is obtained.

  Next, as shown in FIG. 5, the first and second surface treatment layers 11, 12 are relatively advanced into the openings 15, 16 of the upper protective film 13 and the adhesive layer 14, and the adhesive layer 14 is attached to the upper surface of the sealing film 10. Next, heat and pressure are applied from above the overcoat film 18 using a heater block (not shown). Then, the adhesive layer 14 is heated and cured, and the upper protective film 13 is bonded to the upper surface of the sealing film 10 via the adhesive layer 14.

  Further, the tin layer formed on the lower surface of the upper wiring 17 exposed through the openings 15 and 16 of the upper protective film 13 and the adhesive layer 14 and the second surface treatment layer 12 made of gold are formed by solid diffusion. The lower surface of the upper wiring 17 is thermocompression bonded to the upper surface of the columnar electrode 9 via the first and second surface treatment layers 11, 12 and the like. If there is no problem in the connection strength between the upper protective film 13 including the upper wiring 17 and the sealing film 10 including the columnar electrode 9 only by this thermocompression bonding, the adhesive layer 14 may be omitted.

  Next, as shown in FIG. 6, a solder ball 20 is formed in the opening 19 of the overcoat film 18 and above the opening 19 by being connected to the connection pad of the upper wiring 17. Next, as shown in FIG. 7, when the overcoat film 18, the upper protective film 13, the adhesive layer 14, the sealing film 10, the protective film 5, the insulating film 3, and the semiconductor wafer 21 are cut along the dicing line 22. A plurality of semiconductor devices shown in FIG. 1 are obtained.

  In the semiconductor device thus obtained, since the upper protective film 13 made of a resin film is provided between the sealing film 10 including the columnar electrode 9 and the solder ball 20, in addition to the columnar electrode 9, a resin The upper protective film 13 made of a film can also relieve stress, and as a result, it is possible to make cracks less likely to occur at the interface between the solder ball 20 and the connection pad portion of the upper wiring 17.

(Second Embodiment)
FIG. 8 is a sectional view of a semiconductor device as a second embodiment of the present invention. This semiconductor device is different from the semiconductor device shown in FIG. 1 in that an upper protective film 31 made of polyimide resin or the like is provided on the upper surface of the sealing film 10 including the columnar electrode 9 and corresponds to the central portion of the upper surface of the columnar electrode 9. An opening 32 is provided in the upper protective film 31 in the portion, and an upper layer wiring 34 made of copper including an upper base metal layer 33 made of copper or the like is formed on the upper surface of the upper protective film 31 via the opening 32 of the upper protective film 31. This is the point provided by being connected to the upper surface of the electrode 9.

  Next, an example of a method for manufacturing this semiconductor device will be described. First, after preparing what is shown in FIG. 2, as shown in FIG. 9, an upper protective film 31 made of polyimide resin or the like is formed on the upper surface of the sealing film 10 including the columnar electrode 9 by screen printing, spin coating, or the like. Form. In this case, an opening 32 is formed in the upper protective film 31 in a portion corresponding to the central portion of the upper surface of the columnar electrode 9.

  Next, as shown in FIG. 10, the entire upper surface of the upper protective film 31 including the upper surface of the columnar electrode 9 exposed through the opening 32 of the upper protective film 31 is coated with an upper layer base by electroless plating of copper or the like. A metal layer 33 is formed. Next, a plating resist film 35 is formed on the upper surface of the upper base metal layer 33. In this case, an opening 36 is formed in the plating resist film 35 in a portion corresponding to the upper layer wiring 34 formation region.

  Next, by performing electrolytic plating of copper using the upper base metal layer 33 as a plating current path, the upper wiring 34 is formed on the upper surface of the upper base metal layer 33 in the opening 36 of the plating resist film 35. Next, the plating resist film 35 is peeled off, and then, unnecessary portions of the upper base metal layer 33 are removed by etching using the upper layer wiring 34 as a mask. As shown in FIG. The metal layer 33 remains.

  Next, as shown in FIG. 12, an overcoat film 18 made of a solder resist or the like is formed on the upper surface of the upper protective film 31 including the upper wiring 34 by a screen printing method, a spin coating method, or the like. In this case, an opening 19 is formed in the overcoat film 18 in a portion corresponding to the connection pad portion of the upper wiring 34.

  Next, the solder ball 20 is formed in the opening 19 of the overcoat film 18 and above it by connecting it to the connection pad of the upper wiring 34. Next, as shown in FIG. 13, when the overcoat film 18, the upper protective film 31, the sealing film 10, the protective film 5, the insulating film 3, and the semiconductor wafer 21 are cut along the dicing line 22, FIG. A plurality of the semiconductor devices shown are obtained.

  In the semiconductor device thus obtained, the upper protective film 31 made of polyimide resin or the like applied between the sealing film 10 including the columnar electrode 9 and the solder ball 20 is provided. In addition, the stress can be relieved by the applied upper protective film 31 made of polyimide resin or the like, so that cracks are less likely to occur at the interface between the solder ball 20 and the connection pad portion of the upper wiring 35. can do.

1 is a cross-sectional view of a semiconductor device as a first embodiment of the present invention. Sectional drawing of what was initially prepared in the manufacturing method of the semiconductor device shown in FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the semiconductor device as 2nd Embodiment of this invention. Sectional drawing of a predetermined | prescribed process in the manufacturing method of the semiconductor device shown in FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG. Sectional drawing of the process following FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Silicon substrate 2 Connection pad 3 Insulating film 5 Protective film 7 Base metal layer 8 Wiring 9 Columnar electrode 10 Sealing film 11 1st surface treatment layer 12 2nd surface treatment layer 13 Upper layer protective film 14 Adhesive layer 17 Upper layer wiring 18 Overcoat film 20 Solder ball 21 Semiconductor wafer 31 Upper layer protective film 33 Upper layer base metal layer 34 Upper layer wiring

Claims (17)

  A semiconductor substrate, a plurality of columnar electrodes provided on the semiconductor substrate, a sealing film provided around the columnar electrode on the semiconductor substrate, and provided on the sealing film, An upper protective film made of a resin having an opening in a portion corresponding to the upper surface, and an upper wiring provided on the upper protective film so as to be connected to the upper surface of the columnar electrode via the opening of the upper protective film; A semiconductor device comprising: a solder ball provided on a connection pad portion of the upper layer wiring.   2. The semiconductor device according to claim 1, wherein the upper protective film is made of a resin film.   3. The semiconductor device according to claim 2, wherein the resin film is any one of a polyimide resin, a silicone resin, an epoxy resin, and a glass base epoxy resin.   3. The semiconductor device according to claim 2, wherein the upper protective film is bonded to the upper surface of the sealing film via an adhesive layer.   3. The semiconductor device according to claim 2, wherein the upper wiring is formed by patterning a metal foil laminated on the upper surface of the upper protective film.   6. The semiconductor device according to claim 5, wherein the upper layer wiring is thermocompression bonded to a surface treatment layer provided on the columnar electrode through an opening of the upper layer protective film.   2. The semiconductor device according to claim 1, wherein the upper protective film is formed of a coated resin film.   8. The semiconductor device according to claim 7, wherein the upper layer wiring is formed by electrolytic plating.   The semiconductor device according to claim 1, further comprising an overcoat film that covers a portion other than the connection pad portion of the upper wiring. Forming a plurality of columnar electrodes and a sealing film covering the periphery of the columnar electrodes on the upper surface side of the semiconductor wafer;
An upper protective film made of a resin film having an opening at a portion corresponding to the upper surface of the columnar electrode is disposed on the sealing film, and an upper wiring formed in advance on the upper surface of the upper protective film is disposed on the upper layer. Connecting to the upper surface of the columnar electrode through the opening of the protective film;
Forming solder balls on the connection pads of the upper layer wiring;
Cutting the semiconductor wafer, the sealing film and the upper protective film to obtain a plurality of semiconductor devices;
A method for manufacturing a semiconductor device, comprising:   11. The method of manufacturing a semiconductor device according to claim 10, wherein the upper protective film is bonded to the upper surface of the sealing film via an adhesive layer.   11. The method of manufacturing a semiconductor device according to claim 10, wherein the upper layer wiring is formed by patterning a metal foil laminated on the upper surface of the upper layer protective film.   The semiconductor device according to claim 10, wherein the resin film is any one of a polyimide resin, a silicone resin, an epoxy resin, and a glass base epoxy resin.   11. The method of manufacturing a semiconductor device according to claim 10, wherein the upper layer wiring is thermocompression bonded to a surface treatment layer provided on the columnar electrode. 15. The method of manufacturing a semiconductor device according to claim 14, wherein the surface treatment layer is made of nickel which is a first surface treatment layer and gold which is a second surface treatment layer.
Forming a plurality of columnar electrodes and a sealing film covering the periphery of the columnar electrodes on the upper surface side of the semiconductor wafer;
Forming an upper protective film made of a resin having an opening in a portion corresponding to the upper surface of the columnar electrode on the sealing film;
Forming upper layer wiring on the upper surface of the upper layer protective film by connecting to the upper surface of the columnar electrode through the opening of the upper layer protective film;
Forming solder balls on the connection pads of the upper layer wiring;
Cutting the semiconductor wafer, the sealing film and the upper protective film to obtain a plurality of semiconductor devices;
A method for manufacturing a semiconductor device, comprising:   17. The semiconductor device manufacturing method according to claim 10, further comprising a step of forming an overcoat film covering a portion other than the connection pad portion of the upper wiring before the step of forming the solder ball. Method.

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