JP2008052724A - Semiconductor apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve a problem for requesting an IC tag which is attached to a paper sheet base material to withstand stroke pressure of 10 MPa or more because the stroke pressure when a character is written by a ballpoint pen is such large. <P>SOLUTION: A second structural body formed by ceramics etc. is simultaneously mounted when an integrated circuit in which a functional circuit for performing transmission/reception, calculation, and memorizing relating to information is formed therein is performed thickness reduction while the structural body in which the integrated circuit and an antenna or a wiring are formed is attached therein. Duration relating to pressure and bending stress to be added from outside can be established by using the second structural body formed by the ceramics etc. Then a part of a passive element included in the semiconductor circuit can be moved to the second structural body, thereby a semiconductor apparatus can be obtained in a small area. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

The present invention relates to an information record carrier used for information technology called RFID (Radio Frequency Identification). Specifically, the present invention relates to a semiconductor device that can input and output information using electromagnetic waves and is also called an IC tag.

Information communication technology (Information Technology) called RFID (Radio Frequency Identification) is in widespread use. For example, there is known an IC tag that stores data in a tag having an external dimension of several centimeters and communicates with a reader by wireless communication. The IC tag includes an antenna and an IC chip on which a communication circuit and a memory are formed.

As a form of the IC tag, one in which an antenna or an IC chip is inserted in paper is known. For example, in order to embed an IC tag in a thickness of 200 μm or less in an adherend such as paper, a metal layer for forming a wiring pattern or an antenna is placed in an area where an IC chip or the like is mounted more than other areas. A thin film is known (see Patent Document 1). Also, a structure is disclosed in which the thickness of the IC tag is set to 60 to 70 μm in order to insert the IC tag into the paper base (see Patent Document 2).
JP 2002-049901 A (page 3, FIG. 1) Japanese Patent Laying-Open No. 2005-350823 (page 5, FIG. 1)

By the way, there are various types of commercially available paper. For example, the thickness of A4 size copy paper is 80 to 90 μm. In order to insert an IC tag into such general paper without a sense of incongruity, the thickness of the IC tag needs to be less than half that of the paper substrate. However, when the IC tag is made thinner, it becomes a problem that the IC tag is likely to be broken by a pressing force or a bending stress.

When the IC tag is attached to the surface or inside of the paper substrate, care must be taken not to damage the IC tag in the manufacturing process. Furthermore, the surface of the paper substrate is required to be printable or writable with a writing instrument. For example, the writing pressure when writing characters with a ballpoint pen is 10 MPa or more. The IC tag mounted on the paper base material is required to withstand such writing pressure.

In view of the above, an object of the present invention is to maintain a required function while maintaining durability even when an IC tag or a semiconductor device having a function equivalent to the IC tag is thinned.

The present invention reduces the thickness of an integrated circuit in which a functional circuit that performs processing such as transmission / reception of information, calculation, and storage is formed and attaches the integrated circuit to a structure in which an antenna or wiring is bonded. The gist is to simultaneously attach the second structure formed by the above method.

The thinned integrated circuit uses a semiconductor substrate having a structure in which an upper layer side and a lower layer side of a semiconductor layer having a thickness of 5 nm to 200 nm are sandwiched between insulating layers and a thickness of 1 μm to 100 μm, preferably 10 μm to 50 μm. An integrated circuit formed in the same manner. In a semiconductor device including a thin integrated circuit and an antenna, the second structure body formed of ceramics or the like can be used to have resistance against externally applied pressure and bending stress.

A wiring for connecting the antenna and the integrated circuit may be formed in the second structure body. Moreover, you may form passive components, such as a resistor, a capacitor | condenser, and a coil. For example, a capacitor in which a plurality of dielectric layers each having a thickness of 0.1 to 1 μm are stacked may be included in the second structure.

As described above, by forming part of the circuit elements necessary for the operation of the semiconductor device in the second structure, part of the functions included in the integrated circuit can be transferred to the second structure. .

According to the present invention, the rigidity of a semiconductor device can be increased by using a structure formed of ceramics or the like. Accordingly, even when the IC tag or a semiconductor device having a function equivalent to that of the IC tag is thinned, the required function can be maintained while maintaining the robustness. For example, it is possible to prevent a malfunction due to stress applied to the integrated circuit even when a pointed object such as a pen tip is pressed. Further, resistance to bending stress can be imparted. Further, by forming a connection wiring on a structure formed of ceramics or the like and connecting the antenna and the integrated circuit, it is possible to prevent the connection portion from being disconnected even when bending stress is applied to cause malfunction.

Embodiments of the present invention will be described below with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in the structures of the present invention described below, the same reference numerals may be used in common in different drawings.

One embodiment of a semiconductor device according to the present invention includes an integrated circuit in which an antenna is formed and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers and an active element is formed in the semiconductor layer And a second structure that is more rigid than the first structure. This second structure is used to connect the first structure on which the antenna is formed and the integrated circuit. In this case, it is preferable that an electrode for connecting the antenna and the integrated circuit is formed on the second structure body.

FIG. 1 shows an example of such a semiconductor device. The first structure body 101 is formed of an insulating material. As the insulating material, various materials such as a plastic sheet, a plastic film, a glass epoxy resin, a glass plate, paper, and a nonwoven fabric can be applied. The first structure has a thickness of 1 μm to 100 μm, preferably 5 μm to 30 μm.

An antenna 106 is formed of a conductive material on at least one surface of the first structure body 101. The antenna structure is preferably different depending on the communication frequency band used by the semiconductor device. When applying a frequency in a short wave band (electromagnetic wave having a frequency of 1 to 30 MHz), an ultra short wave band (electromagnetic wave having a frequency of 30 to 300 MHz), or an ultra high frequency band (electromagnetic wave having a frequency of 0.3 to 3 GHz), an antenna suitable for the frequency The shape may be used. FIG. 1 shows a dipole antenna, which is an antenna suitable for ultra-high frequency band and ultra-high frequency band communication. As the antenna, a monopole antenna, a patch antenna, a spiral antenna, a loop antenna, or the like can be applied in addition to the dipole antenna shown in FIG.

The antenna 106 is provided with an antenna terminal 108 for connection with the integrated circuit 104. The integrated circuit 104 is arranged so that at least a part thereof overlaps with the first structure body 101. In order to strengthen the connection between the first structure body 101 and the integrated circuit 104, the second structure body 102 is used as a coupling body. An example of this connection structure will be described with reference to a cross-sectional structure taken along the line AB in FIG.

FIG. 2 shows a cross-sectional structure of the semiconductor device taken along the line AB in FIG. The second structure 102 is disposed so as to face the surface of the first structure 101 where the antenna terminal 108 is formed. The integrated circuit 104 is disposed to face the other surface of the second structure body 102. In the second structure 102, a through electrode 110 is formed at a position corresponding to the antenna terminal 108. The through electrode 110 is formed on the other surface of the second structure 102 so as to be connected to the connection electrode 112 of the integrated circuit 104. The through electrode 110 is formed in the through hole formed in the second structure 102 using a metal foil or a metal paste.

The second structure body 102 is formed with a thickness of 1 μm to 50 μm, preferably 5 μm to 30 μm, and is preferably harder than the first structure body 101. The second structure 102 is more preferably tough and elastic to a certain bending stress. When the first structure 101 is formed of a flexible material such as a plastic film or a nonwoven fabric, the bending stress can be dispersed by giving the second structure 102 a certain elastic force. Because. Thereby, it is possible to eliminate a failure in which the antenna terminal 108 and the connection electrode 112 connected through the through electrode 110 are disconnected. In addition, by forming the through electrode 110 inside the second structure body 102, the integrated circuit 104 can be downsized.

As the second structure body 102, a hard plastic, glass, or the like can be used as an insulating material, but a ceramic material is particularly preferable. This is because ceramic materials have a wide selection of materials in order to exhibit the above-described characteristics, and a plurality of ceramics can be combined and combined.

As a representative example of the ceramic material, it is preferable to use alumina (Al ₂ O ₃ ) as a highly insulating material. Moreover, it is preferable to use barium titanate (BaTiO ₃ ) as the high-capacity material. In order to give priority to mechanical strength, it is preferable to use alumina (Al ₂ O ₃ ), titanium oxide (TiO _x ), silicon carbide (SiC), tempered glass, or crystallized glass. Further, it is preferable to use composite ceramics obtained by adding SiC nanoparticles to Si ₃ N _{4 or} composite ceramics containing hexagonal BN because high strength, oxidation resistance, and high toughness can be obtained.

Such a ceramic material may be used, and a thickness of one layer may be 0.1 μm to 2 μm, and a plurality of layers may be stacked. That is, a multilayer capacitor may be formed inside by forming electrodes on each layer as a multilayer substrate. Further, passive elements such as a coil and a resistor may be incorporated in the second structure body by using a ceramic material.

The integrated circuit 104 is formed using an active element formed using a semiconductor layer having a thickness of 5 nm to 500 nm, preferably 30 nm to 150 nm. Insulating layers are formed on the lower and upper layers of the semiconductor layer. These insulating layers are used as a layer for protecting the semiconductor layer. Further, it may be used as a functional layer like a gate insulating layer. A typical example of an active element is a field effect transistor. Since the semiconductor layer is a thin film as described above, the field effect transistor formed here is also called a thin film transistor. As the semiconductor layer, a crystalline semiconductor layer obtained by crystallizing a semiconductor layer formed by a vapor deposition method, a sputtering method, or the like by heat treatment and / or irradiation with an energy beam such as a laser beam is preferably used. This is because the field-effect mobility of the field-effect transistor is 30 to 500 cm ² / V · sec (electrons) due to the crystalline semiconductor layer, and the logic circuit can be operated. Of course, the integrated circuit may include circuit elements such as resistors, capacitors, and coils in addition to the active elements.

In the integrated circuit 104, various functional circuits such as a high-frequency circuit, an oscillation circuit, and an arithmetic processing circuit can be formed by forming wirings in an upper layer and / or a lower layer of a semiconductor layer. The integrated circuit 104 includes a semiconductor layer, an insulating layer, and a layer for forming a wiring, and is preferably formed with a total thickness of 0.5 to 5 μm. By forming with this thickness, the semiconductor device can be made thinner. Further, resistance to bending stress can be provided. In this case, the resistance to bending stress can be improved by forming the semiconductor layer in an island shape. Alternatively, the integrated circuit may be formed on a predetermined substrate, and then the substrate and the integrated circuit are separated, whereby the integrated circuit may be thinned. In this manner, a semiconductor device having a thickness of 2 μm to 150 μm, preferably 10 to 60 μm can be obtained.

Further, with the above configuration, the semiconductor device 100 can be bent with a restoring force within a certain range as shown in FIG. For example, even when a pointed object having a curvature Rb hits like a pen tip of a ballpoint pen, the semiconductor device can be curved to a curvature Rc. The relationship between Rb and Rc is Rb << Rc, for example, 3Rb ≦ Rc.

The first structure body 101 and the second structure body 102 are fixed with an adhesive 114 so that the antenna terminal 108 and the through electrode 110 are electrically connected. For example, an acrylic, urethane, or epoxy adhesive in which conductive particles are dispersed can be used as the adhesive 114. Alternatively, the connection between the antenna terminal 108 and the through electrode 110 may be formed with a conductive paste or a solder paste, and an acrylic, urethane, or epoxy adhesive may be formed and hardened at other portions. The same applies to the second structure 102 and the integrated circuit 104, and the through electrode 110 and the connection electrode 112 are fixed so as to be electrically connected.

The sealant 116 is preferably formed of an acrylic, urethane, phenol, epoxy, or silicone resin material and provided to protect the integrated circuit 104. The sealing material 116 is preferably formed so as to cover the integrated circuit 104 and so as to cover the side surfaces of the integrated circuit 104 and the second structure body 102. The sealing material 116 can prevent the integrated circuit 104 from being damaged. In addition, the adhesive strength between the integrated circuit 104, the second structure body 102, and the first structure body 101 can be increased.

FIG. 3 shows a different structure of the second structure body from FIG. FIG. 3 shows a structure in which the side via electrode 111 that electrically connects the antenna terminal 108 and the connection electrode 112 is provided via the side end portion of the second structure body 102. According to this structure, since it is not necessary to perform special processing on the second structure body 102, the side surface via electrode 111 can be easily attached. The side via electrode 111 may be formed by printing, plating, or attaching a metal foil. By forming the side surface via electrode 111 by such a method, the second structure 102 can be thinned. The second structure body 102 can be formed of a hard plastic, glass, ceramics, or composite ceramic material, and elements such as capacitors, coils, and resistors can be formed therein. Also in the case of FIG. 3, the first structure body 101, the second structure body 102, and the integrated circuit 104 are fixed with an adhesive material 114. In addition, a sealing material 116 is preferably formed.

FIG. 4 shows a structure in which the antenna terminal 108 of the first structure body 101 and the connection electrode 112 of the integrated circuit 104 are arranged to face each other and connected. The second structure 102 is disposed on the back surface to protect the integrated circuit 104. In the case where a passive element such as a capacitor, a coil, or a resistor is formed in the second structure body 102 to supplement the function of the integrated circuit 104, the back surface connection electrode 113 is formed in the integrated circuit 104, and the second structure body 102 It may be electrically connected to the connection electrode 115. The first structure body 101, the second structure body 102, and the integrated circuit 104 are preferably fixed with an adhesive material 114. In the configuration of FIG. 4, the second structural body 102 is provided on the back surface of the integrated circuit 104; therefore, the sealing material 116 may be provided as appropriate.

As described above, the semiconductor device according to the present invention can increase the rigidity of the semiconductor device by using a structure formed of ceramics or the like. Accordingly, even when the IC tag or a semiconductor device having a function equivalent to that of the IC tag is thinned, the required function can be maintained while maintaining the robustness. By forming a wiring for connection in a structure formed of ceramics or the like and connecting the antenna and the integrated circuit, it is possible to prevent malfunction due to disconnection of the connection portion even when bending stress is applied.

In this embodiment, an example of a semiconductor device in which a first structure body in which an antenna is formed, a second structure body in which a capacitor portion is formed, and an integrated circuit are combined will be described with reference to FIGS. 5 is a plan view of the semiconductor device, and FIG. 6 is a cross-sectional view corresponding to the line AB and the line CD.

FIG. 5A illustrates a mode in which a coiled antenna 106 is formed in the first structure body 101. The first structure 101 is made of PET (polyethylene terephthalate), PEN (polyethylene naphthalate), PES (polyethersulfone), polypropylene, polypropylene sulfide, polycarbonate, polyetherimide, polyphenylene sulfide, polyphenylene oxide, polysulfone, polyphthalamide. It is made of a plastic material such as acrylic or polyimide, or an insulating material such as nonwoven fabric or paper.

The antenna 106 is formed on the first structure body 101 by a printing method, a plating method, or the like using a low-resistance metal material such as copper, silver, or aluminum. In FIG. 5, the antenna 106 has a coil shape, which is suitable when an electromagnetic induction method (for example, 13.56 MHz band) is applied. When a microwave method (for example, UHF band (860 to 960 MHz band), 2.45 GHz band, or the like) is applied, the length of a conductive layer that functions as an antenna in consideration of the wavelength of an electromagnetic wave used for signal transmission, etc. The shape may be set as appropriate. In this case, a monopole antenna, a dipole antenna, a patch antenna, or the like may be formed.

FIG. 5A shows a state in which the second structure body 102 and the integrated circuit 104 are provided in accordance with the antenna terminal 108. FIG. 5B is a plan view of the second structure body 102, and FIG. 5C is a plan view of the integrated circuit 104. The external dimensions of the second structure body 102 and the integrated circuit 104 are preferably substantially the same. Alternatively, the external dimension of the integrated circuit 104 may be smaller than that of the second structure body 102.

The second structure body 102 is preferably formed of a ceramic material. A through electrode 110 and a capacitor electrode 118 are formed in the second structure body 102. In the integrated circuit 104, a connection electrode 112 connected to the antenna terminal 108 and a capacitor portion connection electrode 117 connected to the capacitor electrode 118 are formed. Next, details of a connection structure between the second structure body 102 and the integrated circuit 104 will be described with reference to FIGS.

FIG. 6A shows a cross-sectional view corresponding to the line AB. The first structure body 101 and the integrated circuit 104 are connected by a through electrode 110 formed in the second structure body 102. These are fixed by an adhesive material 114. The second structure body 102 is laminated so that the dielectric layer 119 and the layer on which the capacitor electrode 118 is formed are alternately engaged with each other. Thus, a capacitor is formed by stacking the dielectric layer 119 and the capacitor electrode 118.

The dielectric layer 119 is formed by applying a ceramic paste containing a binder compound, a plasticizer, and an organic solvent to a ceramic material such as barium titanate (BaTiO ₃ ), strontium titanate (SrTiO ₃ ), or a lead composite perovskite compound material. It is formed by firing. An electrode paste selected from copper or copper alloy, nickel or nickel alloy, silver or silver alloy, tin or tin alloy is printed thereon to form a capacitive electrode. In addition, when forming a penetration electrode, it is set as the shape by which an opening is formed in the applicable position. After these are dried, they are divided into a predetermined size, and a plurality of layers are laminated so that the capacitive electrodes bite alternately. This is sandwiched between protective layers 120 made of a ceramic material, and subjected to binder removal, firing and heat treatment.

In FIG. 6, the dielectric layer 119 and the capacitor electrode 118 can be formed to a thickness of 0.1 to 1 μm by using nanoparticles. Accordingly, when five dielectric layers 119 having a thickness of 0.2 μm are stacked, the thickness becomes 1 μm. Further, even if ten dielectric layers 119 having a thickness of 0.1 μm are stacked, a thickness of 1 μm can be obtained.

FIG. 6B is a cross-sectional view corresponding to the CD cut line and shows the structure of the capacitor electrode 118 and the capacitor portion connection electrode 117 of the integrated circuit 104. In the second structure 102, the capacitor electrode 118 formed on the outer peripheral portion is subjected to nickel plating, tin plating, or the like. The capacitor electrode 118 and the capacitor portion connection electrode 117 can be connected with an adhesive material 114.

As described above, a semiconductor device including a first structure body in which an antenna is formed, a second structure body in which a capacitor portion is formed, and an integrated circuit is obtained. By using the second structure body formed of ceramics or the like, the rigidity of the semiconductor device can be increased. Accordingly, even when the IC tag or a semiconductor device having a function equivalent to that of the IC tag is thinned, the required function can be maintained while maintaining the robustness. By forming a wiring for connection in a structure formed of ceramics or the like and connecting the antenna and the integrated circuit, it is possible to prevent malfunction due to disconnection of the connection portion even when bending stress is applied.

In this embodiment, an example of a semiconductor device including a first structure body in which an antenna is formed, a second structure body in which a capacitor portion is formed, an integrated circuit, and a ceramic antenna 122 is described with reference to FIGS. I will explain. 7 is a plan view of the semiconductor device, and FIG. 8 is a cross-sectional view corresponding to the EF cutting line and the GH cutting line.

In FIG. 7A, a coiled antenna 106 is formed in the first structure body 101. The shape of the antenna 106 can be changed as appropriate according to the frequency band used for communication as in the first embodiment.

FIG. 7A illustrates a structure in which the second structure 102, the integrated circuit 104, and the ceramic antenna 122 are provided in accordance with the antenna terminal 108. FIG. 7B is a plan view of the second structure body 102, FIG. 7C is a plan view of the integrated circuit 104, and FIG. 7D is a plan view of the ceramic antenna 122. The outer dimensions of the second structure 102, the integrated circuit 104, and the ceramic antenna 122 are preferably substantially the same. Alternatively, the external dimensions of the integrated circuit 104 may be smaller than those of the second structure 102 and the ceramic antenna 122.

The second structure 102 is formed of a ceramic material, and the through electrode 110 and the capacitor electrode 118 are formed. In the integrated circuit 104, a connection electrode 112 connected to the antenna terminal 108, a capacitor portion connection electrode 117 connected to the capacitor electrode 118, and a ceramics antenna connection electrode 127 connected to the ceramics antenna 122 are formed. Next, details of a connection structure between the second structure body 102 and the integrated circuit 104 will be described with reference to FIGS.

FIG. 8A shows a cross-sectional view corresponding to the EF cutting line. As in the first embodiment, the second structure 102 has a capacitor portion made of a ceramic material. A structure including the through-electrode 110 that connects the antenna terminal 108 of the first structure body 101 and the connection electrode 112 of the integrated circuit 104 is similar to FIG. A ceramic antenna 122 is disposed on the back surface of the integrated circuit 104. The second structural body 102 and the ceramic antenna 122 sandwiching the integrated circuit 104 also have a function as a protective layer.

FIG. 8B is a cross-sectional view corresponding to the GH cutting line, and shows a connection structure between the integrated circuit 104 and the ceramic antenna 122. In the ceramic antenna 122, a reflector 124 is formed on one side of the dielectric 125 (on the integrated circuit 104 side), and a grounding body 126 is formed on the other side. A ceramic antenna connection electrode 127 is formed on the integrated circuit 104, and a reflector 124 and a power feeder 123 are connected to the ceramic antenna connection electrode 127. The grounding body 126 may be formed with a slit for improving directivity. The grounding body 126 and the power feeding body 123 are arranged with a gap and are capacitively coupled.

The ceramic antenna 122 can be used for power feeding, and power necessary for the operation of the integrated circuit can be stored in the capacitor portion formed in the second structure 102. In this case, since the information communication antenna is formed in the first structure body 101, the capacity portion of the second structure body 102 is arbitrarily charged regardless of the presence or absence of a communication signal. be able to. As a result, sufficient electric power required for the operation of the integrated circuit can be stored.

As described above, a semiconductor device is obtained by combining the first structure body in which the antenna is formed, the second structure body integrated circuit in which the capacitor portion is formed, and the ceramic antenna. By using the second structure body and the ceramic antenna formed of ceramics or the like, the rigidity of the semiconductor device can be increased. Accordingly, even when the IC tag or a semiconductor device having a function equivalent to that of the IC tag is thinned, the required function can be maintained while maintaining the robustness. By forming a wiring for connection in a structure formed of ceramics or the like and connecting the antenna and the integrated circuit, it is possible to prevent malfunction due to disconnection of the connection portion even when bending stress is applied.

In this embodiment, an example of a semiconductor device provided with a booster coil for extending the communication distance will be described with reference to FIGS. The semiconductor device according to the present embodiment includes an integrated circuit including a primary antenna, a second structure including a secondary antenna that is electromagnetically coupled to the primary antenna, and a tertiary that is electromagnetically coupled to the reader / writer device. It is comprised with the 1st structure provided with the antenna. 9 is a plan view of the semiconductor device, and FIG. 10 is a cross-sectional view corresponding to a JK cut line and an LM cut line.

In FIG. 9A, a tertiary antenna 105 that is electromagnetically coupled to the reader / writer device is formed in the first structure 101. The tertiary antenna 105 is manufactured in the same manner as in the first embodiment.

A second structure 102 and an integrated circuit 104 are provided in accordance with the antenna terminal 108. FIG. 9B is a plan view of the second structure body 102, and FIG. 9C is a plan view of the integrated circuit 104. The second structure body 102 is made of hard plastic, glass, glass fiber reinforced plastic, a ceramic material, or the like. A secondary antenna 107 is formed in the second structure body 102, and an antenna connection terminal 121a and an antenna connection terminal 121b are provided. A coupling capacitor 103 provided between the secondary antenna 107 and the tertiary antenna 105 is also formed in the second structure 102.

A primary antenna 109 is formed in the integrated circuit 104. The integrated circuit 104 and the second structure body 102 are arranged so as to overlap each other, and the primary antenna 109 and the secondary antenna 107 are arranged to be electromagnetically coupled. In this manner, by forming the primary antenna 109 in the integrated circuit 104, it is not necessary to form an electrode for connecting to the secondary antenna 107 or the tertiary antenna 105. Thereby, failure due to poor contact of the electrodes can be prevented. In addition, the external dimensions of the second structure body 102 and the integrated circuit 104 are preferably substantially the same. Alternatively, the external dimension of the integrated circuit 104 may be smaller than that of the second structure body 102.

An equivalent circuit of a semiconductor device having such a primary antenna 109, secondary antenna 107, and tertiary antenna 105 is shown in FIG. Next, a connection structure of the first structure body 101, the second structure body 102, and the integrated circuit 104 will be described in detail with reference to FIG.

FIG. 10A shows a cross-sectional view corresponding to the line J-K. In the second structure body 102, a plurality of insulating layers such as ceramics are stacked, and an integrated circuit side secondary antenna 107a and a first structure side secondary antenna 107b are formed therebetween. The integrated circuit side secondary antenna 107a and the first structure side secondary antenna 107b are formed so as to overlap at least partially in order to be electromagnetically coupled.

As shown in FIG. 10B, the integrated circuit side secondary antenna 107a and the first structure side secondary antenna 107b are formed with an insulating layer of ceramics or the like interposed therebetween, and a through hole 128 formed in the insulating layer. Connected with. Thus, by forming the secondary antenna 107 in a plurality of layers, the number of turns can be increased, and the sensitivity in electromagnetic coupling and the communication distance can be increased.

The secondary antenna 107 (including the integrated circuit side secondary antenna 107a and the first structure side secondary antenna 107b) and the electrode of the coupling capacitor 103 in the second structure body 102 are manufactured in the same manner as in the first embodiment. Can do. The antenna connection terminal 121 a provided on the outer periphery of the second structure 102 is formed so as to be in contact with the electrode of the coupling capacitor 103. The antenna connection terminal 121b is formed in contact with the terminal of the integrated circuit side secondary antenna 107a. That is, the secondary antenna 107 (including the integrated circuit side secondary antenna 107a and the first structure side secondary antenna 107b) sandwiched between the insulating layers and a part of the electrode of the coupling capacitor 103 are exposed at the end portions. The antenna connection terminal 121a and the antenna connection terminal 121b may be formed there.

As described above, by forming the secondary antenna 107 that is electromagnetically coupled to the primary antenna 109 formed in the integrated circuit 104 in the second structure body 102, signal transmission and reception can be performed without providing the connection electrode in the integrated circuit 104. It can be performed. Further, the communication distance can be controlled by adjusting the number of turns (inductance) of the secondary antenna 107 and the tertiary antenna 105. Further, the second structure body 102 that forms the secondary antenna 107 is formed of a ceramic material, whereby the integrated circuit 104 can be protected.

An example of a structure of an integrated circuit that can store data like an IC tag and can be used to identify an individual will be described with reference to FIG. This embodiment can be applied as the integrated circuit described above.

FIG. 12 shows a block diagram of the integrated circuit 104. This integrated circuit includes an analog circuit unit 130 including a data transmission / reception and power supply circuit, and a digital circuit unit 132 including a logic circuit and a memory unit. The analog circuit unit 130 includes a demodulation circuit 134, a modulation circuit 133, a rectifier circuit 135, and a constant voltage circuit 136. The connection electrode 112 is a terminal for connecting to an antenna. The connection electrode 112 is connected to the rectifier circuit 135, the modulation circuit 133, and the demodulation circuit 134.

The demodulation circuit 134 has an LPF (Low Pass Filter), and is a circuit that extracts data from a communication signal. The modulation circuit 133 is a circuit that superimposes a digital signal for return output from the logic circuit on a communication signal by, for example, the Manchester method, and is used when data is transmitted. The oscillation circuit 138 generates a clock signal necessary for the operation of the logic circuit. The reset circuit 139 is a circuit that generates a reset signal in accordance with a specific timing of the transmission / reception signal.

The rectifier circuit 135 is a circuit that rectifies a part of the received signal and charges the capacitor unit 137. The power supply voltage for driving the digital circuit unit 132 and the like is supplied from the capacitor unit 137. In this case, the voltage may be supplied after stabilizing the voltage via the constant voltage circuit 136. The capacitor portion 137 is not formed in the integrated circuit 104 but is formed in the second structure as shown in Embodiments 1 to 3. The capacitance of the capacitor portion 137 is preferably 1000 pF or more. However, if the capacitor portion is formed in the second structure body, a capacitor necessary for the operation of the integrated circuit can be easily obtained.

The digital circuit unit 132 includes a logic circuit 140 and a memory unit 141. The logic circuit 140 includes an arithmetic processing circuit, a wireless communication interface, a clock control circuit, a control register, a reception data register, a transmission data register, a memory controller, and the like. The demodulation circuit 134 and the modulation circuit 133 transmit and receive signals to and from the control register, reception data register, and transmission data register via the wireless communication interface. The memory unit 141 includes a read only memory (ROM). When the write-once memory unit 141 to which data can be added or changed can be configured, a nonvolatile memory may be included. As the nonvolatile memory, a floating gate nonvolatile memory, a charge trap nonvolatile memory, a ferroelectric memory, or the like can be applied.

As described above, the capacitor 137 that has been conventionally formed in the integrated circuit 104 is formed in the second structure as shown in the first to third embodiments, so that the area of the integrated circuit 104 is reduced. be able to. For example, in order to secure a capacitance of 2000 pF as the capacitor portion 137, the integrated circuit 104 occupies 25% of the area. However, according to the present invention, the area can be reduced and the semiconductor device can be downsized. . In addition, the area conventionally used for the capacitor portion 137 can be used as the memory portion. Thereby, the storage capacity of the semiconductor device can be increased.

An example of a semiconductor device having an arithmetic function capable of transmitting and receiving data without contact will be described with reference to FIGS. This embodiment can be applied as the above-described integrated circuit.

FIG. 13 shows a block diagram of the integrated circuit 104. The integrated circuit 104 includes an analog circuit unit 130 and a digital circuit unit 132. The analog circuit unit 130 includes a resonance circuit 142 having a resonance capacitance, a rectifier circuit 135, a constant voltage circuit 136, a reset circuit 139, an oscillation circuit 138, a demodulation circuit 134, and a modulation circuit 133. The digital circuit unit 132 includes an RF interface 143, a control register 144, a clock controller 145, a CPU interface 146, a CPU 147, a RAM 148, and a ROM 149.

The operation of the integrated circuit 104 having such a configuration is roughly as follows. The communication signal input from the connection electrode 112 generates an induced electromotive force by the resonance circuit 142. The induced electromotive force is charged in the capacitor unit 137 through the rectifier circuit 135. Similar to the fourth embodiment, the capacitor portion 137 is formed in the second structure separately from the integrated circuit 104. Accordingly, a sufficient capacity necessary for the operation of the integrated circuit 104 can be ensured. The power stored in the capacitor 137 is consumed by the operation of the integrated circuit 104. The voltage supplied from the capacitor 137 is stabilized by the constant voltage circuit 136.

The reset circuit 139 generates a signal that resets and initializes the digital circuit unit 132. For example, a signal that rises after a rise in the power supply voltage is generated as a reset signal. The oscillation circuit 138 changes the frequency and duty ratio of the clock signal in accordance with the control signal generated by the constant voltage circuit 136. The demodulating circuit 134 formed by a low-pass filter binarizes fluctuations in the amplitude of an amplitude modulation (ASK) reception signal, for example. The modulation circuit 133 transmits the transmission data by changing the amplitude of an amplitude modulation (ASK) transmission signal. The modulation circuit 133 changes the amplitude of the communication signal by changing the resonance point of the resonance circuit 142. The clock controller 145 generates a control signal for changing the frequency and duty ratio of the clock signal in accordance with the power supply voltage or the current consumption in the CPU 147. The power supply management circuit 150 monitors the power supply voltage.

A communication signal input from the connection electrode 112 to the integrated circuit 104 is demodulated by the demodulation circuit 134 and then decomposed into a control command and data by the RF interface 143. The control command is stored in the control register 144. The control command includes reading of data stored in the ROM 149, writing of data to the RAM 148, calculation instructions to the CPU 147, and the like. The CPU 147 accesses the ROM 149, the RAM 148, and the control register 144 via the CPU interface 146. The CPU interface 146 has a function of generating an access signal for any one of the ROM 149, the RAM 148, and the control register 144 from an address requested by the CPU 147.

As a calculation method of the CPU 147, a method in which an OS (operating system) is stored in the ROM 149 and a program is executed by the CPU can be employed. Further, it is also possible to adopt a method in which an arithmetic circuit is configured by a dedicated circuit and arithmetic processing is processed in hardware. In the system using both hardware and software, a system in which a part of processing is performed by a dedicated arithmetic circuit and the CPU executes the remaining arithmetic using a program can be applied.

In any case, stable operation can be ensured by increasing the capacity of the capacitor 137 that supplies power necessary for the operation of the integrated circuit 104. In the semiconductor device according to this embodiment, a sufficient capacitance can be ensured by forming the capacitor portion 137 in the second structure different from the integrated circuit 104. In addition, the area of the integrated circuit 104 can be reduced. In addition, since the dielectric layer is formed of a material such as ceramics in the second structure body, the second structure body is resistant to bending stress, and prevents the capacitor portion 137 from being short-circuited to lose the accumulated charge. Can do.

In this embodiment, transistors that can be applied to the integrated circuits of Embodiments 1 to 5 will be described.

FIG. 14 illustrates a thin film transistor formed over a substrate 152 having an insulating surface. As the substrate, a glass substrate such as aluminosilicate glass, a quartz substrate, or the like is used. Although the thickness of the substrate 152 is 400 to 700 μm, it may be polished to be thinned to 5 to 100 μm. This is because the mechanical strength can be maintained by combining with the second structure 102 as shown in the first to third embodiments.

A first insulating layer 154 may be formed over the substrate 152 with silicon nitride or silicon oxide. The first insulating layer 154 has an effect of stabilizing the characteristics of the thin film transistor. The semiconductor layer 156 is preferably polycrystalline silicon. Further, the semiconductor layer 156 may be a single crystal silicon thin film in which a crystal grain boundary does not affect carrier drift in a channel formation region overlapping with the gate electrode 160.

As another structure, a structure in which the substrate 152 is formed using a silicon semiconductor and the first insulating layer 154 is formed using silicon oxide can be used. In this case, the semiconductor layer 156 can be formed of single crystal silicon. That is, an SOI (Silicon on Insulator) substrate can be applied.

The gate electrode 160 is formed over the semiconductor layer 156 with the gate insulating layer 158 interposed therebetween. Sidewalls may be formed on both sides of the gate electrode 160, whereby a low concentration drain may be formed in the semiconductor layer 156. The second insulating layer 162 is formed of silicon oxide, silicon oxynitride, or the like. This is a so-called interlayer insulating layer, and the first wiring 164 is formed on this layer. The first wiring 164 forms a contact with the source region and the drain region formed in the semiconductor layer 156.

Further, the third insulating layer 166 and the second wiring 168 are formed of silicon nitride, silicon oxynitride, silicon oxide, or the like. Although FIG. 14 shows the first wiring 164 and the second wiring 168, the number of stacked wirings may be appropriately selected according to the circuit configuration. As for the wiring structure, tungsten may be selectively grown in the contact hole to form a buried plug, or a copper wiring may be formed using a damascene process.

The connection electrode 112 is an electrode exposed on the outermost surface of the integrated circuit 104. Other regions are covered with the fourth insulating layer 170 so that the second wiring 168 is not exposed, for example. The fourth insulating layer 170 is preferably formed by applying silicon oxide in order to flatten the surface. The connection electrode 112 is formed by forming a copper or gold bump by a printing method or a plating method. This is to lower the contact resistance.

In this manner, by forming an integrated circuit using thin film transistors, an integrated circuit 104 that operates by receiving a communication signal in the microwave band (2.45 GHz) from the RF band (typically 13.56 MHz) is formed. Can do.

In this embodiment, another structure of a transistor which can be applied to the integrated circuits of Embodiments 1 to 5 is shown in FIG. In addition, the same code | symbol is used for the element which shows the same function as Example 6. FIG.

FIG. 15 shows a MOS (Metal Oxide Semiconductor) transistor, which is formed using a semiconductor substrate 172. As the semiconductor substrate 172, a single crystal silicon substrate is typically employed. Although the thickness of the semiconductor substrate 172 is 100 to 300 μm, it may be polished to be thinned to 10 to 100 μm. This is because the mechanical strength can be maintained by combining with the second structure 102 as shown in the first to third embodiments.

An element isolation insulating layer 174 is formed on the semiconductor substrate 172. The element isolation insulating layer 174 can be formed using a LOCOS (Local Oxidation of Silicon) technique in which a mask such as a nitride film is formed on the semiconductor substrate 172, and an oxide film for element isolation is formed by thermal oxidation. Alternatively, the element isolation insulating layer 174 may be formed by forming a trench in the semiconductor substrate 172 using an STI (Shallow Trench Isolation) technique, embedding an insulating film therein, and further planarizing. By using the STI technique, the side wall of the element isolation insulating layer 174 can be sharpened, and the element isolation width can be reduced.

An n-well 176 and a p-well 177 are formed in the semiconductor substrate 172, and an n-channel transistor and a p-channel transistor can be formed as a so-called double well structure. Alternatively, a single well structure may be used. The gate insulating layer 158, the gate electrode 160, the second insulating layer 162, the first wiring 164, the third insulating layer 166, the second wiring 168, the connection electrode 112, and the fourth insulating layer 170 are the same as in the sixth embodiment.

In this manner, by forming an integrated circuit using MOS transistors, an integrated circuit 104 that operates by receiving a communication signal in the microwave band (2.45 GHz) from the RF band (typically 13.56 MHz) is formed. be able to.

As described in Embodiments 1 to 7, the semiconductor device according to the present invention can be thinned, and the integrated circuit is protected by adding a structure such as ceramics. Even if it is included, it can be used without failure. Examples of paper media include, for example, banknotes, certified copy of family register, resident's card, passport, license, identification card, membership card, certificate, examination ticket, commuter pass, bill, check, freight exchange certificate, bill of lading, warehouse securities , Stock certificates, bonds, gift certificates, tickets, mortgage securities. Also, high-quality paper, ink-jet printing paper, and the like can function as anti-counterfeit paper. For example, the semiconductor device according to the present invention can be included in documents in which various confidential information such as contracts and specifications are described.

As described above, by using the semiconductor device according to the present invention, the paper medium can have more information than the information visually shown on the paper medium. For example, by applying such a paper medium to a product label or the like, it can be used to make a product management electronic system or prevent theft of a product. In the present embodiment, an example of paper according to the present invention will be described with reference to FIG. In addition, the paper or papers described below can be applied to similar materials such as non-woven fabrics, plastic films, etc., in addition to those made by adding plant fibers and adding resin or paste.

FIG. 17A is an example of bearer bonds 178 using paper including the semiconductor device 100. The bearer bonds 178 include stamps, tickets, tickets, admission tickets, gift certificates, book tickets, stationery tickets, various gift certificates, various service tickets, and the like. The identification of the bearer bonds 178 can be stored in the semiconductor device 100 to facilitate authentication. Since the semiconductor device 100 is resistant to a certain bending stress and does not break down even when a pointed object such as a pen tip is pressed, it does not hinder the transaction of goods.

FIG. 17B is an example of a certificate 179 (for example, a resident's card or a certified copy of a family register) that uses paper incorporating the semiconductor device 100 according to the present invention. By storing the identification information of the certificate 179 in the semiconductor device 100, it is possible to easily determine the authenticity. Further, the semiconductor device 100 is resistant to a certain bending stress and does not break down even when a pointed object such as a pen tip is pressed. Therefore, the semiconductor device 100 is used for proof even after the certificate document 179 is issued. Authentication information can be prevented from being falsified.

FIG. 17C shows an example of a label including the semiconductor device 100 according to the present invention. A label 181 (IC label) is formed on a label mount 180 (separate paper) with a sheet to which the semiconductor device 100 is attached. The label 181 can be provided by being stored in the packaging box 182. On the label 181, there is provided a printing surface for displaying information (product name, brand, trademark, trademark owner, seller, manufacturer, etc.) regarding the product or service. Since the semiconductor device 100 can store identification information unique to the product (or product type), illegal activities such as forgery, infringement of intellectual property rights such as trademark rights and patent rights, and unfair competition Can be easily grasped. The semiconductor device 100 has a large amount of information that cannot be clearly specified on the container or label of the product, for example, the product's production area, sales location, quality, raw material, efficacy, application, quantity, shape, price, production method, usage method, production It is possible to input time, use time, expiration date, instruction, intellectual property information about the product, and the like. Therefore, a trader and a consumer can access such information by a simple reader. In addition, by forming a memory area in which data can be written once in the memory portion of the semiconductor device 100, data alteration can be prevented.

FIG. 17D illustrates an IC tag 183 including the semiconductor device 100. The semiconductor device 100 can be manufactured at a lower cost than a conventional ID tag using a plastic housing by making the semiconductor device 100 thin and including it in the paper surface or paper. In addition, in the case of a product using paper, the product and the ID tag can be integrated by using the paper of the present invention. Such an example is shown in FIG. FIG. 17E illustrates a book 184 in which the paper of the present invention is used as a cover. The semiconductor device 100 is attached to a cardboard serving as a cover.

Product management is facilitated by attaching a label 181 and an IC tag 183 formed of paper according to the present invention to the product. For example, when a product is stolen, the culprit can be quickly grasped by following the route of the product. As described above, by using the papers according to the present invention, it is possible to perform history management and tracking inquiry up to the raw materials and production areas of products, production, processing, distribution, sales, and the like. That is, it enables the traceability of products. Further, according to the present invention, it is possible to introduce a product traceability management system at a lower cost than before.

(Appendix) As described above, the present invention includes at least the following configurations.

An active element is formed of a first structure body in which an antenna is formed and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element and higher rigidity than the first structure body A semiconductor device including a second structure body, wherein the antenna and the integrated circuit are connected by a through electrode formed in the second structure body.

An active element is formed of a first structure body in which an antenna is formed and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element and higher rigidity than the first structure body A semiconductor device including a second structure body, the integrated circuit is provided between the first structure body and the second structure body, and the antenna and the integrated circuit are electrically connected to each other.

An active element is formed of a first structure body in which an antenna is formed, and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers. The integrated circuit including the active element and rigidity higher than that of the first structure body A semiconductor device having a second structure body in which a passive element is formed, wherein the antenna and the integrated circuit are connected by a through electrode formed in the second structure body.

An active element is formed of a first structure body in which an antenna is formed, and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers. The integrated circuit including the active element and rigidity higher than that of the first structure body A semiconductor device including a second structure body in which a passive element is formed, the integrated circuit being provided between the first structure body and the second structure body, and having a connection portion between an antenna and a capacitor.

An active element is formed of a first structure body in which a first coil electromagnetically coupled to a reader / writer device is formed, a coiled antenna, and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers. A semiconductor device having a second structure in which an integrated circuit including the second integrated circuit and a second coil that is electromagnetically coupled to the coiled antenna and electrically connected to the first coil are formed.

1 is a plan view illustrating one embodiment of a semiconductor device according to the present invention. Sectional drawing which shows an example of the structure corresponding to the AB cutting | disconnection line of FIG. Sectional drawing which shows an example of the structure corresponding to the AB cutting | disconnection line of FIG. 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device according to the present invention. The top view which shows an example of the semiconductor device which combined the 1st structure body in which the antenna was formed, the 2nd structure body in which the capacity | capacitance part was formed, and an integrated circuit. 5A is a cross-sectional view illustrating an example of a semiconductor device in which an integrated circuit is combined with a first structure body in which an antenna is formed, a second structure body in which a capacitor portion is formed, and a line A in FIG. The figure corresponding to -B. FIG. 5B is a cross-sectional view illustrating an example of a semiconductor device in which the first structure in which the antenna is formed, the second structure in which the capacitor portion is formed, and the integrated circuit are combined; The figure corresponding to -D. The top view which shows an example of the semiconductor device which combined the 1st structure body in which the antenna was formed, the 2nd structure body in which the capacitor part was formed, the integrated circuit, and the ceramic antenna. FIG. 7A is a cross-sectional view illustrating an example of a semiconductor device in which a first structure in which an antenna is formed, a second structure in which a capacitor is formed, an integrated circuit, and a ceramic antenna are combined. The figure corresponding to line EF. FIG. 7B is a cross-sectional view illustrating an example of a semiconductor device in which a first structure in which an antenna is formed, a second structure in which a capacitor portion is formed, an integrated circuit, and a ceramic antenna are combined. The figure corresponding to line GH. The top view which shows an example of the semiconductor device provided with the booster coil. (A) It is sectional drawing which shows an example of the semiconductor device provided with the booster coil, and is a figure corresponding to line JK in FIG. 9 (A). (B) It is sectional drawing which shows an example of the semiconductor device provided with the booster coil, and is a figure corresponding to line LM in FIG. 9 (A). The equivalent circuit diagram of the semiconductor device provided with the booster coil. 1 is a block diagram showing an example of the configuration of an integrated circuit that can store data and can be used to identify an individual. FIG. 10 is a block diagram illustrating an example of a semiconductor device having an arithmetic function capable of transmitting and receiving data without contact. FIG. 14 is a cross-sectional view illustrating a structure of a thin film transistor forming an integrated circuit. FIG. 14 is a cross-sectional view illustrating the structure of a MOS transistor forming an integrated circuit. 3A and 3B illustrate a bendable curvature radius of a semiconductor device. The figure which illustrates about an example of the papers which concern on this invention.

Explanation of symbols

100 Semiconductor Device 101 First Structure 102 Second Structure 103 Coupling Capacitor 104 Integrated Circuit 105 Tertiary Antenna 106 Antenna 107 Secondary Antenna 107a Integrated Circuit Side Secondary Antenna 107b First Structure Side Secondary Antenna 108 Antenna Terminal 109 Primary antenna 110 Through electrode 111 Side via electrode 112 Connection electrode 113 Back connection electrode 114 Adhesive material 115 Connection electrode 116 Sealant 117 Capacitor connection electrode 118 Capacitance electrode 119 Dielectric layer 120 Protective layer 121a Antenna connection terminal 121b Antenna connection Terminal 122 Ceramic antenna 123 Power feeding body 124 Reflector 125 Dielectric body 126 Grounding body 127 Ceramic antenna connection electrode 128 Through hole 130 Analog circuit section 132 Digital circuit section 133 Modulating circuit 134 Demodulating circuit 135 Rectifying circuit 136 Constant Voltage Circuit 137 Capacitance Unit 138 Oscillation Circuit 139 Reset Circuit 140 Logic Circuit 141 Memory Unit 142 Resonance Circuit 143 RF Interface 144 Control Register 145 Clock Controller 146 CPU Interface 147 CPU
148 RAM
149 ROM
150 power management circuit 152 substrate 154 first insulating layer 156 semiconductor layer 158 gate insulating layer 160 gate electrode 162 second insulating layer 164 first wiring 166 third insulating layer 168 second wiring 170 fourth insulating layer 172 semiconductor substrate 174 element isolation Insulating layer 176 n-well 177 p-well 178 bearer bonds 179 certificate 180 label mount 181 label 182 packaging box 183 IC tag 184 book

Claims (8)

A first structure in which an antenna is formed;
An active element is formed of a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element;
A second structure having higher rigidity than the first structure;
The semiconductor device, wherein the antenna and the integrated circuit are connected by a through electrode formed in the second structure body. A first structure in which an antenna is formed;
An active element is formed of a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element;
A second structure having higher rigidity than the first structure;
The integrated circuit is provided between the first structure body and the second structure body, and the antenna and the integrated circuit are electrically connected to each other. A first structure in which an antenna is formed;
An active element is formed of a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element;
A second structure having higher rigidity than the first structure and having passive elements formed thereon;
The semiconductor device, wherein the antenna and the integrated circuit are connected by a through electrode formed in the second structure body. A first structure in which an antenna is formed;
An active element is formed of a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element;
A second structure having higher rigidity than the first structure and having passive elements formed thereon;
The integrated circuit is installed between the first structure and the second structure, and has a connection portion between the antenna and the passive element. A first structure in which a first coil electromagnetically coupled to the reader / writer device is formed;
An active element is formed of a coiled antenna and a semiconductor layer in which an upper layer and a lower layer are sandwiched between insulating layers, and an integrated circuit including the active element;
A semiconductor device comprising: a second structure in which a second coil that is electromagnetically coupled to the coiled antenna and electrically connected to the first coil is formed. In claim 3 or claim 4,
A semiconductor device comprising a capacitor, a resistor, and a coil as the passive element. In claim 3 or claim 4,
The semiconductor device, wherein the passive element is a capacitor in which a plurality of dielectric layers and electrodes are alternately stacked. In any one of Claims 1 thru | or 5,
The semiconductor device is characterized in that the second structure is formed of a ceramic material.