JP2008039799A - Display device and drive control method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve display picture quality by solving a problem of insufficient writing of display data while reducing power consumption during the writing operation of display data in a display panel (display pixels). <P>SOLUTION: Each display pixel is provided with a pixel circuit part DXx and an organic EL element OLED which is a current driven type light emitting element. The pixel circuit part DCx includes: a drive transistor T1 of which the drain terminal and the source terminal are respectively connected to a power supply terminal TMv to which power supply voltage Vcc is applied and a contact N2 and the gate terminal is connected to a contact N1; a holding transistor T2 of which the drain terminal and the source terminal are respectively connected to the power supply terminal TMv (the drain terminal of the drive transistor T1) and the contact N1 and the gate terminal is connected to a control terminal TMh; and a capacitor Cx connected between the gate and source terminals of the drive transistor T1 (between the contacts N1 and N2). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a display device and a drive control method thereof, and more particularly, a plurality of current drive type (or current control type) light emitting elements that emit light at a predetermined luminance gradation by supplying a current according to display data. The present invention relates to a display device including an arrayed display panel (display pixel array) and a drive control method thereof.

  In recent years, as a next-generation display device following a liquid crystal display device, an organic electroluminescence element (organic EL element), an inorganic electroluminescence element (inorganic EL element), or a current-driven light emission such as a light emitting diode (LED) Research and development of a light-emitting element type display device (light-emitting element type display) including a display panel in which elements are arranged in a matrix is actively performed.

  In particular, a light-emitting element type display using an active matrix driving method has a higher display response speed and less viewing angle dependency than a known liquid crystal display device, and has high brightness and high contrast, and display image quality. The liquid crystal display device does not require a backlight or a light guide plate, and therefore has a very advantageous feature that it can be made thinner and lighter. Therefore, application to various electronic devices is expected in the future.

  In such a light emitting element type display, various control circuits and control methods for controlling the light emission state of the light emitting element provided for each display pixel have been proposed. For example, Patent Document 1 discloses a pixel circuit (pixel drive circuit) including a plurality of switching elements (transistors) for controlling light emission of the light emitting elements in addition to the light emitting elements for each display pixel constituting the display panel. ) Is described.

FIG. 13 is an equivalent circuit diagram showing a configuration example of display pixels (pixel driving circuit and light emitting element) applicable to the light emitting element type display in the prior art.
As shown in FIG. 13, the display pixel EMp described in Patent Document 1 and the like has a gate terminal in the vicinity of each intersection of a pair of scanning lines SLp1 and SLp2 and a data line DLp arranged in parallel to each other. The transistor Tr111 having a source terminal and a drain terminal connected to the data line DLp and the contact Np1, respectively, a gate terminal connected to the scan line SLp2, and a source terminal and a drain terminal connected to the contact Np1 and the contact Np2 to the scan line SLp1, respectively. The transistor Tr112, the gate terminal is connected to the contact Np2, the drain terminal is connected to the contact Np1, the transistor Tr113 to which the high potential voltage Vdd is applied to the source terminal, the gate terminal is connected to the contact Np2, and the high potential is applied to the source terminal And a transistor Tr114 to which a voltage Vdd is applied. The organic EL element OLED is configured such that the anode terminal is connected to the path DCp and the drain terminal of the transistor Tr114 of the pixel driving circuit DCp, and the ground potential is applied to the cathode terminal.

  Here, the transistor Tr111 is configured by an n-channel field effect transistor (thin film transistor), and the transistors Tr112 to Tr114 are configured by p-channel field effect transistors. CP is a capacitor (parasitic capacitance or additional capacitance) formed between the gate and source of the transistors Tr113 and Tr114.

  In the display pixel EMp having such a pixel drive circuit DCp, first, the high-level scanning signal Vsel1 is applied to the scanning line SLp1, and the low-level scanning signal Vsel2 is applied to the scanning line SLp2, thereby the transistor Tr111. Tr112 and Tr113 are turned on, and the display pixel EMp is set to the selected state. In synchronization with this selection timing, a gray-scale current Ipix corresponding to display data supplied to the data line DLp flows through the transistors Tr111 and Tr113. At this time, since the gate and drain of the transistor Tr113 are electrically short-circuited by the transistor Tr112, the transistor Tr113 operates in a saturation region.

  As a result, the current level of the gradation current Ipix is converted to a voltage level by the transistor Tr113, and a predetermined voltage is generated between the gate and the source (contact Np2). The transistor Tr114 is turned on in response to this voltage, and the high potential A predetermined light emission drive current flows from the voltage Vdd to the organic EL element OLED via the transistor Tr114, and the organic EL element OLED emits light with a luminance gradation corresponding to the light emission drive current.

  Next, when a high level scanning signal Vsel2 is applied to the scanning line SLp2, the transistor Tr112 is turned off, whereby the voltage generated between the gate and the source of the transistor Tr113 is held by the capacitor CP, and then the low level is applied to the scanning line SLp1. When the level scanning signal Vsel1 is applied, the transistor Tr111 is turned off, thereby electrically disconnecting the data line DLp and the pixel driving circuit DCp. As a result, the transistor Tr114 is continuously turned on by the voltage (potential difference) held in the capacitor CP, and a predetermined light emission drive current flows from the high potential voltage Vdd to the organic EL element OLED via the transistor Tr114. The light emitting operation of the EL element OLED is continued.

  Such a drive control method in the pixel drive circuit DCp supplies each display pixel EMp (between the source and drain of the transistor Tr113) with a gradation current Ipix in which a current value is specified according to display data, and according to the current value. Since the light emission drive current that flows through the organic EL element OLED is controlled based on the held voltage, and the light emission operation is performed with a predetermined luminance gradation, the current designation type (or current application type) gradation It is called a control method.

  In a display device provided with a pixel driving circuit DCp corresponding to such a current designation type gradation control method, the current level of the gradation current Ipix corresponding to the display data supplied to each display pixel is converted into a voltage level. A driving current having a predetermined current value is supplied to the organic EL element OLED based on the transistor Tr113 (current / voltage conversion transistor) to be operated and the voltage level (the potential of the contact Np2 or the voltage held in the capacitor CP). Transistor Tr114 (light emission drive transistor), and these transistors have a circuit configuration in which a current mirror circuit is connected. Therefore, variations and variations in element characteristics (for example, threshold voltage) of the transistors Tr113 and Tr114 may occur. Even if it occurs, the influence on the drive current supplied to the organic EL element can be suppressed. Can have the advantage of being able to realize the light emission operation at the appropriate luminance gradation corresponding to stably display data for a long time.

  As a result, an amorphous silicon transistor having a relatively large variation in element characteristics (threshold voltage) can be applied as a transistor to be applied to the pixel driving circuit DCp. Therefore, high productivity and uniformity peculiar to amorphous silicon can be achieved. A display device having excellent light emission characteristics and display image quality can be realized while using the manufacturing process.

JP 2001-147659 A (pages 7 to 8, FIG. 1)

However, the display device to which the pixel driving circuit as described above is applied has the following problems.
(1) In the current designation type gradation control method, as described above, by supplying a gradation current to each display pixel by designating a current value corresponding to display data, the light emission drive that flows through the organic EL element Since the current value of the current is set, there is a problem that the power consumption of the display device in the display data writing operation increases.

(2) On the other hand, in an electronic device such as a television or a monitor having a large display panel, the wiring length of the data line disposed on the display panel is increased, and the display pixels connected to the data line are The number will increase. Here, in the current designation type gradation control method, the operation of writing the display data to each display pixel is performed by the capacitive component (wiring capacitance and display pixel of the display pixel) parasitic to the data line due to the gradation current for which the current value is designated. This corresponds to charging the parasitic capacitance to a predetermined voltage.

  At this time, when the gradation current corresponding to the display data having the lowest or relatively low luminance is written to each display pixel (at the time of low gradation display), a signal current having a small current value corresponding to the luminance gradation of the display data is applied. Although it is necessary to supply to each display pixel, as described above, when the wiring length of the data line is increased and the number of display pixels connected to the data line is increased, the current value of the grayscale current is decreased. The data line charging time becomes longer due to the writing time constant (ie, when the gray scale is displayed), and the writing operation takes a long time. There is a problem that the display data written in the display pixels does not reach a sufficiently stable state (charge voltage is saturated) over time, so-called insufficient writing occurs. For this reason, there is a problem in that display pixels that cannot perform light emission operation with an appropriate luminance gradation according to display data are generated, and a luminance difference is generated in the display panel, resulting in deterioration of display image quality.

(3) In addition, in order to increase the definition of the display panel, the number of scanning lines arranged on the display panel is increased and the selection period (that is, writing time) of each scanning line is set short. However, as the current value of the gray scale current becomes smaller (lower gray scale display), the sufficient writing operation to each display pixel is not performed and the above-described insufficient writing occurs, resulting in deterioration of display image quality. And there is a problem that high definition of the display panel is restricted.

  Therefore, in view of the above-described problems, the present invention can reduce power consumption at the time of writing display data to a display panel (display pixel) and solve the problem of insufficient writing of display data. It is an object of the present invention to provide a display device capable of improving display image quality and a drive control method thereof.

  According to a first aspect of the present invention, in the display device including a display panel in which a plurality of display pixels including a current-driven light emitting element are two-dimensionally arranged, the display pixel emits the light emitting element at a desired luminance gradation. A pixel circuit unit for operating the pixel circuit unit, wherein at least one power supply voltage of the first power supply voltage and the second power supply voltage is applied to one end side of the current path; A first switching element having a connection contact with the light emitting element on the other end side, the power supply voltage is applied to one end side of the current path, and the first switching element is connected to the other end side of the current path. A second switching element to which a control terminal is connected; and a voltage holding element connected between the control terminal of the first switching element and the connection contact, wherein the first power supply voltage is The light emitting element is in a non-light emitting state. That has a voltage value, the second power supply voltage and having a voltage value for the light emitting element and the light-emitting state.

  According to a second aspect of the present invention, in the display device according to the first aspect, the display device applies the power supply voltage to one end side of the current path of the first switching element provided in the pixel circuit unit. A power supply voltage control unit and a data voltage control unit that applies a data voltage corresponding to display data to the other end of the current path of the first switching element are provided.

  According to a third aspect of the present invention, in the display device according to the second aspect, the display device includes a connection state control unit that controls a conduction state of the current path of the second switching element, and the connection state control unit When applying the first power supply voltage from the power supply voltage control unit to one end side of the current path of the first switching element and applying the data voltage to the other end side of the current path, Conducting the current path of the second switching element to connect one end side of the current path of the first switching element and a control terminal of the first switching element; and When the second power supply voltage is applied from the power supply voltage control unit to one end of the current path, and the driving current based on the voltage held in the voltage holding element is caused to flow to the light emitting element, the second switching element Of the above As a non-conducting passage, and cancels the connection with the control terminal of the first of said current path one end and the first switching element of the switching element.

According to a fourth aspect of the present invention, in the display device according to the second aspect, the power supply voltage control unit is configured to apply the display pixels for each row in the plurality of display pixels arranged two-dimensionally on the display panel. A power supply voltage is sequentially applied.
According to a fifth aspect of the present invention, the power supply voltage control unit sequentially applies the power supply voltage to the display pixels for each of a plurality of rows in the plurality of display pixels that are two-dimensionally arranged on the display panel. Features.

A sixth aspect of the present invention is the display device according to any one of the first to fifth aspects, wherein the first and second switching elements are field effect transistors each having a semiconductor layer made of amorphous silicon. It is characterized by.
According to a seventh aspect of the present invention, in the display device according to the second aspect, in the pixel circuit unit, the data voltage is further applied to one end side of the current path, and the first voltage is applied to the other end side of the current path. A third switching element connected to the other end of the current path of the switching element is provided.

According to an eighth aspect of the present invention, in the display device according to the seventh aspect, the third switching element is a field effect transistor including a semiconductor layer made of amorphous silicon.
The invention according to claim 9 is the display device according to any one of claims 1 to 8, wherein the light emitting element is an organic electroluminescence element.

  According to a tenth aspect of the present invention, in the drive control method for a display device including a display panel in which a plurality of display pixels including current-driven light emitting elements are two-dimensionally arranged, the display pixel is at least one end side of a current path. A predetermined power supply voltage is applied to the first switching element having a connection contact with the light emitting element connected to the other end of the current path, and the power supply voltage is applied to one end of the current path. A second switching element having a control terminal of the first switching element connected to the other end of the path, and a voltage holding element connected between the control terminal of the first switching element and the connection contact A pixel circuit unit comprising: a current path of the second switching element; and a control terminal of the first switching element and one end side of the current path of the first switching element. When Electrically connecting, applying a first power supply voltage having a voltage value to make the light emitting element in a non-light emitting state to one end side of the current path of the first switching element, and to the other end side of the current path; A writing operation for applying a data voltage corresponding to display data; and the current path of the second switching element is made non-conductive, the control terminal of the first switching element and the current of the first switching element A holding operation in which the voltage holding element holds a voltage component corresponding to a potential difference applied to both ends of the current path by electrically interrupting one end side of the path, and the current path of the second switching element The voltage held by the voltage holding element is applied by applying a second power supply voltage having a voltage value for causing the light emitting element to emit light to one end of the current path of the first switching element. Based on ingredients Characterized in that it comprises a and a light emitting operation to flow a Ku driving current to the light emitting element.

According to an eleventh aspect of the present invention, in the display device drive control method according to the tenth aspect, the data voltage has a negative polarity voltage amplitude with respect to the first power supply voltage.
According to a twelfth aspect of the present invention, in the display device drive control method according to the tenth or eleventh aspect, the second power supply voltage has a voltage value for operating the first switching element in a saturated state. And

According to a thirteenth aspect of the present invention, in the display device drive control method according to any one of the tenth to twelfth aspects, the display pixels for each row in the plurality of display pixels arranged two-dimensionally on the display panel. Thus, at least the light emitting operations are sequentially executed.
According to a fourteenth aspect of the present invention, in the display device drive control method according to any one of the tenth to twelfth aspects, the display pixels for each of the plurality of rows in the plurality of display pixels arranged two-dimensionally on the display panel. On the other hand, at least the light emitting operation is sequentially executed.

  According to the display device and the drive control method thereof according to the present invention, it is possible to reduce power consumption at the time of writing display data to the display panel (display pixel), and to increase the size and definition of the display panel. In this case, even when low gradation display is performed, the problem of insufficient writing of display data can be solved, and light emission operation can be performed with an appropriate luminance gradation according to display data. Image quality can be realized.

A display device and a drive control method thereof according to the present invention will be described in detail below with reference to embodiments.
First, a configuration of a main part of a display pixel applied to the display device according to the present invention and a control operation thereof will be described with reference to the drawings.
FIG. 1 is an equivalent circuit diagram showing a main configuration of a display pixel applied to a display device according to the present invention. Here, a case where an organic EL element is applied as a current-driven light-emitting element provided in a display pixel for the sake of convenience will be described.

  As shown in FIG. 1, the display pixel applied to the display device according to the present invention includes a pixel circuit unit (corresponding to a pixel driving circuit DC described later) DCx and an organic EL element OLED which is a current-driven light emitting element. And a circuit configuration including the above. The pixel circuit unit DCx includes, for example, a drive transistor (first switching element) T1 whose drain terminal and source terminal are connected to the power supply terminal TMv and the contact N2 to which the power supply voltage Vcc is applied, and whose gate terminal is connected to the contact N1, respectively. A drain terminal and a source terminal are connected to the power supply terminal TMv (the drain terminal of the driving transistor T1) and the contact N1, a gate terminal is connected to the control terminal TMh, a holding transistor (second switching element) T2, and a driving transistor And a capacitor (voltage holding element) Cx connected between the gate and source terminals of T1 (between the contact N1 and the contact N2). In the organic EL element OLED, the contact N2 is connected to the anode terminal, and a constant voltage Vss is applied to the cathode terminal TMc.

  Here, as will be described later in the control operation, the power supply voltage Vcc having a different voltage value according to the operation state is applied to the power supply terminal TMv according to the operation state of the display pixel (pixel circuit unit DCx). The power supply voltage Vss is applied to the cathode terminal TMc of the organic EL element OLED, the holding control signal Shld is applied to the control terminal TMh, and the gradation value of the display data is applied to the data terminal TMd connected to the contact N2. A data voltage Vdata corresponding to is applied.

  The capacitor Cx may be a parasitic capacitance formed between the gate and the source terminal of the driving transistor T1, and in addition to the parasitic capacitance, a capacitor element is further connected in parallel between the contact N1 and the contact N2. There may be. The element structure, characteristics, and the like of the driving transistor T1 and the holding transistor T2 are not particularly limited, but here, a case where an n-channel thin film transistor is applied is shown.

Next, a control operation (control method) in the display pixel (pixel circuit unit DCx and organic EL element OLED) having the above-described circuit configuration will be described.
FIG. 2 is a signal waveform diagram showing a display pixel control operation applied to the display device according to the present invention.

  As shown in FIG. 2, the operation state in the display pixel (pixel circuit unit DCx) having the circuit configuration shown in FIG. 1 is a write operation in which a voltage component corresponding to the gradation value of the display data is written to the capacitor Cx. A holding operation for holding the voltage component written in the writing operation in the capacitor Cx, and a gradation corresponding to the gradation value of the display data in the organic EL element OLED based on the voltage component held by the holding operation. It can be roughly divided into a light emission operation in which an organic EL element OLED emits light with a luminance gradation according to display data by passing a current. Each operation state will be specifically described below with reference to the timing chart shown in FIG.

(Write operation)
In the writing operation, an operation of writing a voltage component corresponding to the gradation value of the display data to the capacitor Cx is performed in a light-off state where the organic EL element OLED does not emit light.
FIG. 3 is a schematic explanatory diagram illustrating the operation state of the display pixel during the write operation, and FIG. 4A is a characteristic diagram illustrating the operation characteristic of the drive transistor of the display pixel during the write operation. (B) is a characteristic diagram showing the relationship between the drive current and drive voltage of the organic EL element.

  A solid line SPw shown in FIG. 4A shows the relationship between the drain-source voltage Vds and the drain-source current Ids in the initial state when an n-channel thin film transistor is applied as the driving transistor T1 and diode-connected. It is a characteristic line shown. A broken line SPw2 indicates an example of a characteristic line when the characteristic change of the driving transistor T1 occurs with the driving history. Details will be described later. A point PMw on the characteristic line SPw indicates an operating point of the driving transistor T1. The characteristic line SPw has a threshold voltage Vth with respect to the drain-source current Ids. When the drain-source voltage Vds exceeds the threshold voltage Vth, the drain-source current Ids is nonlinear as the drain-source voltage Vds increases. Increase.

That is, the value indicated by Veff_gs in the figure is a voltage component that effectively forms the drain-source current Ids, and the drain-source voltage Vds is equal to the threshold voltage Vth and the voltage as shown in the equation (1). This is the sum of the components Veff_gs.
Vds = Vth + Veff_gs (1)

  A solid line SPe shown in FIG. 4B is a characteristic line showing the relationship between the drive voltage Voled and the drive current Ioled in the initial state of the organic EL element OLED. The alternate long and short dash line SPe2 indicates an example of the characteristic line when the characteristic change occurs with the driving history of the organic EL element OLED. Details will be described later. The characteristic line SPe has a threshold voltage Vth_oled with respect to the drive voltage Voled. When the drive voltage Voled exceeds the threshold voltage Vth_oled, the drive current Ioled increases nonlinearly as the drive voltage Voled increases.

  In the writing operation, first, as shown in FIGS. 2 and 3A, an on-level (high level) holding control signal Shld is applied to the control terminal TMh of the holding transistor T2 to turn on the holding transistor T2. Let As a result, the gate and drain of the driving transistor T1 are connected (short-circuited), and the driving transistor T1 is set in a diode-connected state.

  Subsequently, the first power supply voltage Vccw for writing operation is applied to the power supply terminal TMv terminal, and the data voltage Vdata corresponding to the gradation value of the display data is applied to the data terminal TMd. At this time, a current Ids corresponding to the potential difference (Vccw−Vdata) between the drain and the source flows between the drain and the source of the driving transistor T1. The data voltage Vdata is set to a voltage value for the current Ids flowing between the drain and the source to be a current value necessary for the organic EL element OLED to emit light with a luminance gradation corresponding to the gradation value of the display data. Is done.

At this time, since the drive transistor T1 is diode-connected, the drain-source voltage Vds of the drive transistor T1 is equal to the gate-source voltage Vgs as shown in FIG. It becomes like this.
Vds = Vgs = Vccw-Vdata (2)

The gate-source voltage Vgs is written (charged) in the capacitor Cx. Here, conditions necessary for the value of the first power supply voltage Vccw will be described. Since the driving transistor T1 is an n-channel thin film transistor, in order for the drain-source current Ids to flow, the gate potential of the driving transistor T1 must be positive with respect to the source potential, and the gate potential is equal to the drain potential. Since the first power supply voltage Vccw and the source potential are the data voltage Vdata, the relationship of the expression (3) must be established.
Vdata <Vccw (3)

Further, the contact N2 is connected to the data terminal TMd and to the anode terminal of the organic EL element OLED. In order to turn off the organic EL element OLED at the time of writing, the potential Vdata of the contact N2 is organic Since the voltage Vss of the cathode terminal TMc of the EL element OLED must be equal to or less than the value obtained by adding the threshold voltage Vth_oled of the organic EL element OLED, the potential Vdata of the contact N2 must satisfy the equation (4).
Vdata ≦ Vss + Vth_oled (4)
Here, when the voltage Vss of the cathode side terminal TMc of the organic EL element OLED is set to the ground potential of 0 V, the equation (5) is obtained.
Vdata ≦ Vth_oled (5)

Next, Equation (6) is obtained from Equation (2) and Equation (5).
Vccw−Vgs ≦ Vth_oled (6)
Further, from the equation (1), Vgs = Vds = Vth + Veff_gs, so that the equation (7) is obtained.
Vccw ≦ Vth_oled + Vth + Veff_gs (7)

Here, since it is necessary that the equation (7) holds even when Veff_gs = 0, when Veff_gs = 0, the equation (8) is obtained.
Vdata <Vccw ≦ Vth_oled + Vth (8)
That is, during the write operation, the value of the first power supply voltage Vccw must be set to a value that satisfies the relationship of the expression (8) in the diode connection state.

  Next, the influence of the characteristic change of the drive transistor T1 and the organic EL element OLED due to the drive history will be described. It is known that the threshold voltage Vth of the driving transistor T1 increases according to the driving history. A broken line SPw2 shown in FIG. 4A shows an example of a characteristic line when a characteristic change occurs due to the drive history, and ΔVth shows a change amount of the threshold voltage Vth.

  As shown in FIG. 4A, the characteristic variation according to the driving history of the driving transistor T1 changes to a form in which the initial characteristic line is substantially translated. For this reason, the value of the data voltage Vdata necessary for obtaining the gradation current (drain-source current Ids) corresponding to the gradation value of the display data must be increased by the change amount ΔVth of the threshold voltage Vth. .

  Further, it is known that the organic EL element OLED has a high resistance according to the driving history. An alternate long and short dash line SPe2 shown in FIG. 4B shows an example of a characteristic line when a characteristic change occurs with the driving history, and the characteristic variation due to the increase in resistance according to the driving history of the organic EL element OLED is an initial characteristic. The line changes in a direction in which the increase rate of the drive current Ioled with respect to the drive voltage Voled decreases. That is, the drive voltage Voled increases by the characteristic line SPe2−characteristic line SPe in order to pass the drive current Ioled necessary for the organic EL element OLED to emit light with the luminance gradation corresponding to the gradation value of the display data. As shown by ΔVoled max in FIG. 4B, this increase is maximized at the highest gray level when the drive current Ioled becomes the maximum value Ioled (max).

(Holding action)
FIG. 5 is a schematic explanatory diagram illustrating an operation state during the holding operation of the display pixel, and FIG. 6 is a characteristic diagram illustrating an operation characteristic of the driving transistor during the holding operation of the display pixel.
In the holding operation, as shown in FIGS. 2 and 5A, an off-level (low-level) holding control signal Shld is applied to the control terminal TMh to turn off the holding transistor T2, thereby causing the driving transistor T1 to turn off. The gate-drain is disconnected (disconnected) to release the diode connection. As a result, as shown in FIG. 5B, the drain-source voltage Vds (= gate-source voltage Vgs) of the drive transistor T1 charged in the capacitor Cx in the write operation is held.

  A solid line SPh shown in FIG. 6 is a characteristic line when the diode connection of the driving transistor T1 is released and the gate-source voltage Vgs is set to a constant voltage. A broken line SPw shown in FIG. 6 is a characteristic line when the drive transistor T1 is diode-connected. The operating point PMh at the time of holding is the intersection of the characteristic line SPw when the diode is connected and the characteristic line SPh when the diode connection is released.

  A one-dot chain line SPo shown in FIG. 6 is derived as a characteristic line SPw−Vth, and an intersection Po between the one-dot chain line SPo and the characteristic line SPh indicates a pinch-off voltage Vpo. Here, as shown in FIG. 6, in the characteristic line SPh, the region from the drain-source voltage Vds from 0 V to the pinch-off voltage Vpo is a linear region, and the region where the drain-source voltage Vds is greater than or equal to the pinch-off voltage Vpo is saturated. It becomes an area.

(Light emission operation)
FIG. 7 is a schematic explanatory diagram illustrating an operation state during the light emission operation of the display pixel, and FIG. 8 is a characteristic diagram illustrating an operation characteristic of the drive transistor of the display pixel and a load characteristic of the organic EL element during the light emission operation.
As shown in FIGS. 2 and 7A, the state in which the off-level (low-level) holding control signal Shld is applied to the control terminal TMh (the state in which the diode connection state is released) is maintained, and the terminal of the power supply terminal TMv is maintained. The voltage Vcc is switched from the first power supply voltage Vccw for writing to the second power supply voltage Vcce for light emission. As a result, a current Ids corresponding to the voltage component Vgs held in the capacitor Cx flows between the drain and source of the drive transistor T1, and this current is supplied to the organic EL element OLED, and the organic EL element OLED is supplied. A light emission operation is performed at a luminance corresponding to the value of the current.

  A solid line SPh shown in FIG. 8A is a characteristic line of the drive transistor T1 when the gate-source voltage Vgs is a constant voltage. A solid line SPe indicates a load line of the organic EL element OLED, and the drive voltage Voled−drive of the organic EL element OLED is based on the potential difference between the power terminal TMv and the cathode terminal TMc of the organic EL element OLED, that is, the value of Vcce−Vss. The current Ioled characteristic is plotted in the reverse direction.

  The operating point of the driving transistor T1 during the light emission operation moves from PMh during the holding operation to PMe, which is the intersection of the characteristic line SPh of the driving transistor T1 and the load line SPe of the organic EL element OLED. Here, as shown in FIG. 8A, the operating point PMe is in a state in which a voltage of Vcce−Vss is applied between the power supply terminal TMv and the cathode terminal TMc of the organic EL element OLED. The points distributed between the source and the drain of the organic EL element and between the anode and the cathode of the organic EL element OLED are shown. That is, at the operating point PMe, the voltage Vds is applied between the source and drain of the drive transistor T1, and the drive voltage Voled is applied between the anode and cathode of the organic EL element OLED.

Here, in order to prevent the current Ids (expected current) flowing between the drain and source of the drive transistor T1 during the write operation and the drive current Ioled supplied to the organic EL element OLED during the light emission operation from changing. The point PMe must be maintained in the saturation region on the characteristic line. Further, the drive voltage Voled applied to the organic EL element OLED becomes maximum at the maximum gradation, and when this is Voled (max), the value of the second power supply voltage Vcce must satisfy the condition of the equation (9).
Vcce−Vss ≧ Vpo + Voled (max) (9)
Here, when Vss is a ground potential of 0 V, the equation (10) is obtained.
Vcce ≧ Vpo + Voled (max) (10)

  As shown in FIG. 4B, the organic EL element OLED has a high resistance according to the driving history, and changes in a direction in which the increasing rate of the driving current Ioled with respect to the driving voltage Voled decreases. That is, the inclination of the load line SPe of the organic EL element OLED shown in FIG. FIG. 8B shows changes in accordance with the driving history of the load line SPe of the organic EL element OLED, and the load line changes in SPe → SPe2 → SPe3. As a result, the operating point of the driving transistor T1 moves in the PMe → PMe2 → PMe3 direction on the characteristic line SPh of the driving transistor T1 with the driving history. At this time, while the operating point is in the saturation region on the characteristic line (PMe → PMe2), the drive current Ioled maintains the value of the expected current at the time of the write operation, but if it enters the linear region (PMe3) The drive current Ioled is smaller than the expected current at the time of the write operation, and a display defect occurs. The compensation margin shown in FIG. 8B is a potential difference between the point Po indicating the pinch-off voltage Vpo on the characteristic line SPh of the driving transistor T1 and the operating point PMe during the light emission operation, and this compensation margin is the organic EL element OLED. This is a range in which the expected current during the writing operation can be maintained during the light emitting operation with respect to the increase in resistance.

  As shown in FIG. 8B, the compensation margin decreases as the value of the drive current Ioled increases, and increases as the drive power supply | Vcc−Vss | increases. In other words, in order to maintain the expected current during the write operation during the light emission operation, the potential width of the operating point allowed on the saturation region can be said to be a compensation margin for increasing the resistance of the organic EL element OLED. This compensation margin is a potential difference between the point Po and the load line SPe at each Ioled level. As shown in FIG. 8B, the compensation margin decreases as the Ioled expected value increases, and increases as the voltage Vcce−Vss applied between the power supply terminal TMv and the cathode terminal TMc of the organic EL element OLED increases.

Next, a display device including a display panel in which a plurality of display pixels including the above-described main part configuration are two-dimensionally arranged and a drive control method thereof will be specifically described.
<Specific examples of display pixels>
First, a specific example of a display pixel which can be applied to the display device according to the present invention and has the above-described main part configuration will be described.

FIG. 9 is a circuit configuration diagram showing an example of display pixels (pixel drive circuit and light emitting element) applicable to the display device according to the present invention. In FIG. 9, reference numerals of circuit configurations corresponding to the above-described pixel circuit unit DCx (see FIG. 1) are also shown.
As shown in FIG. 9, the display pixel PIX according to this specific example is disposed in the vicinity of the intersection of the selection line Ls connected to the selection driver 120 and the data line Ld connected to the data driver 140, and is a current-driven type. The organic EL element OLED which is a light emitting element, and the pixel drive circuit DC for driving the organic EL element OLED to emit light are provided.

  In the pixel drive circuit DC, for example, a transistor (second switching element) having a gate terminal connected to the selection line Ls, a drain terminal connected to the power supply voltage line Lv to which the power supply voltage Vcc is applied, and a source terminal connected to the contact N11. Tr11, a transistor Tr12 having a gate terminal connected to the selection line Ls, a source terminal connected to the data line Ld, a drain terminal connected to the contact N12, a gate terminal connected to the contact N11, a drain terminal connected to the power supply voltage line Lv, a source A transistor (first switching element) Tr13 whose terminals are connected to the contact N12, and a capacitor (voltage holding element) Cs connected between the contact N11 and the contact N12 (between the gate and source terminals of the transistor Tr13), I have. Here, the transistor Tr13 is the driving transistor T1 shown in the main configuration of the pixel circuit section (FIG. 1), the transistor Tr11 is the holding transistor T2, the capacitor Cs is the capacitor Cx, and the contact N11 is the contact N1. , Contact N12 corresponds to contact N2, respectively.

  The anode terminal of the organic EL element OLED is connected to the contact N12 of the pixel drive circuit DC, and a constant voltage Vss is applied to the cathode terminal. The voltage values of the power supply voltages Vcc and Vss and the voltages applied to the respective parts of the pixel driving circuit DC and the organic EL element OLED are set so as to have the above-described potential relationship.

  The capacitor Cs may be a parasitic capacitance formed between the gate and the source of the transistor Tr13, or may be a capacitor in which a capacitive element is further connected in parallel between the contact N11 and the contact N12 in addition to the parasitic capacitance. Good. As will be described in detail later, the selection line Ls is connected to a selection driver (connection state control unit) 120 that outputs a selection signal Ssel, and the power supply voltage line Lv is a power supply driver (power supply voltage control) that outputs a power supply voltage Vcc. The data line Ld is connected to a data driver (data voltage control unit) 140 that outputs a gradation signal Vpix. Here, the selection signal Ssel corresponds to the holding control signal Shld described above, and the gradation signal Vpix corresponds to the data voltage Vdata described above.

  Note that the transistors Tr11 to Tr13 are not particularly limited. For example, an n-channel amorphous silicon thin film transistor can be satisfactorily applied by using n-channel field effect transistors. In this case, by applying an already established amorphous silicon manufacturing technique, it is possible to manufacture a pixel driving circuit DC composed of an amorphous silicon thin film transistor having stable element characteristics (such as electron mobility) by a relatively simple manufacturing process. In the following description, a case where all the transistors Tr11 to Tr13 are configured by n-channel thin film transistors will be described.

  Further, the circuit configuration of the display pixel PIX (pixel drive circuit DC) is not limited to that shown in FIG. 9, and at least the drive transistor T1, the holding transistor T2, and the capacitor Cx as shown in FIG. As long as the current path of the drive transistor T1 is connected in series to the current drive type light emitting element, the drive transistor T1 may have another circuit configuration. Further, the light emitting element driven to emit light by the pixel driving circuit DC is not limited to the organic EL element OLED, and may be another current driven light emitting element such as a light emitting diode.

<Display device>
Next, the overall configuration of a display device to which the display pixel PIX as described above is applied will be described.
FIG. 10 is a schematic configuration diagram showing an embodiment of a display device according to the present invention. Here, the same components as those of the display pixel PIX and the drivers 120 to 140 illustrated in FIG. 9 will be described with the same reference numerals.

  As shown in FIG. 10, the display device 100 according to the present embodiment includes, for example, a plurality of selection lines Ls arranged in the row direction (left-right direction in the drawing) and a plurality of selection lines Ls arranged in the column direction (up-down direction in the drawing). A plurality of display pixels PIX having a pixel driving circuit DC and an organic EL element (light emitting element) OLED having the circuit configuration shown in FIG. 9 are arranged in the vicinity of each intersection with the data line Ld of n rows × m columns (n, m is an arbitrary positive integer), the display panel 110 arranged in a matrix, a selection driver 120 that applies a selection signal Ssel to each selection line Ls at a predetermined timing, and a line parallel to the selection line Ls. A power supply driver 130 that applies a power supply voltage Vcc of a predetermined voltage level to a plurality of power supply voltage lines Lv arranged in a direction at a predetermined timing, and a gradation signal V to each data line Ld at a predetermined timing. A selection control signal and power control for controlling the operating states of at least the selection driver 120, the power supply driver 130, and the data driver 140 based on a data driver 140 that supplies pix and a timing signal supplied from a display signal generation circuit 160 described later. A system controller 150 that generates and outputs a signal and a data control signal, and a data driver that generates display data (luminance gradation data) including a digital signal based on, for example, a video signal supplied from the outside of the display device 100 140, and a display signal generation for supplying to the system controller 150 by extracting or generating a timing signal (system clock or the like) for displaying predetermined image information on the display panel 110 based on the display data Circuit 160.

Hereafter, each said structure is demonstrated.
(Display panel)
In the display device according to the present embodiment, a plurality of display pixels PIX arranged in a matrix on the display panel 110 are grouped into an upper region and a lower region of the display panel 110, as shown in FIG. The display pixels PIX included in each group are each connected to a branched individual power supply voltage line Lv. That is, for the power supply voltage Vcc that is commonly applied to the display pixels PIX in the first to n / 2 rows in the upper area of the display panel 110 and the display pixels PIX in the 1 + n / 2 to n rows in the lower area. The power supply voltage Vcc applied in common is independently output by the power supply driver 130 via different power supply voltage lines Lv at different timings.

(Selected driver)
The selection driver 120 applies an on-level (high level in the display pixel PIX shown in FIG. 9) selection signal Ssel to each selection line Ls based on a selection control signal supplied from the system controller 150. The display pixel PIX for each row is set to the selected state. Specifically, with respect to the display pixels PIX in each row, the operation of applying the selection signal Ssel to the selection line Ls in the row during the writing operation period is sequentially executed at a predetermined timing for each row, thereby The display pixels PIX are sequentially set to the selected state.

  Here, the selection driver 120, for example, based on a selection control signal supplied from the system controller 150 described later, a shift register that sequentially outputs a shift signal corresponding to the selection line Ls of each row, and the shift signal as a predetermined signal An output circuit unit (output buffer) that converts the signal level (on level) and outputs it as a selection signal Ssel to each selection line Ls can be applied.

(Power supply driver)
Based on the power control signal supplied from the system controller 150, the power driver 130 applies to the display pixels PIX arranged in the same area of the display panel 110 (included in a group) during the writing operation period. A power supply voltage Vccw (first power supply voltage) is applied via a power supply voltage line Lv arranged in a branching manner in the region, and the power supply voltage Vcce (second power supply voltage) is applied during the light emission operation period. The operation to be applied to the power supply voltage line Lv arranged in the region is individually executed for each region (group).

  Here, for example, the power driver 130 sequentially generates a timing generator (for example, a shift signal) that generates a timing signal corresponding to the power voltage line Lv of each region (group) based on a power control signal supplied from the system controller 150. And an output circuit unit that converts a timing signal into a predetermined voltage level (voltage values Vccw, Vcce) and outputs it as a power supply voltage Vcc to a power supply voltage line Lv in each region. Can be applied.

(Data driver)
The data driver 140 takes in display data (luminance gradation data) sequentially supplied from a display signal generation circuit, which will be described later, holds it for each row, and generates a gradation signal Vpix having a voltage level corresponding to each display data. Then, the data is supplied all at once to the display pixels PIX in each row via the data line Ld in each column.

  Here, the data driver 140 is, for example, a shift register / data register that sequentially fetches display data of each column for one row supplied from the display signal generation circuit 160 based on a data control signal supplied from the system controller 150. A data latch unit that holds the acquired display data for one row for each display pixel PIX in each column, and generates a gradation signal having a voltage value corresponding to each held display data. A gradation voltage generation unit that outputs to the data line Ld of the column can be applied.

(System controller)
The system controller 150 generates and outputs a selection control signal, a power supply control signal, and a data control signal for controlling the operation state to each of the selection driver 120, the power supply driver 130, and the data driver 140, thereby outputting each driver. By operating at a predetermined timing, a selection signal Ssel, a power supply voltage Vcc, and a gradation signal Vpix having a predetermined voltage level are generated and output, and a drive control operation (writing) in each display pixel PIX (pixel drive circuit DC). The display panel 110 is controlled to display predetermined image information based on the video signal.

(Display signal generation circuit)
For example, the display signal generation circuit 160 extracts a luminance gradation signal component from a video signal supplied from the outside of the display device 100, and the luminance gradation signal component is composed of a digital signal for each row of the display panel 110. The data is supplied to the data driver 140 as display data (luminance gradation data). Here, when the video signal includes a timing signal component that defines the display timing of image information, such as a television broadcast signal (composite video signal), the display signal generation circuit 160 displays the luminance gradation signal component. In addition to the function of extracting the timing signal component, the timing signal component may be extracted and supplied to the system controller 150. In this case, the system controller 150 generates control signals to be individually supplied to the selection driver 120, the power supply driver 130, and the data driver 140 based on the timing signal supplied from the display signal generation circuit 160. .

<Display device drive control method>
Next, a drive control method (drive control operation) in the display device according to the present embodiment will be described.
FIG. 11 is a timing chart showing an example of a drive control method for display pixels arranged in a specific row in the display device according to the present embodiment. Here, the description of the drive control method equivalent to that in the above-described pixel circuit unit (see FIGS. 1 and 2) is simplified. In FIG. 11, for the convenience of explanation, among the display pixels PIX arranged in a matrix on the display panel 110, i rows and j columns and (i + 1) rows and j columns (i is included in the same group). A timing chart in a case where a display pixel PIX having a positive integer satisfying 1 ≦ i ≦ n and j being a positive integer satisfying 1 ≦ j ≦ m is operated to emit light at a luminance gradation corresponding to display data is shown.

  The drive control operation of the display pixels PIX arranged on the display panel 110 of the display device 100 according to the present embodiment is performed in a predetermined display drive period as shown in FIG. 11, for example, as in the above-described control method of the pixel circuit unit. (One processing cycle period) Within Tcyc, the gradation signal Vpix corresponding to the display data is applied from the data driver 140 to the display pixel PIX via the data line Ld, and is provided in the pixel driving circuit DC of the display pixel PIX. The write operation period Twrt in which the voltage component corresponding to the display data is written between the gate and source of the transistor Tr13, and the voltage component set to be written between the gate and source of the transistor Tr13 by the write operation is charged in the capacitor Cs. Based on the holding operation period Thld held and the voltage component held in the capacitor Cs by the holding operation. And the light emission driving current flowing to the organic EL element OLED having a current value is set to include a light emitting operation period Tem to a light emitting operation with a predetermined luminance gradation (Tcyc ≧ Twrt + Thld + Tem).

  Here, the one processing cycle period applied to the display drive period Tcyc according to the present embodiment is set to a period required for the display pixel PIX to display image information for one pixel of one frame image, for example. Is done. That is, when one frame image is displayed on a display panel in which a plurality of display pixels PIX are arranged in a matrix in the row direction and the column direction, the display pixel PIX for one row is one frame in the one processing cycle period Tcyc. It is set to a period required to display one line of images.

Hereinafter, each operation period will be described in detail.
(Write operation period)
First, in the write operation period Twrt, as shown in FIG. 11, first, the display pixels PIX in the group including the display pixels PIX in i rows and j columns and (i + 1) rows and j columns are commonly connected. In a state where Vccw (first power supply voltage), which is a write operation level, is applied from the power supply driver 130 to the power supply voltage line Lv, the selection driver 120 applies an on level (high level) to the selection line Ls in the i-th row. ) Selection signal Ssel is applied.

  Thereby, the transistors Tr11 and Tr12 provided in the pixel driving circuit DC of the display pixel PIX in the i-th row are turned on, so that the transistor Tr13 is set in a diode connection state, and the power supply voltage Vccw is set to the drain terminal of the transistor Tr13. And the gate terminal (contact N11; one end side of the capacitor Cs) and the source terminal (contact N12; the other end side of the capacitor Cs) of the transistor Tr13 are electrically connected to the data line Ld of the j-th column. .

On the other hand, in synchronization with this timing, the gradation signal Vpix corresponding to the display data is applied from the data driver 140 to the j-th data line Ld.
As a result, a voltage component (|) corresponding to the difference between the gradation signal Vpix and the power supply voltage Vccw is applied between the gate and source of the transistor Tr13 (both ends of the capacitor Cs) as in the case shown in FIGS. Vpix−Vccw |) is set for writing. Such an operating state is not set by passing a current according to display data to the gate terminal and the source terminal of the transistor Tr13, but directly applying a desired voltage. The potential can be instantaneously set to a desired state.

  In the writing operation period Twrt, the voltage value of the gradation signal Vpix applied to the contact N12 on the anode terminal side of the organic EL element OLED is set lower than the ground potential GND applied to the cathode terminal. Since it is set (the organic EL element OLED is set to 0 V or a reverse bias state), no current flows through the organic EL element OLED and the light emitting operation is not performed.

(Holding operation period)
Next, after the end of the write operation period Twrt as described above, in the holding operation period Thld, as shown in FIG. 11, the selection signal of the off level (low level) from the selection driver 120 to the selection line Ls of the i-th row. By applying Ssel, the transistors Tr11 and Tr12 are turned off. As a result, the gate-drain of the transistor Tr13 is interrupted to release the diode connection state, and the application of the gradation signal Vpix to the source terminal (contact N12) of the transistor Tr13 is interrupted, and FIGS. Similarly to the case shown in FIG. 6, the voltage component (| Vpix−Vccw |) applied between the gate and source of the transistor Tr13 is charged and held in the capacitor Cs.

  At this timing, an on-level (high level) selection signal Ssel is applied from the selection driver 120 to the selection line Ls of the (i + 1) th row, so that the display pixel PIX of the (i + 1) th row A write operation similar to is performed. That is, in the holding operation period Thld of the i-th display pixel PIX, the voltage components corresponding to the display data are sequentially applied to the display pixels PIX in all other rows of the group including the i-th display pixel PIX. The holding operation is continued until writing and holding.

(Light emission operation period)
Next, in the light emission operation period Tem after the end of the write operation period Twrt and the holding operation period Thld, as shown in FIG. 11, an off level (low level) selection signal Ssel is applied from the selection driver 120 to the selection line Ls of each row. In the applied state, Vcce (second power supply voltage) that is a light emission operation level is applied from the power supply driver 130 to the power supply voltage line Lv commonly connected to all the display pixels PIX of the group including the display pixel PIX in the i-th row. To do.

  Here, the power supply voltage Vcce applied to the power supply voltage line Lv is equal to the saturation voltage (pinch-off voltage Vpo) of the transistor Tr13 and the drive voltage (Voled) of the organic EL element OLED, as in the case shown in FIGS. Thus, the transistor Tr13 operates in the saturation region. Further, a positive voltage corresponding to the voltage component (| Vpix−Vccw |) set between the gate and the source of the transistor Tr13 by the above writing operation is applied to the anode side (contact N12) of the organic EL element OLED. On the other hand, since the ground potential GND (0 V) is applied to the cathode side, the organic EL element OLED is set to the forward bias state, so that the organic EL element OLED is connected to the organic EL element OLED through the transistor Tr13 from the power supply voltage line Lv. Then, a light emission drive current Iem (drain-source current Ids of the transistor Tr13) having a current value corresponding to the display data flows, and a light emission state in which light emission operation is performed at a predetermined luminance gradation is obtained.

This light emitting operation is continuously executed until the next display driving period (one processing cycle period) Tcyc is started when the power supply voltage Vcc of the writing operation level is applied from the power supply driver 130.
At this timing, the same writing operation as described above is performed on the display pixels PIX in another group different from the group including the display pixels PIX in the i and (i + 1) th rows in which the light emission operation is performed. And a holding operation is performed. That is, with respect to the display pixels PIX included in a specific group, the display pixels PIX included in the other groups (already the writing operation) while the writing operation and the holding operation are performed for each row. And the group in which the holding operation is completed for all the display pixels PIX), the light emitting operation corresponding to the display data is continuously executed.

Next, a specific example in the case where the above-described drive control method for a display device is applied to a display device having the display panel shown in FIG. 10 will be described.
FIG. 12 is an operation timing chart schematically showing a specific example of the drive control method for the display device according to the present embodiment. In FIG. 12, for convenience of explanation, display pixels of 12 rows (n = 12; 1st to 12th rows) are arranged on the display panel for convenience, 1st to 6th rows and 7th to 12th rows. The operation | movement timing diagram in case the display pixel of an eye is divided into 2 sets as 1 set is shown.

  The drive control operation of the display device 100 shown in FIG. 10 is performed as described above with respect to the display pixels PIX (pixel drive circuit DC) for each row of the display panel 110 within one frame period Tfr as shown in FIG. In each group, the writing operation and the holding operation are sequentially performed at different timings. In each group, the light emission operation is simultaneously performed on the display pixels PIX of the group in which the writing operation to the display pixels PIX of all the rows included in the group is completed. Executed.

  Specifically, in a group in which the display pixels PIX in the first to sixth rows are set as one set, the power supply voltage Vccw is applied via the power supply voltage line Lv commonly connected to all the display pixels PIX in the group. The timing at which the writing operation (writing operation period Twrt) and the holding operation (holding operation period Thld) are executed in order from the display pixel PIX in the first row, and the writing operation is finished for the display pixel PIX in the sixth row. Then, switching is performed so that the power supply voltage Vcce is applied via the power supply voltage line Lv, and the display pixels PIX for the six rows of the group are displayed based on the display data (gradation signal Vpix) written in each display pixel PIX. The flash operation is performed all at once. This light emission operation is continued until the next writing operation is started for the display pixels PIX in the first row (light emission operation period Tem).

  In addition, at the timing when the writing operation is completed for the display pixels PIX in the sixth row, in the group including the display pixels PIX in the seventh to twelfth rows, they are commonly connected to all the display pixels PIX in the group. In a state where the power supply voltage Vccw is applied via the power supply voltage line Lv, the write operation (write operation period Twrt) and the hold operation (hold operation period Thld) are sequentially performed from the display pixel PIX in the seventh row. At the timing when the writing operation is finished for the display pixel PIX in the twelfth row, switching is performed so that the power supply voltage Vcce is applied via the power supply voltage line Lv, and the display data (gradation signal Vpix) written in each display pixel PIX. Based on the above, the display pixels PIX for the six rows of the group simultaneously emit light (light emission operation period Tem). During the period in which the writing operation and the holding operation are performed on the display pixels PIX in the seventh to twelfth rows, as described above, the power supply voltage line Lv is connected to the display pixels PIX in the first to sixth rows. Through the application of the power supply voltage Vcce, the operation of simultaneously emitting light is continued.

  As described above, the writing operation and the holding operation are sequentially executed for each row at a predetermined timing, and the writing operation to the display pixels PIX of all the rows included in the group is completed for each preset group. At that time, drive control is performed so that all the display pixels PIX in the group emit light simultaneously. Therefore, in the drive control operation according to this specific example, during the period in which the writing operation is being performed on the display pixels PIX in other rows of the same group, all the display pixels PIX in the group are not present. Control is performed so that a light emission operation (black display operation) is performed.

  Therefore, according to the drive control method (display drive operation) of such a display device, the light emission operation of the display pixels (light emitting elements) is not performed during the period in which the write operation is performed on the display pixels in each row in the same group. , It can be set to a non-light emitting state (black display state). Here, in the timing chart shown in FIG. 12, the 12 rows of display pixels PIX constituting the display panel 110 are grouped into two groups, and the light emission operation is executed simultaneously at different timings for each group. Since it is controlled, the ratio (black insertion rate) of the black display period by the non-light emission operation in one frame period Tfr can be set to 50%. Here, in order to visually recognize a moving image clearly without blurring or blurring in human vision, it is generally a guideline that the black insertion rate is approximately 30% or more. Accordingly, a display device having a relatively good display image quality can be realized.

  In this specific example, the case where a plurality of display pixels arranged on the display panel are grouped into two groups for each successive row has been described. However, the present invention is not limited to this. It may be grouped into an arbitrary number of sets such as a set or four sets, or may be grouped with non-consecutive rows such as even rows and odd rows. According to this, the light emission time and the black display period (black display state) can be arbitrarily set according to the number of groups divided into groups, and the display image quality can be improved.

  In addition, as shown in this example, the display pixels arranged on the display panel are not divided into groups, and individual power supply voltage lines are provided for each row, and a predetermined power supply voltage is applied to each row from the power supply driver. Thus, the series of drive control operations including the above-described writing operation, holding operation, and light emitting operation may be repeatedly executed for one screen.

  As described above, according to the display device and the drive control method thereof according to the present embodiment, the voltage value corresponding to the display data between the gate and the source of the drive transistor (transistor Tr13) during the display data write operation period. Is directly applied to the gradation signal Vpix, whereby a predetermined voltage component (| Vpix−Vccw |) is held in the capacitor (capacitor Cs), and the light emitting element (organic EL element OLED) is based on the voltage component. A voltage designation type (or voltage application type) gradation control method for controlling the light emission driving current Iem to be applied to the light source and emitting light at a desired luminance gradation can be applied.

  Therefore, the display panel is increased in size and definition as compared with the current designation type gradation control method in which a current corresponding to the display data is supplied to perform a writing operation (a voltage component corresponding to the display data is held). Even in the case of low-grayscale display or when performing low-gradation display, gradation signals according to display data can be quickly and appropriately written to each display pixel, thus suppressing the occurrence of insufficient writing of display data Thus, a light emission operation can be performed with an appropriate luminance gradation according to display data, and a good display image quality can be realized. In addition, since a voltage value corresponding to display data can be designated and applied directly in the writing operation to each display pixel, the writing operation can be performed. The power consumption of the display device in operation can be greatly reduced.

It is an equivalent circuit diagram which shows the principal part structure of the display pixel applied to the display apparatus which concerns on this invention. It is a signal waveform diagram which shows the control operation of the display pixel applied to the display apparatus which concerns on this invention. It is a schematic explanatory drawing which shows the operation state of the display pixel at the time of writing operation. It is a characteristic view which shows the operation characteristic of the drive transistor of a display pixel at the time of writing operation, and the characteristic of an organic EL element. It is a schematic explanatory drawing which shows the operation state at the time of the holding | maintenance operation | movement of a display pixel. FIG. 10 is a characteristic diagram illustrating operating characteristics of a driving transistor during a display pixel holding operation. It is a schematic explanatory drawing which shows the operation state at the time of light emission operation | movement of a display pixel. It is a characteristic view which shows the operation characteristic of the drive transistor of a display pixel at the time of light emission operation, and the load characteristic of an organic EL element. It is a circuit block diagram which shows an example of the display pixel (a pixel drive circuit and a light emitting element) applicable to the display apparatus which concerns on this invention. It is a schematic block diagram which shows one Embodiment of the display apparatus which concerns on this invention. 6 is a timing chart illustrating an example of a drive control method for display pixels arranged in a specific row in the display device according to the embodiment. FIG. 5 is an operation timing chart schematically showing a specific example of a display device drive control method according to the present embodiment. It is an equivalent circuit diagram which shows the structural example of the display pixel (a pixel drive circuit and a light emitting element) applicable to the light emitting element type display in a prior art.

Explanation of symbols

DCx pixel circuit unit OLED organic EL element T1 drive transistor T2 holding transistor Cx, Cs capacitor Ls selection line Lv power supply voltage line Ld data line PIX display pixel DC pixel drive circuit 100 display device 110 display panel 120 selection driver 130 power supply driver 140 data driver 150 System controller

Claims (14)

In a display device including a display panel in which a plurality of display pixels including current-driven light emitting elements are two-dimensionally arranged,
The display pixel includes a pixel circuit unit for causing the light emitting element to emit light at a desired luminance gradation,
The pixel circuit unit is at least
First switching in which one of the first power supply voltage and the second power supply voltage is applied to one end of the current path, and a connection contact with the light emitting element is connected to the other end of the current path Elements,
A second switching element in which the power supply voltage is applied to one end side of the current path, and a control terminal of the first switching element is connected to the other end side of the current path;
A voltage holding element connected between the control terminal of the first switching element and the connection contact;
Comprising
The display device, wherein the first power supply voltage has a voltage value that makes the light emitting element non-light emitting, and the second power supply voltage has a voltage value that makes the light emitting element light emitting. The display device
A power supply voltage control unit that applies the power supply voltage to one end of the current path of the first switching element provided in the pixel circuit unit;
A data voltage controller that applies a data voltage corresponding to display data to the other end of the current path of the first switching element;
The display device according to claim 1, further comprising: The display device includes a connection state control unit that controls a conduction state of the current path of the second switching element, and the connection state control unit includes:
When applying the first power supply voltage from the power supply voltage control unit to one end side of the current path of the first switching element and applying the data voltage to the other end side of the current path, the second Connecting the one end side of the current path of the first switching element and the control terminal of the first switching element,
When applying the second power supply voltage from the power supply voltage control unit to one end side of the current path of the first switching element, and causing a driving current based on the voltage held in the voltage holding element to flow to the light emitting element In addition, the current path of the second switching element is made non-conductive, and the connection between one end of the current path of the first switching element and the control terminal of the first switching element is released. The display device according to claim 2. 3. The display according to claim 2, wherein the power supply voltage control unit sequentially applies the power supply voltage to the display pixels for each row in the plurality of display pixels that are two-dimensionally arranged on the display panel. apparatus. The said power supply voltage control part applies the said power supply voltage sequentially with respect to the said display pixel for every several rows in these display pixels arranged two-dimensionally on the said display panel. Display device. 6. The display device according to claim 1, wherein each of the first and second switching elements is a field effect transistor including a semiconductor layer made of amorphous silicon. The pixel circuit unit further includes a third switching unit in which the data voltage is applied to one end side of the current path, and the other end side of the current path of the first switching element is connected to the other end side of the current path. The display device according to claim 2, further comprising an element. 8. The display device according to claim 7, wherein the third switching element is a field effect transistor including a semiconductor layer made of amorphous silicon. The display device according to claim 1, wherein the light emitting element is an organic electroluminescence element. In a drive control method for a display device including a display panel in which a plurality of display pixels including current-driven light emitting elements are two-dimensionally arranged,
The display pixel includes at least a first switching element in which a predetermined power supply voltage is applied to one end side of the current path and a connection contact with the light emitting element is connected to the other end side of the current path; The power supply voltage is applied to one end side, the second switching element connected to the control terminal of the first switching element on the other end side of the current path, the control terminal of the first switching element and the A voltage holding element connected between the connection contacts, and a pixel circuit unit comprising:
Conducting the current path of the second switching element to electrically connect a control terminal of the first switching element and one end side of the current path of the first switching element; A first power supply voltage having a voltage value that makes the light emitting element in a non-light-emitting state is applied to one end side of the current path of the switching element, and a data voltage corresponding to display data is applied to the other end side of the current path. Write operation;
The current path of the second switching element is made non-conductive, the control terminal of the first switching element is electrically disconnected from one end of the current path of the first switching element, and the current is Holding operation to hold the voltage component corresponding to the potential difference applied to both ends of the path in the voltage holding element;
Applying a second power supply voltage having a voltage value for causing the light emitting element to emit light to one end side of the current path of the first switching element, making the current path of the second switching element non-conductive; A light emitting operation for causing a driving current based on the voltage component held in the voltage holding element to flow to the light emitting element;
A drive control method for a display device, comprising: 11. The display device drive control method according to claim 10, wherein the data voltage has a negative polarity voltage amplitude with respect to the first power supply voltage. 12. The display device drive control method according to claim 10, wherein the second power supply voltage has a voltage value for operating the first switching element in a saturated state. 13. The display according to claim 10, wherein at least the light emitting operation is sequentially performed on the display pixels in each row of the plurality of display pixels arranged two-dimensionally on the display panel. Device drive control method. 13. The light emitting operation according to claim 10, wherein at least the light emission operation is sequentially performed on the display pixels in a plurality of rows of the plurality of display pixels that are two-dimensionally arranged on the display panel. A display device drive control method.

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