JP2008028524A - Signal switch unit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a signal switch unit achieving low distortion and high isolation characteristics to a high power output signal even in a situation of a decreased control signal voltage outputted from a digital circuit. <P>SOLUTION: The signal switch unit includes a voltage conversion circuit 101 for outputting, to a high-frequency switch 100, a control signal to control conduction/cutoff of the high-frequency switch 100, by inputting a control input signal externally supplied to control the conduction/cutoff of the high-frequency switch 100, and by voltage-converting the control input signal. A regulator voltage is externally applied to the supply voltage terminal of the voltage conversion circuit 101. By supplying a voltage, converted from the regulator voltage to a predetermined voltage value within the absolute value range of the regulator voltage value, to the high-frequency switch 100 as a control signal, a potential difference between the high-level signal potential and the low-level signal potential of the control signal is made larger than a potential difference between the high-level signal potential and the low-level signal potential of the control input signal. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a high-frequency signal switching device that is composed of a semiconductor integrated circuit and is used in a communication terminal device such as a mobile phone or a wireless communication device. This signal switching device is used, for example, for switching a signal path for an antenna.

  Today, the development of mobile communication business including mobile phones is remarkable. In these mobile terminals used for mobile communication, MMIC (Monolithic Microwave IC) is used to realize miniaturization and low power consumption, and MMIC is being actively developed. A high-frequency signal switching device that switches a high-frequency signal in a portable terminal is also manufactured by MMIC, and its development has become important.

  A conventional example of a signal switching device used for such a purpose is disclosed in, for example, Japanese Patent Laid-Open No. 8-070245. A field effect transistor (FET) is often used as a switching device for a high-frequency switch in a high-frequency signal switching device.

  FIG. 7 is a block diagram showing the prior art of the signal switching device. As shown in FIG. 7, this signal switching device includes a high-frequency switch 100, and has input terminals I1 to In (n is a natural number), output terminals O1 to On, and control input terminals S1 to Sn. is doing. Then, the connection relationship between the input terminals I1 to In and the output terminals O1 to On is switched according to the state of the control input signal applied to the control input terminals S1 to Sn. The high frequency switch 100 is directly supplied with the control input signals input to the control input terminals S1 to Sn, and thereby the high frequency switch 100 controls the conduction interruption of the switch device.

  In order to use the FET as a switching device, it is necessary to control the bias voltage applied to the gate terminal of the FET. For example, by applying a gate bias sufficiently higher than the pinch-off voltage to the gate terminal to make the drain-source low impedance, the FET is controlled to be turned on, and conversely, the gate is sufficiently lower than the pinch-off voltage to the gate terminal. The FET can be controlled to be in an off state by applying a bias to make the drain-source high impedance.

  In this way, the function of the high-frequency switch is provided by switching the signal path by changing the voltage of the gate terminal of the FET.

  As an example of the switch circuit having such a configuration, there is an SPDT (Single Pole Dual Throw) switch formed by combining one series FET and one shunt FET with respect to the signal path. By adopting this configuration, the RF (Radio Frequency) signal leaking from the series FET in the off state through the capacitive component can be drawn into the ground by the shunt FET in the on state, so that high isolation can be obtained. Become.

  When an FET is used as a switching element, the maximum transmittable power (Pmax) that can be processed with low distortion and high isolation characteristics is expressed by the following equation.

Pmax = 2 | Vc−Vp | ² / Z
Vc: gate terminal control voltage Vp: pinch-off voltage Z: load impedance At this time, in order to increase the maximum transmittable power, it is necessary to increase the difference between the gate terminal control voltage (Vc) and the pinch-off voltage (Vp).
JP-A-8-70245

  Today, LSIs mounted on portable terminals have been miniaturized, and accordingly, the output voltage of digital circuits such as baseband circuits has been lowered due to the influence of the breakdown voltage of transistors in the LSI. In order to control the high-frequency switch in such a situation, the control signal voltage output from the digital circuit is also lowered from the conventional 3V to about 1.5V, and the control voltage sufficient to operate the high-frequency switch at high output. There is a problem that cannot be obtained.

  Accordingly, an object of the present invention is to provide a signal switching device that realizes low distortion and high isolation characteristics for a high output signal even when the control signal voltage output from the digital circuit is low. is there.

  In order to solve the above-described problems, a signal switching device according to the present invention receives a high-frequency switch and a control input signal supplied from outside to control conduction / cutoff of the high-frequency switch, and converts the control input signal to a voltage. A voltage conversion circuit that outputs a control signal for controlling conduction / cutoff of the high frequency switch to the high frequency switch. The voltage conversion circuit is configured such that a power supply voltage is externally applied to the power supply voltage terminal, and the power supply voltage is set to a voltage value of the power supply voltage. By supplying a voltage converted to a predetermined voltage value within the absolute value range as a control signal to the high-frequency switch, the potential difference between the high-level signal potential and the low-level signal potential of the control signal is changed to the control input signal. It is converted to a state where it becomes larger than the potential difference between the potential of the high level signal and the potential of the low level signal.

  According to this configuration, by applying the output voltage of another circuit such as a regulator voltage higher than the reduced output voltage of a digital circuit such as a baseband circuit to the power supply voltage terminal of the voltage conversion circuit as a power supply voltage, In order to control the switch, the reduced control signal voltage output from the digital circuit can be converted into a higher voltage. Thereby, compared with the prior art example shown in FIG. 7, the high frequency switch can be operated with low distortion and high isolation characteristics.

  In addition, since the voltage conversion circuit does not use an oscillation circuit or the like, the occurrence of spurious and the like can be reduced, and the voltage conversion circuit can be realized with a simple circuit configuration.

  In the above configuration, the voltage conversion circuit is connected in series between the power supply voltage terminal and the ground terminal, a resistor and a DC switch that switches conduction / cutoff between the ground terminal and the resistor in order from the power supply voltage terminal side. It is preferable that the DC switch is configured such that conduction / cutoff is controlled by a control input signal.

  In the above configuration, the voltage conversion circuit has a configuration in which two DC switches are connected in series between the power supply voltage terminal and the ground terminal, and one of the two DC switches is conductive. In some cases, the other circuit may be cut off, and the conduction / cutoff of the two DC switches may be controlled by a control input signal.

  The two DC switches are composed of, for example, a pMOSFET and an nMOSFET that constitute a CMOS circuit.

  In the above configuration, for example, a negative voltage is used as the power supply voltage of the voltage conversion circuit. Also, a positive voltage and a negative voltage may be used as the power supply voltage of the voltage conversion circuit.

  In the above configuration, the signal switching device preferably integrates the high-frequency switch and the voltage conversion circuit on the same semiconductor substrate into a single chip.

  In the above configuration, the signal switching device may be manufactured by using a plurality of semiconductor substrates and the high-frequency switch and the voltage conversion circuit mounted on one package.

  The signal switching circuit of the present invention has the above-described configuration, and realizes low distortion and high isolation characteristics for a high output signal even when the control signal voltage output from the digital circuit is lowered. be able to.

  FIG. 1 is a block diagram showing the configuration of the signal switching device of the present invention. As shown in FIG. 1, the signal switching device includes a high-frequency switch 100 and a voltage conversion circuit 101, and includes input terminals I1 to In (n is a natural number), output terminals O1 to On, and control inputs. It has terminals S1 to Sn. Then, the connection relationship between the input terminals I1 to In and the output terminals O1 to On is switched according to the state of the control input signal applied to the control input terminals S1 to Sn.

  The voltage conversion circuit 101 receives a control input signal input from the outside to the control input terminals S1 to Sn (n is a natural number) to control conduction / cutoff of the high frequency switch 100, converts the control input signal into a voltage, and converts the high frequency The control signal is output to the switch 100 as a control signal for controlling conduction / cutoff of the high frequency switch 100. And according to the state of the control input signal applied to the control input terminals S1 to Sn, the high frequency switch 100 switches the connection relationship between the input terminals I1 to In and the output terminals O1 to On.

  The high-frequency switch 100 is composed of a plurality of switch devices, and their conduction and interruption are controlled by a control signal, whereby the path of the high-frequency signal between the input terminals I1 to In and the output terminals O1 to On is switched. .

  The voltage conversion circuit 101 applies a power supply voltage to the power supply voltage terminal Vdd from the outside, and converts a voltage obtained by converting the power supply voltage into a predetermined voltage value within the absolute value range of the power supply voltage. Alternatively, by setting the potential of the low level signal, the potential difference between the potential of the high level signal of the control signal and the potential of the low level signal is changed to the potential of the high level signal of the control input signal to the control input terminals S1 to Sn and the low level. It is converted to a state where it becomes larger than the potential difference from the signal potential.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
As a first embodiment of the signal switching circuit of the present invention, an antenna switch semiconductor integrated circuit is shown in FIG. This is an SP3T (Single Pole Three Throw) switch. The antenna switch semiconductor integrated circuit of this embodiment is composed of a gallium arsenide (GaAs) semiconductor chip.

  More specifically, in this antenna switch semiconductor integrated circuit, the high frequency switch 100 is composed of field effect transistors FET1-FET3. The voltage conversion circuit 101 includes resistors R1-R3 and field effect transistors FET4-FET6.

  Each of the field effect transistors FET1 to FET6 is a depletion type MESFET. The field effect transistors FET1 to FET3 are high frequency switch field effect transistors that pass and block signals. The field effect transistors FET4 to FET6 function as DC switches to switch the output voltage of the voltage conversion circuit, that is, the high level and low level of the control signal. Further, a regulator voltage of a DC power source of a system (for example, a mobile phone, hereinafter simply referred to as “set”) in which the signal switching circuit of the present invention is mounted on the power supply voltage terminal Vdd1 is applied from the control input terminal INA to the control input terminal INC. A voltage higher than the control input signal voltage is applied.

  For example, when a positive voltage to the extent that the field effect transistor FET4 is turned off is applied to the control input terminal INA as a control input signal, and a voltage of 0 V is applied to the control input terminal INB and the control input terminal INC, the power supply voltage terminal A voltage reduced by the voltage drop of the resistor R1 due to the gate leakage current of the field effect transistor with respect to the applied voltage of Vdd1 is applied to the gate of the field effect transistor FET1, the field effect transistor FET1 is turned on, and the RF input / output terminal ( Antenna terminal) A signal is passed between the ANT and the RF input / output terminal PORTA. At this time, by adjusting the resistance value of the resistor R1, the voltage value of the voltage applied to the gate of the field effect transistor FET1 within the range of the absolute value of the voltage value applied to the power supply voltage terminal Vdd. Can be converted to the voltage value of the voltage applied to the control input terminal INA.

  On the other hand, the field effect transistors FET5 and FET6 are turned on, and the potentials of the gates of the field effect transistors FET2 and FET3 are approximately 0V. At this time, the current flowing from the gate of the field effect transistor FET1 to the gates of the field effect transistors FET2 and FET3 is only a leakage current at the time of reverse bias of the Schottky barrier of the field effect transistors FET2 and FET3. Only flows. Therefore, a voltage larger than the minimum voltage at which the field effect transistor FET1 is turned on is not applied between the gate and the source of the field effect transistor FET1, and instead, most of the voltage applied to the gate of the field effect transistor FET1 is not applied. A voltage is applied between the gate and source of the field effect transistors FET2 and FET3. As a result, a reverse voltage is applied between the gate and source of the field effect transistors FET2 and FET3, so that the field effect transistors FET2 and FET3 are turned off, and a signal between the RF input / output terminal ANT and the RF input / output terminal PORTB, A signal between the RF input / output terminal ANT and the RF input / output terminal PORTTC is blocked.

  In this state, the larger the potential difference between the gate potential of the field effect transistor FET1 and the gate potentials of the field effect transistors FET2 and FET3, the greater the reverse voltage applied between the gate and source of the field effect transistors FET2 and FET3. Even when a high-output high-frequency signal having a large amplitude is input, the field-effect transistors FET2 and FET3 to be cut off are not turned on, and thus can respond to a high-output signal.

  According to the antenna switch semiconductor integrated circuit of this embodiment, the field effect transistors FET1-FET3 for high-frequency switches are compared with the case where the control input signal voltage is directly applied to the gate terminals of the field-effect transistors FET1-FET3 for high-frequency switches. The gate terminal control voltage (Vc) can be increased. As a result, the potential difference between the gate of the field effect transistor that allows the signal to pass through and the gate of the field effect transistor that blocks the signal can be increased. Further, by using the regulator voltage of the set DC power source, there is no need to reconfigure the booster circuit for the signal switching circuit, the circuit configuration is simple, and a small signal switching device can be realized.

  In the antenna switch semiconductor integrated circuit of this embodiment, the high-frequency switch 100 and the voltage conversion circuit 101 are integrated on the same semiconductor substrate to form a single chip. Alternatively, the high-frequency switch 100 and the voltage conversion circuit 101 may be manufactured using a plurality of semiconductor substrates and mounted in one package.

  Needless to say, a similar circuit can be realized when an enhancement type field effect transistor is used as the high frequency switch, or when a MOS field effect transistor or bipolar transistor is used as the DC switch of the voltage conversion circuit.

  Further, as the high frequency switch, a MOS field effect transistor of a Si semiconductor chip may be used instead of the MES field effect transistor.

(Second Embodiment)
As a second embodiment of the signal switching circuit of the present invention, an antenna switch semiconductor integrated circuit is shown in FIG. This is an SPDT (Single Pole Dual Throw) switch. The antenna switch semiconductor integrated circuit of this embodiment is composed of a gallium arsenide (GaAs) semiconductor chip.

  More specifically, in this antenna switch semiconductor integrated circuit, the high frequency switch 100 includes field effect transistors FET1-FET4. The voltage conversion circuit 101 includes resistors R1-R2 and field effect transistors FET5-FET6.

  Each of the field effect transistors FET1-FET6 is a depletion type MESFET, and the field effect transistors FET1 and FET2 are high-frequency switch field effect transistors that pass and block signals. The field effect transistors FET3 and FET4 are shunt FETs for drawing a signal leaked from the field effect transistor in the OFF state of the cutoff path to the ground. The field effect transistors FET5 and FET6 function as DC switches to switch the output voltage of the voltage conversion circuit, that is, the high level and low level of the control signal. Further, a higher voltage than the control input signal voltage applied to the control input terminal INA and the control input terminal INB, such as a regulator voltage of a set DC power supply, is applied to the power supply voltage terminal Vdd1.

  For example, when a positive voltage is applied to the control input terminal INA so that the field effect transistor FET5 is pinched off, and a low voltage (approximately 0V) is applied to the control input terminal INB such that the field effect transistor FET6 is turned on, When the effect transistor FET5 is pinched off, a voltage that is reduced by the voltage drop of the resistor R1 due to the gate leakage current of the field effect transistor FET1 from the applied voltage of the power supply voltage terminal Vdd1 is applied to the gates of the field effect transistors FET1 and FET4. .

  On the other hand, the field effect transistor FET6 is in the ON state, and the voltage (approximately 0 V) applied to the control input terminal INB is directly applied to the gates of the field effect transistors FET2 and FET3.

  At this time, as in the first embodiment, the field-effect transistors FET1 and FET4 are turned on in a state where no voltage is applied between the gate and source of the field-effect transistors FET1 and FET4, and the field-effect transistor FET1 is The signal is passed, and the field effect transistor FET4 releases the signal leaked from the field effect transistor FET2 to the ground. Since most of the voltage applied to the gates of the field effect transistors FET1 and FET4 is applied as a reverse voltage between the gate and source of the field effect transistors FET2 and FET3, the field effect transistors FET2 and FET3 are pinched off, Cut off the signal.

  According to the antenna switch semiconductor integrated circuit of this embodiment, the gate terminal of the field effect transistor for the high frequency switch is compared with the case where the control input signal voltage is directly applied to the gate terminals of the field effect transistors FET1 to FET2 for the high frequency switch. The control voltage (Vc) can be increased. As a result, the potential difference between the gate of the field effect transistor that allows the signal to pass through and the gate of the field effect transistor that blocks the signal can be increased. Further, by using the regulator voltage of the set DC power source, there is no need to reconfigure the booster circuit for the signal switching circuit, the circuit configuration is simple, and a small signal switching device can be realized.

(Third embodiment)
As a third embodiment of the signal switching circuit of the present invention, an antenna switch semiconductor integrated circuit is shown in FIG. This is an SP3T (Single Pole Three Throw) switch. In the antenna switch semiconductor integrated circuit of this embodiment, the high-frequency switch portion is composed of a gallium arsenide (GaAs) semiconductor chip, and the voltage conversion circuit portion is composed of a Si semiconductor chip.

  More specifically, in this antenna switch semiconductor integrated circuit, the high frequency switch 100 is composed of field effect transistors FET1-FET3. The voltage conversion circuit 101 is composed of CMOS circuits CMOS1-CMOS3, p-type MOS field effect transistors pMOS1-pMOS3, and resistors R1-R3.

  The field effect transistors FET1 to FET3 are depletion type MESFETs, which are high-frequency switching FETs for passing and blocking signals. The CMOS circuits CMOS1 to CMOS3 serve as DC switches and switch the output voltage of the voltage conversion circuit, that is, the high level and low level of the control signal. The p-type MOS field effect transistors pMOS1 to pMOS3 change the potential difference between the gate and source of the CMOS circuit CMOS1 to the CMOS circuit CMOS3 according to the control input signal applied from the control input terminal IN / A to the control input terminal IN / C. Responsible for switching. The power supply voltage terminal Vdd2 is supplied with a negative power supply voltage having a voltage value set larger than the absolute value of the voltage value of the control input signal voltage applied from the control input terminal IN / A to the control input terminal IN / C. Apply.

  For example, a voltage of 0 V is applied to the control input terminal IN / A, and positive voltages are applied to the control input terminal IN / B and the control input terminal IN / C so that the p-type MOS field effect transistors pMOS2 and pMOS3 are turned on. Apply. At this time, the p-type MOS field effect transistor pMOS1 is turned off and no current flows through the resistor R1, and the gate and the source of the n-type MOS field effect transistor of the CMOS circuit CMOS1 become the same potential and the n-type MOS of the CMOS circuit CMOS1. The field effect transistor is turned off, and the p-type MOS field effect transistor of the CMOS circuit CMOS1 is turned on instead. Therefore, a voltage of approximately 0V is applied to the gate of the field effect transistor FET1.

  On the other hand, the p-type MOS field effect transistors pMOS2 and pMOS3 are turned on, current flows through the resistors R2 and R3, and a potential difference is generated between the gates and sources of the nMOSs of the CMOS circuit CMOS2 and the CMOS circuit CMOS3. The n-type MOS field effect transistor of the CMOS circuit CMOS3 is turned on, and a voltage substantially the same as the negative voltage applied to the power supply voltage terminal Vdd2 is applied to the gates of the field effect transistors FET2 and FET3.

  Even in such a state, as in the first embodiment, the field effect transistor FET1 has a minimum potential difference between the gate and the source of the field effect transistor FET1 so that the field effect transistor FET1 is turned on. The effect transistor FET1 passes a signal. For the field effect transistors FET2 and FET3, most of the voltage of the potential difference between the gate of the field effect transistor FET1 and the gates of the field effect transistors FET2 and FET3 is a reverse voltage between the gate and source of the field effect transistors FET2 and FET3. Are applied, the field effect transistors FET2 and FET3 are turned off, and the field effect transistors FET2 and FET3 block the signal.

  The antenna switch semiconductor integrated circuit of this embodiment has a configuration in which the high-frequency switch 100 and the voltage conversion circuit 101 are manufactured using a plurality of semiconductor substrates and mounted in one package.

  According to the antenna switch semiconductor integrated circuit of this embodiment, compared with the case where the control input signal voltage is directly applied to the gate terminals of the high-frequency switch field effect transistors FET1-FET3, the gate terminal control of the high-frequency switch field effect transistor is performed. The voltage (Vc) can be increased. As a result, the potential difference between the gate of the field effect transistor that allows the signal to pass through and the gate of the field effect transistor that blocks the signal can be increased. Further, by using the regulator voltage of the set DC power source, there is no need to reconfigure the booster circuit for the signal switching circuit, the circuit configuration is simple, and a small signal switching device can be realized.

(Fourth embodiment)
As a fourth embodiment of the signal switching circuit of the present invention, an antenna switch semiconductor integrated circuit is shown in FIG. This is an SP3T (Single Pole Three Throw) switch. In the antenna switch semiconductor integrated circuit of this embodiment, the high-frequency switch portion is composed of a gallium arsenide (GaAs) semiconductor chip, and the voltage conversion circuit portion is composed of a Si semiconductor chip.

  More specifically, in this antenna switch semiconductor integrated circuit, the high frequency switch 100 is composed of field effect transistors FET1-FET3. The voltage conversion circuit 101 includes a CMOS circuit CMOS1-CMOS6, p-type MOS field effect transistors pMOS1-pMOS3, n-type MOS field effect transistors nMOS1-nMOS3, and resistors R1-R6.

  The field effect transistors FET1 to FET3 are high-frequency switch field effect transistors that pass and block signals and are depletion type MESFETs. The CMOS circuits CMOS1 to CMOS3 operate as DC switches to switch the output voltage of the voltage conversion circuit, that is, the high level and low level of the control signal. The CMOS circuits CMOS4 to CMOS6 are responsible for switching the high level and low level of the source potential of the n-type MOS field effect transistors of the CMOS circuits CMOS1 to CMOS3 as DC switches. The p-type MOS field effect transistors pMOS1 to pMOS3 are responsible for switching the potential difference between the gate and the source of the CMOS circuit CMOS1 to the CMOS circuit CMOS3 according to the control input signal applied from the control input terminal INA to the control input terminal INC. . The n-type MOS field effect transistors nMOS1 to nMOS3 are inverter FETs that invert the high level and low level of the control input signal applied from the control input terminal INA to the control input terminal INC. A voltage higher than the control input signal voltage applied from the control input terminal INA to the control input terminal INC, such as a regulator voltage, is applied to the power supply voltage terminal Vdd1, and a negative voltage is applied to the power supply voltage terminal Vdd2.

  For example, a positive voltage is applied to the control input terminal INA as a control input signal so that the n-type MOS field effect transistor nMOS1 is turned on, and a voltage of 0 V is applied to the control input terminal INB and the control input terminal INC. At this time, since the n-type MOS field effect transistor nMOS1 is in the ON state, the potential of the gate of the CMOS circuit CMOS1 and the drain of the p-type MOS field effect transistor pMOS1 is approximately 0 V due to the voltage drop of the resistor R4. Since the pMOS 1 is turned off, the n-type MOS field effect transistor of the CMOS circuit CMOS 4 is turned off on the same principle as in the second embodiment, and the CMOS circuit CMOS 4 outputs a voltage of approximately 0V. As a result, the source potential of the n-type MOS field effect transistor of the CMOS circuit CMOS1 is almost 0 V, and the n-type MOS field effect transistor of the CMOS circuit CMOS1 is turned off. Instead, the p-type MOS field effect transistor of the CMOS circuit CMOS1 Is turned on, and a voltage substantially equal to the voltage applied to the power supply voltage terminal Vdd1 is output and applied to the gate of the FET1.

  On the other hand, the n-type MOS field effect transistor nMOS2 is in the off state, and the potentials of the gate of the CMOS circuit CMOS2 and the drain of the p-type MOS field effect transistor pMOS2 are approximately the same as the voltage applied to the power supply voltage terminal Vdd1. The p-type MOS field effect transistor pMOS2 is in the on state, and the n-type MOS field effect transistor in the CMOS circuit CMOS5 is turned on in the same principle as in the second embodiment, and the CMOS circuit CMOS5 is applied to the power supply voltage terminal Vdd2. Outputs the same voltage as the voltage. As a result, a voltage similar to the negative voltage applied to the power supply voltage terminal Vdd2 is applied to the source of the n-type MOS field effect transistor of the CMOS circuit CMOS2, so that the n-type MOS field effect transistor of the CMOS circuit CMOS2 is turned on. The CMOS circuit CMOS2 outputs a voltage approximately equal to the negative voltage applied to the power supply voltage terminal Vdd2, and applies it to the gate of the field effect transistor FET2. Similarly, the CMOS circuit CMOS6 applies a voltage approximately equal to the negative voltage applied to the power supply voltage terminal Vdd2 to the gate of the field effect transistor FET3.

  Also in this case, as in the first embodiment, the field effect transistor FET1 is turned on to pass a signal, and a large reverse voltage is applied between the gate and source of the field effect transistors FET2 and FET3 to turn off the field effect transistor. FET2 and FET3 block signals.

  According to the antenna switch semiconductor integrated circuit of this embodiment, the signal and the gate of the field effect transistor that allows the signal to pass are cut off as compared with the case where the control input signal voltage is directly applied to the gate terminal of the field effect transistor for the high frequency switch. Since the potential difference between the gate of the field-effect transistor and the gate can be increased, a high output response can be achieved, and an oscillation circuit is not used unlike the booster circuit.

(Fifth embodiment)
As a third embodiment of the signal switching circuit of the present invention, an antenna switch semiconductor integrated circuit is shown in FIG. This is an SP3T (Single Pole Three Throw) switch. The antenna switch semiconductor integrated circuit of this embodiment is composed of a gallium arsenide (GaAs) semiconductor chip.

  More specifically, the field effect transistor is a depletion type MESFET, and the field effect transistors FET1 to FET3 are switching field effect transistors for passing and blocking signals. Field effect transistors FET4 to FET6 are shunt field effect transistors for drawing a signal leaked from a field effect transistor in an OFF state of the cutoff path to the ground. Since the diodes D1 to D6 are operated as OR logic circuits, Schottky diodes are used. The field effect transistors FET7 to FET9 function as DC switches to switch the output voltage of the voltage conversion circuit, that is, the high level and low level of the control signal. Further, a voltage higher than the control input signal voltage applied from the control input terminal INA to the control input terminal INC, such as a regulator voltage of a set DC power supply, is applied to the power supply voltage terminal Vdd1.

  For example, a positive voltage is applied to the control input terminal INA so that the field effect transistor FET7 is pinched off, and the control input terminal INB and the control input terminal INC are applied with a low voltage (approximately the same as the field effect transistors FET8 and FET9 are turned on). 0V), the field effect transistor FET7 is pinched off, so that the voltage that is reduced by the voltage drop due to the gate leakage current of the field effect transistor FET1 from the voltage applied to the power supply voltage terminal Vdd1 is reduced. The field effect transistor FET1 is applied to D3 and the diode D6, and is turned on to pass the signal as in the first embodiment. The diode D3 and the diode D6 operate as an OR logic circuit, and the field effect transistors FET5 and FET6. The game In order to set the potential to the high level, the field effect transistors FET5 and FET6 are turned on as in the first embodiment, and the field effect transistors FET5 and FET6 let the signals leaking from the field effect transistors FET2 and FET3 escape to the ground. .

  On the other hand, the field effect transistors FET8 and FET9 are in the ON state, and the voltage (approximately 0V) applied to the control input terminal INB and control input terminal INC is directly applied to the gates of the field effect transistors FET2 and FET3. Similarly to the embodiment, the field effect transistors FET2 and FET3 are turned off to block signals.

  According to the antenna switch semiconductor integrated circuit of this embodiment, the gate terminal control voltage (Vc) of the high-frequency switch field effect transistor is compared with the case where the control input signal voltage is directly applied to the gate terminal of the high-frequency switch field effect transistor. Can be high. As a result, the potential difference between the gate of the field effect transistor that allows the signal to pass through and the gate of the field effect transistor that blocks the signal can be increased, so that it is possible to cope with high output, and by using the regulator voltage of the DC power supply of the set The booster circuit for the signal switching circuit does not need to be reconfigured, the circuit configuration is simple, and a small signal switching device can be realized.

As described above, in the signal switching device according to the present invention, in order to control the operation of the switching field effect transistor by the plurality of switching field effect transistors and the power supply voltage applied to the power supply voltage terminal from the outside. It has a voltage conversion circuit that converts and outputs a control signal voltage output from a digital circuit such as a baseband circuit,
A structure using a MESFET of a GaAs semiconductor chip as a switching field effect transistor constituting a high-frequency switch.A structure using a MOSFET of a Si semiconductor chip is used as a switching field effect transistor constituting a high-frequency switch.
・ Configuration using GaAs semiconductor chip MESFET as voltage conversion circuit ・ Configuration using MOSFET of Si semiconductor chip as voltage conversion circuit ・ Configuration using bipolar transistor as voltage conversion circuit Prepare. The FET used may be either a single gate or a multi-gate, and may be either an enhancement type or a depletion type. The power supply voltage applied to the voltage conversion circuit may be either positive or negative, or both positive and negative. Further, the circuit may be integrated on a GaAs or Si substrate to form a single chip. Further, the high-frequency switch portion and the voltage conversion circuit portion may be formed using different semiconductor substrates and mounted on one package.

  The signal switching circuit according to the present invention can increase the gate terminal control voltage of the field effect transistor for the high frequency switch as compared with the case where the control input signal voltage is directly applied to the gate terminal of the field effect transistor for the high frequency switch. Because of this, it is possible to increase the potential difference between the gate of the field effect transistor that passes the signal and the gate of the field effect transistor that blocks the signal, so that it can cope with high output, and since the booster circuit is not used, the circuit configuration is simple. Therefore, a small signal switching device can be realized, and it is useful as a high-frequency signal switching device used in a communication terminal device such as a mobile phone or a wireless communication device. It is possible to provide a signal switching device having low distortion and high isolation characteristics corresponding to lowering of the output voltage of a digital circuit such as a baseband circuit.

It is a block diagram which shows the structure of this invention. It is a circuit diagram which shows the structure of the 1st Embodiment of this invention. It is a circuit diagram which shows the structure of the 2nd Embodiment of this invention. It is a circuit diagram which shows the structure of the 3rd Embodiment of this invention. It is a circuit diagram which shows the structure of the 4th Embodiment of this invention. It is a circuit diagram which shows the structure of the 5th Embodiment of this invention. It is a block diagram which shows the conventional structure.

Explanation of symbols

FET1-FET9 Field effect transistors CMOS1-CMOS6 CMOS circuit nMOS1-nMOS3 n-type MOS field-effect transistors pMOS1-pMOS3 p-type MOS field-effect transistors D1-D6 Schottky diodes R1-R6 Resistors Vdd1, Vdd2 Power supply voltage terminals INA, INB Control input Terminals ANT, PORTA to PORTTC RF input / output terminal 100 High frequency switch 101 Voltage conversion circuit

Claims (8)

A high frequency switch,
A control input signal given to control conduction / cut-off of the high-frequency switch from outside is input, and the control input signal is converted into a voltage and output to the high-frequency switch as a control signal for controlling conduction / cut-off of the high-frequency switch. And a voltage conversion circuit that
The voltage conversion circuit applies a power supply voltage to a power supply voltage terminal from the outside, and converts the power supply voltage into a predetermined voltage value within a range of absolute values of the power supply voltage to the high-frequency switch. By supplying as a control signal, the potential difference between the high-level signal potential and the low-level signal potential of the control signal is compared with the potential difference between the high-level signal potential and the low-level signal potential of the control input signal. The signal switching device adapted to convert to a larger state.   In the voltage conversion circuit, a resistor and a DC switch for switching between conduction and interruption between the ground terminal and the resistor are connected in series between the power supply voltage terminal and the ground terminal in order from the power supply voltage terminal side. The signal switching device according to claim 1, wherein the DC switch is controlled to be turned on and off by the control input signal.   The voltage conversion circuit has a configuration in which two DC switches are connected in series between the power supply voltage terminal and a ground terminal, and when one of the two DC switches is conductive, the other is cut off. 2. The signal switching device according to claim 1, wherein the two DC switches are controlled to be turned on and off by the control input signal.   The signal switching device according to claim 3, wherein the two DC switches include a pMOSFET and an nMOSFET that constitute a CMOS circuit.   The signal switching device according to claim 1, wherein a negative voltage is used as a power supply voltage of the voltage conversion circuit.   The signal switching device according to claim 1, wherein a positive voltage and a negative voltage are used as power supply voltages of the voltage conversion circuit.   2. The signal switching device according to claim 1, wherein the high-frequency switch and the voltage conversion circuit are integrated on the same semiconductor substrate to form a single chip.   The signal switching device according to claim 1, wherein the high-frequency switch and the voltage conversion circuit are manufactured using a plurality of semiconductor substrates and mounted in one package.

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