JP2008026973A - Reference voltage generating circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a reference voltage generating circuit of high accuracy with little variation. <P>SOLUTION: Three voltage values of second voltage V<SB>2</SB>output from a first reference voltage circuit 2, and third voltage V<SB>3</SB>and fourth voltage V<SB>4</SB>output from a second reference voltage circuit 3 and a third voltage circuit 4 having the same constitution and the same circuit constant as the first reference voltage circuit 2, respectively are compared by a comparing circuit 7, and the voltage value with the middle value is specified to generate a compared result. A logical circuit 8 controls the conductive state of a switching circuit 9 based on the compared result to input the middle value of the three voltage values as a selected reference voltage V<SB>S</SB>to a positive phase input terminal of a differential amplifying circuit 10 constituting an output voltage control circuit 6. An output control circuit 6 suppresses the fluctuation of output voltage V<SB>O</SB>of an output terminal BGR<SB>OUT</SB>by controlling the output voltage V<SB>O</SB>to eliminate the voltage difference from first voltage V1 input to a reverse input terminal and output from a temperature coefficient correcting circuit 1. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a reference voltage generation circuit, and more particularly to a reference voltage generation circuit that is used in an analog circuit of a semiconductor integrated circuit and generates a reference voltage.

  The reference voltage generation circuit is a circuit that generates a predetermined voltage value regardless of a temperature change or a power supply voltage change of the circuit, and various circuit systems have been proposed. Of these, the most commonly used reference voltage generation circuit employs a circuit system that utilizes the temperature dependence of the forward voltage of the PN junction diode, that is, a BGR (band gap reference) system.

  A conventional reference voltage generation circuit will be described below.

FIG. 5 shows a circuit configuration of a conventional reference voltage generating circuit. As shown in FIG. 5, the first PN junction diode D ₁ whose cathode is connected in parallel to the ground voltage _VSS and the first pn junction diode connected to the anode of the first PN junction diode D ₁ are respectively connected. and the resistance element R _1, one end connected to the first end of the resistor element R _1, the other end having a second resistive element R ₂ connected to the output terminal BGR _OUT, first resistive element R ₁ and second temperature coefficient compensation circuit 1 to output as the resistance element and the first voltages V ₁ to the voltage value at the connection point between R _2, the second PN junction diode having a cathode connected to the ground voltage V _SS D ₂ and a third resistance element R ₃ having one end connected to the anode of the second PN junction diode D ₂ and the other end connected to the output terminal BGR _OUT, and the second PN junction diode D ₂ and the voltage value of the third connection point between the resistor R ₃ of A reference voltage circuit 2 for outputting a voltage V _2, the first voltage V ₁ and the second voltage V ₂ is input, the difference between the voltage of the voltage V ₁ and the second voltage V ₂ as eliminated, and an output voltage control circuit 6 for controlling the output voltage V _o output from the output terminal BGR _OUT to a predetermined value.

The first PN junction diode element D _1, the second has a PN junction diode D ₂ identical configuration and usually 15 or so PN junction diode D3 is formed by connecting in parallel.

The output voltage control circuit 6 receives the first voltage V ₁ at the inverting input terminal, the second voltage V ₂ at the positive phase input terminal, and the voltage between the _first voltage V ₁ and the second voltage V _2. by amplifying by calculating the difference, and a differential amplifier circuit 10 for controlling the output voltage V _o (e.g., see non-Patent Document 1.).

Will be described below with reference to FIG. 5 the relationship between the output voltage V _o and the circuit constant of the conventional reference voltage generating circuit configured as described above.

The first PN junction diode _{D 1} and second saturation current of the PN junction diode _{D 2} and _{I s1, I s2} respectively, the diode current as _I 1, _{I 2,} anode - a voltage between the cathode _{V PN1,} V and _PN2, the resistance values of the resistance elements _R 1 to R ₃ and _r 1, _{r 2} and _{r 3,} respectively.

The following formulas (1) and (2) are established among the diode currents I ₁ and I ₂ , the saturation currents I _s1 and I _s2, and the voltage between the anode and the cathode.

I ₁ = I _s1 · {exp (V _PN1 / V _T ) −1} (1)
I ₂ = I _s2 · {exp (V _PN2 / V _T ) −1} (2)
Here, _VT is a thermal voltage, and the relationship of the following formula | equation (3) is formed.

V _T = k · T / q (3)
Here, k is Boltzmann's constant, q is the unit charge, T is a absolute temperature, when T = 300K (about 27 ° C.), _{V T} is approximately 26 mV. Normally, V _PN1 and V _PN2 are values near 0.7 V, and therefore, −1 on each right side of Equation (1) and Equation (2) is negligibly small compared to the exponent part, and can be omitted. it can.

When the first voltage across the resistor element R ₁ and V _R1, holds the relationship of formula (4) below.

V _R1 = V _PN2 −V _PN1
= V _T · LN (I ₂ / I _s2 ) −V _T · LN (I ₁ / I _s1 )
= V _T · LN {(I ₂ · I _s1 / I ₁ · I _s2 )} (4)
Here, LN represents a natural logarithm.

The output voltage control circuit 6, the voltage V ₁ and the second voltage V ₂ is input voltage to be equal to each other, the feedback control of the output voltage V _o. That is, feedback control of the output voltage V _o so holds the relationship of formula (5) below.

I ₁ · r ₂ = I ₂ · r ₃ (5)
From the above equations (3), (4), and (5), the output voltage V _o is calculated as in the following equation (6).

V _o = V ₂ + I ₂ · r ₃
= V ₂ + I ₁ · r ₂
= V ₂ + (V _R1 / r ₁ ) · r ₂
= V ₂ + r ₂ / r ₁ · k / q · LN (I _s1 / I _s2 · r ₂ / r ₃ ) · T (6)
I _s1 and I _s2 are proportional to the areas of the first PN junction diode D ₁ and the second PN junction diode D ₂ . Typically, the first PN junction diode _{D 1} is the second PN junction diode _{D 2} and the PN junction diode _{D 3} having the same structure as a basic unit, connected in parallel by the area fraction required a plurality of PN junction diode _{D 3} It is constituted by doing. When the number of parallel connections is n, Expression (6) is expressed as the following Expression (7).

V _o = V ₂ + r ₂ / r ₁ · k / q · LN (n · r ₂ / r ₃ ) · T (7)
The first term of the right side of the expression (7), the second anode of the PN junction diode D ₂ - is a cathode voltage V _PN2, has a negative temperature coefficient. The second term on the right side of Equation (7) is a function that increases in proportion to the absolute temperature T, and has a positive temperature coefficient. Therefore, the resistance values r _{1 to} r ₃ of the resistance elements R _{1 to} R ₃ and the first value are set so as to cancel the negative temperature coefficient of the anode-cathode voltage V _{PN2 of} the second PN junction diode D ₂ . by setting the number of parallel connections n the PN junction diode D ₃ constituting a PN junction diode D ₁ to an appropriate value, it is possible to make the temperature coefficient of the output voltage V _o almost zero.

Further, Equation (7) has no term relating to the power supply voltage, and is essentially independent of the power supply voltage. Further, the performance of the differential amplifier circuit 10 constituting the output voltage control circuit 6, for example, voltage gain, input offset voltage, drivability and power supply rejection ratio, etc., although given that the effect on the characteristics of the output voltage V _o usually the performance of the differential amplifier circuit 10 required in the reference voltage generating circuit is easily realized in an integrated circuit using modern semiconductor processes, largely ignored the practical effect on the output voltage V _o It can be as much as possible.

Furthermore, although the resistance values r _{1 to} r ₃ are represented in the second term on the right side of the equation (7), since the resistance values r _{1 to} r ₃ are represented by the ratio of the two resistance values, the resistance varies due to process variations. It does not depend on the absolute value of.

As described above, the conventional reference voltage generation circuit has no dependency on the temperature, the power supply voltage, and the process variation, and can always supply a constant voltage. Therefore, as a reference voltage source in a semiconductor integrated circuit, It is used in many analog circuits such as power supply circuits, A (analog) / D (digital) converters, D / A converters, or PLL (phase-locked loop) circuits.
Phillip E.M. Allen, CMOS Analog Circuit Design Second Second Edition, Oxford University Press, Inc. , Pp. 153-159, 2002

However, in the conventional reference voltage generation circuit, when the IV characteristics of the PN junction diodes D ₁ and D ₂ represented by the expressions (1) and (2) change, respectively, the expression (7) as I indicated, thus varying the output voltage V _o. At this time, it exceeds the design tolerances variation of the I-V characteristic, and further, the output voltage variation amount of V _o also has the problem of exceeding the design tolerance (hereinafter, "variation in the present specification "Is specifically defined as fluctuations that exceed design tolerances.) That is, the characteristic variation of the second PN junction diode _{D 2} is thus directly varying the equation (7) _V 2 The first term on the right hand side of _{(= V PN2).} Further, the characteristic variation of the _second PN junction diode D ₂ is combined with the characteristic variation of the first PN junction diode D ₁ , and n (= I _s1 / I _s2 ) in the second term on the right side in Expression (7). As a result, the output voltage V _o is also changed. Such fluctuation in the output voltage V _o would thus also affect the analog circuit utilizing the output voltage V _o.

More specifically, the first PN junction diode D ₁ is configured by connecting n PN junction diodes D ₃ having the same configuration as the _second PN junction diode D ₂ in parallel. the degree of variation in characteristics of the PN junction diode D ₁ is compared with the second PN junction diode D _2, it is suppressed by averaging the first n minutes. Usually, n is often set to about 15, and therefore the degree of fluctuation is suppressed to 1/10 or less. In other words, the effect on the output voltage _{V o} of the second PN junction diode _{D 2} of the characteristic variation is 10 times even greater than the first and PN junction diode _{D 1.} On the other hand, even if increase or decrease the value of n is the number of parallel connections of the PN junction diode D ₃ which constitutes a first PN junction diode D _1, and within the scope of the preset output voltage V _o increases or decreases discrete manner can not be adjusted only, it is difficult to completely correct the fluctuation of the output voltage V _o.

Further, when by increasing or decreasing the number of parallel connections n the PN junction diode D ₃ which constitutes a first PN junction diode D ₁ to adjust the output voltage V _o is the second PN junction diode D ₂ properties Depending on the degree of fluctuation, the area of the reference voltage generation circuit itself may increase significantly.

  The present invention solves the above-mentioned conventional problems, suppresses the influence on the output voltage, and reduces the circuit area even when the characteristics of the diode constituting the reference voltage circuit that easily affects the output voltage fluctuate. It is an object of the present invention to obtain a high-accuracy reference voltage generation circuit with little individual variation without greatly increasing.

  In order to achieve the above object, according to the present invention, a reference voltage generating circuit includes at least three reference voltage circuits provided in the reference voltage generating circuit, and an intermediate of at least three reference voltages output from each reference voltage circuit. By selecting a value, the reference voltage fluctuation is suppressed.

  Specifically, a reference voltage generation circuit according to the present invention includes a PN junction including a first diode element having a cathode grounded, a first resistance element having one end connected to the anode of the first diode element, A second resistance element having one end connected to the other end of the first resistance element and the other end connected to the output terminal, and a voltage at a common connection point of the first resistance element and the second resistance element Is output as the first voltage, a second diode element whose cathode is grounded, a third diode element having one end connected to the anode of the second diode element and the other end connected to the output terminal. A first reference voltage circuit having a resistance element and outputting a voltage at a common connection point of the second diode element and the third resistance element as a second voltage; and a third diode element having a cathode grounded And one end of the third diode element A second resistance element connected to the node and having the other end connected to the output terminal, and outputs a voltage at a common connection point of the third diode element and the fourth resistance element as a third voltage. A fourth diode element whose cathode is grounded, a fifth resistor element having one end connected to the anode of the fourth diode element and the other end connected to the output terminal, A third reference voltage circuit that outputs the voltage at the common connection point of the four diode elements and the fifth resistor element as the fourth voltage, and each voltage value of the second voltage, the third voltage, and the fourth voltage A reference voltage selection circuit that selects a voltage value having an intermediate value between the compared voltage values and outputs the selected voltage value as a selection reference voltage, and a first voltage and a selection reference voltage are input. Eliminate the voltage difference between the first voltage and the selected reference voltage Characterized in that an output voltage control circuit for controlling the voltage of the output terminal.

  According to the reference voltage generation circuit of the present invention, the second voltage output from each of the first reference voltage circuit, the second reference voltage circuit, and the third reference voltage circuit respectively connected in parallel with the temperature coefficient correction circuit, Since the reference voltage selection circuit compares the voltage values from the third voltage and the fourth voltage, selects an intermediate voltage value among the three voltage values, and outputs the selected voltage value as the selected reference voltage. Even if there are variations in the characteristics of the second diode element, the third diode element, and the fourth diode element, a voltage value having an intermediate value of the voltage output as the selection reference voltage can be selected. It is possible to suppress the influence of the characteristic variation of the diode element constituting the reference voltage circuit. This is because, among the second voltage, the third voltage, and the fourth voltage, the voltage value having an intermediate value of the second voltage, the third voltage, and the fourth voltage all fluctuated. Even so, the fluctuation amount is likely to be the smallest.

  In the reference voltage generation circuit of the present invention, the reference voltage selection circuit performs a magnitude comparison on the combination of two voltage values of the second voltage, the third voltage, and the fourth voltage, A comparison circuit for outputting a comparison result of a logic level corresponding to the comparison result of the second, a selection signal for the comparison result corresponding to an intermediate voltage value of the second voltage, the third voltage, and the fourth voltage. A logic circuit that outputs a non-selection signal for a comparison result different from a comparison result corresponding to an intermediate voltage value, and a second voltage, a third voltage, a fourth voltage, a selection signal, and a non-selection signal It is preferable to have a switch circuit that receives the selection signal and outputs a voltage value corresponding to the selection signal among the second voltage, the third voltage, and the fourth voltage as a selection reference voltage.

  In this way, an intermediate voltage value can be reliably selected from the second voltage, the third voltage, and the fourth voltage.

  In the reference voltage generation circuit of the present invention, the comparison circuit receives two voltage values of the second voltage, the third voltage, and the fourth voltage, and compares the two input voltage values. It is preferable to have a differential comparison circuit that outputs a predetermined logic signal corresponding to the magnitude relationship of the comparison results.

  In this way, even when the characteristics of the second to fourth diode elements vary, it is possible to specify a voltage value located in the middle of the variation and perform logical processing in the subsequent stage. .

  In the reference voltage generation circuit of the present invention, the switch circuit receives one voltage value of the second voltage, the third voltage, and the fourth voltage and a selection signal or a non-selection signal, and receives the selection signal. It is preferable to have a switch element that transitions to a conductive state when the switch is turned on, while transitioning to a non-conductive state when a non-selection signal is input.

  In this way, only the voltage value selected by the selection signal among the second voltage, the third voltage, and the fourth voltage can be output as the selection reference voltage.

  In the reference voltage generation circuit of the present invention, the output voltage control circuit has an inverting input terminal that receives the first voltage and a positive-phase input terminal that receives the selection reference voltage, and the difference between the first voltage and the selection reference voltage. It is preferable to include a differential amplifier circuit that controls the voltage at the output terminal by amplifying and outputting the signal.

  In this way, according to the voltage difference between the first voltage and the selection reference voltage, the output voltage output from the output terminal can be controlled so as to eliminate the voltage difference.

  In the reference voltage generating circuit of the present invention, the second diode element, the third diode element, and the fourth diode element are substantially the same element, and the third resistor element, the fourth resistor element, and the fifth diode element It is preferable that the resistance elements are substantially the same.

  In the reference voltage generating circuit of the present invention, the first diode element is formed by connecting a plurality of diode elements substantially the same as the second diode element, the third diode element, and the fourth diode element in parallel to each other. It is preferable to be configured.

  According to the reference voltage generation circuit of the present invention, even when the characteristics of the diode element that generates the reference voltage fluctuate, an intermediate voltage value is selected from among the voltages output from the three reference voltage circuits. Therefore, the influence on the output voltage of the characteristic variation of each diode element can be suppressed. As a result, a highly accurate reference voltage generating circuit with little individual variation can be realized. In particular, when the fluctuation distribution of the diode element that generates the reference voltage is not continuous but discrete and fluctuation occurs with a certain probability, the ratio of the output voltage exceeding the allowable value is expressed as 2 of the fluctuation occurrence probability. It is possible to suppress the power to less than the power. Further, the second, third, and fourth diode elements having an area that is one digit or more smaller than that of the first diode element are provided, and an increase in circuit area can be minimized.

(One embodiment)
A reference voltage generation circuit according to an embodiment of the present invention will be described with reference to the drawings.

  FIG. 1 shows a circuit configuration of a reference voltage generating circuit according to an embodiment of the present invention. As shown in FIG. 1, a reference voltage generation circuit according to an embodiment of the present invention includes a temperature coefficient correction circuit 1, a first reference voltage circuit 2 connected in parallel with the temperature coefficient correction circuit 1, and a first reference voltage circuit 2. 2 reference voltage circuit 3 and third reference voltage circuit 4, reference voltage selection circuit 5, and output voltage control circuit 6.

Temperature coefficient compensation circuit 1 includes a first PN junction diode D ₁ having a cathode connected to the ground voltage V _SS, a first resistive element one end of which is connected to the first anode of the PN junction diode D ₁ R ₁ When one end is connected to the first end of the resistor element R _1, made from the second resistive element R ₂ Metropolitan other end of which is connected to the output terminal BGR _OUT, the first resistance element R ₁ and the second and it outputs a voltage of the common connection point between the resistor R ₂ as the first voltage V _1.

The first reference voltage circuit 2 has a cathode and the second PN junction diode D ₂ connected to the ground voltage V _SS, one end connected to the second anode of the PN junction diode D _2, the other end an output terminal The third resistor element R ₃ connected to the BGR _OUT, and outputs the voltage at the common connection point between the _second PN junction diode D ₂ and the third resistor element R ₃ as the second voltage V ₂ . .

The second reference voltage circuit 3 includes a third PN junction diode D ₃ whose cathode is connected to ground voltage V _SS, one end is connected to the third anode of PN junction diode D _3, the other end an output terminal It consists of a fourth resistance element R ₄ connected to BGR _OUT, and outputs the voltage at the common connection point of the third PN junction diode D ₃ and the fourth resistance element R ₄ as the third voltage V ₃ . .

Third reference voltage circuit 4 includes a fourth PN junction diode D ₄ having a cathode connected to the ground voltage V _SS, one end is connected to the anode of the fourth PN junction diode D _4, the other end an output terminal It consists of a fifth resistor element R ₅ connected to BGR _OUT, and outputs the voltage at the common connection point between the _fourth PN junction diode D ₄ and the fifth resistor element R ₅ as the fourth voltage V ₄ . .

Reference voltage selection circuit 5, the fourth from the first second voltage V ₂ from the reference voltage circuit _2, the third voltage V ₃ and the third reference voltage circuit 4 from the second reference voltage circuit 3 voltage V ₄ is input, performs a magnitude comparison of each voltage V _2, V ₃ and V ₄ which has been entered, by selecting the voltage value having an intermediate value is output as selected reference voltage V _S.

The output voltage control circuit 6 receives the first voltage V ₁ at the positive phase input terminal and the selection reference voltage V _S at the inverting input terminal, and receives the first voltage V ₁ and the selection reference voltage V _S received. made from the differential amplifier circuit 10 and outputs the calculated difference amplifier is controlled to the value of the output voltage V _o output from the output terminal BGR _OUT becomes a predetermined voltage value.

The reference voltage selection circuit 5 performs all the magnitude comparisons for the combination of two voltage values of the second voltage V ₂ , the third voltage V _3, and the fourth voltage V ₄ . A comparison circuit 7 that outputs a comparison result of a logic level corresponding to the comparison result, and a comparison result corresponding to an intermediate voltage value among the second voltage V ₂ , the third voltage V _3, and the fourth voltage V ₄ , A logic circuit 8 that outputs a selection signal for a comparison result different from a comparison result corresponding to an intermediate voltage value, a second voltage V ₂ , and a third voltage V receiving the _third and fourth voltage V ₄ and the selection signal and the non-selection signal, the second voltage V _2, out of the third voltage V ₃ and the fourth voltage V _4, selects a voltage value corresponding to the selection signal And a switch circuit 9 that outputs the reference voltage V _S.

Here, included in the second PN junction diode D ₂ included in the first reference voltage circuit 2, the third PN junction diode D ₃ included in the second reference voltage circuit 3, and the third reference voltage circuit 4. The fourth PN junction diode D ₄ is a diode element having the same configuration as each other, and the first PN junction diode D ₁ is n (provided that the _second PN junction diode D ₂ has the same configuration). , n represents the PN junction diode D ₅ up to 15 or so) and which are connected in parallel.

Each of the PN junction diode elements D2, D3, D4, and D5 can be formed as a PN junction of a P-type expansion layer and an N-type diffusion layer formed by, for example, ion-implanting impurities on the semiconductor substrate. R ₁ , R _2, etc. can be formed by a diffusion layer formed on the top of the semiconductor substrate or a polycrystalline silicon film formed by deposition on the semiconductor substrate and ion-implanted with impurities.

FIG. 2 shows an example of the circuit configuration of the comparison circuit 7. As shown in FIG. 2, the comparison circuit 7 is input to the second voltage V ₂ to the positive phase input terminal is input to the third voltage V ₃ to the inverting input terminal, the magnitude of the input differential input voltage The first differential comparison circuit 11 outputs a 2-bit logic signal having a predetermined complementary relationship corresponding to the magnitude relationship as C ₁ and C _1B , and a third voltage V at the positive phase input terminal. ₃ is input, the fourth voltage V ₄ is input to the inverting input terminal, the input differential input voltage is compared, and a 2-bit logic signal having a predetermined complementary relationship corresponding to the size relationship is obtained. The second differential comparison circuit 12 that outputs as C ₂ and C _2B , the fourth voltage V ₄ is input to the positive phase input terminal, and the second voltage V ₂ is input to the inverting input terminal and input. Comparing the magnitude of the differential input voltage, it becomes a predetermined complementary relationship corresponding to the magnitude relationship And it is configured to the 2-bit logic signal that from the third differential comparator circuit 13 for output as a C _3, C _3B.

Here, the predetermined complementary relationship corresponding to the magnitude relationship is, for example, the relationship between the second voltage V ₂ and the third voltage V _{3 in} the first differential comparison circuit 11 such that V ₂ > V _3. In this case, the positive logic (“1” level voltage) is output from the positive phase output terminal, while the negative logic (“0” level voltage) is output from the inverting output terminal.

  Note that each of the differential comparison circuits 11, 12, and 13 can be a known circuit including a differential amplifier circuit and an inverter circuit.

FIG. 3 shows an example of the circuit configuration of the logic circuit 8. As shown in FIG. 3, the logic circuit 8 includes logic signals C ₁ , C _1B , C ₂ , C _2B , C _3, and C _3B that are comparison results of the differential comparison circuits 11 to 13 that constitute the comparison circuit 7. , And eight 3-input NAND gates 21 to 28 that perform AND operations on eight logic levels C ₁ , C _2, and C ₃ of the truth table shown in [Table 1] below, The circuit includes a 4-input NAND gate 29, a 2-input NAND gate 30, and a 2-input NAND gate 31 that are selectively input from the 3-input NAND gates 21 to 28, respectively.

4-input NAND gate 29, 3 input of the output signal from the NAND gate 21 through 28 [Table 1] 3-input NAND gates 21,23,26 and corresponding to "1" level in _{S 1} of the truth table shown in receiving the output signal from 28, the 3-input NAND gate cooperates with 21,23,26 and 28 performs a logical aND operation, the second voltage _V "1" with respect to _two-level selection signal or "0 The “non-selection signal of level” is output as the first selection signal S ₁ .

The 2-input NAND gate 30 receives the output signals from the 3-input NAND gates 22 and 27 corresponding to the “1” level in S ₂ of the truth table shown in [Table 1], and receives the 3-input NAND gates 22 and 27. The AND operation is performed in cooperation, and a selection signal of “1” level or a non-selection signal of “0” level is output as the second selection signal S ₂ for the third voltage V ₃ .

The 2-input NAND gate 31 receives an output signal from the 3-input NAND gates 24 and 25 corresponding to the “1” level in S ₃ of the truth table shown in [Table 1], and receives the 3-input NAND gates 24 and 25. The AND operation is performed in cooperation, and a “1” level selection signal or a “0” level non-selection signal is output as the third selection signal S ₃ for the fourth voltage V ₄ .

FIG. 4 shows an example of the circuit configuration of the switch circuit 9. As shown in FIG. 4, the switch circuit 9, a control terminal is input to T selection / non-selection signals S ₁ to _1, is input to the second voltage V ₂ to the input terminal T _2, selection / non-selection signals S ₁ Is in the conductive state when the level is “1”, the first CMOS switch circuit 41 that outputs the second voltage V ₂ from the output terminal T _3, and the selection / non-selection signal S ₂ to the control terminal T _1. Is input, the third voltage V ₃ is input to the input terminal T ₂ , and when the selection / non-selection signal S ₂ is “1” level, the conductive state is established, and the third voltage V ₃ is output from the output terminal T ₃ . a second CMOS switching circuit 42 for outputting a V _3, is input to selection / non-selection signal _{S 3} to the control terminal T1, is input to the fourth voltage _{V 4} of the input terminal T2, selection / non-selection signal _{S 3} There rendered conductive in the case of "1" level, the fourth voltage from the output terminal T ₃ And a third CMOS switch circuit 43 for outputting the _4. Here, each of the CMOS switch circuits 41 to 43 becomes non-conductive when the selection / non-selection signal is at the “0” level. The output terminal _{T 3} of the CMOS switch circuits 41 to 43 are shared with each other.

Each CMOS switch circuits 41 to 43, either one end of the source drain is connected to the input terminal _{T 2,} the other end of the source and the drain is connected to the output terminal _{T 3,} the gate is connected to the control terminal _{T 1} NMOS a transistor 44, one end of the source and the drain is connected to the input terminal T _2, the other end of the source and the drain is connected to the output terminal T _3, PMOS gate via the inverter 45 is connected to the control terminal T ₁ The NMOS transistor 44 and the PMOS transistor 46 constitute a CMOS transfer gate.

  Hereinafter, the operation of the reference voltage generating circuit according to the present embodiment configured as described above will be described with reference to the drawings.

First, referring to FIG. 1, the set value of the circuit constants, the relationship between the output voltage V _o and circuit constants are described. The temperature coefficient correction circuit 1 and the first reference voltage circuit 2 have the same configuration as the conventional reference voltage generation circuit shown in FIG. 5, and the circuit constants are also the same. Here, the saturation currents in the first PN junction diode D ₁ and the second PN junction diode D ₂ are respectively I _s1 and I _s2 , the diode currents are I ₁ and I ₂ , and the voltage between the anode and the cathode is V _PN1 , The resistance values of V _PN2 , the first resistance element R1, the second resistance element R2, and the third resistance element R3 are r ₁ , r _2, and r ₃ , respectively. Therefore, the design values of the first voltage V ₁ output from the temperature coefficient correction circuit 1 and the second voltage V ₂ output from the first reference voltage circuit ₂ are the same as those of the conventional reference voltage generation circuit.

The second reference voltage circuit 3 and the third reference voltage circuit 4 according to the present embodiment have the same configuration and circuit constants as those of the first reference voltage circuit 2. That is, the 3 PN junction diode _{D 3} and a 4 PN junction diode _{D 4} of is the second PN junction diode _{D 2} identical configuration and circuit constant even in the same, the saturation current _{I s2,} The diode current is I ₂ and the voltage between the anode and the cathode is V _PN2 . The fourth resistance element R ₄ and the fifth resistance element R ₅ have the same configuration as the third resistance element R ₃ , the circuit constants are also the same, and the resistance value is r ₃ . Therefore, the design values of the third voltage V ₃ output by the second reference voltage circuit 3 and the fourth voltage V ₄ generated by the third reference voltage circuit ₄ are output by the first reference voltage circuit 2. a second same voltage value and the voltage V ₂ of the.

By the way, the reference voltage selection circuit 5 receives the second voltage V ₂ , the third voltage V _3, and the fourth voltage V ₄ , compares the voltage values with each other, and has a voltage having an intermediate value. A value is selected and output to the positive phase input terminal of the differential amplifier circuit 10 constituting the output voltage control circuit 6 as the selection reference voltage V _S. At this time, the selection reference voltage V _S is selected and output as it is as one of the second voltage V ₂ , the third voltage V _3, and the fourth voltage V _4. voltage value as the value becomes the second same voltage value and the voltage V ₂ of.

Therefore, the output voltage V _o of the reference voltage generating circuit according to the present embodiment is generated, the design value itself is the same value as the conventional reference voltage generating circuit, relationship between the circuit constants in the formula (7) It will be the same.

However, in the actually manufactured reference voltage generation circuit, as described above, the second voltage V ₂ output from the first reference voltage circuit 2 fluctuates due to the characteristic variation of the _second PN junction diode D _2. and it will be, thus also varying the output voltage V _o. Characteristic variation of the second PN junction diode D ₂ is normally occur randomly (irregularly), its distribution also or a normal distribution or a modification thereof distribution, vary with Tari any other distribution. Accordingly, the variation occurring in the second PN junction diode D ₂ estimated accurately at the design stage, the range of increase or decrease in the number of parallel connections n of a plurality of PN junction diode D ₅ constituting the first PN junction diode D ₁ Is extremely difficult to set.

  On the other hand, the reference voltage generating circuit according to the present embodiment includes the second reference voltage circuit 3 and the third reference voltage circuit 4 having the same configuration and the same circuit constant as the first reference voltage circuit 2. It has been.

The reference voltage selection circuit 5 includes a second voltage V ₂ , a third voltage V _3, and a _second voltage output from the first reference voltage circuit 2, the second reference voltage circuit 3, and the third reference voltage circuit 4, respectively. 4 performs magnitude comparison of the voltage V ₄ of selects and outputs a voltage value having an intermediate value to the output voltage control circuit 6 as the selected reference voltage V _S. Therefore, the second PN junction diode _{D 2,} by each characteristic variation of the third PN junction diode _{D 3} and the fourth PN junction diode _{D 4,} second voltage _{V 2,} the third voltage _{V 3} and the fourth even when the voltage V ₄ is changed, the second voltage V _2, by using a voltage value of the middle of the third voltage V ₃ and the fourth voltage V ₄ as a selection reference voltage V _S, Compared to the case where only one reference voltage output from one reference voltage circuit 2 is used as in the prior art, a large fluctuation that cannot be assumed occurs in two of the three reference voltage circuits 2, 3 and 4. However, by selecting and adopting an intermediate voltage value, it can be made less susceptible to fluctuations. As a result, it is possible to suppress the fluctuation of the output voltage V _o, individual variation is small, therefore it is possible to realize a high-precision reference voltage generating circuit having excellent yield.

The intermediate voltage of the voltage output does not exist (it can not be determined) in the case, to select the second voltage V _2.

  In the present embodiment, the third reference voltage circuit 3 and the fourth reference voltage circuit 4 having the same configuration and the same circuit constant as those of the first reference voltage circuit 2 are provided. At least one fourth reference voltage circuit having the same configuration and the same circuit constant as the reference voltage circuit 2 is provided in parallel with each of the reference voltage circuits 2 to 4, and four or more output from each reference voltage circuit, respectively. By selecting an intermediate voltage between these voltages, a highly accurate reference voltage generating circuit with less individual variation can be realized.

Hereinafter, the details of the operation of the reference voltage selection circuit 5 will be described with reference to FIGS. 1, 2, 3 and 4. First, the second voltage V ₂ output from the first reference voltage circuit 2, the third voltage V ₃ output from the second reference voltage circuit ₃ , and the third reference voltage circuit 4 are output. The fourth voltage V ₄ is input to the comparison circuit 7 and the switch circuit 9 that constitute the reference voltage selection circuit 5, respectively.

Of the three differential comparator circuit 11, 12 and 13 constituting the comparison circuit 7 shown in FIG. 2, the first differential comparator circuit 11, a second magnitude comparing the voltage _{V 2} to the third voltage _{V 3} the performed, and outputs a logic level signal of the comparison result of the same polarity magnitude from the positive phase output terminal C _1, and outputs a logic level signal of the comparison result and the opposite polarity of large and small from the inverted output terminal C _1B. The second differential comparison circuit 12 compares the third voltage V ₃ with the fourth voltage V ₄ and outputs a logic level signal having the same polarity as the magnitude comparison result from the positive phase output terminal C _2. , and it outputs a logic level signal of the comparison result and the opposite polarity of large and small from the inverted output terminal C _2B. The third differential comparison circuit 13 compares the fourth voltage V ₄ with the second voltage V _2, and outputs a logic level signal having the same polarity as the magnitude comparison result from the positive phase output terminal C _3. , and it outputs a logic level signal of the comparison result and the opposite polarity of large and small from the inverted output terminal C _3B.

Next, the 6-bit comparison results C ₁ , C _1B , C ₂ , C _2B , C ₃ and C _3B output from the comparison circuit 7 are input to the logic circuit 8 at the next stage.

The logic circuit 8 shown in FIG. 3 outputs selection / non-selection signals S ₁ , S ₂ and S ₃ to the switch circuit 9 according to the truth table shown in [Table 1] above. Among the comparison results, there are eight combinations of the logic level states of C ₁ , C ₂ and C ₃ as shown in [Table 1], and the selection / non-selection signals S ₁ , S ₂ and S ₃ are 2 is output as a logic level “1” only to a selection / non-selection signal corresponding to a voltage value having an intermediate value among the voltage V ₂ , the third voltage V _3, and the fourth voltage V ₄ . A voltage value that is not a value is output to the switch circuit 9 as a logic level “0”. In particular, when C ₁ = "0", C ₂ = "0" and C ₃ = "0", and when C ₁ = "1", C ₂ = "1" and C ₃ = "1" The logic level “1” is output only to the selection / non-selection signal S1, _and the logic level “0” is output to the selection / non-selection signals S ₂ and S ₃ .

In the switch circuit 9 shown in FIG. 4, only one CMOS switch circuit corresponding to the “1” level signal of any one of the selection / non-selection signals S ₁ , S ₂ and S ₃ is in a conductive state. The positive phase of the differential amplifier circuit 10 constituting the output voltage control circuit 6 with the corresponding voltage of the second voltage V ₂ , the third voltage V ₃ and the fourth voltage V ₄ as the selected reference voltage V _S Output to the input terminal.

As described above, the reference voltage selection circuit 5 compares the magnitudes of the second voltage V ₂ , the third voltage V _3, and the fourth voltage V ₄ and selects a voltage value having an intermediate value. Can be output as the selected reference voltage V _S.

  Since the reference voltage generation circuit according to the present invention can suppress the influence of the characteristic variation of each diode element on the output voltage, a high-precision reference voltage generation circuit with little individual variation can be realized, and an analog of a semiconductor integrated circuit This is useful for a reference voltage generation circuit used in the circuit.

1 is a circuit diagram illustrating a reference voltage generation circuit according to an embodiment of the present invention. It is a circuit diagram which shows an example of the comparison circuit which comprises the reference voltage generation circuit which concerns on one Embodiment of this invention. It is a circuit diagram showing an example of a logic circuit constituting a reference voltage generating circuit according to an embodiment of the present invention. It is a circuit diagram which shows an example of the switch circuit which comprises the reference voltage generation circuit which concerns on one Embodiment of this invention. It is a circuit diagram which shows the conventional reference voltage generation circuit.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Temperature coefficient correction circuit 2 1st reference voltage circuit 3 2nd reference voltage circuit 4 3rd reference voltage circuit 5 Reference voltage selection circuit 6 Output voltage control circuit 7 Comparison circuit 8 Logic circuit 9 Switch circuit 10 Differential amplification circuit 11 1st differential comparison circuit 12 2nd differential comparison circuit 13 3rd differential comparison circuit 21-28 3 input NAND gate 29 4 input NAND gate 30 2 input NAND gate 31 2 input NAND gate 41 1st CMOS switch circuit (switch element)
42 Second CMOS switch circuit (switch element)
43 Third CMOS switch circuit (switch element)
D ₁ 1st PN junction diode D ₂ 2nd PN junction diode D ₃ 3rd PN junction diode D ₄ 4th PN junction diode D ₅ PN junction diode R ₁ 1st resistance element R ₂ 2nd resistance Element R ₃ Third resistance element R ₄ Fourth resistance element R ₅ Fifth resistance element

Claims (7)

A first diode element having a cathode grounded; a first resistor element having one end connected to the anode of the first diode element; and one end connected to the other end of the first resistor element. A temperature coefficient correction circuit having a second resistance element connected to the output terminal, and outputting a voltage at a common connection point of the first resistance element and the second resistance element as a first voltage;
A second diode element having a cathode grounded; and a third resistor element having one end connected to the anode of the second diode element and the other end connected to the output terminal. A first reference voltage circuit that outputs a voltage at a common connection point of the element and the third resistance element as a second voltage;
A third diode element having a cathode grounded; and a fourth resistor element having one end connected to the anode of the third diode element and the other end connected to the output terminal. A second reference voltage circuit that outputs a voltage at a common connection point of the element and the fourth resistance element as a third voltage;
A fourth diode element having a cathode grounded; and a fifth resistor element having one end connected to the anode of the fourth diode element and the other end connected to the output terminal. A third reference voltage circuit that outputs a voltage at a common connection point of the element and the fifth resistance element as a fourth voltage;
The voltage values of the second voltage, the third voltage, and the fourth voltage are compared, a voltage value having an intermediate value between the compared voltage values is selected, and the selected voltage value is output as a selection reference voltage. A reference voltage selection circuit to
An output voltage control circuit configured to input the first voltage and the selection reference voltage and control a voltage of the output terminal so as to eliminate a voltage difference between the first voltage and the selection reference voltage; A characteristic reference voltage generation circuit. The reference voltage selection circuit includes:
A comparison is performed on the combination of two voltage values of the second voltage, the third voltage, and the fourth voltage, and a comparison result of a logic level corresponding to each comparison result is output. A comparison circuit;
A selection signal is output for the comparison result corresponding to an intermediate voltage value of the second voltage, the third voltage, and the fourth voltage, and the comparison result corresponding to the intermediate voltage value A logic circuit that outputs a non-selection signal for different comparison results;
The second voltage, the third voltage, and the fourth voltage, and the selection signal and the non-selection signal are received, and the selection signal corresponds to the selection signal among the second voltage, the third voltage, and the fourth voltage. The reference voltage generation circuit according to claim 1, further comprising: a switch circuit that outputs the selected voltage value as the selection reference voltage.   The comparison circuit receives two voltage values of the second voltage, the third voltage, and the fourth voltage, compares the two input voltage values, and compares the magnitudes of the comparison results. The reference voltage generating circuit according to claim 2, further comprising a differential comparison circuit that outputs a predetermined logic signal corresponding to.   The switch circuit receives a voltage value of one of the second voltage, the third voltage, and the fourth voltage and the selection signal or the non-selection signal, and receives the selection signal. The reference voltage generation circuit according to claim 2, further comprising a switch element that transitions to a non-conduction state when the non-selection signal is input while transitioning to a conduction state.   The output voltage control circuit has an inverting input terminal for receiving the first voltage and a positive phase input terminal for receiving the selection reference voltage, and amplifies a difference between the first voltage and the selection reference voltage. 5. The reference voltage generation circuit according to claim 1, further comprising a differential amplifier circuit that controls the voltage of the output terminal by outputting. The second diode element, the third diode element, and the fourth diode element are substantially the same element,
The reference voltage generating circuit according to claim 1, wherein the third resistance element, the fourth resistance element, and the fifth resistance element are substantially the same element.   The first diode element is configured by connecting a plurality of diode elements substantially the same as the second diode element, the third diode element, and the fourth diode element in parallel to each other. The reference voltage generating circuit according to claim 6.

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