JP2008009743A - Data processing apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a data processing apparatus capable of ensuring security without using a password. <P>SOLUTION: A television receiver includes a connection means of an external debugger for the purpose of debugging of a program or the like, a means holding a time limit value of debugging, a means holding a timer value for the time limit value, a power supply means for backing up the means holding the timer value, and a comparison means for comparing the value in the means holding the time limit value with the value in the means holding the timer value to determine whether the time limit has come or not; wherein the connection means is operated to cut off transmission/reception from the external debugger in response to determining it by the comparison means that the time limit has come. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a data processing apparatus used by connecting a debugger.

  Device debuggers have been used for some time. It is a tool that works to identify the location and contents of hardware to be debugged, sometimes debugging software and firmware, which are divided into programs, such as programs for target devices, usually by interactive operations from users.

  In recent years, it is required for a debugger to have a security function for a device. After the manufacture of the device is completed, the user of the debugger is limited to maintenance personnel related to the manufacturer of the target device so that the general user of the target device cannot operate the target device through the debugger.

For example, the method described in Patent Document 1 is for the purpose of realizing a security function when using a general-purpose debugger.
(1) When the device is accessed from the debugger, (2) When the debug enable signal is inactive, access to the memory is permitted.
(3) When the debug enable signal is active, access to the memory is prohibited by the security circuit, and access to the memory is canceled by entering the password from the debugger.
However, since this prior art restricts access from the debugger by a secret key such as a password, there is a problem that the security meaning is lost if the password is leaked. It was.
Japanese Patent Laying-Open No. 2005-309758 (page 22, FIG. 1)

  An object of this invention is to provide the data processor which can ensure security, without using a password.

  In order to solve the above problems, a data processing apparatus of the present invention holds an external debugger connection means for debugging a program or the like, means for holding a debug deadline value, and a timer value for the deadline value A means for backing up the means for holding the timer value, a comparing means for comparing the value of the means for holding the deadline value and the value of the means for holding the timer value to determine whether or not the deadline has come The connection means acts to block transmission / reception from an external debugger when the comparison means determines that the time limit has expired.

  According to the present invention, it is possible to obtain a data processing apparatus that can ensure security without using a password.

  Examples of the present invention will be described below.

A first embodiment of the present invention will be described with reference to FIGS.
FIG. 1 is a block diagram showing a data processing apparatus according to an embodiment of the present invention. A portion surrounded by a broken line is a data processing apparatus 10 that is a device to be debugged, and is, for example, a digital home appliance equipped with a microcomputer such as a DVD recorder, a DVD player, a digital television, or a digital video camera. The internal configuration of the data processing apparatus 10 relating to the present invention is as follows.

The CPU 11 is a CPU by a microcomputer responsible for overall control, and is equipped to perform processing necessary for the operation of the apparatus. The memory control unit 12 is responsible for memory control, and accesses (writes / reads) the memory according to instructions from the CPU 11.

There is a memory 13 as a memory to be controlled by the memory control unit 12, an area in which a non-volatile program is stored that does not disappear even when the power of the device is turned off, and a volatile that temporarily stores data and programs There are areas. The nonvolatile program area stores a program for processing messages received from the debugger and commands received from the debugger.

The authentication logic unit 14 is responsible for authentication logic and is configured to determine whether a password or the like input from a debugger outside the apparatus matches a built-in secret key. The deadline value register 15 is a register that stores a fixed value that is intended to be a deadline value that can be accessed from the debugger to the inside of the apparatus and cannot be changed normally. The timer counter 16 is a counter having the same number of bits as the deadline value register 15. The timer counter 16 can be changed only when the determination of the authentication logic unit 14 matches.

The debug interface 17 is configured to output information as serial data to an externally connected debugger in accordance with an instruction from the CPU 11, and conversely, input serial data from the debugger as an input command and transmit it to the CPU 11.

The comparator 18 is configured to always compare the value of the timer counter 16 and the expiration value of the expiration value register 15 and notify the debug interface 17 of the result. The debug interface 17 is configured to be able to block access from the external debugger to the inside of the apparatus by the comparison signal from the comparator 18.

The battery 19 is a battery that is built into the apparatus and is not replaced by the user, and supplies sufficient power for the timer counter 16 to be incremented even when the user turns off the apparatus. The count value of the timer counter 16 is reset at the moment when the battery 19 is connected, and then the count value is incremented every second by continuing the power supply of the battery 19 and stops counting when the count value overflows.

A general-purpose debugger 20 outside the data processing apparatus 10 performs serial communication with a debug interface (hereinafter referred to as a debug I / F) 17. For example, it is a PC (personal computer), and performs communication by a terminal application attached to the OS using EIA-574 (RS232C in the conventional expression) and USB (Universal Serial Bus).

  The operation of this apparatus will be described below. First, the basic operation of the apparatus will be described. FIG. 2 is a basic operation flowchart of the apparatus according to the embodiment. The timer counter 16 is incremented every second by a hardware clock regardless of whether the power of the apparatus is on or off, that is, whether or not the CPU 11 is operating.

1) When the apparatus is turned on, the CPU 11 sequentially takes in the contents of the program area of the non-volatile area of the memory 13 through the memory control unit 12 and starts processing (step 21).

2) The CPU 11 outputs a debug message to the debug I / F 17 by the debug program, and receives a debug command input from the debug I / F 17. As commands used for debugging, the same commands as the conventional debugger are memory write, memory read, memory dump, CPU internal register dump, and start of processing execution from a specified address. In addition to these, there are a password authentication command, loading to a timer counter, reading of a timer counter value, and the like, which are features of the present embodiment.

3) On the other hand, when the comparator 18 is also turned on, the value of the timer counter 16 and the time limit value of the time limit value register 15 are always compared (step 22). If the value of the timer counter becomes larger than the time limit value, debugging is performed. An overdue signal is output to I / F17.

4) If the overdue signal from the comparator 18 is not active, the debug I / F 17 performs serial communication with 19 general-purpose debuggers (step 23). If the overdue signal is active, the debug I / F 17 transmits and receives serial communication. Both are prohibited (step 24).

Next, the operation at the time of battery connection at the time of device manufacture will be described.
1) The timer counter 16 has a backup circuit that counts up by a hardware clock even when the power is off, and starts operation by mounting a battery or the like.

2) When the battery 19 or the like is connected to the timer counter 16, the count value is reset to 0, and incrementing is started at the same time.
Next, the operation of authentication and rewriting will be described.
FIG. 3 is a flowchart of the authentication and rewrite operation of the apparatus according to the embodiment. This is a usage mode in which a password is required to rewrite the timer counter. The debugging software is loaded when the power is turned on as in FIG. 2 (step 31).

1) The timer counter 16 is set with a value indicating how long the debug I / F 17 communication is prohibited with respect to the expiration value of the expiration value register 15.
2) Start up the apparatus and input an access command to the authentication logic unit 14 from the general-purpose debugger 20 (step 32).
3) When there is an input that matches the password data stored in the 19-authentication logic unit 14 from the general-purpose debugger (step 34), the next input data is loaded into the timer counter 16 (step 35) and processed effectively. (Step 36). If they do not match, loading to the timer counter is prohibited (step 37).

Next, operations in maintenance such as battery replacement will be described.
1) A value obtained by subtracting 60 from the deadline value in the deadline value register 15 so that serial communication of the debug I / F 17 is prohibited after a short time, for example, 60 seconds, by the authentication and rewriting method of [3] above. Set to timer counter 16.

2) Maintenance personnel confirm that communication with the general-purpose debugger 20 is prohibited and the debug message is no longer displayed after the specified time has elapsed.
Finally, specific examples of setting values will be described.
1) The value of the timer counter 16 and the time limit value of the time limit value register 15 are each 32 bits, and the hardware is configured with “FFFFFFFF” in hexadecimal as the time limit value.

  2) If you want to prohibit the connection of a general-purpose debugger after 30 days at the time of manufacturing, the timer counter is a value obtained by subtracting "2592000" (seconds) in decimal and "00278D00" in hexadecimal, that is, "FFD872FF" Set to.

3) Set “FFFFFFC3” to prohibit after 60 seconds when replacing batteries.
4) The general-purpose port is automatically disconnected when the specified time limit is reached, so that the general-purpose debugger can be used before the specified time-limit, but after that time, communication with the general-purpose debugger is prohibited and security is increased. Can be secured.

  As described above, the present invention is a method of permitting or prohibiting access from a debugger at a fixed date and time using a dedicated timer counter built in the device. For devices that do not allow users to connect to the debugger for security reasons, they can be connected at the time of development, but communication is automatically prohibited as hardware when the shipment date of the device arrives. Management of possible hardware and software becomes unnecessary, and manufacturing costs can be reduced while maintaining security.

According to the above method, a data processing apparatus that does not open to the user for security and easily realizes both a debugging environment used by a developer and manufacturability is provided.
By means of automatically disconnecting the general-purpose port when the specified time limit is reached, it is no longer necessary to distinguish between those that can connect a general-purpose debugger and those that cannot.
The present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention.
Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the above-described embodiments. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements according to different embodiments may be appropriately combined.

The block block diagram which shows the apparatus of one Example of this invention. The basic operation | movement flowchart of the apparatus of the Example. FIG. 5 is a flowchart of authentication and rewrite operation of the apparatus of the embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 11 ... CPU, 12 ... Memory control part, 13 ... Memory, 14 ... Authentication logic part, 15 ... Time limit register, 16 ... Timer counter, 17 ... Debugging interface, 18 ... Comparator, 19 ... Battery, 20 ... General purpose debugger.

Claims (4)

A connection means to which an external debugger for debugging such as a program is connected;
Means to hold the debug deadline value;
Means for holding a timer value for the deadline value;
Power supply means for backing up means for holding the timer value;
Comparing means for comparing the value of the means for holding the deadline value with the value of the means for holding the timer value to determine whether or not the deadline has come, the connection means is externally determined by determining that the deadline has come A data processing apparatus, characterized in that it functions to block transmission and reception from a debugger. The authentication unit for authenticating a password from an external debugger is further provided, and when the authentication by the authentication unit is made, an instruction to rewrite the timer value can be issued from the external debugger. Data processing device. A connection means to which an external debugger for debugging such as a program is connected;
Means to hold the debug deadline value;
Means for holding a timer value for the deadline value;
Power supply means for backing up means for holding the timer value;
Comparing means for comparing the value of the means for holding the deadline value with the value of the means for holding the timer value to determine whether or not the deadline has come, the connection means is externally determined by determining that the deadline has come A data processing apparatus, which functions to prevent debugging from a debugger. 4. The authentication means for authenticating a password from an external debugger, further comprising an instruction for rewriting the timer value from the external debugger when authentication by the authentication means is made. Data processing device.

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