JP2008005213A - Solid-state imaging device and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device and a driving method thereof that can receive visible light and infrared light and control an exposure time of the infrared light independently of an exposure time of the visible light. <P>SOLUTION: The solid imaging device 10 is an inter-line transfer type CCD image sensor having photodetecting units 11a to 11c, which receive primary colors of the visible light respectively to accumulate signal charges, and an IR photodetecting unit 11d, which receives the infrared (IR) light to accumulate signal charges, arrayed in a plane, and includes a longitudinal overflow drain (VOD) discarding signal charges of the photodetecting units 11a to 11d and a lateral overflow drain (LOD) discharging signal charges of the IR photodetecting unit 11d. The LOD comprises a discarding gate 16 connected to the IR photodetecting unit 11d and a drain area 17 to which the signal charges of the IR photodetecting unit 11d are discarded through the discarding gate 16. The LOD is placed in operation after the VOD and then signal charges are read out of the photodetecting units 11a to 11d. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device that performs imaging by photoelectric conversion and a driving method thereof, and more particularly to a charge coupled device (CCD) type solid-state imaging device and a driving method thereof.

  In a conventional solid-state imaging device typified by a CCD image sensor, light in a specific wavelength band in visible light (wavelength: about 380 nm to 770 nm) is incident on a light receiving element (photodiode) in order to obtain a color image. Thus, a color filter (for example, a primary color filter that transmits light of three primary colors of red, green, and blue) is provided. However, the color filter has a certain degree of transparency to infrared light (wavelength: about 800 nm to 1500 nm), and the light receiving element is sensitive not only to visible light but also to infrared light. Part of the infrared light incident on the light is received by the light receiving element. For this reason, in a digital camera or the like, an IR (Infrared) cut filter is disposed on the incident surface side of the solid-state imaging device in order to block unnecessary infrared light.

By the way, in recent years, the use of solid-state imaging devices has been greatly expanded, and techniques for actively using solid-state imaging devices as infrared light receiving sensors have appeared. In Patent Documents 1 and 2 below, the distance of the subject is obtained by irradiating the subject with infrared light from the light emitting unit and then imaging the reflected light reflected from the subject with a solid-state imaging device via a high-speed shutter. A technique for acquiring information is disclosed. In the technique described in Patent Document 1, the subject distance information is acquired by irradiating the subject with pulsed infrared light from the light emitting unit and receiving each reflection component delayed according to the subject distance. On the other hand, in the technique described in Patent Document 2, the distance information of the subject is obtained by irradiating a sine wave-modulated infrared light from the infrared light emitting unit and acquiring an image whose phase is shifted at a constant interval with respect to the sine wave. Is getting. Patent Documents 1 and 2 aim to acquire distance information of a subject in an image together with a normal image by visible light.
US Pat. No. 6,057,909 US Pat. No. 6,856,355

  However, in the techniques described in Patent Documents 1 and 2 described above, the solid-state imaging device used for receiving infrared light is configured as a sensor that receives only infrared light. In order to obtain this, a normal solid-state imaging device is separately required, and a prism for separating the subject light into visible light and infrared light and guiding them to each solid-state imaging device is also required.

  In the techniques described in Patent Documents 1 and 2 described above, high-speed operation is performed in order to receive only light with a very short time width reflected from a subject within a predetermined distance range after irradiation with infrared light. The exposure time (shutter speed) is controlled using a shutter device such as an electro-optical shutter or an image intensifier. However, these shutter devices require a high voltage during driving and are expensive. There is.

  The present invention has been made in view of the above problems, and can receive visible light and infrared light with a single plate configuration, and does not require the shutter device as described above, and exposure of infrared light. It is an object of the present invention to provide a solid-state imaging device capable of controlling the time independently of the exposure time of visible light and a driving method thereof.

  In order to achieve the above object, a solid-state imaging device according to the present invention is a solid-state imaging device in which each part is formed in an opposite conductivity type well layer formed on a surface layer of one conductivity type semiconductor substrate. A first light receiving unit that receives the first color light and accumulates signal charges, a second light receiving unit that receives the second color light among the three primary colors and accumulates signal charges, and among the three primary colors A third light receiving portion that receives the third color light and accumulates signal charges, a fourth light receiving portion that receives infrared light and accumulates signal charges, and the signal charges of the first to fourth light receiving portions are A vertical overflow drain that sweeps away to one conductivity type semiconductor substrate, and a horizontal type that sweeps the signal charge of the fourth light receiving portion to a drain region of one conductivity type formed in the opposite conductivity type well layer via a sweep gate. An overflow drain and the first to fourth receptacles; A readout gate that reads out signal charges from the unit, a vertical transfer unit that vertically transfers the signal charges read out by the readout gate, a horizontal transfer unit that receives each signal charge from the vertical transfer unit and performs horizontal transfer, and And a signal output unit configured to convert each signal charge horizontally transferred by the horizontal transfer unit into a pixel signal corresponding to the charge amount and output the pixel signal. The one conductivity type is one of n-type and p-type conductivity, and the opposite conductivity type is the opposite conductivity type to the one conductivity type.

  In the solid-state imaging device of the present invention, it is preferable that the sweep gate and the readout gate are controlled by a transfer electrode of a vertical transfer unit. Further, it is preferable that the first to fourth light receiving portions are evenly arranged in a plane at a rate of one for every four pixels. The drain region is preferably arranged so as to face the vertical transfer unit with one vertical column of the first to fourth light receiving units interposed therebetween.

  The solid-state imaging device driving method of the present invention is the solid-state imaging device driving method, wherein the vertical overflow drain sweeps out signal charges from the first to fourth light receiving units, and the horizontal overflow drain uses the horizontal overflow drain. By driving the solid-state imaging device in the order of sweeping out signal charges from the fourth light receiving unit and reading signal charges from the first to fourth light receiving units by the readout gate, the first to third light receiving units are driven. The visible light exposure time due to the above and the infrared light exposure time due to the fourth light receiving portion are made different.

  The solid-state imaging device of the present invention can receive visible light and infrared light with a single plate configuration, and can also expose infrared light with an electronic shutter system without using a conventional shutter device. The time can be controlled independently of the exposure time of visible light.

  In FIG. 1, a solid-state imaging device 10 according to the present invention receives a blue (B) light and accumulates a B signal charge, and receives a green (G) light and accumulates a G signal charge. A G light receiving unit 11b, an R light receiving unit 11c that receives red (R) light and accumulates an R signal charge, an IR light receiving unit 11d that receives infrared (IR) light and accumulates an IR signal charge, Read gates (RG) 12a to 12d for reading out signal charges from the units 11a to 11d, a vertical CCD 13 for vertically transferring signal charges, a horizontal CCD 14 for horizontally transferring signal charges, and converting the signal charges into voltage signals and outputting them. An interline transfer system comprising an output amplifier 15, a sweep gate (EG) 16 connected to the IR light receiver 11d, and a drain region 17 where signal charges of the IR light receiver 11d are swept away. A CCD image sensor. The EG 16 and the drain region 17 constitute a lateral overflow drain (LOD). A vertical overflow drain (VOD) is formed under the light receiving portions 11a to 11d by thin portions 21a to 21d of a p-well layer 21 described later and the n-type semiconductor substrate 20.

  The light receiving portions 11a to 11d are arranged in a plane along the vertical direction (V direction) and the horizontal direction (H direction), and are arranged in a square lattice pattern as a whole. The order of arrangement is shown by attaching “B” to the B light receiving portion 11a, “G” to the G light receiving portion 11b, “R” to the R light receiving portion 11c, and “IR” to the IR light receiving portion 11d. In the vertical direction, the light receiving portions 11a to 11d are arranged in the order of B, IR, G, R, B, IR,..., And the arrangement period is half a period (for two pixels) between odd and even lines. It's off. As a result, the horizontal direction is composed of odd rows in which B light receiving portions 11a and G light receiving portions 11b are alternately arranged, and even rows in which IR light receiving portions 11d and R light receiving portions 11c are alternately arranged. Each of the light receiving portions 11a to 11d is evenly arranged at a rate of one for every four pixels.

  The vertical CCD 13 is disposed for each vertical row of the light receiving portions 11a to 11d, and RGs 12a to 12d are provided between the vertical CCD 13 and the light receiving portions 11a to 11d, respectively. From each of the light receiving portions 11a to 11d, signal charges of B, G, R, and IR are read out to the vertical CCD 13 via RGs 12a to 12d. The vertical CCD 13 performs vertical transfer of each signal charge read out via the RGs 12 a to 12 d line by line toward the horizontal CCD 14. As shown in FIG. 2, the vertical transfer of the vertical CCD 13 is a four-phase drive by vertical transfer pulses Vφ1 to Vφ4 applied to four types of vertical transfer electrodes 18a to 18d provided two in parallel for each pixel. Controlled by. Of the vertical transfer electrodes 18a to 18d, the vertical transfer electrode 18a to which the first-phase vertical transfer pulse Vφ1 is applied is also used as a read gate electrode of the RGs 12a and 12b. The vertical transfer electrode 18c to which the third-phase vertical transfer pulse Vφ3 is applied is also used as a read gate electrode for the RGs 12c and 12d. Further, the vertical transfer electrode 18d to which the fourth-phase vertical transfer pulse Vφ4 is applied is also used as a sweep gate electrode of the EG16.

  The horizontal CCD 14 is driven in two phases by horizontal transfer pulses Hφ 1 and Hφ 2 applied to a horizontal transfer electrode (not shown), and the signal charge for one row transferred from the vertical CCD 13 is horizontally transferred toward the output amplifier 15. To do. The output amplifier 15 is composed of, for example, a floating diffusion amplifier, detects the signal charge transferred from the horizontal CCD 14 and converts the signal charge into a voltage signal corresponding to the amount of charge, and outputs pixel signals corresponding to the light receiving units 11a to 11d. Output in time series.

  The drain region 17 is provided for each vertical column of the light receiving units 11a to 11d, and is commonly connected to the IR light receiving unit 11d belonging to the same column via the RG 12d. The drain region 17 is connected to the IR light receiving unit 11d via the EG 16, and signal charges are swept away from the IR light receiving unit 11d.

  Note that the rectangular area 19 in FIG. 1 represents one pixel area.

  FIG. 3 shows a cross section of the pixel including the B light receiving portion 11a along the line II in FIG. A p-well layer 21 is formed on the surface layer of the n-type semiconductor substrate (n-type silicon substrate) 20, and a B signal charge accumulation unit 22 made of an n-type semiconductor layer is formed deep in the p-well layer 21. ing. The B signal charge accumulating unit 22 extends in layers under the opening 23 a of the light shielding film 23, and one end in the horizontal direction reaches the surface of the p well layer 21.

  A pn junction portion 22a formed at the interface between the B signal charge storage portion 22 and the p well layer 21 therebelow serves as a photodiode that photoelectrically converts B light to generate a B signal charge. The pn junction 22a is formed at a relatively shallow position so as to have high sensitivity to B light having a short wavelength and a short penetration distance from the surface of the p-well layer 21. The p-well layer 21 is thinly formed under the B signal charge storage portion 22, and the thin portion 21a functions as a potential barrier for VOD. When a VOD pulse is applied as a substrate voltage to the n-type semiconductor substrate 20, the potential barrier of the thin part 21 a is lowered, and the signal charge in the B signal charge storage part 22 is swept out to the n-type semiconductor substrate 20.

In the surface layer of the p well layer 21 below the opening 23a, a p ⁺ layer 24 into which a p-type impurity is implanted at a high concentration is formed in order to suppress generation of dark current components. A transfer channel 25 made of an n-type semiconductor layer and a drain region 17 made of an n ⁺ -type semiconductor layer are formed on the surface layer of the p-well layer 21 below the light shielding film 23. Is separated by a pixel separation unit 26 made of a p ⁺ type semiconductor layer.

  The transfer channel 25 is separated from the B signal charge storage unit 22 via the p-well layer 21, and a transparent gate insulating film 27 formed on the entire surface is provided above the separated portion and the transfer channel 25. The aforementioned vertical transfer electrode 18a is formed. The transfer channel 25 extends in the vertical direction (V direction in FIG. 1), and the vertical transfer electrodes 18a to 18d intersecting above constitute the vertical CCD 13 of the above-described four-layer drive. In addition, the separated portion between the transfer channel 25 and the B signal charge storage unit 22 constitutes the above-described RG 12a by the vertical transfer electrode 18a thereabove. When a high-voltage read pulse is applied to the vertical transfer electrode 18a, the B signal charge in the B signal charge accumulating unit 22 is transferred to the transfer channel 25 through the separated portion and applied to the vertical transfer electrodes 18a to 18c. It moves in the transfer channel 25 according to the vertical transfer pulses Vφ1 to Vφ4.

The drain region 17 is separated from the B signal charge storage portion 22 via an extended portion 24 a of the p ⁺ layer 24 extending under the light shielding film 23, and above the separated portion and the drain region 17, The aforementioned vertical transfer electrode 18 a is formed through the gate insulating film 27. Since the extended portion 24a of the p ⁺ layer 24 functions as a channel stopper, even if a read pulse is applied to the vertical transfer electrode 18a, a channel is not formed in that portion, and the signal in the B signal charge accumulation unit 22 is not generated. Charge is not swept out to the drain region 17.

  The light shielding film 23 covers the vertical transfer electrodes 18a to 18d via the interlayer insulating film 28, and an opening 23a for allowing light to enter the photodiode is formed. A planarizing layer 29 made of a transparent insulator is formed on the light shielding film 23 and the gate insulating film 27 exposed from the opening 23a. A spectral layer 30 that selectively transmits light according to the wavelength is formed on the planarizing layer 29.

  The spectral layer 30 includes a plurality of types of optical filters divided for each pixel, and allows only B light (wavelength: about 400 nm to 500 nm) from visible light to pass through the planarization layer 29 of the pixel. A B filter 30a and an IR cut filter 30b that blocks IR light (wavelength: about 800 nm to 1500 nm) are sequentially stacked. Further, a microlens 31 for condensing light into the opening 23 a is formed on the spectral layer 30.

  FIG. 4 shows a cross section of the pixel including the G light receiving portion 11b along the line II-II in FIG. Since this pixel is the same as that shown in FIG. 3 except for the configuration of the signal charge storage portion and the optical filter, only the different portions will be described.

  In this pixel, a G signal charge storage portion 32 is formed in the p well layer 21 below the opening 23a. A pn junction portion 32a formed at the interface between the G signal charge storage portion 32 and the p well layer 21 therebelow serves as a photodiode that photoelectrically converts G light to generate a G signal charge. The pn junction 32a has a wavelength longer than that of the B light and is formed at a deeper position than the pn junction 22a so as to have a high sensitivity to the G light that penetrates deeper into the p well layer 21. . The p-well layer 21 is thinly formed under the G signal charge storage portion 32, and the thin portion 21b functions as a potential barrier for VOD. When the VOD pulse is applied to the n-type semiconductor substrate 20, the potential barrier of the thin portion 21 b is lowered, and the signal charge in the G signal charge storage portion 32 is swept out to the n-type semiconductor substrate 20.

The end portion of the G signal charge storage portion 32 reaches the surface, and is separated from the transfer channel 25 via the p-well layer 21. This separated portion constitutes RG 12b by the vertical transfer electrode 18a above it. Further, the G signal charge storage portion 32 is separated from the drain region 17 via the extended portion 24 a of the p ⁺ layer 24 functioning as a channel stopper, and the signal charge in the G signal charge storage portion 32 is transferred to the drain region 17. Will not be swept away.

  On the planarizing layer 29 of the pixel, a G filter 30c that transmits only visible light to G light (wavelength: about 500 nm to 600 nm) and the above-described IR cut filter 30b are sequentially stacked. A microlens 31 is stacked on the cut filter 30b.

  FIG. 5 shows a cross section of the pixel including the R light receiving portion 11c along the line III-III in FIG. Since this pixel is the same as that shown in FIGS. 3 and 4 except for the configuration of the signal charge storage unit and the optical filter, only the different parts will be described.

  In this pixel, an R signal charge storage portion 33 is formed in the p well layer 21 below the opening 23a. A pn junction portion 33a formed at the interface between the R signal charge storage portion 33 and the p well layer 21 thereunder is a photodiode that photoelectrically converts R light to generate an R signal charge. The pn junction 33a has a wavelength longer than that of the G light and is formed at a deeper position than the pn junction 32a so as to have a high sensitivity to the R light that penetrates deeper into the p well layer 21. . The p-well layer 21 is formed thinly under the R signal charge storage portion 33, and this thin portion 21c functions as a VOD potential barrier. When the VOD pulse is applied to the n-type semiconductor substrate 20, the potential barrier of the thin portion 21 c is lowered, and the signal charge in the R signal charge storage portion 33 is swept out to the n-type semiconductor substrate 20.

The end of the R signal charge storage unit 33 reaches the surface, and is separated from the transfer channel 25 via the p-well layer 21. This separated portion forms an RG 12c with the vertical transfer electrode 18c above it. Further, the R signal charge storage unit 33 is separated from the drain region 17 through the extended portion 24a of the p ⁺ layer 24 functioning as a channel stopper, and the signal charge in the R signal charge storage unit 33 is transferred to the drain region 17. Will not be swept away.

  On the planarization layer 29 of this pixel, an R filter 30d that transmits only visible light to R light (wavelength: about 600 nm to 700 nm) and the above-described IR cut filter 30b are sequentially stacked. A microlens 31 is stacked on the cut filter 30b.

  FIG. 6 shows a cross section of the pixel including the IR light receiving portion 11d along the line IV-IV in FIG. Since this pixel is the same as FIGS. 3 to 5 except that the configuration of the signal charge storage unit and the optical filter and the EG 16 are provided, only different parts will be described.

  In this pixel, an IR signal charge accumulating portion 34 is formed in the p-well layer 21 below the opening 23a. A pn junction 34a formed at the interface between the IR signal charge storage part 34 and the p-well layer 21 therebelow serves as a photodiode that photoelectrically converts IR light to generate an IR signal charge. The pn junction portion 33a is formed at a position deeper than the pn junction portion 33a so as to have a wavelength longer than that of the R light and to have high sensitivity to IR light that penetrates deeper into the p well layer 21. . The p-well layer 21 is thinly formed under the IR signal charge storage portion 34, and the thin portion 21d functions as a potential barrier for VOD. When the VOD pulse is applied to the n-type semiconductor substrate 20, the potential barrier of the thin portion 21 d is lowered, and the signal charge in the IR signal charge storage portion 34 is swept out to the n-type semiconductor substrate 20.

The IR signal charge storage unit 34 has two ends reaching the surface, and the end on the transfer channel 25 side is separated from the transfer channel 25 via the p-well layer 21. This separated portion constitutes RG 12d by the vertical transfer electrode 18c above it. Similarly, the end of the IR signal charge accumulating portion 34 on the drain region 17 side is also spaced apart from the drain region 17 via the p-well layer 21. A channel stopper (the extended portion 24a of the p ⁺ layer 24) is not formed in the separated portion, and the EG 16 is configured by the separated portion and the vertical transfer electrode 18d thereabove. When a high-voltage LOD pulse is applied to the vertical transfer electrode 18d, the potential barrier at this separated portion is lowered, and the signal charge in the IR signal charge storage section 34 is swept out to the drain region 17.

  An infrared light transmission / visible light cut filter 30e that transmits IR light (wavelength: about 800 nm to 1500 nm) and cuts visible light and a transparent film 30f are sequentially formed on the planarization layer 29 of the pixel. The microlenses 31 are stacked on the transparent film 30f. The transparent film 30f is provided to flatten the bottom of the microlens 31, but the transparent film 30f is not provided, and the thickness of each optical filter constituting the spectral layer 30 is adjusted to adjust the thickness of the microfilm 31f. Planarization under the lens 31 may be performed. Further, a planarizing layer that covers the entire top surface of the spectral layer 30 may be separately provided under the microlens 31.

  Next, FIG. 7 illustrates an imaging device in which the solid-state imaging device 10 configured as described above is incorporated. The imaging device 40 includes a control unit 41 that controls each unit centrally, an IR light emitting unit 42 that emits IR light toward the subject, a lens 43 that collects the subject light and makes it incident on the solid-state imaging device 10, and The solid-state imaging device 10, the timing generator (TG) 44 that generates various drive pulses for driving the solid-state imaging device 10, and the imaging signal output from the solid-state imaging device 10 are signal-processed to produce a visible light image And an IR image, and a memory 46 for recording a visible light image and an IR image generated by the signal processing unit 45.

  The IR light emitting unit 42 is a light source 42a such as an LED (light emitting diode) or a laser diode that emits IR light, a driver 42b that drives the light source 42a, and a modulator that modulates IR light emitted from the light source 42a in a pulse shape. 42c, and generates pulsed IR light (hereinafter referred to as IR pulse) and irradiates the subject. Note that it is also possible to generate an IR pulse by modulating the drive signal of the light source 42a by the driver 42b without providing the modulator 42c.

  The lens 43 makes the IR pulse reflected from the subject incident on the solid-state imaging device 10 together with normal subject light made of visible light. As shown in the figure, when the subject exists at a plurality of distance positions, the incident timing of the IR pulse to the solid-state imaging device 10 is dispersed according to each distance. When the distance from the light source 42a and the solid-state imaging device 10 to a certain subject is L and the speed of light is c, a range time (TOF: time) from when the light source 42a emits an IR pulse to when it enters the solid-state imaging device 10. Time of Flight) τ is expressed as τ = 2L / c.

  The TG 44 drives the solid-state imaging device 10 at a timing to be described later, receives IR pulses reflected from the subject at a predetermined range time τ, and also receives normal subject light (visible light), thereby solid-state imaging. The apparatus 10 outputs an imaging signal in which a pixel signal of IR light and a pixel signal of visible light (B, G, R) are mixed in time series for each pixel. As illustrated in FIG. 8, the signal processing unit 45 sequentially performs gain correction, A / D conversion, and pixel interpolation processing on the imaging signal output from the solid-state imaging device 10, and generates B, G, and R pixel signals. From the IR pixel signal, a distance image (subject image at a predetermined distance position) is generated, and both image data are written in the memory 46.

  FIG. 9 shows the VOD pulse, LOD pulse, and readout pulse among the driving pulses input from the TG 44 to the solid-state imaging device 10, the imaging signal output from the solid-state imaging device 10, and the IR emitted from the IR light emitting unit 42. Each timing with a pulse is shown. Each pulse is generated every one frame period (one vertical scanning period). Based on this timing chart, the operation of the solid-state imaging device 10 will be described.

  First, when a VOD pulse is input to the solid-state imaging device 10, the potential barriers of the thin portions 21a to 21d of the p-well layer 21 are lowered, and the signal charge accumulating portions 22 and 32 to 34 of the respective light receiving portions 11a to 11d. The signal charges existing in the n-type semiconductor substrate 20 are swept away, and the signal charge accumulating units 22, 32 to 34 are all emptied. At this time, visible light as subject light is incident on each of the light receiving portions 11a to 11d, and exposure (accumulation of signal charges) starts in response to the input of the VOD pulse.

Next, an IR pulse having a pulse width t ₁ is emitted from the IR light emitting unit 42. Thereafter, after the elapse of time t ₂ , the LOD pulse is input to the solid-state imaging device 10, whereby the signal charge in the IR signal charge accumulation unit 34 of the IR light receiving unit 11 d is swept away to the drain region 17 via the EG 16. . This time exposure of IR light receiving portion 11d from starts, the read pulse is input to the solid-state imaging device 10 after a time t ₃ has elapsed. With this readout pulse, the signal charges stored in the signal charge storage units 22 and 32 to 34 of the light receiving units 11a to 11d are transferred to the vertical CCD 13 via the RGs 12a to 12d. At this point, the exposure of all the light receiving portions 11a~11d ended, the time _{t 3} the IR light receiving unit 11d of the exposure time (signal charge storage time), also read pulse is input from the VOD pulse is inputted time _{t 4} in until B, G, and exposure time of the R light-receiving unit 11 a to 11 c. The exposure time t ₃ of the IR light receiving unit 11d to perform the receiving of 1 Pasuru amount of IR pulses reflected from the object, it is set to a value approximately equal Pasuru width t _1.

Thereafter, a vertical / horizontal transfer pulse (not shown) is input to the solid-state imaging device 10 and an imaging signal is output from the output amplifier 15. This method of reading and transferring signal charges is a so-called “all-pixel reading method”, and an imaging signal output in one vertical transfer period is composed of B, G, R, and IR pixel signals. Then, in each frame period, repeated imaging while changing the time t ₂ which determines the emission timing of the IR pulses. Time t ₂ corresponds to the time τ as above flight distance images of different length position is acquired sequentially. Here as above, the high speed c, and distance to the subject for obtaining a distance image from the imaging device 40 is L, the time _{t 2} is the relationship of _{L = c · t 2/2} , t 2 = 2L / C.

  As described above, the solid-state imaging device 10 can receive IR light together with visible light in a single plate configuration. In addition, since the LOD is provided only in the IR light receiving unit 11d and charge discharge independent of VOD is possible, the exposure time of IR light can be controlled independently of the exposure time of visible light.

  Further, by applying the solid-state imaging device 10 to an imaging device intended to receive visible light and IR light, the device can be made compact and low in cost. Furthermore, the image processing is performed using the subject image and the distance image acquired by the photographing device 40, so that only the person is extracted from the image and the background is replaced. Image composition can be easily performed without preparing special equipment, and a three-dimensional image can be created.

  In the above embodiment, the drain region 17 constituting the LOD is arranged for each vertical column of the light receiving units 11a to 11d and is commonly connected to the IR light receiving unit 11d in the same column. However, the form of the drain region 17 may be changed as appropriate. For example, the drain region 17 may be individually provided in each IR light receiving unit 11d.

  Further, in the above embodiment, the light receiving portions 11a to 11d are arranged in a plane in a square lattice shape as a whole, but the present invention is not limited to this, and vertical columns of light receiving portions adjacent in the horizontal direction are arranged in half in the vertical direction. A so-called honeycomb arrangement may be employed in which the arrangement is shifted by a pitch (half the pixel arrangement pitch).

  Moreover, in the said embodiment, although the conductivity type of each part in a semiconductor substrate is set so that an electron may be handled as a signal charge among the electron-hole pairs produced | generated by photoelectric conversion, this invention is limited to this. Instead, the conductivity type of each part in the semiconductor substrate may be the conductivity type opposite to the above so that holes having the opposite polarity to the electrons are handled as signal charges.

It is a schematic plan view which shows the structure of the solid-state imaging device of this invention. It is a schematic plan view which shows the structure of a vertical transfer electrode. It is a schematic sectional drawing in alignment with the II line | wire of FIG. It is a schematic sectional drawing in alignment with the II-II line of FIG. It is a schematic sectional drawing which follows the III-III line of FIG. It is a schematic sectional drawing which follows the IV-IV line of FIG. It is a block diagram which shows the structure of the imaging device to which the solid-state imaging device of this invention is applied. It is a flowchart explaining the processing content of a signal processing part. It is a timing chart which shows the timing of the drive pulse and IR pulse of a solid-state imaging device.

Explanation of symbols

10 Solid-state imaging device 11a B light receiving part (first light receiving part)
11b G light receiving part (second light receiving part)
11c R light receiving part (third light receiving part)
11d IR light receiving part (fourth light receiving part)
12a to 12d Read gate 13 Vertical CCD (vertical transfer unit)
14 Horizontal CCD (Horizontal transfer unit)
15 Output amplifier (signal output part)
16 Sweep gate 17 Drain region 18a-18d Vertical transfer electrode 20 N-type semiconductor substrate (one-conductivity type semiconductor substrate)
21 p-well layer (opposite conductivity type well layer)
21a to 21d Thin part 22 B signal charge storage part 22a, 32a, 33a, 34a pn junction part 25 Transfer channel 30a B filter 30b IR cut filter 30c G filter 30d R filter 30e Infrared light transmission / visible light cut filter 30f Transparent film 32 G signal charge storage unit 33 R signal charge storage unit 34 IR signal charge storage unit 40 Imaging device 42 IR light emitting unit

Claims (5)

In the solid-state imaging device in which each part is formed in the opposite conductivity type well layer formed on the surface layer of the one conductivity type semiconductor substrate,
A first light receiving unit that receives first color light of the three primary colors of visible light and accumulates signal charges;
A second light receiving unit that receives the second color light of the three primary colors and accumulates signal charges;
A third light receiving unit that receives the third color light of the three primary colors and accumulates signal charges;
A fourth light receiving unit that receives infrared light and accumulates signal charges;
A vertical overflow drain for sweeping signal charges of the first to fourth light receiving parts to the one-conductivity-type semiconductor substrate;
A lateral overflow drain that sweeps the signal charge of the fourth light receiving portion to a drain region of one conductivity type formed in the opposite conductivity type well layer via a sweep gate;
A read gate for reading signal charges from the first to fourth light receiving parts;
A vertical transfer unit that vertically transfers signal charges read by the read gate;
A horizontal transfer unit that receives each signal charge from the vertical transfer unit and performs horizontal transfer;
A signal output unit that converts each signal charge horizontally transferred by the horizontal transfer unit into a pixel signal corresponding to the amount of charge and outputs the pixel signal; and
A solid-state imaging device comprising:   The solid-state imaging device according to claim 1, wherein the sweep gate and the readout gate are controlled by a transfer electrode of a vertical transfer unit.   3. The solid-state imaging device according to claim 1, wherein the first to fourth light receiving units are evenly arranged in a plane at a ratio of one for every four pixels.   4. The solid-state imaging device according to claim 3, wherein the drain region is disposed to face the vertical transfer unit with one vertical column of the first to fourth light receiving units interposed therebetween. In the driving method of the solid-state imaging device according to any one of claims 1 to 4,
Signal charges from the first to fourth light receiving portions are swept away by the vertical overflow drain, signal charges from the fourth light receiving portion are swept by the horizontal overflow drain, and the first to fourth by the read gate. By driving the solid-state imaging device in the order of reading out signal charges from the light receiving unit, the exposure time of visible light by the first to third light receiving units and the exposure time of infrared light by the fourth light receiving unit are obtained. A method for driving a solid-state imaging device, characterized by differentiating.

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