JP2007325101A - Communication system, transmission device and reception device, communication method, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To perform efficient data transmission through an HDMI(R) etc. <P>SOLUTION: An HDMI(R) source 53 decides whether an HDMI(R) sink 61 can receive a sub-signal based upon a VSDB of E-EDID and adds the sub-signal to pixel data of a main image comprising the pixel data less in number of bits than transmission pixel data transmitted by a transmitter 72 when the HDMI(R) sink 61 can receive the sub-signal to constitute transmission pixel data, and a transmitter 72 transmits the data over TMDS channels #0 to #2. Further, the HDMI(R) source 53 transmits a general control packet containing sub-signal information showing whether the sub-signal is included in the transmission pixel data in a control section of a vertical blanking period. The present invention is applicable to, for example, the HDMI(R). <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a communication system, a transmission device and a reception device, a communication method, and a program, and in particular, can transmit pixel data of an uncompressed image in one direction at a high speed, for example, HDMI (High Definition Multimedia Interface) The present invention relates to a communication system, a transmission device and a reception device, a communication method, and a program that enable efficient data transmission in a communication interface such as (R).

  In recent years, digital television signals, that is, uncompressed (for example) from a DVD (Digital Versatile Disc) recorder, a set-top box, and other AV sources to a television receiver, a projector, and other displays. HDMI (R) is becoming widespread as a communication interface that transmits pixel data of a baseband image (moving image) and audio data accompanying the image at high speed.

  For HDMI (R), TMDS transmits pixel data and audio data in one direction from HDMI (R) source (HDMI (R) Source) to HDMI (R) sink (HDMI (R) Sink) at high speed. (Transition Minimized Differential Signaling) channels, CEC lines (Consumer Electronics Control Line) for bidirectional communication between HDMI (R) source and HDMI (R) sink, etc. The latest specification is defined in "High-Definition Multimedia Interface Specification Version 1.2a", December 14, 2005).

  In addition, HDMI (R) can implement HDCP (High-Bandwidth Digital Content Protection) for content copy prevention.

  In addition, for HDMI (R), a method has been proposed in which unnecessary signals are not transmitted in a vertical blanking interval or a horizontal blanking interval (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 2005-102161

  By the way, in the current HDMI (R), for example, each of RGB (Red, Green, Blue) is composed of 8-bit pixel data (hereinafter also referred to as 24-bit (= 8 bits × 3) image as appropriate). In recent years, an image with higher gradation, that is, an image in which each of RGB is composed of multi-bit pixel data such as 10 bits or 12 bits larger than 8 bits (hereinafter appropriately referred to as high gradation) There is an increasing demand for transmitting images).

  Therefore, a method of transmitting a high gradation image in HDMI (R) has been studied.

  However, although there is an increasing demand for transmitting high gradation images, 24 bit images are still often handled.

  Therefore, when HDMI (R) is extended so that a high gradation image can be transmitted, when transmitting a 24-bit image, the number of bits of pixel data of the high gradation image and 24 bits per pixel. Wasted data is transmitted by a difference from 24 bits that is the number of bits of pixel data of the image, and inefficient data transmission is performed.

  The present invention has been made in view of such a situation, and can efficiently transmit pixel data of an uncompressed image in one direction, for example, in a communication interface such as HDMI (R). Therefore, it is possible to perform proper data transmission.

  In the communication system according to the first aspect of the present invention, after receiving the performance information indicating the performance of the receiving device, from the interval from one vertical synchronization signal to the next vertical synchronization signal, the horizontal blanking interval and the vertical blanking interval In the effective image section, which is a section excluding, the pixel data of the uncompressed image for one screen is transmitted by a differential signal with a plurality of channels that transmit data of a fixed number of bits per one clock of the pixel clock, A transmission device that transmits the reception device in one direction; and the reception device that receives pixel data transmitted by differential signals in the plurality of channels from the transmission device after transmitting the performance information. In the communication system, the transmission device adjusts the frequency of the pixel clock to thereby convert pixel data to which the number of bits equal to or greater than the fixed number of bits is allocated. Transmitting means for transmitting to the receiving apparatus in one direction by differential signals in the plurality of channels, and a sub-judgment for determining whether the receiving apparatus can receive a sub-signal based on the performance information Pixel data of a main image composed of pixel data having a smaller number of bits than transmission pixel data, which is pixel data transmitted by the transmission means, when the signal reception availability determination means and the reception device can receive a sub-signal In addition, by adding the sub-signal, sub-signal adding means that constitutes the transmission pixel data, and the transmission pixel data transmitted in the vertical blanking interval immediately after the vertical blanking interval in the vertical blanking interval Information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included, and the receiving device converts the differential signal into the plurality of channels. Receiving means for receiving transmitted transmission pixel data, and based on the sub-signal information transmitted in the vertical blanking interval, the effective image interval transmitted immediately after the vertical blanking interval Sub-signal presence / absence determining means for determining whether or not the transmission pixel data includes the sub-signal, and separation for separating the sub-signal from the transmission pixel data when the transmission pixel data includes the sub-signal. Means.

  In the communication system according to the first aspect as described above, in the transmission apparatus, the transmission unit adjusts the frequency of the pixel clock, thereby assigning a number of bits equal to or greater than the fixed number of bits. Data is transmitted in one direction to the receiving device by differential signals on the plurality of channels. Further, based on the performance information, it is determined whether or not the receiving device can receive a sub-signal. If the receiving device can receive the sub-signal, the pixel transmitted by the transmitting unit The transmission pixel data is configured by adding the sub-signal to the pixel data of the main image composed of pixel data having a smaller number of bits than the transmission pixel data, which is the data. Sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the line section is transmitted. On the other hand, in the receiving device, the receiving means receives transmission pixel data transmitted by differential signals on the plurality of channels. Further, based on the sub-signal information transmitted in the vertical blanking interval, whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval When the transmission pixel data includes the sub signal, the sub signal is separated from the transmission pixel data.

  The transmission apparatus according to the second aspect of the present invention receives the performance information representing the performance of the reception apparatus, and then receives a horizontal blanking interval and a vertical blanking interval from the interval from one vertical synchronization signal to the next vertical synchronization signal. In the effective image section, which is a section excluding, the pixel data of the uncompressed image for one screen is transmitted by a differential signal with a plurality of channels that transmit data of a fixed number of bits per one clock of the pixel clock, A transmission device that transmits to a reception device in one direction, and by adjusting a frequency of the pixel clock, pixel data to which a number of bits equal to or greater than the fixed number of bits is allocated is differentially transmitted between the plurality of channels. A transmission means for transmitting the signal to the receiving device in one direction, and a sub-signal receiving device for determining whether the receiving device can receive the sub-signal based on the performance information. When the determination unit and the reception device can receive the sub signal, the pixel data of the main image composed of pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit, By adding the sub-signal, sub-signal adding means constituting the transmission pixel data, and the transmission pixel data transmitted to the effective image section immediately after the vertical blanking section in the vertical blanking section, Information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included.

  The communication method or program according to the second aspect of the present invention, after receiving performance information representing the performance of the receiving apparatus, from the interval from one vertical synchronization signal to the next vertical synchronization signal, the horizontal blanking interval and the vertical In the effective image section that is the section excluding the blanking section, the pixel data of the uncompressed image for one screen is differentially transmitted by a plurality of channels that transmit data of a fixed number of bits per pixel clock. A communication method of a transmission device that transmits to a reception device in one direction by a signal, or a program that is executed by a computer that controls the transmission device. The transmission device adjusts the frequency of the pixel clock to adjust the fixed frequency. Pixel data to which the number of bits equal to or greater than the number of bits is assigned is transmitted in one direction to the receiving device using the differential signals on the plurality of channels. Means for determining whether or not the receiving device can receive a sub-signal based on the performance information, and when the receiving device can receive the sub-signal, transmitted by the transmitting unit. The transmission pixel data is configured by adding the sub signal to the pixel data of the main image composed of pixel data having a smaller number of bits than the transmission pixel data that is the pixel data to be transmitted, and in the vertical blanking interval, A step of transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section.

  In the second aspect as described above, based on the performance information, it is determined whether or not the receiving apparatus can receive a sub signal, and the receiving apparatus can receive the sub signal. The transmission pixel data is configured by adding the sub-signal to the pixel data of the main image composed of pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit, In the vertical blanking interval, sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval is transmitted.

  The receiving apparatus according to the third aspect of the present invention receives the performance information indicating the performance of the receiving apparatus, and then receives a horizontal blanking interval and a vertical blanking interval from the interval from one vertical synchronizing signal to the next vertical synchronizing signal. In the effective image section, which is a section excluding, the pixel data of the uncompressed image for one screen is transmitted by a differential signal with a plurality of channels that transmit data of a fixed number of bits per one clock of the pixel clock, A transmission device that transmits to a reception device in one direction, and by adjusting a frequency of the pixel clock, pixel data to which a number of bits equal to or greater than the fixed number of bits is allocated is differentially transmitted between the plurality of channels. A transmission means for transmitting the signal to the receiving device in one direction, and a sub-signal receiving device for determining whether the receiving device can receive the sub-signal based on the performance information. When the determination unit and the reception device can receive the sub signal, the pixel data of the main image composed of pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit, By adding the sub-signal, sub-signal adding means constituting the transmission pixel data, and the transmission pixel data transmitted to the effective image section immediately after the vertical blanking section in the vertical blanking section, After transmitting the performance information to a transmission device comprising: information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included, the transmission device differentially transmits the plurality of channels. The receiving device that receives pixel data transmitted by a signal, and receives transmission pixel data transmitted by a differential signal on the plurality of channels. The sub-signal is transmitted to the transmission pixel data transmitted to the effective image section immediately after the vertical blanking section, based on the sub-signal information transmitted to the vertical blanking section. A sub-signal presence / absence determining unit that determines whether or not the sub-signal is included; and a separation unit that separates the sub-signal from the transmission pixel data when the transmission pixel data includes the sub-signal.

  The communication method or program according to the third aspect of the present invention receives the performance information indicating the performance of the receiving apparatus, and then receives the horizontal blanking interval and the vertical interval from the interval from one vertical synchronization signal to the next vertical synchronization signal. In the effective image section that is the section excluding the blanking section, the pixel data of the uncompressed image for one screen is differentially transmitted by a plurality of channels that transmit data of a fixed number of bits per pixel clock. A transmission device that transmits a signal to a reception device in one direction. By adjusting a frequency of the pixel clock, pixel data to which a number of bits equal to or greater than the fixed number of bits is allocated is transmitted through the plurality of channels. A transmission means for transmitting to the receiving device in one direction by a differential signal, and whether or not the receiving device can receive a sub-signal based on the performance information. A main image comprising pixel data having a smaller number of bits than transmission pixel data, which is pixel data transmitted by the transmission means, when the sub-signal reception availability determination means and the reception device can receive the sub-signal By adding the sub-signal to the pixel data of the sub-signal, the sub-signal adding means constituting the transmission pixel data and the vertical blanking section are transmitted to the effective image section immediately after the vertical blanking section. After transmitting the performance information to a transmission device comprising information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in transmission pixel data, the transmission device transmits the plurality of A communication method of the receiving device that receives pixel data transmitted by a differential signal on a channel, or a computer that controls the receiving device. The receiving device includes receiving means for receiving transmission pixel data transmitted by differential signals in the plurality of channels, and is based on the sub-signal information transmitted in the vertical blanking interval. Determining whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking interval, and when the sub-signal is included in the transmission pixel data, Separating the sub-signal from the transmission pixel data.

  In the third aspect as described above, based on the sub-signal information transmitted in the vertical blanking interval, the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval is included in the transmission pixel data. It is determined whether or not the sub-signal is included, and when the transmission pixel data includes the sub-signal, the sub-signal is separated from the transmission pixel data.

  According to the first to third aspects of the present invention, it is possible to efficiently transmit pixel data of an uncompressed image in one direction at high speed, for example, in a communication interface such as HDMI (R). It can be performed.

  Embodiments of the present invention will be described below. Correspondences between the constituent elements of the present invention and the embodiments described in the specification or the drawings are exemplified as follows. This description is intended to confirm that the embodiments supporting the present invention are described in the specification or the drawings. Therefore, even if there is an embodiment which is described in the specification or the drawings but is not described here as an embodiment corresponding to the constituent elements of the present invention, that is not the case. It does not mean that the form does not correspond to the constituent requirements. Conversely, even if an embodiment is described here as corresponding to a configuration requirement, that means that the embodiment does not correspond to a configuration requirement other than the configuration requirement. It's not something to do.

The communication system according to the first aspect of the present invention includes:
After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression to a reception device in one direction by a differential signal using a plurality of channels that transmit data of a fixed number of bits per pixel clock (for example, , HDMI (R) source 53 in FIG.
After transmitting the performance information, from the receiving device (for example, the HDMI (R) sink 61 in FIG. 2) that receives pixel data transmitted by differential signals on the plurality of channels from the transmitting device. Communication system
The transmitter is
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means (eg, transmitter 72 of FIG. 2);
Sub-signal reception availability determination means (for example, the sub-signal reception availability determination unit 105 in FIG. 20) for determining whether or not the reception device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmitting unit. By doing so, sub-signal adding means (for example, the sub-signal adding unit 102 in FIG. 20) constituting the transmission pixel data,
In the vertical blanking interval, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval (for example, , Sub-signal frame information transmission control unit 107) of FIG.
The receiving device is:
Receiving means (for example, the receiver 81 in FIG. 2) for receiving transmission pixel data transmitted by differential signals in the plurality of channels;
Based on the sub-signal information transmitted in the vertical blanking interval, it is determined whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval. Sub-signal presence / absence determining means (for example, sub-signal presence / absence determining unit 122 in FIG. 23);
When the transmission pixel data includes the sub signal, the transmission pixel data includes a separation unit (for example, a separation unit 123 in FIG. 23) that separates the sub signal from the transmission pixel data.

The transmission device according to the second aspect of the present invention provides:
After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression to a reception device in one direction by a differential signal using a plurality of channels that transmit data of a fixed number of bits per pixel clock (for example, , HDMI (R) source 53 in FIG.
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means (eg, transmitter 72 of FIG. 2);
Sub-signal reception availability determination means (for example, the sub-signal reception availability determination unit 105 in FIG. 20) for determining whether or not the reception device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. By doing so, sub-signal adding means (for example, the sub-signal adding unit 102 in FIG. 20) constituting the transmission pixel data,
In the vertical blanking interval, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval (for example, And sub-signal frame information transmission control section 107) of FIG.

The communication method or program according to the second aspect of the present invention includes:
After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. Communication of a transmitting apparatus that transmits pixel data of an image for one screen of compression to a receiving apparatus in one direction by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. A method or a program executed by a computer that controls a transmission device,
The transmitting device adjusts the frequency of the pixel clock so that pixel data to which the number of bits equal to or larger than the fixed number of bits is allocated is transmitted to the receiving device by a differential signal in the plurality of channels. Comprising transmission means for transmitting in the direction (eg transmitter 72 in FIG. 2);
Based on the performance information, it is determined whether or not the receiving device can receive a sub-signal (for example, step S104 in FIG. 22),
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. To construct the transmission pixel data (for example, step S112 in FIG. 22),
In the vertical blanking section, sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section is transmitted (for example, in FIG. 22). Step S111 or S116)
Includes steps.

The receiving apparatus according to the third aspect of the present invention is:
After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression to a reception device in one direction by a differential signal using a plurality of channels that transmit data of a fixed number of bits per pixel clock (for example, , HDMI (R) source 53 in FIG.
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means (eg, transmitter 72 of FIG. 2);
Sub-signal reception availability determination means (for example, the sub-signal reception availability determination unit 105 in FIG. 20) for determining whether or not the reception device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. By doing so, sub-signal adding means (for example, the sub-signal adding unit 102 in FIG. 20) constituting the transmission pixel data,
In the vertical blanking interval, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval (for example, , The sub-signal frame information transmission control unit 107) of FIG. 20, and the pixel that is transmitted from the transmission device as a differential signal through the plurality of channels after transmitting the performance information. The receiving device for receiving data (for example, the HDMI (R) sink 61 in FIG. 2);
Receiving means (for example, the receiver 81 in FIG. 2) for receiving transmission pixel data transmitted by differential signals in the plurality of channels;
Based on the sub-signal information transmitted in the vertical blanking interval, it is determined whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval. Sub-signal presence / absence determining means (for example, sub-signal presence / absence determining unit 122 in FIG. 23);
When the transmission pixel data includes the sub signal, the transmission pixel data includes a separation unit (for example, a separation unit 123 in FIG. 23) that separates the sub signal from the transmission pixel data.

A communication method or program according to the third aspect of the present invention includes:
After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression to a reception device in one direction by a differential signal using a plurality of channels that transmit data of a fixed number of bits per pixel clock (for example, , HDMI (R) source 53 in FIG.
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means (eg, transmitter 72 of FIG. 2);
Sub-signal reception availability determination means (for example, the sub-signal reception availability determination unit 105 in FIG. 20) for determining whether or not the reception device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. By doing so, sub-signal adding means (for example, the sub-signal adding unit 102 in FIG. 20) constituting the transmission pixel data,
In the vertical blanking interval, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval (for example, , The sub-signal frame information transmission control unit 107) of FIG. 20, and the pixel that is transmitted from the transmission device as a differential signal through the plurality of channels after transmitting the performance information. A communication method of the receiving device for receiving data,
The receiving device includes receiving means (for example, a receiver 81 in FIG. 2) that receives transmission pixel data transmitted by a differential signal in the plurality of channels.
Based on the sub-signal information transmitted in the vertical blanking interval, it is determined whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval. (For example, step S133 in FIG. 24),
When the transmission pixel data includes the sub signal, the sub signal is separated from the transmission pixel data (for example, step S138 in FIG. 24).
Includes steps.

  Embodiments of the present invention will be described below with reference to the drawings.

  FIG. 1 shows a configuration example of an embodiment of an AV (Audio Visual) system to which the present invention is applied.

  In FIG. 1, the AV system includes an HD (Hard Disk) recorder 41 and a display 42, and the HD recorder 41 and the display 42 are connected via a cable 43 for HDMI (R).

  The HD recorder 41 includes a recording / playback unit 51, a codec 52, an HDMI (R) source 53, and an HD 54, and records and plays data on the HD 54.

  That is, the recording / playback unit 51 records encoded data obtained by encoding the baseband data of an image and accompanying sound supplied from the codec 52 by the MPEG (Moving Picture Experts Group) method or the like on the HD 54. . The recording / reproducing unit 51 reproduces (reads) encoded data from the HD 54 and supplies the encoded data to the codec 52.

  The codec 52 decodes the encoded data supplied from the recording / playback unit 51 into baseband image and audio data by the MPEG method or the like, and converts the baseband image and audio data into the HDMI (R) source 53 or the like. Supply to an external device (not shown).

  For example, the codec 52 encodes baseband image and audio data supplied from an external device (not shown) into encoded data, and supplies the encoded data to the recording / reproducing unit 51.

  The HDMI (R) source 53 transmits the baseband image and audio data supplied from the codec 52 to the display 42 in one direction via the cable 43 by communication conforming to HDMI (R).

  The display 42 includes an HDMI (R) sink 61, a display control unit 62, and a display unit 63, and displays an image and the like.

  In other words, the HDMI (R) sink 61 transmits a baseband signal transmitted in one direction from the HDMI (R) source 53 of the HD recorder 41 connected via the cable 43 by communication conforming to HDMI (R). Image and audio data are received, and the image data is supplied to the display unit 62. Note that the audio data received by the HDMI (R) sink 61 is supplied to, for example, a speaker (not shown) built in the display 42 and output.

  The display control unit 62 controls (drives) the display unit 63 based on the baseband image data supplied from the HDMI (R) sink 61, thereby causing the display unit 63 to display a corresponding image.

  The display unit 63 includes, for example, a CRT (Cathode Ray Tube), an LCD (Liquid Crystal Display), an organic EL (Electro Luminescence), and the like, and displays an image according to the control of the display control unit 62.

  In the AV system of FIG. 1 configured as described above, for example, when the user operates the HD recorder 41 so as to reproduce the HD 54, the recording / reproducing unit 51 reproduces the encoded data from the HD 54 and sends it to the codec 52. Supply.

  The codec 52 decodes the encoded data supplied from the recording / playback unit 51 into baseband image and audio data, and supplies the baseband image and audio data to the HDMI (R) source 53.

  The HDMI (R) source 53 transmits the baseband image and audio data supplied from the codec 52 to the display 42 in one direction via the cable 43 by communication conforming to HDMI (R).

  In the display 42, the HDMI (R) sink 61 is transmitted in one direction from the HDMI (R) source 53 of the HD recorder 41 connected via the cable 43 by communication conforming to HDMI (R). The band image and audio data are received, and the image data is supplied to the display control unit 62 and the audio data is supplied to a speaker (not shown).

  The display control unit 62 controls the display unit 63 based on the image data supplied from the HDMI (R) sink 61, and thereby the corresponding image is displayed on the display unit 63.

  FIG. 2 shows a configuration example of the HDMI (R) source 53 and the HDMI (R) sink 61 of FIG.

  The HDMI (R) source 53 is an effective image that is a section obtained by removing a horizontal blanking section and a vertical blanking section from a section from one vertical synchronizing signal to the next vertical synchronizing signal (hereinafter, referred to as a video field as appropriate). In a section (hereinafter also referred to as an active video section as appropriate), a differential signal corresponding to pixel data of an uncompressed image for one screen is transmitted in one direction to the HDMI (R) sink 61 through a plurality of channels. At the same time, in the horizontal blanking interval or vertical blanking interval, differential signals corresponding to audio data attached to the image, control packet (Control Packet) and other auxiliary data, etc. are transmitted to the HDMI (R) sink with multiple channels. Send in one direction.

  That is, the HDMI (R) source 53 includes a source signal processing unit 71 and a transmitter 72.

  Baseband uncompressed image (Video) and audio (Audio) data is supplied to the source signal processing unit 71 from the codec 52 (FIG. 1) or the like. The source signal processing unit 71 performs necessary processing on image and sound data supplied thereto and supplies the processed data to the transmitter 72. In addition, the source signal processing unit 71 exchanges control information, status notification information (Control / Status), and the like with the transmitter 72 as necessary.

  The transmitter 72 converts the pixel data of the image supplied from the source signal processing unit 71 into corresponding differential signals, and the cable 43 is connected to the three TMDS channels # 0, # 1, and # 2 that are a plurality of channels. And serially transmit in one direction to the HDMI (R) sink 61 connected via the network.

  Further, the transmitter 72 supplies audio data, control packets and other auxiliary data accompanying the non-compressed image supplied from the source signal processing unit 71, a vertical synchronization signal (VSYNC) and a horizontal synchronization signal (HSYNC). ) Or the like is converted into a corresponding differential signal, and the HDMI (R) sink 61 connected via the cable 43 with the three TMDS channels # 0, # 1, and # 2. Serial transmission in one direction.

  The transmitter 72 also transmits a pixel clock synchronized with pixel data transmitted through the three TMDS channels # 0, # 1, and # 2 to the HDMI (R) sink 61 connected via the cable 43 via the TMDS clock channel. Send to.

  The HDMI (R) sink 61 receives a differential signal corresponding to pixel data transmitted in one direction from the HDMI (R) source 53 in a plurality of channels in the active video section, and also in a horizontal blanking section. In the vertical blanking interval, differential signals corresponding to auxiliary data and control data transmitted in one direction from the HDMI (R) source are received through a plurality of channels.

  That is, the HDMI (R) sink 61 includes a receiver 81 and a sync signal processing unit 82.

  The receiver 81 is a TMDS channel # 0, # 1, # 2, and is transmitted in one direction from the HDMI (R) source 53 connected via the cable 43, and a differential signal corresponding to pixel data; A differential signal corresponding to auxiliary data and control data is received in synchronization with a pixel clock transmitted from the HDMI (R) source 53 through the TMDS clock channel.

  Further, the receiver 81 converts the differential signal into corresponding pixel data, auxiliary data, and control data, and supplies the converted signal to the sync signal processing unit 82 as necessary.

  The sync signal processing unit 82 performs necessary processing on the data supplied from the receiver 81 and supplies the data to the display control unit 62 and the like. In addition, the sync signal processing unit 82 exchanges control information, information notifying the status (Control / Status), and the like with the receiver 81 as necessary.

  In the HDMI (R) transmission channel, the pixel data, auxiliary data, and control data are serially transmitted in one direction from the HDMI (R) source 53 to the HDMI (R) sink 61 in synchronization with the pixel clock. There are transmission channels called DDC (Display Data Channel) and CEC lines in addition to the three TMDS channels # 0 to # 2 as transmission channels for transmission and the TMDS clock channel as transmission channels for transmitting the pixel clock. .

  The DDC is used when the HDMI® source 53 reads E-EDID (Enhanced Extended Display Identification Data) from the HDMI® sink 61 connected via the cable 43.

That is, the HDMI (R) sink 61 has an EDID ROM (Read Only Memory) (not shown) storing E-EDID, which is performance information related to its performance (configuration / capability), in addition to the receiver 81. Have. The HDMI (R) source 53 reads the E-EDID of the HDMI (R) sink 61 from the HDMI (R) sink 61 connected via the cable 43 via the DDC, and based on the E-EDID. , The performance and setting of the HDMI (R) sink 61, that is, for example, the format (profile) of the image (e.g., RGB (Red, Green, Blue)) supported by the HDMI (R) sink 61 (having the electronic device). And YC _B C _R 4: 4: 4, YC _B C _R 4: 2: 2).

  Note that the HDMI (R) source 53 stores the E-EDID similarly to the HDMI (R) sink 61, and can transmit the E-EDID to the HDMI (R) sink 61 as necessary. .

  The CEC line is used for bidirectional communication of control data between the HDMI (R) source 53 and the HDMI (R) link 2.

  FIG. 3 shows a configuration example of the transmitter 72 and the receiver 81 shown in FIG.

  The transmitter 72 has three encoder / serializers 72A, 72B, and 72C corresponding to the three TMDS channels # 0 to # 2, respectively. Each of the encoders / serializers 72A, 72B, and 72C encodes pixel data, auxiliary data, and control data supplied thereto, converts the parallel data into serial data, and transmits the data by a differential signal.

  Here, for example, when the pixel data has three components of R, G, and B, the B component (B component) is in the encoder / serializer 72A, the G component (G component) is in the encoder / serializer 72B, and R The component (R component) is supplied to the encoder / serializer 72C.

  The auxiliary data includes, for example, audio data and control packets. The control packets are supplied to, for example, the encoder / serializer 72A, and the audio data are supplied to, for example, the encoder / serializers 72B and 72C.

  Further, control data includes a 1-bit vertical synchronization signal (VSYNC), a 1-bit horizontal synchronization signal (HSYNC), and 1-bit control bits CTL0, CTL1, CTL2, and CTL3, respectively. The synchronization signal is supplied to the encoder / serializer 72A, the control bits CTL0 and CTL1 are supplied to the encoder / serializer 72B, and the control bits CTL2 and CTL3 are supplied to the encoder / serializer 72C.

  The encoder / serializer 72A transmits the B component of the pixel data, the vertical synchronization signal, the horizontal synchronization signal, and the auxiliary data supplied thereto in a time division manner.

  That is, the encoder / serializer 72A converts the B component of the pixel data supplied thereto into 8-bit parallel data that is a fixed number of bits. Further, the encoder / serializer 72A encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 0.

  The encoder / serializer 72A encodes the 2-bit parallel data of the vertical synchronization signal and horizontal synchronization signal supplied thereto, converts the data into serial data, and transmits the serial data through the TMDS channel # 0.

  Furthermore, the encoder / serializer 72A converts the auxiliary data supplied thereto into parallel data in units of 4 bits. Then, the encoder / serializer 72A encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 0.

  The encoder / serializer 72B transmits the G component of the pixel data, control bits CTL0 and CTL1, and auxiliary data supplied thereto in a time division manner.

  That is, the encoder / serializer 72B sets the G component of the pixel data supplied thereto as parallel data in units of 8 bits, which is a fixed number of bits. Further, the encoder / serializer 72B encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 1.

  The encoder / serializer 72B encodes the 2-bit parallel data of the control bits CTL0 and CTL1 supplied thereto, converts the data into serial data, and transmits the serial data through the TMDS channel # 1.

  Further, the encoder / serializer 72B sets the auxiliary data supplied thereto as parallel data in units of 4 bits. Then, the encoder / serializer 72B encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 1.

  The encoder / serializer 72C transmits the R component of the pixel data, control bits CTL2 and CTL3, and auxiliary data supplied thereto in a time division manner.

  That is, the encoder / serializer 72C converts the R component of the pixel data supplied thereto into 8-bit parallel data that is a fixed number of bits. Further, the encoder / serializer 72C encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 2.

  The encoder / serializer 72C encodes the 2-bit parallel data of the control bits CTL2 and CTL3 supplied thereto, converts the data into serial data, and transmits the serial data through the TMDS channel # 2.

  Furthermore, the encoder / serializer 72C sets the auxiliary data supplied thereto as parallel data in units of 4 bits. Then, the encoder / serializer 72C encodes the parallel data, converts it into serial data, and transmits it through the TMDS channel # 2.

  The receiver 81 includes three recovery / decoders 81A, 81B, and 81C corresponding to the three TMDS channels # 0 to # 2, respectively. Each of the recovery / decoders 81A, 81B, and 81C receives pixel data, auxiliary data, and control data transmitted as differential signals through the TMDS channels # 0 to # 2. Further, each of the recovery / decoders 81A, 81B, and 81C converts pixel data, auxiliary data, and control data from serial data to parallel data, and further decodes and outputs the converted data.

  That is, the recovery / decoder 81A receives the B component of the pixel data, the vertical synchronization signal, the horizontal synchronization signal, and the auxiliary data that are transmitted as differential signals on the TMDS channel # 0. Then, the recovery / decoder 81A converts the B component of the pixel data, the vertical synchronization signal, the horizontal synchronization signal, and the auxiliary data from serial data to parallel data, and decodes and outputs them.

  The recovery / decoder 81B receives the G component of the pixel data, the control bits CTL0 and CTL1, and the auxiliary data transmitted by the differential signal on the TMDS channel # 1. Then, the recovery / decoder 81B converts the G component of the pixel data, the control bits CTL0 and CTL1, and the auxiliary data from serial data to parallel data, and decodes and outputs them.

  The recovery / decoder 81C receives the R component of the pixel data, the control bits CTL2 and CTL3, and auxiliary data that are transmitted as differential signals on the TMDS channel # 2. The recovery / decoder 81C converts the R component of the pixel data, the control bits CTL2 and CTL3, and auxiliary data from serial data to parallel data, and decodes and outputs them.

  FIG. 4 shows an example of a transmission section (period) in which various types of transmission data are transmitted through the three TMDS channels # 0 to # 2 of HDMI (R).

  FIG. 4 shows transmission sections of various transmission data in the case where a progressive image of 720 × 480 pixels in width × length is transmitted in TMDS channels # 0 to # 2.

  Depending on the type of transmission data, the video field (Video Data period) and the data island period are used for the video field (Video Field) where transmission data is transmitted on the three TMDS channels # 0 to # 2 of HDMI (R). There are three types of sections: (Data Island period) and Control period (Control period).

  Here, the video field is a section from one vertical synchronizing signal (the rising edge (active edge) thereof) to the next vertical synchronizing signal, and includes a horizontal blanking section and a vertical blanking section (vertical blanking). And an active video section (Active Video) which is a section obtained by removing a horizontal blanking section and a vertical blanking section from the video field.

  The video data section (the part with hatched left up (right down) lines in FIG. 4) is assigned to the active video section, and in the video data section, the image pixels (effective pixels (non-compressed pixels)) for one uncompressed screen are allocated. active pixel)) data is transmitted.

  The data island section (the part with diagonal lines in the upper right (downward left) in FIG. 4) and the control section (part with the vertical line in FIG. 4) are the horizontal return section and the vertical return section. Auxiliary data is transmitted in the data island section and the control section.

  That is, the data island section is assigned to a part of the horizontal blanking section and the vertical blanking section. In the data island section, auxiliary data, for example, data that is not related to control, such as a packet of audio data is transmitted. Is done.

  The control section is assigned to other parts of the horizontal blanking section and the vertical blanking section, and in the control section, the auxiliary data is data related to control, for example, the vertical synchronization signal and the horizontal synchronization signal, A control packet or the like is transmitted.

  Here, in the current HDMI (R), that is, the latest specification of HDMI (R) "High-Definition Multimedia Interface Specification Version 1.2a", December 14, 2005, it is transmitted on the TDMS clock channel (Fig. 2). The frequency of the pixel clock to be applied is, for example, 165 MHz, and in this case, the transmission rate of the data island period is about 500 Mbps.

  As described above, auxiliary data is transmitted in both the data island period and the control period, but the distinction is made by the control bits CTL0 and CTL1.

  That is, FIG. 5 shows the relationship between the control bits CTL0 and CTL1, the data island period, and the control period.

  The control bits CTL0 and CTL1 can represent two states, for example, a device enable state and a device disable state, as shown first in FIG. In FIG. 5, the device enable state is represented by H (High) level, and the device disable state is represented by L (Low) level.

  The control bits CTL0 and CTL1 are in a device disable state in the data island period and in a device enable state in the control period, thereby distinguishing the data island period and the control period.

  In the data island period in which the control bits CTL0 and CTL1 are at the L level as the device disabled state, as shown second from the top in FIG. 5, the auxiliary data is data not related to control, for example, Audio data or the like is transmitted.

  On the other hand, in the control section where the control bits CTL0 and CTL1 are at the H level as the device enable state, as shown in the third part from the top in FIG. 5, the auxiliary data is data related to control, for example, control packets And preamble are transmitted.

  In addition, in the control section, as shown in the fourth from the top in FIG. 5, a vertical synchronization signal and a horizontal synchronization signal are also transmitted.

  Next, referring to FIG. 6, the current HDMI (R), that is, the latest specification of HDMI (R), “High-Definition Multimedia Interface Specification Version 1.2a”, December 14, 2005 is prescribed. The transmission of existing pixel data will be described.

  FIG. 6 is a timing chart showing the transmission timing of image pixel data transmitted in the current HDMI® video data section.

In the current HDMI (R), pixel data of images in three formats of RGB 4: 4: 4, YC _B C _R 4: 4: 4, and YC _B C _R 4: 2: 2 are converted into TMDS channel #. Although transmission can be performed from 0 to # 2, for example, RGB4: 4: 4 of the above three formats will be described as an example.

  In HDCP, which is a technology for preventing copying of content used in HDMI®, data is scrambled in units of 8 bits. For this reason, in one TMDS channel, data is transmitted in units of a fixed number of bits per pixel clock, that is, in units of 8 bits that are subject to HDCP processing.

  As described above, in one TMDS channel, 8-bit data is transmitted per one pixel clock, so according to the three TMDS channels # 0 to # 2, 24 bits per one clock. Data can be transmitted.

  Therefore, in the current HDMI (R), as a RGB 4: 4: 4 image, a 24-bit image in which each of the R component, G component, and B component of each pixel is 8 bits includes three TMDS channels # 0 to # 4. Transmitted with # 2.

  That is, in the current HDMI®, as shown in FIG. 6, the 8-bit B component of the pixel data of one pixel of a 24-bit image is TMDS channel # 0 and 8 bits per one pixel clock. The G component is transmitted on the TMDS channel # 1, and the 8-bit R component is transmitted on the TMDS channel # 2.

  By the way, as described above, in recent years, an image with a higher gradation, that is, each of the R component, the G component, and the B component is composed of multi-bit pixel data such as 10 bits or 12 bits larger than 8 bits. There is an increasing demand for transmitting high gradation images.

  In the current HDMI (R), as described above, transmission of 24-bit images is performed by transmitting 8-bit data per pixel clock in one TMDS channel. Transmission of a tone image can be performed simply by transmitting data of more than 8 bits, for example, 10 bits or 12 bits, per pixel clock in one TMDS channel.

  However, as described above, HDCP, which is a technology for preventing copying of content adopted in HDMI (R), scrambles data in units of 8 bits. Therefore, in one TMDS channel, pixel clock If data is transmitted in units of bits other than 8 bits per clock, it becomes difficult to apply HDCP, and as a result, data transmission conforming to HDMI (R) becomes difficult. Become.

  Therefore, in the current HDMI (R), as described above, a pixel clock having a frequency of 165 MHz is adopted. By using a pixel clock having a higher frequency as the pixel clock, one TMDS channel can be used. The fixed 8-bit unit data is transmitted per one clock of the pixel clock, so that HDCP can be applied and high gradation image can be transmitted.

  For example, by setting the pixel clock frequency to 5/4 times 165 MHz when transmitting a 24-bit image, each of the R component, the G component, and the B component becomes a 10-bit high gradation image (hereinafter referred to as appropriate). , 30 bits (= 10 bits × 3) image) can be transmitted.

  That is, FIG. 7 is a timing chart showing the transmission timing of pixel data when transmitting a 30-bit image in the video data section of HDMI (R).

  Transmission of 30-bit images is 8 bits for each point of transmission of the B component in TMDS channel # 0, G component in TMDS channel # 1, and R component in TMDS channel # 2, and pixel clock. This is the same as the transmission of 24-bit images in that the data is transmitted.

  However, in the transmission of a 24-bit image, since one component (R component, G component, or B component) of one pixel is 8 bits, the 8-bit component is transmitted by one pixel clock. On the other hand, in the transmission of a 30-bit image, since one component of one pixel is 10 bits, the 10-bit component is transmitted over a plurality of pixel clocks. Transmission is different from transmission of 24-bit images.

  In other words, the 10-bit component LSB (Least Significant Bit) to MSB (Most Significant Bit) is represented by b0 to b9. Also, the R component, G component, or B component of the i-th pixel in the raster scan order of the pixels constituting the image, respectively, is the R # i-1 component, G # i-1 component, or B # i- The jth clock is referred to as clock # j-1 with reference to a clock (pulse) with a pixel clock.

  In this case, for the B component, as shown in FIG. 7, the lower 8 bits b0 to b7 of the 10-bit B # 0 component are transmitted by clock # 0, and the B-component of the 10-bit B # 0 component is transmitted. A total of 8 bits including the remaining upper 2 bits b8 and b9 and the lower 6 bits b0 to b5 of the 10-bit B # 1 component of the next pixel are transmitted by clock # 1.

  Furthermore, the remaining 8 high-order bits b6 to b9 of the 10-bit B # 1 component and the low-order 4 bits b0 to b3 of the 10-bit B # 2 component of the next pixel are a total of 8 bits. It is transmitted in # 2, and is the sum of the remaining upper 6 bits b4 to b9 of the 10-bit B # 2 component and the lower 2 bits b0 and b1 of the 10-bit B # 3 component of the next pixel 8 bits are transmitted on clock # 3.

  The remaining upper 8 bits b2 to b9 of the 10-bit B # 3 component are transmitted by clock # 4.

  As described above, B # 0 to B # 3 components, which are B components of 4 pixels, are transmitted with 5 clocks of clocks # 0 to # 4. Similarly, the B component of 4 pixels is transmitted with 5 clocks in the same manner. Is transmitted.

  For 24-bit images, as described in FIG. 6, 8-bit B components are transmitted in 1 clock, but for 30-bit images, 4 pixels of 10-bit B components are transmitted in 5 clocks. Is done. Therefore, for a 30-bit image, one frame of a 30-bit image is identical to one frame of a 24-bit image by transmitting the B component using a pixel clock having a frequency 5/4 times that of the 24-bit image. It can be transmitted in the time.

  It should be noted that components other than the B component of the 30-bit image, that is, the G component and the R component are transmitted in the same manner as the B component.

  In addition, in the transmission of 30-bit images, transmission of pixel data of 4 pixels with 5 clocks is repeated as a transmission unit, so to speak, the transmission unit is repeated. The clock in this transmission unit is called a phase. Then, the transmission unit of a 30-bit image consists of five phases.

  Next, by increasing the frequency of the pixel clock, a high gradation image having a higher gradation than the 30-bit image, that is, each of the R component, the G component, and the B component is, for example, a 12-bit high gradation. Each of an image (hereinafter also referred to as a 36-bit (= 12 bits × 3) image), an R component, a G component, and a B component is, for example, a 16-bit high gradation image (hereinafter, appropriately 48 bits ( = 16 bits × 3) also referred to as an image) or the like.

  Specifically, for example, by setting the frequency of the pixel clock to 3/2 times 165 MHz when transmitting a 24-bit image, each of the R component, the G component, and the B component is 36 bits of 12 bits. Images can be transmitted.

  That is, FIG. 8 is a timing chart showing the transmission timing of pixel data when a 36-bit image is transmitted in the video data section of HDMI (R).

  The transmission of 36-bit images is 8 bits for each point of pixel clock transmission and the B component is TMDS channel # 0, the G component is TMDS channel # 1, and the R component is TMDS channel # 2. This is the same as the transmission of 24-bit images in that the data is transmitted.

  However, in the transmission of a 24-bit image, since one component of one pixel is 8 bits, the 8-bit component is transmitted by one clock of the pixel clock, whereas in the transmission of a 36-bit image. The transmission of a 36-bit image differs from the transmission of a 24-bit image in that a 12-bit component is transmitted over multiple pixel clocks because one component of a pixel is 12 bits. .

  In other words, if the LSB to MSB of the 12-bit component are represented by b0 to b11, as shown in FIG. 8, the lower 8 bits b0 of the lower-order 8 bits of the 12-bit B # 0 component are shown. Through b7 are transmitted in clock # 0, and the remaining upper 4 bits b8 through b11 of the 12-bit B # 0 component and the lower 4 bits b0 through b12 of the 12-bit B # 1 component of the next pixel A total of 8 bits with b3 are transmitted in clock # 1.

  Then, the remaining upper 8 bits b4 to b11 of the 12-bit B # 1 component are transmitted by clock # 2.

  As described above, B # 0 and B # 1 components, which are B components of 2 pixels, are transmitted by 3 clocks of clocks # 0 to # 2, and thereafter, B components of 2 pixels are transmitted by 3 clocks in the same manner. Is transmitted.

  For 24-bit images, as described in FIG. 6, 8-bit B components are transmitted in one clock, but for 36-bit images, two 12-bit B components are transmitted in three clocks. Is done. Therefore, for a 36-bit image, one frame of the 36-bit image is identical to one frame of the 24-bit image by transmitting the B component using a pixel clock having a frequency 3/2 times that of the 24-bit image. It can be transmitted in the time.

  It should be noted that components other than the B component of the 36-bit image, that is, the G component and the R component are transmitted in the same manner as the B component.

  Also, in the transmission of a 36-bit image, the transmission unit is repeated with transmission of pixel data of 2 pixels in 3 clocks as a transmission unit. Therefore, the transmission unit of a 36-bit image consists of three phases.

  Next, transmission of a 16-bit 48-bit image for each of the R component, G component, and B component is performed by setting the frequency of the pixel clock to twice that of 165 MHz when transmitting a 24-bit image. Can do.

  That is, FIG. 9 is a timing chart showing the transmission timing of pixel data when a 48-bit image is transmitted in the video data section of HDMI (R).

  Transmission of 48-bit images is 8 bits for each point of pixel clock transmission and B component is TMDS channel # 0, G component is TMDS channel # 1, and R component is TMDS channel # 2. This is the same as the transmission of 24-bit images in that the data is transmitted.

  However, in the transmission of a 24-bit image, since one component of one pixel is 8 bits, the 8-bit component is transmitted in one pixel clock, whereas in the transmission of a 48-bit image. Since one component of one pixel is 16 bits, transmission of a 48-bit image is different from transmission of a 24-bit image in that the 16-bit component is transmitted over a plurality of pixel clocks. .

  That is, when the LSB to MSB of the 16-bit component are represented by b0 to b15, as shown in FIG. 9, the lower 8 bits b0 of the 16-bit B # 0 component are represented as shown in FIG. Through b7 are transmitted with clock # 0, and the remaining upper 8 bits b8 through b15 of the 16-bit B # 0 component are transmitted with clock # 1.

  As described above, the B # 0 component, which is the B component of one pixel, is transmitted with two clocks, clocks # 0 and # 1, and the B component of one pixel is transmitted with two clocks in the same manner.

  For a 24-bit image, as described in FIG. 6, an 8-bit B component is transmitted in one clock, whereas for a 48-bit image, one pixel of a 16-bit B component is transmitted in two clocks. Is done. Therefore, for a 48-bit image, the B component is transmitted using a pixel clock having a frequency twice that of the 24-bit image, so that one frame of the 48-bit image is equal to one frame of the 24-bit image. Can be transmitted.

  It should be noted that components other than the B component of the 48-bit image, that is, the G component and the R component are transmitted in the same manner as the B component.

  In transmission of a 48-bit image, the transmission unit is repeated with transmission of pixel data of one pixel in two clocks as a transmission unit. Therefore, the transmission unit of a 48-bit image consists of two phases.

  As described above, the current HDMI (R) is adjusted by adjusting the frequency of the pixel clock to 5/4 times, 3/2 times, or 2 times, for example, when transmitting a 24-bit image. The TMDS channel transmits pixel data in which 10 bits, which is a fixed number of bits per clock of the pixel clock, more than 8 bits, 12 bits and 16 bits are assigned to each component, that is, a 30-bit image. Alternatively, transmission of high gradation images such as 36-bit images and 48-bit images can be performed using the current HDMI (R) TMDS channel as it is.

  Therefore, in consideration of the transmission of 24-bit images in the current HDMI (R), the TMDS channel of the current HDMI (R) can be adjusted per pixel clock by adjusting the pixel clock frequency. Transmission of pixel data in which the number of bits of 8 bits or more, which is a fixed number of bits to be transmitted, is allocated to each component, that is, for example, a 24-bit image, a 30-bit image, a 36-bit image, a 48-bit image, etc. High gradation image transmission can be performed using the current HDMI (R) TMDS channel.

  Now, in addition to 24-bit images, high-tone images can be transmitted using the current HDMI (R) TMDS channel as is, especially with deep color HDMI (R). For example, when an HDMI (R) source compliant with deep color HDMI (R) transmits a high gradation image, first, the HDMI (R) sink that is the communication partner is connected to the deep color HDMI ( It is necessary to recognize whether or not it complies with (R).

  Here, whether or not the HDMI (R) sink supports deep color HDMI (R) is described in, for example, E-EDID that is performance information related to the performance of the HDMI (R) sink (included) )be able to.

  That is, FIG. 10 shows VSDB (Vender Specific Definition Bit) in E-EDID.

  In the current HDMI (R), bits # 4, # 5, and # 6 of the fifth, sixth, and seventh bits from LSB of Byte # 6 of VSDB are unused (Reserved), but in FIG. Bits Suport_30bit, Suport_36bit, and Suport_48bit are assigned to the bits # 4, # 5, and # 6, respectively.

  Bit Suport_30bit assigned to bit # 4 of Byte # 6 of VSDB, bit Suport_36bit assigned to bit # 5, and bit Suport_48bit assigned to bit # 6 are HDMI (R) sink high gradation When it does not correspond to an image, that is, when it corresponds only to a 24-bit image, for example, all are set to 0.

  When the HDMI (R) sink supports only a 30-bit image of the high gradation image, only the bit Suport_30bit is set to 1. Further, when the HDMI (R) sink is compatible with a 30-bit image and a 36-bit image of the high gradation image, only the bit Suport_36bit is set to 1. Further, when the HDMI (R) sink is compatible with all of the 30-bit image, 36-bit image, and 48-bit image of the high gradation image, only the bit Suport_48bit is set to 1.

  As described above, whether the HDMI (R) sink supports deep color HDMI (R) is described in the VSDB of E-EDID. The E-EDID is read out, and the VSDB of the E-EDID is referenced to check whether the HDMI (R) sink supports high-gradation images. Furthermore, the HDMI (R) sink supports high-gradation images. If it is, it can be recognized whether it corresponds to a 30-bit image, a 36-bit image, or a 48-bit image.

  The bits Suport_30bit, Suport_36bit, and Suport_48bit shown in FIG. 10 can also be described in the E-EDID VSDB of the HDMI (R) source.

  Next, E-EDID exchange between HDMI (R) source and HDMI (R) sink can be done when HDMI (R) source and HDMI (R) sink are connected, or when HDMI (R) source or It is performed at a specific timing such as when the power of the HDMI (R) sink is turned on, and is not performed periodically.

  On the other hand, when the HDMI (R) source and the HDMI (R) sink support high gradation images, a 24-bit image is transmitted from the HDMI (R) source to the HDMI (R) sink. In some cases, a high gradation image is transmitted, and in a case where a high gradation image is transmitted, a 30-bit image, a 36-bit image, or a 48-bit image may be transmitted.

  As described with reference to FIG. 4, the image is transmitted in the video data section allocated to the active video section (Active Video) of the video field. Therefore, the image is transmitted in the video data section in the HDMI (R) sink. It is desirable that whether a coming image is a 24-bit image, a 30-bit image, a 36-bit image, or a 48-bit image can be recognized for each video field including a video data section.

  In this case, for each video field from the HDMI (R) source to the HDMI (R) sink, an image transmitted in the video data section included in the video field is a 24-bit image, a 30-bit image, or a 36-bit image. It is necessary to transmit information indicating whether it is an image or a 48-bit image (hereinafter referred to as a deep color mode as appropriate).

  Here, as the information transmitted for each video field from the HDMI (R) source to the HDMI (R) sink, the general control packet transmitted in the control section described in FIG. 4 in the vertical blanking section. (General Control Packet).

  Therefore, the deep color mode can be included in the general control packet, and can be transmitted from the HDMI (R) source to the HDMI (R) sink for each video field.

  That is, FIG. 11 shows the format of the general control packet.

  The general control packet has a packet header (General Control Packet Header) and a subpacket (General Control Subpacket). The upper side of FIG. 11 shows a packet header, and the lower side of FIG. 11 shows a subpacket. ing.

  In the current HDMI (R), bits # 0, # 1, and # 2 of the 1st, 2nd, and 3rd bits from the LSB of Byte # SB1 of the sub packet (lower side of FIG. 11) of the general control packet are unused and 0 In FIG. 11, bits CD0, CD1, and CD2 representing the deep color mode are assigned to the bits # 0, # 1, and # 2, respectively.

  FIG. 12 shows a video data section (FIG. 4) included in a video field including bits CD0, CD1, CD2 of Byte # SB1 of a subpacket and a control section (FIG. 4) in which a general control packet having the subpacket is transmitted. ) Shows the relationship with the transmitted image.

  If the HDMI (R) sink does not support high-gradation images (Color Depth not indicated), the bits CD0, CD1, and CD2 indicating the deep color mode are all set to 0, as in the current HDMI (R). The

  Further, when the HDMI (R) sink is compatible with a high gradation image and the image transmitted in the video data section is a 24-bit image, the bits CD0, CD1, and CD2 representing the deep color mode are, for example, When the images transmitted in the video data section are 30-bit images, the bits CD0, CD1, and CD2 representing the deep color mode are set to 1,0 and 1, respectively, for example. The

  Further, when the image transmitted in the video data section is a 36-bit image, the bits CD0, CD1, and CD2 representing the deep color mode are set to 0, 1, and 1, for example, and transmitted in the video data section. When the image is a 48-bit image, the bits CD0, CD1, and CD2 representing the deep color mode are all set to 1, for example.

  As described above, in the HDMI (R) source, by including the bits CD0, CD1, and CD2 representing the deep color mode in the general control packet and transmitting them in the control section of the video field, the HDMI (R) sink can transmit the video. It can be recognized whether the image transmitted in the video data section of the field is a 24-bit image, a 30-bit image, a 36-bit image, or a 48-bit image.

  In the current HDMI (R), bits # 4, # 5, # of the fifth, sixth and seventh bits from the LSB of Byte # SB1 of the subpacket (lower side of FIG. 11) of the general control packet shown in FIG. 6 is unused and is set to 0. In FIG. 11, bits PP0, PP1, and PP2 representing phases are assigned to bits # 4, # 5, and # 6, respectively.

  That is, when a 30-bit image, a 36-bit image, or a 48-bit image is transmitted, there is a phase as described with reference to FIGS. Bits PP0, PP1, and PP2 of Byte # SB1 of the subpacket include pixel data of an image transmitted in the video data section included in the video field including the control section in which the general control packet having the subpacket is transmitted. A value representing the phase of the pixel data transmitted at the end of is set.

  Next, referring to the flowcharts of FIGS. 13 and 14, the HDMI (R) source 53 and the HDMI (R) sink 61 in FIG. 2 correspond to the deep color HDMI (R). The operations of the R) source 53 and the HDMI (R) sink 61 will be described.

  First, the operation of the HDMI (R) source 53 of FIG. 2 will be described with reference to the flowchart of FIG.

  The HDMI (R) source 53 waits for the E-EDID of the HDMI (R) sink 61 to be transmitted from the HDMI (R) sink 61 via the DDC described with reference to FIG. The E-EDID is received.

  Then, the HDMI (R) source 53 refers to the E-EDID VSDB (FIG. 10) from the HDMI (R) sink 61 in step S12, so that the HDMI (R) sink 61 can receive the image. Recognizes whether the (corresponding image) is a 24-bit image, a 30-bit image, a 36-bit image, or a 48-bit image, and the HDMI (R) sink 61 corresponds to it. The images to be transmitted in the deep color mode, that is, the three TMDS channels # 0 to # 2 are determined from the existing images.

  Here, in the HDMI (R) source 53, for example, an image having the highest gradation among images supported by the HDMI (R) sink 61 is transmitted through the three TMDS channels # 0 to # 2. Can be determined as In this case, when the HDMI (R) sink 61 is compatible with, for example, a 24-bit image, a 30-bit image, a 36-bit image, and a 48-bit image, the 48-bit image with the highest gradation is the TMDS channel # 0. Also, it is determined as an image to be transmitted in # 2.

  Thereafter, the HDMI (R) source 53 adjusts the frequency of the pixel clock in step S13, thereby starting the output of the pixel clock corresponding to the deep color mode determined in step S12, and proceeds to step S14.

  In step S14, the HDMI (R) source 53 starts transmission of the pixel data of the image represented by the deep color mode determined in step S12 through the TMDS channels # 0 to # 2.

  Note that transmission of the image represented by the deep color mode through the TMDS channels # 0 to # 2 is performed in synchronization with the pixel clock whose output is started in step S13.

  In addition, when the image represented by the deep color mode is transmitted through the TMDS channels # 0 to # 2, the HDMI (R) source 53 performs vertical conversion for each video field, that is, for each frame, as described with reference to FIGS. In the control section (FIG. 4) of the blanking section, a general control packet in which bits CD0, CD1, and CD2 representing the deep color mode of the image transmitted in the video data section are transmitted.

  Next, the operation of the HDMI (R) sink 61 in FIG. 2 will be described with reference to the flowchart in FIG.

  In step S31, the HDMI (R) sink 61 transmits its E-EDID to the HDMI (R) source 53 via the DDC (FIG. 2).

  Thereafter, as described in FIG. 13, the HDMI (R) source 53 starts outputting the pixel clock, and when the general control packet is transmitted via the TMDS channels # 0 to # 2, the HDMI (R) In step S32, the sink 61 receives the general control packet (FIGS. 11 and 12) from the HDMI (R) source 53 and refers to the bits CD0, CD1, and CD2 of the general control packet to thereby obtain the video data section. Recognize the deep color mode of the image transmitted to.

  Then, the HDMI (R) sink 61 receives the pixel data of the deep color mode image recognized in step S32 from the HDMI (R) source 53 via the TMDS channels # 0 to # 2 in synchronization with the pixel clock. After waiting for the transmission, the pixel data is received in step S33.

  Note that the processing in steps S32 and S33 is performed for each video field.

  Next, as described with reference to FIG. 13, the HDMI (R) source 53 determines the deep color mode and transmits the image in the deep color mode through the TMDS channels # 0 to # 2. 53, an image supplied as a transmission target, that is, for example, an image to be transmitted supplied from the codec 52 (FIG. 1) to the HDMI (R) source 53 is not necessarily determined by the HDMI (R) source 53. It does not necessarily match the image of the deep color mode.

  In other words, the image to be transmitted may be an image having a lower gradation than that of the deep color mode image determined by the HDMI (R) source 53.

  Here, the transmission target image transmitted from the HDMI (R) source 53 to the HDMI (R) sink 61 is hereinafter referred to as a main image as appropriate.

  As described above, when the main image is an image having a gradation lower than that of the deep color mode image determined by the HDMI (R) source 53, the pixel data of the main image is transmitted as shown in FIG. 15, for example. Is done.

  That is, FIG. 15 shows that the image in the deep color mode is a 36-bit image and the main image is a 30-bit image having a lower gradation than the image in the deep color mode. The transmission pixel data which is the pixel data to be processed is shown.

  When the image in the deep color mode is a 36-bit image, the R, G, and B components of the pixel data of the 36-bit image are 12 bits. Therefore, the transmission pixel data transmitted through one TMDS channel is As shown in FIG. 15, the data is 12 bits.

  On the other hand, when the main image is a 30-bit image, the R, G, and B components of the pixel data of the 30-bit image are 10 bits, so one TMDS is used for transmission of the 30-bit image that is the main image. The pixel data of the main image to be transmitted on the channel is 10-bit data which is smaller than 12 bits which is the number of bits of the transmission pixel data.

  As described above, when the pixel data of the main image is an image having a smaller number of bits than the transmission pixel data, the HDMI (R) source 53 transmits the pixel data of the main image as shown in FIG. It is assigned to the upper bits of the pixel data and transmitted in a so-called manner.

  Therefore, as described above, when the pixel data of the main image is 10 bits and the transmission pixel data is 12 bits, the transmitter 72 (FIG. 2) of the HDMI (R) source 53 is as shown in FIG. In addition, the 10-bit pixel data of the main image is transmitted by being assigned to the upper 10 bits of the 12-bit transmission pixel data.

  In this case, the receiver 81 (FIG. 2) of the HDMI (R) sink 61 receives the 12-bit transmission pixel data from the transmitter 72 of the HDMI (R) source 53. Of the 12-bit transmission pixel data, Only the pixel data of the main image assigned to the upper 10 bits is processed, and the remaining lower 2 bits are ignored (discarded).

  Here, for example, as described above, when the HDMI (R) source 53 and the HDMI (R) sink 61 are compatible with a 36-bit image, that is, the HDMI (R) source 53 is 12-bit transmission pixel data. When the HDMI (R) sink 61 can receive 12-bit transmission pixel data, when the main image pixel data is less than 12-bit pixel data, it corresponds to a 36-bit image. In the HDMI (R) source 53, the lower bits to which the main image pixel data is not assigned out of the 12-bit transmission pixel data is set to no signal (0). Then, in the HDMI (R) sink 61 corresponding to the 36-bit image, the 12-bit transmission pixel data from the HDMI (R) source 53 is processed as it is, and the resulting image is displayed. In this image display, the lower bits to which the main image pixel data is not assigned out of the 12-bit transmission pixel data is no signal (0). Therefore, in the image display by the HDMI (R) sink 61, It will be ignored. As a result, the HDMI (R) sink 61 displays an image based on the pixel data assigned to the upper bits of the 12-bit transmission pixel data, that is, the main image. Therefore, in the HDMI (R) sink 61, for example, if 8-bit or 10-bit pixel data is assigned to the 12-bit transmission pixel data, an image based on the 8-bit or 10-bit pixel data is displayed. .

  As described above, when the bit number B1 of the pixel data of the main image is smaller than the bit number B2 of the transmission pixel data, the pixel data of the main image with the bit number B1 is the transmission pixel data with the bit number B2. The transmission pixel data is transmitted from the HDMI (R) source 53 to the HDMI (R) sink 61. In this case, the transmission pixel data is transmitted from the HDMI (R) source 53 to the HDMI (R) sink 61. Of the transmitted pixel data, the lower B2-B1 bits to which the pixel data of the main image is not allocated are substantially unused and are therefore inefficient.

  Therefore, in the HDMI (R) source 53 and the HDMI (R) sink 61, a signal other than the main image (hereinafter referred to as a sub-signal as appropriate) is transmitted to the bits of the transmission pixel data to which the main image pixel data is not allocated. Thus, efficient data transmission in which the main image and the sub-signal are transmitted at the same time can be performed.

  Here, in the transmission pixel data, a bit to which pixel data of the main image is not assigned is hereinafter referred to as a surplus bit as appropriate.

  FIG. 16 shows an assigning method for assigning sub-signals to transmission pixel data.

  For example, as described in FIG. 15, when the transmission pixel data (pixel data transmitted by one TMDS channel) is 12 bits and the pixel data (one component) of the main image is 10 bits. The 10-bit pixel data of the main image is assigned to the upper 10 bits of the transmission pixel data, so that the lower 2 bits of the transmission pixel data become the surplus bits.

  Assuming that the sub-signal is a signal (data) having 8 bits as one unit, for example, as shown in FIG. 16, one unit of sub-signal has 4 bits for every 2 bits equal to the number of bits and the remaining bits. The data is divided into four pieces of data, and the four pieces of data are assigned to the lower 2 bits which are the surplus bits of the transmission pixel data of 4 pixels.

  In this case, if the sub-signal is, for example, an image in which each of R, G, and B components is an 8-bit image, the sub-signal image may be, for example, a resolution (number of pixels) of about 1/4 of the main image. ) Images can be employed.

  Here, when the main image is an image of 1920 pixels × 1080 lines, for example, each of R, G, and B components is 10 bits, and the transmission pixel data is, for example, 12 bits, the sub-signal is For example, when each of the R, G, and B components is an 8-bit 480 pixel × 360 line image, the sub-signal as the 480 pixel × 360 line image is 360 lines out of the 1080 lines of the main image. Can be assigned to the lower 2 bits, which are the surplus bits of the transmission pixel data. In this case, the transmission pixel data for 720 (= 1080-360) lines to which the sub-signal as an image of 480 pixels × 360 lines is not allocated among the transmission pixel data for 1080 lines of the main image. Further, another sub signal can be allocated.

  Further, when the main image is, for example, an image of 1920 pixels × 1080 lines in which each of R, G, and B components is 8 bits and the transmission pixel data is 12 bits, for example, The lower 4 bits become extra bits. In this case, an image of about 960 pixels × 720 lines in which each of R, G, and B components is 8 bits can be assigned as sub-signals to the transmission pixel data for 1080 lines of the main image.

  In the following, it is assumed that the sub signal is a signal in units of 8 bits.

  As described above, the HDMI (R) that can transmit the transmission pixel data on the TMDS channels # 0 to # 2 together with the main image is assigned to the surplus bits of the transmission pixel data, and the current HDMI ( To distinguish it from extended HDMI (R), the HDMI (R) source that supports extended HDMI (R) assigns the sub signal to the remaining bits of the transmission pixel data and transmits it. First, it is necessary to recognize whether the HDMI (R) sink that is the communication partner is compatible with the extended HDMI (R).

  Whether the HDMI (R) sink supports extended HDMI (R) is the same as, for example, whether the HDMI (R) sink supports deep color HDMI (R), as described above. It can be described in E-EDID, which is performance information related to the performance of the sink.

  That is, FIG. 17 shows VSDB in E-EDID.

  In the current HDMI (R), as shown in Fig. 10, bits # 4, # 5, # 6, and # 7 of the fifth, sixth, seventh, and eighth bits from the LSB of Byte # 7 of VSDB are unused. In FIG. 17, bits Sub_2bit, Sub_4bit, Sub_8bit, and Sub_Data_Support are assigned to bits # 4, # 5, # 6, and # 7, respectively.

  Bit Sub_2bit assigned to Bit # 4 of Byte # 7 of VSDB, Bit Sub_4bit assigned to Bit # 5, and Bit Sub_8bit assigned to Bit # 6 are HDMI (R) sink sub-signal Is not received, that is, when the sub-signal cannot be handled, for example, all are set to 0.

  If the HDMI (R) sink can handle the sub-signals assigned to the 2 surplus bits with the lower 2 bits of the transmission pixel data as the surplus bits, the bit Sub_2bit is set to 1. Further, when the HDMI (R) sink can handle the sub-signals assigned to the 4 surplus bits with the lower 4 bits of the transmission pixel data as the surplus bits, the bit Sub_4bit is set to 1. Further, when the HDMI (R) sink can handle the sub-signal assigned to the 8 surplus bits with the lower 8 bits of the transmission pixel data as the surplus bits, the bit Sub_8bit is set to 1.

  Bit Sub_Data_Support is set to 1 when the HDMI (R) sink can handle sub-signals, and is set to 0 when it cannot handle sub-signals, that is, when it does not support extended HDMI (R). The

  When the bit Sub_Data_Support is 0, Sub_2bit, Sub_4bit and Sub_8bit are all 0.

  As described above, by describing whether the HDMI (R) sink supports extended HDMI (R) in the VSDB of E-EDID, the HDMI (R) source can be transmitted from the HDMI (R) sink. By reading the E-EDID and referring to the VSDB of the E-EDID, whether the HDMI (R) sink can handle the sub-signal, and that the HDMI (R) sink can handle the sub-signal If possible, it is possible to recognize how many lower bits of the transmission pixel data can be assigned to the sub-signal as the surplus bits.

  Note that the bits Sub_2bit, Sub_4bit, Sub_8bit, and Sub_Data_Support shown in FIG. 17 can also be described in the E-EDID VSDB of the HDMI (R) source.

  In FIG. 17, the sub-signal assigned to the transmission pixel data is one of 2, 4 or 8 bits. However, the number of bits of the sub-signal assigned to the transmission pixel data is It is not limited.

  Furthermore, the 4th bit # 4 to # 7 of the 5th to 8th bits from the LSB of Byte # 7 of VSDB is not a value corresponding to Sub_2bit, Sub_4bit, Sub_8bit, Sub_Data_Support, but a value corresponding to the number of bits of the sub signal assigned to the transmission pixel data Can be set. In this case, according to the 4 bits # 4 to # 7, 16 types of bits can be expressed.

  Next, as described above, the E-EDID exchange between the HDMI (R) source and the HDMI (R) sink is performed when the HDMI (R) source and the HDMI (R) sink are connected, It is performed at a specific timing such as when the power source of (R) source or HDMI (R) sink is turned on, and not periodically.

  On the other hand, when the HDMI (R) source and HDMI (R) sink support extended HDMI (R), transmission pixel data transmitted from the HDMI (R) source to the HDMI (R) sink Furthermore, there can be a case where a sub signal is assigned and a case where a sub signal is not assigned. Furthermore, when a sub signal is assigned to transmission pixel data, the assigned sub signal may be 2 bits, 4 bits, or 8 bits.

  Here, in order to simplify the description, the fact that the sub-signal is not assigned to the transmission pixel data is hereinafter also expressed as the number of bits of the sub-signal assigned to the transmission pixel data is 0 as appropriate.

  As described with reference to FIG. 4, transmission pixel data is transmitted in the video data section allocated to the active video section (Active Video) of the video field, and therefore transmitted in the video data section in the HDMI (R) sink. Whether the sub-signal assigned to the transmitted pixel data is 0 bit, 2 bits, 4 bits or 8 bits can be recognized for each video field including the video data section. Is desirable.

  In this case, for each video field from the HDMI (R) source to the HDMI (R) sink, the sub signal assigned to the transmission pixel data transmitted in the video data section included in the video field is 0. It is necessary to transmit information indicating whether the bit is 2 bits, 4 bits, or 8 bits (hereinafter referred to as sub signal information as appropriate).

  This sub-signal information is included in the general control packet transmitted in the control section (FIG. 4) in the vertical blanking section, as in the deep color mode described above, and from the HDMI (R) source to the HDMI (R ) It can be transmitted to the sink.

  That is, FIG. 18 shows a general control packet including sub-signal information.

  As described in FIG. 11, the general control packet has a packet header (General Control Packet Header) and a sub-packet (General Control Subpacket). The upper side in FIG. 18 shows the packet header in the lower side in FIG. Indicates subpackets, respectively.

  In the current HDMI (R), bits # 0, # 1, and # 2 of the 1st, 2nd, and 3rd bits from the LSB of Byte # SB2 of the sub packet of the general control packet are unused and set to 0. However, in FIG. 18, bits SD0, SD1, and SD2 as sub-signal information are assigned to the bits # 0, # 1, and # 2, respectively.

  FIG. 19 shows a video data section (FIG. 4) included in a video field including bits SD0, SD1, SD2 of Byte # SB2 of a subpacket and a control section (FIG. 4) in which a general control packet having the subpacket is transmitted. ) Shows the relationship with the number of sub-signal bits allocated to the transmission pixel data transmitted.

  When the number of bits of the sub-signal assigned to the transmission pixel data is 0, that is, when the sub-signal is not assigned to the transmission pixel data (Sub Data not Inserted), bits SD0 and SD1 as sub-signal information , SD2 is set to 0 as in the current HDMI (R).

  Further, when the number of bits allocated to the transmission pixel data is 2, the bits SD0, SD1, and SD2 as the sub signal information are set to 1,0 and 0, respectively, for example. Further, when the number of bits allocated to the transmission pixel data is 4, the bits SD0, SD1, and SD2 as the sub-signal information are set to 0, 1,0 respectively, for example, and are allocated to the transmission pixel data. When the number of bits is 8 bits, the bits SD0, SD1, and SD2 as the sub signal information are set to 1,1,0, for example.

  As described above, in the HDMI (R) source, by including the bits SD0, SD1, and SD2 as sub-signal information in the general control packet and transmitting them in the control section of the video field, the HDMI (R) sink can transmit the video. It can be recognized whether the sub-signal assigned to the transmission pixel data transmitted in the video data section of the field is 0 bit, 2 bits, 4 bits, or 8 bits.

  Next, FIG. 20 illustrates a configuration example of the source signal processing unit 71 included in the HDMI® source 53 when the HDMI® source 53 illustrated in FIG. 2 supports extended HDMI.

  In FIG. 20, a source signal processing unit 71 includes a main image processing unit 101, a sub signal adding unit 102, a sub signal processing unit 103, a sub signal related information insertion unit 104, a sub signal reception availability determination unit 105, and the number of sub signal allocation bits. It comprises a determination unit 106, a sub-signal frame information transmission control unit 107, and a deep color mode determination unit 108.

  For example, a main image having R, G, and B components is supplied to the main image processing unit 101. The main image processing unit 101 performs necessary processing on the main image supplied thereto, and supplies pixel data of the main image to the sub signal adding unit 102.

  Further, the main image processing unit 101 detects the number of pixels (number of effective pixels) P in the video data section of the video field (FIG. 4) of the main image supplied thereto, and supplies it to the sub signal processing unit 103. .

  Further, the main image processing unit 101 detects the bit number B1 of each component of the pixel data of the main image supplied thereto, and supplies it to the sub-signal allocation bit number determination unit 106.

  The sub-signal adding unit 102 is supplied with pixel data of the main image having the number of bits B1 from the main image processing unit 101 and is also supplied with a sub-signal from the sub-signal related information inserting unit 104. Further, the deep color mode is supplied from the deep color mode determining unit 108 to the sub signal adding unit 102, and the bit number B3 of the sub signal allocated to the transmission pixel data is calculated from the sub signal allocation bit number determining unit 106. The number of sub-signal allocation bits representing is supplied.

  The sub signal adding unit 102 recognizes the bit number B2 of the transmission pixel data based on the deep color mode from the deep color mode determining unit 108. That is, for example, when the deep color mode represents a 24-bit image, a 30-bit image, a 36-bit image, or a 48-bit image, the sub-signal adding unit 102 has 8 bits, 10 bits, and 12 bits, respectively. Or 16 bits is recognized as the bit number B2 of the transmission pixel data.

  Then, the sub-signal adding unit 102 divides the sub-signal supplied from the sub-signal related information insertion unit 104 for each sub-signal allocation bit number B3 from the sub-signal allocation bit number determination unit 106, and the divided sub signal Is added as the lower bits of the pixel data having the bit number supplied from the main image processing unit 101 as the lower bit of the pixel data of the B1, the bit number B2 recognized from the deep color mode from the deep color mode determination unit 108 Transmission pixel data, that is, the pixel data of the main image with the bit number B1 is assigned to the upper bits, the section subsignal with the bit number B3 is assigned to the lower bits, and the bit number is B2 (= B1 + B3) The transmission pixel data is configured.

  Note that the sub-signal adding unit 102 configures transmission pixel data with the number of bits of B2 for each of R, G, and B components. The transmission pixel data of each component of R, G, B with the bit number B2 obtained by the sub signal adding unit 102 is supplied to the transmitter 72 (FIG. 2), and is transmitted through the TMDS channels # 0 to # 2, for example, Of the timings described with reference to FIGS. 6 to 9, the transmission is performed at a timing corresponding to the bit number B2 of the transmission pixel data.

  As described above, the sub signal processing unit 103 is supplied with the sub signal from the main image processing unit 101 in addition to the number of pixels P in the video data section of the main image. Further, the number of sub-signal allocation bits is supplied from the sub-signal allocation bit number determination unit 103 to the sub-signal processing unit 103.

  The sub signal processing unit 103 is supplied from the main image processing unit 101, from the number of pixels P of the video data section of the main image, and the sub signal allocation bit number B3 supplied from the sub signal allocation bit number determination unit 103, The maximum data amount P × B3 of the sub-signal that can be transmitted in the video data section of one video field is determined, and the video of one video field (one frame) is within the range of the maximum data amount P × B3. A data amount (hereinafter referred to as a sub signal additional unit data amount) D of the sub signal transmitted in the data section is determined.

  Further, the sub signal processing unit 103 supplies the sub signal supplied thereto to the sub signal related information inserting unit 104 for each sub signal additional unit data amount D.

  Further, the sub signal processing unit 103 supplies sub signal information indicating whether or not a sub signal is included in the transmission pixel data to the sub signal frame information transmission control unit 107.

  That is, when the sub signal processing unit 103 supplies the sub signal of the sub signal additional unit data amount D to the sub signal related information insertion unit 104, that is, when there is a sub signal to be allocated to the transmission pixel data, The sub-signal information indicating that the sub-signal is included is supplied to the sub-signal frame information transmission control unit 107. Further, the sub signal processing unit 103 does not supply the sub signal of the sub signal additional unit data amount D to the sub signal related information insertion unit 104, that is, there is no sub signal supplied to the sub signal related information insertion unit 104. Then, the sub-signal information indicating that the sub-signal is not included in the transmission pixel data is supplied to the sub-signal frame information transmission control unit 107.

  The sub-signal related information insertion unit 104 includes (inserts) sub-signal related information related to the sub signal in the sub signal of the sub signal addition unit data amount D from the sub signal processing unit 103, and adds the sub signal related unit 102. To supply.

  The sub-signal reception availability determination unit 105 is supplied with the E-EDID VSDB (FIG. 17) read from the HDMI (R) sink of the communication partner of the HDMI (R) source 53.

  The sub signal reception availability determination unit 105 refers to the bit Sub_Data_Support (FIG. 17) of the VSDB supplied thereto, so that the HDMI (R) sink of the communication partner of the HDMI (R) source 53 receives the sub signal. Is determined, that is, whether the sub-signal can be handled, and the determination result is supplied to a necessary block.

  Further, when the HDMI (R) sink of the communication partner of the HDMI (R) source 53 determines that the sub signal reception availability determination unit 105 can handle the sub signal, the sub signal reception enable / disable determination unit 105 further determines VSDB bits Sub_2bit, Sub_4bit, Sub_8bit. By referring to FIG. 17, the number of bits of the sub signal that can be handled by the HDMI (R) sink of the communication partner of the HDMI (R) source 53 is recognized (hereinafter referred to as the number of compatible bits as appropriate). , And supplied to the sub-signal allocation bit number determination unit 106.

  As described above, the sub-signal allocation bit number determination unit 106 is supplied with the bit number B1 of the pixel data of the main image from the main image processing unit 101, and from the sub-signal reception availability determination unit 105 with the corresponding bits. Number is supplied. Further, the deep color mode is supplied from the deep color mode determination unit 108 to the sub-signal allocation bit number determination unit 106.

  The sub-signal allocation bit number determination unit 106 recognizes the bit number B2 of the transmission pixel data based on the deep color mode supplied from the deep color mode determination unit 108, and determines the pixel data of the main image from the main image processing unit 101. The difference B2-B1 from the bit number B1, that is, the bit number B2-B1 of the surplus bits of the transmission pixel data is obtained.

  Then, the sub-signal allocation bit number determination unit 106, when the number of bits that can be handled from the sub-signal reception availability determination unit 105 includes the number of bits that matches the number of bits B2-B1 of the remaining bits of the transmission pixel data. Determines the number of bits as sub-signal allocation bit number B3.

  Here, when the number of bits that can be handled from the sub-signal reception availability determination unit 105 is, for example, three types of 2 bits, 4 bits, and 8 bits, the sub-signal allocation bit number B3 is set to the following value: It is determined.

  That is, when the bit number B2 of the transmission pixel data is, for example, 10 bits and the bit number B1 of the pixel data of the main pixel is, for example, 8 bits, the sub-signal allocation bit number B3 is determined to be 2 bits. The

  Further, when the bit number B2 of the transmission pixel data is, for example, 12 bits and the bit number B1 of the pixel data of the main pixel is, for example, 8 bits or 10 bits, the sub-signal allocation bit number B3 is It is determined to be 4 bits or 2 bits.

  Further, when the bit number B2 of the transmission pixel data is, for example, 16 bits and the bit number B1 of the pixel data of the main pixel is, for example, 8 bits or 12 bits, the sub signal allocation bit number B3 is It is determined to be 8 bits or 4 bits.

  The sub-signal allocation bit number determination unit 106 determines that the number of bits that can be handled from the sub-signal reception availability determination unit 105 does not include the number of bits that match the number of extra bits B2-B1 of the transmission pixel data. For example, out of the number of bits that can be matched with the number of bits less than the bit number B2-B1 of the remaining bits of the transmission pixel data among the number of bits that can be handled from the sub-signal reception availability determination unit 105, for example, The maximum value can be determined as the sub-signal allocation bit number B3. However, here, in order to simplify the description, the number of bits that can be handled from the sub-signal reception availability determination unit 105 does not include the number of bits that matches the number of extra bits B2-B1 of the transmission pixel data. The HDMI (R) source 53 does not transmit a sub signal, and the same processing as when the HDMI (R) sink of the communication partner cannot handle the sub signal is performed.

  When the sub-signal allocation bit number determination unit 106 determines the sub-signal allocation bit number B 3, the sub-signal allocation bit number B 3 is converted into the sub-signal allocation unit 102, the sub-signal processing unit 103, and the sub-signal frame information transmission control unit 107. To supply.

  As described above, the sub-signal frame information transmission control unit 107 is supplied with sub-signal information indicating whether or not a sub-signal is included in the transmission pixel data from the sub-signal processing unit 103, and the number of sub-signal allocation bits. In addition to the sub-signal allocation bit number B3 supplied from the determination unit 106, the deep color mode is supplied from the deep color mode determination unit 108.

  The sub signal frame information transmission control unit 107 includes the sub signal information from the sub signal processing unit 103, the deep color mode from the deep color mode determination unit 108, and, if necessary, the sub signal allocation bit number determination unit 106. The general control packet (FIG. 18) including the sub-signal allocation bit number B3 supplied from is transmitted to the transmitter 72 (FIG. 2).

  That is, when the sub-signal information from the sub-signal processing unit 103 indicates that the sub-signal is not included in the transmission pixel data, the sub-signal frame information transmission control unit 107 uses the bits SD0 and SD1 in FIG. , SD2 are all set to 0, and bits CD0, CD1, CD2 are set to values representing the deep color mode from the deep color mode determination unit 108 (hereinafter, there is no side signal as appropriate). (Referred to as a general control packet) is transmitted to the transmitter 72.

  Also, the sub-signal frame information transmission control unit 107, when the sub-signal information from the sub-signal processing unit 103 indicates that the sub-signal is included in the transmission pixel data, the bits SD0, SD1, and FIG. SD2 is set to a value representing the sub-signal allocation bit number B3 from the sub-signal allocation bit number determining unit 106, and the bits CD0, CD1, CD2 are values representing the deep color mode from the deep color mode determining unit 108. The transmission control is performed to cause the transmitter 72 to transmit the general control packet (hereinafter, appropriately referred to as a general control packet with a sub-signal) set in (1).

  The deep color mode determination unit 108 is supplied with the E-EDID VSDB (FIG. 17) read from the HDMI (R) sink of the communication partner of the HDMI (R) source 53.

  The deep color mode determination unit 108 refers to the bits Suport_30bit, Suport_36bit, Suport_48bit (FIG. 17) of the VSDB supplied thereto, so that the HDMI (R) sink of the communication partner of the HDMI (R) source 53 has a high gradation. It is determined whether or not the image is supported. If it is determined that the image is not supported, the image to be transmitted in the deep color mode, that is, the three TMDS channels # 0 to # 2, is determined to be a 24-bit image.

  Further, when the deep color mode determination unit 108 determines that the HDMI (R) sink of the communication partner of the HDMI (R) source 53 is compatible with a high gradation image, the deep color mode determination unit 108 further supports VSDB bits Suport_30bit, Suport_36bit, Suport_48bit. By referring to FIG. 17, the high gradation image corresponding to the HDMI (R) sink of the communication partner of the HDMI (R) source 53 is recognized, and the high gradation corresponding to the HDMI (R) sink is recognized. The image to be transmitted in the deep color mode, that is, the three TMDS channels # 0 to # 2 is determined from the images.

  That is, the deep color mode determination unit 108 selects, for example, an image having the highest gradation from among images supported by the HDMI (R) sink, for example, the deep color mode (three TMDS channels # 0 to # 2). To be transmitted).

  Then, the deep color mode determination unit 108 supplies the deep color mode to the sub signal adding unit 102, the sub signal allocation bit number determination unit 106, and the sub signal frame information transmission control unit 107.

  Next, with reference to FIG. 21, the sub signal related information included in the sub signal by the sub signal related information insertion unit 104 in FIG. 20 will be described.

  In extended HDMI (R), the sub signal is assigned to pixel data in the video data section of the video field (FIG. 4), that is, to the lower bits of the transmission pixel data and together with the main image assigned to the upper bits of the transmission pixel data. Although transmitted, sub-signals are not necessarily assigned to all transmission pixel data.

  That is, depending on the data amount of the sub signal, the sub signal may be allocated to only a part of the transmission pixel data in the video data section, and the sub signal may not be allocated to the remaining transmission pixel data.

  In this way, when a sub signal is assigned to a part of transmission pixel data in the video data section and no sub signal is assigned to the remaining transmission pixel data, HDMI (such as receiving such transmission pixel data) is received. R) In the sink, the transmission pixel data to which the sub signal is assigned is distinguished from the transmission pixel data to which the sub signal is not assigned, and only the transmission pixel data to which the sub signal is assigned, the lower bit is used as the sub signal. Must be extracted.

  Accordingly, the sub-signal related information insertion unit 104 at least adds a sub-signal with a sub-signal additional unit data amount D, that is, a sub-signal assigned to transmission pixel data in the video data section of one video field (FIG. 4). Sub-signal related information is included, including information used to distinguish the transmitted pixel data to which the signal is assigned.

  That is, the sub-signal related information includes, for example, sub-signal start information and sub-signal end information as shown on the right side of FIG. 21, and the sub-signal start information is at the head of the sub-signal of the sub-signal additional unit data amount D. The sub signal end information is arranged at the end of the sub signal of the sub signal additional unit data amount.

  Then, the sub signal start information is assigned to the transmission pixel data of the pixels constituting the first line (the first horizontal line from the top) of the video data section of the video field shown in the left of FIG. The sub-signal of the unit data amount is sequentially assigned to the transmission pixel data of the pixels constituting the second and subsequent lines.

  Now, assuming that all of the sub-signals of the sub-signal additional unit data amount D are allocated to the transmission pixel data of the pixels constituting the second line to the M + 1th line, the sub-signal end information is the Mth immediately after that. Allocated to the transmission pixel data of the pixels constituting the +2 line.

  As described above, in the sub signal start information arranged at the head of the sub signal of the sub signal additional unit data amount D, for example, the sub signal is assigned to the transmission pixel data of the pixels on and after the second line. In addition, information indicating the type (attribute) of the sub-signal such that the sub-signal is image data, audio data, or text data, and the sub-signal format and other information related to the sub-signal can be included. .

  Also, in the sub-signal end information arranged at the end of the sub-signal of the sub-signal additional unit data amount, a unique code indicating the end of the sub-signal, and the transmission pixel to which the end of the sub-signal is assigned When the data is transmission pixel data of a pixel in the middle of the pixels constituting the (M + 1) th line, information indicating the pixel position of the transmission pixel data can be included.

  When one line in the video data section of the video field is composed of, for example, 1920 pixels, when sub-signals are allocated to, for example, the lower 2 bits of transmission pixel data, transmission of pixels constituting one line is performed. Since the amount of sub-signal data that can be assigned to pixel data is 2 bits × 1920 pixels = 3840 bits = 480 bytes, 480-byte information should be used for each of the sub-signal start information and sub-signal end information. Can do.

  In the sub signal processing unit 103 of FIG. 20, the sub signal additional unit data amount D is a data amount obtained by adding the data amount of the sub signal start information and sub signal end information included in the sub signal to the video data section. It is determined so as not to exceed the maximum data amount P × B3 of the sub signal that can be transmitted.

  Next, referring to the flowchart of FIG. 22, the HDMI (R) source 53 of FIG. 2 corresponds to the extended HDMI (R), and the source signal processing unit 71 of the HDMI (R) source 53 is shown in FIG. The operation of the HDMI (R) source 53 when configured as shown in FIG.

  In the HDMI (R) source 53, the pixel data of the main image is supplied to the main image processing unit 101 of the source signal processing unit 71 (FIG. 20), and further, the sub signal is converted into the sub signal processing unit as necessary. 103.

  In the main image processing unit 101, necessary processing is performed on the main image supplied thereto, and pixel data of the main image after the processing is supplied to the sub signal adding unit 102.

  Further, the main image processing unit 101 detects the number of pixels (number of effective pixels) P in the video data section of the video field (FIG. 4) of the main image supplied thereto, and supplies it to the sub signal processing unit 103. .

  Further, the main image processing unit 101 detects the number of bits B1 of each component of the pixel data of the main image and supplies it to the sub-signal allocation bit number determination unit 106.

  In addition, the HDMI (R) source 53 waits for the E-EDID of the HDMI (R) sink 61 to be transmitted from the HDMI (R) sink 61 via the DDC described in FIG. The E-EDID is received at.

  In the HDMI (R) source 53, the E-EDID from the HDMI (R) sink 61 is supplied to the sub-signal reception availability determination unit 105 and the deep color mode determination unit 108 of the source signal processing unit 71 (FIG. 20). .

  In step S <b> 102, the deep color mode determination unit 108 refers to the E-EDID VSDB (FIG. 17) from the HDMI (R) sink 61, so that the image supported by the HDMI (R) sink 61 becomes 24. It recognizes whether it is a bit image, a 30-bit image, a 36-bit image, or a 48-bit image. Further, the deep color mode determination unit 108 determines an image to be transmitted through the three TMDS channels # 0 to # 2 from the images supported by the DMI (R) sink 61, and displays the deep color mode representing the image. Are supplied to the sub-signal adding unit 102, the sub-signal allocation bit number determining unit 106, and the sub-signal frame information transmission control unit 107.

  Note that when the HDMI (R) sink 61 supports only 24-bit images, that is, when the HDMI (R) sink 61 does not support high gradation images, the HDMI (R) source 53 is used. Does not perform the processing after step S104, which will be described later, but performs the processing conforming to the current HDMI (R). Therefore, in this case, the transmission of the sub signal is not performed.

  Thereafter, in step S103, the HDMI® source 53 adjusts the frequency of the pixel clock to a frequency corresponding to the deep color mode determined in step S102, starts outputting the pixel clock, and proceeds to step S104. .

  In step S104, the sub signal receivability determining unit 105 refers to the bit Sub_Data_Support (FIG. 17) of the VSDB of the E-EDID supplied from the HDMI (R) sink 61, thereby providing an HDMI (R) sink. 61 determines whether the sub-signal can be received, that is, whether the sub-signal can be handled.

  In step S104, when it is determined that the HDMI (R) sink 61 cannot handle the sub signal, that is, the bit Sub_Data_Support (FIG. 17) of the VSDB is a value indicating that the sub signal cannot be handled. In step S105, the HDMI (R) source 53 transmits the pixel data of the image represented by the deep color mode determined in step S102 without transmitting the sub signal, and outputs the TMDS channel # 0. Or transmit with # 2.

  That is, in step S105, the sub-signal frame information transmission control unit 107 sets the general control packet without the sub-signal, that is, the bits SD0, SD1, and SD2 in FIG. 18 are all set to 0, and further, the bits CD0, CD1 , CD2 sends the general control packet set to the value representing the deep color mode supplied from the deep color mode determination unit 108 in step S102 to the transmitter 72 in the control section (FIG. 4) of the vertical blanking section of the video field. (FIG. 2) and transmit to step S106.

  In step S106, the sub-signal adding unit 102 obtains transmission pixel data having the number of bits B2 corresponding to the deep color mode image determined in step S102 from only the main image pixel data supplied from the main image processing unit 101. Configure and supply to transmitter 72. Accordingly, the transmitter 72 transmits the transmission pixel data in the video data section of the video field, and the process proceeds to step S107.

  Here, the transmission pixel data is transmitted in synchronization with the pixel clock whose output is started in step S103.

  In step S107, there is transmission pixel data that has not yet been transmitted in the active video section of the video field in which the sub-signal adding unit 102 has transmitted the transmission pixel data in the immediately preceding step S106 (hereinafter, referred to as a target video field as appropriate). Determine whether to do.

  If it is determined in step S107 that there is transmission pixel data that has not yet been transmitted in the active video section of the target video field, the process returns to step S106, and transmission pixels that have not yet been transmitted in the active video section of the target video field. Data is sent.

  If it is determined in step S107 that there is no transmission pixel data not yet transmitted in the active video section of the target video field, that is, all transmission of the transmission pixel data in the active video section of the target video field is completed. If so, the process proceeds to step S108, and the sub-signal adding unit 102 determines whether there is a video field (frame) next to the video field of interest.

  If it is determined in step S108 that the next video field of the target video field exists, the next video field is newly set as the target video field, and the process returns to step S105. Thereafter, the same processing is repeated. It is.

  If it is determined in step S108 that there is no video field next to the video field of interest, the process ends.

  On the other hand, when it is determined in step S104 that the HDMI (R) sink 61 can handle the sub signal, that is, the bit Sub_Data_Support (FIG. 17) of the VSDB is a value indicating that the sub signal can be handled. If it is 1, the sub-signal reception availability determination unit 105 refers to the bits Sub_2bit, Sub_4bit, and Sub_8bit (FIG. 17) of the VSDB, so that the bit of the sub-signal that can be handled by the HDMI (R) sink 61 The number of bits that can be handled is recognized and supplied to the sub-signal allocation bit number determination unit 106, and the process proceeds to step S109.

  In step S109, the sub-signal allocation bit number determination unit 106 determines the bit number B1 of the pixel data of the main image from the main image processing unit 101, the number of compatible bits from the sub-signal reception availability determination unit 105, and the deep color mode determination. Based on the bit number B2 of the transmission pixel data recognized from the deep color mode from the unit 108, as described above, determine the subsignal allocation bit number B3 that is the bit number of the subsignal allocated to the transmission pixel data, The signals are supplied to the sub signal adding unit 102, the sub signal processing unit 103, and the sub signal frame information transmission control unit 107, and the process proceeds to step S110.

  Here, the sub-signal processing unit 103 is supplied with the number of pixels P in the video data section of the main image from the main image processing unit 101, and is supplied with the sub-signal allocation bit number B3 from the sub-signal allocation bit number determination unit 103. Then, from the number P of pixels in the video data section of the main image and the number of sub-signal allocation bits B3, as described above, a sub-signal that is the amount of sub-signal data transmitted in the video data section of one video field. The additional unit data amount D is determined.

  In step S110, the sub signal processing unit 103 determines whether there is a sub signal to be added to the pixel data in the video data section of the video field.

  In step S110, when it is determined that there is a sub signal to be added to the pixel data in the video data section of the video field, that is, for example, when the sub signal is supplied to the sub signal processing unit 103, the sub signal processing unit 103 indicates that a sub-signal having a sub-signal additional unit data amount D out of the sub-signals supplied thereto is supplied to the sub-signal related information inserting unit 104 and that the sub-signal is included in the transmission pixel data. The sub signal information is supplied to the sub signal frame information transmission control unit 107, and the process proceeds to step S111. Hereinafter, the HDMI (R) source 53 represents the main signal represented by the sub signal and the deep color mode determined in step S102. Image pixel data is transmitted through TMDS channels # 0 to # 2.

  That is, in step S111, the sub-signal frame information transmission control unit 107 sets the general control packet with a sub-signal, that is, the bits SD0, SD1, and SD2 in FIG. 18 according to the sub-signal information from the sub-signal processing unit 103. , And is set to a value corresponding to the sub-signal allocation bit number B3, which is the number of sub-signal bits allocated to the transmission pixel data, supplied from the sub-signal allocation bit number determination unit 106 in step S109, and further, the bits CD0, CD1 , CD2 sends the general control packet set to the value representing the deep color mode supplied from the deep color mode determination unit 108 in step S102 to the transmitter 72 in the control section (FIG. 4) of the vertical blanking section of the video field. (FIG. 2) and transmit to step S112.

  If it is determined in step S110 that there is a sub signal to be added to the pixel data in the video data section of the video field, the sub signal processing unit 103 supplies the sub signal supplied thereto as described above. Of these, the sub signal corresponding to the sub signal additional unit data amount D is supplied to the sub signal related information inserting unit 104.

  When the sub signal of the sub signal addition unit data amount D is supplied from the sub signal processing unit 103 to the sub signal related information inserting unit 104, the sub signal related information related to the sub signal is described with reference to FIG. To the sub signal adding unit 102.

  In step S112, the sub signal adding unit 102 starts adding the sub signal from the sub signal related information inserting unit 104 to the configuration of the transmission image data, that is, the pixel data of the main image from the main image processing unit 101. .

  That is, the sub-signal adding unit 102 classifies the sub-signal from the sub-signal related information insertion unit 104 into segmented sub-signals for each sub-signal allocation bit number B3 supplied from the sub-signal allocation bit number determination unit 106 in step S109. By adding it as the lower bits of the pixel data from the main image processing unit 101, the transmission pixel data of the bit number B2 recognized from the deep color mode supplied from the deep color mode determination unit 108 in step S102, that is, the bit The pixel data of the main image with the number B1 is assigned to the upper bits, and the divided sub-signal with the number of bits B3 is assigned to the lower bits, and constitutes the transmission pixel data with the number of bits B2.

  Then, the sub signal adding unit 102 proceeds from step S112 to step S113, and supplies the transmission pixel data in which the pixel data of the main image is assigned to the upper bits and the divided sub signal is assigned to the lower bits to the transmitter 72, Accordingly, the transmitter 72 transmits the transmission pixel data in the video data section of the video field, and the process proceeds to step S114.

  Here, the transmission pixel data is transmitted in synchronization with the pixel clock whose output is started in step S103.

  In step S114, whether there is transmission pixel data that has not been transmitted yet in the active video section of the video field of interest that is the video field in which the sub-signal adding unit 102 has transmitted pixel data as transmission pixel data in the previous step S113. Determine if.

  If it is determined in step S114 that there is transmission pixel data that has not been transmitted yet in the active video section of the target video field, the process returns to step S113, and pixel data that has not yet been transmitted in the active video section of the target video field. Are transmitted as transmission pixel data.

  If it is determined in step S114 that there is no transmission pixel data not yet transmitted in the active video section of the target video field, that is, all transmission of the transmission pixel data in the active video section of the target video field is completed. If so, the process proceeds to step S115, and the sub-signal adding unit 102 determines whether there is a video field next to the video field of interest.

  If it is determined in step S115 that the next video field of the target video field exists, the next video field is newly set as the target video field, and the process returns to step S110. Thereafter, the same processing is repeated. It is.

  If it is determined in step S115 that there is no video field next to the video field of interest, the process ends.

  On the other hand, when it is determined in step S110 that there is no sub signal to be added to the pixel data in the video data section of the video field, that is, for example, when the sub signal is not supplied to the sub signal processing unit 103, the sub signal The processing unit 103 supplies the sub-signal information indicating that the sub-signal is not included in the transmission pixel data to the sub-signal frame information transmission control unit 107, proceeds to step S116, and the sub-signal frame information transmission control unit 107 According to the sub-signal information from the sub-signal processing unit 103, as in step S105, the general control packet without the sub-signal, that is, the bits SD0, SD1, SD2 in FIG. 18 are all set to 0, Bits CD0, CD1, and CD2 are set to values representing the deep color mode supplied from the deep color mode determination unit 108 in step S102. And the general control packet, in the control section of the vertical blanking period of the video field (Fig. 4), is sent to the transmitter 72 (FIG. 2).

  Subsequently, in steps S113 to S115, the HDMI (R) source 53 transmits the pixel data of the main image represented by the deep color mode determined in step S102 without transmitting the sub signal to the TMDS channels # 0 to ##. 2 is transmitted.

  That is, when a general control packet without a sub signal is transmitted in step S116, in step S113, the sub signal adding unit 102 determines in step S102 only from pixel data of the main image supplied from the main image processing unit 101. The transmission pixel data having the bit number B2 corresponding to the image of the deep color mode thus formed is configured and supplied to the transmitter 72. Accordingly, the transmitter 72 transmits the transmission pixel data in the video data section of the video field, and the process proceeds to step S114.

  Here, the transmission pixel data is transmitted in synchronization with the pixel clock whose output is started in step S103.

  In step S114, whether there is transmission pixel data that has not been transmitted yet in the active video section of the video field of interest that is the video field in which the sub-signal adding unit 102 has transmitted pixel data as transmission pixel data in the previous step S113. Determine if.

  If it is determined in step S114 that there is transmission pixel data not yet transmitted in the active video section of the target video field, the process returns to step S113, and transmission pixels not yet transmitted in the active video section of the target video field. Data is sent.

  If it is determined in step S114 that there is no transmission pixel data not yet transmitted in the active video section of the target video field, that is, all transmission of the transmission pixel data in the active video section of the target video field is completed. If so, the process proceeds to step S115, and the sub-signal adding unit 102 determines whether there is a video field next to the video field of interest.

  If it is determined in step S115 that the next video field of the target video field exists, the next video field is newly set as the target video field, and the process returns to step S110. Thereafter, the same processing is repeated. It is.

  If it is determined in step S115 that there is no video field next to the video field of interest, the process ends.

  Next, FIG. 23 illustrates a configuration example of the sync signal processing unit 82 included in the HDMI (R) sink 61 when the HDMI (R) sink 61 illustrated in FIG. 2 supports extended HDMI.

  In FIG. 23, a sync signal processing unit 82 includes a FIFO (First In First Out) memory 121, a sub signal presence / absence determination unit 122, a separation unit 123, a main image processing unit 124, a main image memory 125, a sub signal processing unit 126, and The sub signal memory 127 is configured.

  The FIFO memory 121 is supplied with transmission pixel data in the video data section of the video field (FIG. 4) received by the receiver 81 (FIG. 2).

  The FIFO memory 121 sequentially stores transmission pixel data from the receiver 81 and supplies it to the separation unit 123.

  The sub-signal presence / absence determination unit 122 is supplied with the general control packet of the control section of the vertical blanking section of the video field (FIG. 4) received by the receiver 81.

  Based on the bits SD0, SD1, and SD2 of the general control packet (FIG. 18) from the receiver 81, the sub-signal presence / absence determining unit 122 sets the sub-signal presence / absence determination unit 122 in the video data section immediately after the vertical blanking section in which the general control packet is transmitted. It is determined whether or not the transmitted transmission pixel data includes a sub signal, and the determination result is supplied to the separation unit 123.

  Further, if the sub-signal presence / absence determining unit 122 determines that the sub-signal is included in the transmission pixel data, the general signal is determined based on the bits SD0, SD1, and SD2 of the general control packet (FIG. 18) from the receiver 81. The sub-signal allocation bit number B3 of the sub-signal included in the transmission pixel data transmitted in the video data section immediately after the vertical blanking section from which the control packet has been transmitted is recognized and supplied to the separation unit 123.

  When the determination result that the sub-signal is not included in the transmission pixel data is supplied from the sub-signal presence / absence determination unit 122, the separation unit 123 receives the transmission pixel data from the FIFO memory 121, and transmits the transmission pixel data to the transmission pixel data. The assigned main image pixel data is supplied to the main image processing unit 124.

  Further, when the determination result indicating that the sub-signal is included in the transmission pixel data is supplied from the sub-signal presence / absence determination unit 122, the separation unit 123 receives the transmission pixel data from the FIFO memory 121, and determines the sub-signal presence / absence determination Based on the sub-signal allocation bit number B3 supplied from the unit 122, the pixel data of the main image and the segmented sub-signal are separated from the transmission pixel data.

  That is, the separation unit 123 extracts the lower bits of the transmission signal data from the FIFO memory 121 as many as the sub-signal allocation bit number B3 from the sub-signal presence / absence determination unit 122 as the divided sub-signal, and the sub-signal processing unit 126. Further, the separation unit 123 extracts the remaining upper bits of the transmission pixel data from the FIFO memory 121 as pixel data of the main image, and supplies the extracted data to the main image processing unit 124.

  The main image processing unit 124 performs necessary processing on the pixel data of the main image supplied from the separation unit 123, reconstructs the main image for one video field, and supplies the main image to the main image memory 125.

  The main image memory 125 temporarily stores the main image supplied from the main image processing unit 124. The main image stored in the main image memory 125 is appropriately read and supplied to the display control unit 62 (FIG. 1).

  The sub signal processing unit 126 reconstructs the original sub signal from the divided sub signal supplied from the separation unit 123 and supplies the reconstructed original sub signal to the sub signal memory 127. As described with reference to FIG. 21, the sub-signal includes sub-signal related information, and the sub-signal processing unit 126 refers to this sub-signal related information as necessary, and re-reads the sub-signal. Constitute.

  The sub signal memory 127 temporarily stores the sub signal supplied from the sub signal processing unit 126.

  Next, referring to the flowchart of FIG. 24, the HDMI (R) sink 61 in FIG. 2 corresponds to the extended HDMI (R), and the sync signal processing unit 82 of the HDMI (R) sink 61 is shown in FIG. The operation of the HDMI (R) sink 61 when configured as shown in FIG.

  In step S131, the HDMI (R) sink 61 transmits its E-EDID to the HDMI (R) sink 61 via the DDC (FIG. 2).

  Thereafter, as described with reference to FIG. 22, the HDMI (R) sink 61 starts outputting the pixel clock, and when the general control packet is transmitted via the TMDS channels # 0 to # 2, the HDMI (R) In step S132, the receiver 81 of the sink 61 (FIG. 2) receives the general control packet (FIG. 18) from the HDMI (R) sink 61, and the sub-signal presence / absence determination unit 122 (FIG. 23) of the sync signal processing unit 82. To proceed to step S133.

  In step S133, the sub-signal presence / absence determination unit 122, based on the bits SD0, SD1, SD2 of the general control packet (FIG. 18) from the receiver 81, immediately after the vertical blanking interval in which the general control packet has been transmitted. It is determined whether or not a sub-signal is included in the transmission pixel data transmitted in the video data section.

  If it is determined in step S133 that the transmission pixel data does not include a sub signal, the sub signal presence determination unit 122 supplies the determination result to the separation unit 123, and the process proceeds to step S134.

  In step S134, the receiver 81 (FIG. 2) of the HDMI (R) sink 61 receives the transmission pixel data of the deep color mode image represented by the bits CD0, CD1, and CD2 of the general control packet from the HDMI (R) source 53. In synchronization with the pixel clock, after waiting for transmission from the HDMI (R) sink 61 via the TMDS channels # 0 to # 2, the transmission pixel data is received, and the FIFO memory of the sync signal processing unit 82 The data is supplied to the separation unit 123 via 121, and the process proceeds to step S135.

  In step S135, the separation unit 123 assigns the transmission pixel data supplied via the FIFO memory 121 according to the determination result from the sub-signal presence / absence determination unit 122 that the sub-signal is not included in the transmission pixel data. The pixel data of the main image being processed is supplied to the main image processing unit 124.

  Further, in step S135, the main image processing unit 124 supplies the main image pixel data from the separation unit 123 to the main image memory 125 for storage in order to reconstruct the main image for one video field, The process proceeds to step S136.

  In step S136, the main image processing unit 124 has finished processing the pixel data of the main image for one video field, that is, whether the main image for one video field has been stored in the main image memory 125. Determine.

  If it is determined in step S136 that the processing of the pixel data of the main image for one video field has not been completed, the process returns to step S134, and the same processing is repeated thereafter.

  If it is determined in step S136 that the processing of the pixel data of the main image for one video field has been completed, the process returns to step S132 after waiting for the transmission of the general control packet in the next video field. Thereafter, the same processing is repeated.

  On the other hand, when it is determined in step S133 that the transmission pixel data includes a sub-signal, the sub-signal presence / absence determination unit 122 is based on the bits SD0, SD1, and SD2 of the general control packet (FIG. 18) from the receiver 81. Then, the sub-signal allocation bit number B3 of the sub-signal included in the transmission pixel data is recognized and supplied to the separation unit 123 together with the determination result that the sub-signal is included in the transmission pixel data, and the process proceeds to step S137.

  In step S137, the receiver 81 (FIG. 2) of the HDMI (R) sink 61 receives the transmission pixel data of the deep color mode image represented by the bits CD0, CD1, and CD2 of the general control packet from the HDMI (R) source 53. In synchronization with the pixel clock, after waiting for transmission from the HDMI (R) sink 61 via the TMDS channels # 0 to # 2, the transmission pixel data is received, and the FIFO memory of the sync signal processing unit 82 The data is supplied to the separation unit 123 via 121, and the process proceeds to step S138.

  In step S <b> 138, the separation unit 123 determines the subpixel signal from the transmission pixel data supplied via the FIFO memory 121 according to the determination result from the subsignal presence / absence determination unit 122 that the transmission pixel data includes the subsignal. The lower bits corresponding to the number B3 of sub-signal allocation bits from the signal presence / absence determination unit 122 are separated and supplied to the sub-signal processing unit 126 as a divided sub-signal.

  Further, in step S138, the separation unit 123 separates the remaining upper bits from the transmission pixel data supplied via the FIFO memory 121, and supplies it to the main image processing unit 124 as pixel data of the main image. The process proceeds to step S139.

  In step S139, the main image processing unit 124 supplies the main image pixel data from the separation unit 123 to the main image memory 125 for storage in order to reconstruct a main image for one video field. Further, in step S139, the sub signal processing unit 126 supplies the sub signal to the sub signal memory 127 for storage in order to reconstruct the sub signal.

  In step S140, the main image processing unit 124 has finished processing the pixel data of the main image for one video field, that is, whether the main image for one video field has been stored in the main image memory 125. Determine.

  If it is determined in step S140 that the processing of the pixel data of the main image for one video field has not been completed, the process returns to step S137, and the same processing is repeated thereafter.

  If it is determined in step S140 that the processing of the pixel data of the main image for one video field has been completed, the process returns to step S132 after waiting for the transmission of the general control packet in the next video field. Thereafter, the same processing is repeated.

  As described above, E-EDID as performance information representing the performance of the HDMI (R) sink 61 (FIG. 2) is received, and then the video field (section from one vertical synchronization signal to the next vertical synchronization signal) From the video data section allocated to the active video section (effective image section) excluding the horizontal blanking section and the vertical blanking section, the pixel data of the image for one uncompressed image is obtained per one clock of the pixel clock. In the HDMI (R) source 53 that transmits the data of a fixed number of bits to the HDMI (R) sink 61 in one direction by the differential signal with three TMDS channels # 0 to # 2, the transmitter 72 By adjusting the frequency of the pixel clock, the transmission pixel data to which the fixed number of bits of 8 bits or more is assigned is converted to the differential signal on the three TMDS channels # 0 to # 2. As a result, the data is transmitted to the HDMI (R) sink 61 in one direction.

  In this case, the HDMI (R) source 53 determines whether or not the HDMI (R) sink 61 can receive the sub signal based on the VSDB of the E-EDID (FIG. 17). When the sink 61 can receive the sub signal, the sub pixel is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data transmitted by the transmitter 72, thereby transmitting the transmission pixel. Data is constructed and transmitted by the transmitter 72 on the three TMDS channels # 0 to # 2.

  Also, in the HDMI (R) source 53, whether or not a sub-signal is included in the transmission pixel data transmitted in the video data section immediately after the vertical blanking section in the control section (FIG. 4) of the vertical blanking section. A general control packet (FIG. 18) including bits SD0, SD1, and SD2 serving as sub-signal information indicating is transmitted.

  On the other hand, the HDMI (R) sink 61 that transmits E-EDID and then receives pixel data transmitted by differential signals from the HDMI (R) source 53 through the three TMDS channels # 0 to # 2. The receiver 81 receives the transmission pixel data transmitted by the differential signal through the three TMDS channels # 0 to # 2.

  Further, the HDMI (R) sink 61 uses the vertical blanking based on the bits SD0, SD1, SD2 included in the general control packet (FIG. 18) transmitted in the control section (FIG. 4) of the vertical blanking section. It is determined whether or not the transmission pixel data transmitted in the video data section immediately after the section includes a sub signal. If the transmission pixel data includes a sub signal, the sub signal is separated from the transmission pixel data. The

  Therefore, when the number of bits of the pixel data of the main image is smaller than the number of bits of the transmission pixel data determined by the deep color mode, the bit of the transmission pixel data is changed to a bit that is not assigned to the pixel data of the main image. It is possible to perform efficient data transmission in which a signal is allocated and a sub signal is transmitted together with the main image.

  Note that the larger the difference between the number of bits of transmission pixel data and the number of bits of pixel data of the main image, the greater the amount of data can be assigned to the transmission pixel data.

  In the present embodiment, the use of the sub signal is not particularly mentioned, but the sub signal can be used for various purposes.

  Specifically, for example, a low-resolution image synchronized with the main image, a program image different from the main image, or other images can be used as the sub-signal. In this case, on the display 42 (FIG. 1), an image as a sub-signal can be displayed on a sub-screen for PinP (Picture in Picture) or can be split-displayed.

  As the sub signal, for example, a control signal for controlling the display of the main image can be employed. In this case, the display 42 can control the display of the main image according to the control signal as the sub signal.

  When an image (moving image) is adopted as a sub-signal, when sound is attached to the image, the sound can be assigned to transmission pixel data and transmitted, or the sound is attached to the main image. In addition, it can be transmitted in the data island section (FIG. 4). That is, in HDMI (R), audio data of a plurality of audio channels can be transmitted in the data island period (FIG. 4), and the audio accompanying the image as the sub signal is the audio data accompanying the main image. This can be done using an audio channel that is not used for transmission.

  Next, a series of processes of the source signal control unit 71 and the sink signal processing unit 82 described above can be performed by dedicated hardware or can be performed by software. When a series of processing is performed by software, a program constituting the software is installed in a computer such as a microcomputer that controls the HDMI (R) source 53 and the HDMI (R) sink 61, for example.

  Therefore, FIG. 25 illustrates a configuration example of an embodiment of a computer in which a program for executing the above-described series of processes is installed.

  The program can be recorded in advance in an EEPROM (Electrically Erasable Programmable Read-only Memory) 205 or a ROM 203 as a recording medium built in the computer.

  Alternatively, the program is temporarily or permanently stored on a removable recording medium such as a flexible disk, CD-ROM (Compact Disc Read Only Memory), MO (Magneto Optical) disk, DVD (Digital Versatile Disc), magnetic disk, and semiconductor memory. Can be stored (recorded). Such a removable recording medium can be provided as so-called package software.

  The program is installed on the computer from the removable recording medium as described above, or transferred from the download site to the computer wirelessly via a digital satellite broadcasting artificial satellite, or a LAN (Local Area Network) or the Internet. Such a program can be transferred to a computer via a network, and the computer can receive the program transferred in this manner by the input / output interface 206 and install it in the built-in EEPROM 205.

  The computer includes a CPU (Central Processing Unit) 202. An input / output interface 206 is connected to the CPU 202 via the bus 201, and the CPU 202 loads a program stored in a ROM (Read Only Memory) 203 or an EEPROM 205 into a RAM (Random Access Memory) 204. And execute. Thereby, the CPU 202 performs processing according to the above-described flowchart or processing performed by the configuration of the above-described block diagram.

  Here, in this specification, the processing steps for describing a program for causing a computer to perform various types of processing do not necessarily have to be processed in time series according to the order described in the flowchart, but in parallel or individually. This includes processing to be executed (for example, parallel processing or processing by an object).

  Further, the program may be processed by one computer or may be distributedly processed by a plurality of computers.

  The embodiment of the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the gist of the present invention.

  That is, for example, the bit number B1 of the pixel data of the main image, the bit number B2 of the transmission pixel data, and the sub-signal allocation bit number B3 are not limited to the values described above. Furthermore, for example, the area for allocating bits Suport_30bit, Suport_36bit, Suport_48bit, bits Sub_2bit, Sub_4bit, Sub_8bit, Sub_Data_Support, bits SD0, SD1, SD2, etc. as sub signal information is not limited to the above-described areas, In HDMI (R), it can be assigned to any area that is unused (Reserved).

  Further, the present invention, after receiving performance information representing the performance of the receiving apparatus in addition to HDMI (R), from a section from one vertical synchronization signal to the next vertical synchronization signal, a horizontal blanking section and a vertical blanking In the effective image section, which is the section excluding the section, the pixel data of the uncompressed image for one screen is transmitted by a differential signal with a plurality of channels transmitting data of a fixed number of bits per one pixel clock. A communication interface comprising a transmission device that transmits to a reception device in one direction and a reception device that receives pixel data transmitted by a differential signal through a plurality of channels from the transmission device after transmitting performance information. Applicable.

It is a block diagram which shows the structural example of one Embodiment of the AV system to which this invention is applied. 3 is a block diagram illustrating a configuration example of an HDMI (R) source 53 and an HDMI (R) sink 61. FIG. 3 is a block diagram illustrating a configuration example of a transmitter 72 and a receiver 81. FIG. It is a figure which shows the transmission area of transmission by three TMDS channels # 0 thru | or # 2. 5 is a timing chart showing the relationship between control bits CTL0 and CTL1, a data island period, and a control period. It is a timing chart showing the transmission timing of the pixel data of the image transmitted in the video data area of the present HDMI (R). 6 is a timing chart showing the transmission timing of pixel data when transmitting a 30-bit image in a video data section of HDMI (R). 6 is a timing chart showing pixel data transmission timing when a 36-bit image is transmitted in an HDMI® video data section. 6 is a timing chart showing the transmission timing of pixel data when a 48-bit image is transmitted in a video data section of HDMI (R). It is a figure which shows the format of VSDB in E-EDID. It is a figure which shows the format of a general control packet. It is a figure which shows the relationship between bit CD0, CD1, CD2 of Byte # SB1 of a subpacket, and the image transmitted in a video data area. It is a flowchart explaining the operation | movement of the HDMI (R) source 53 corresponding to deep color HDMI (R). It is a flowchart explaining operation | movement of the HDMI (R) sink 61 corresponding to deep color HDMI (R). 6 is a diagram illustrating transmission of pixel data of a main image having a lower gradation than an image in a deep color mode determined by an HDMI (R) source 53. FIG. It is a figure explaining the allocation method which allocates a subsignal with respect to transmission pixel data. It is a figure which shows the format of VSDB in E-EDID. It is a figure which shows the format of a general control packet. It is a figure which shows the relationship between bit SD0, SD1, SD2 of Byte # SB2 of a subpacket, and the bit number of a subsignal. 3 is a block diagram illustrating a configuration example of a source signal processing unit 71. FIG. It is a figure explaining the sub signal relevant information included in a sub signal. It is a flowchart explaining the operation | movement of the HDMI (R) source 53 corresponding to extended HDMI (R). 3 is a block diagram illustrating a configuration example of a sync signal processing unit 82. FIG. It is a flowchart explaining operation | movement of the HDMI (R) sink 61 corresponding to extended HDMI (R). It is a block diagram which shows the structural example of one Embodiment of the computer to which this invention is applied.

Explanation of symbols

  41 HD recorder, 42 display, 43 cable, 51 recording / playback unit, 52 codec, 53 HDMI (R) source, 54 HD, 61 HDMI (R) sink, 62 display control unit, 63 display unit, 71 source signal processing unit, 72 transmitter, 72A to 72C encoder / serializer, 81 receiver, 81A to 81C recovery / decoder, 82 sink signal processing unit, 101 main image processing unit, 102 sub signal adding unit, 103 sub signal processing unit, 104 sub signal related information insertion , 105 sub-signal reception availability determination unit, 106 sub-signal allocation bit number determination unit, 107 sub-signal frame information transmission control unit, 108 deep color mode determination unit, 121 FIFO memory, 122 sub-signal presence / absence determination unit, 123 separation unit, 124 Lord Image processing unit, 125 main image memory, 126 sub-signal processor, 127 sub-signal memory, 201 bus, 202 CPU, 203 ROM, 204 RAM, 205 EEPROM, 206 input-output interface

Claims (8)

After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression to a reception device in one direction by a differential signal using a plurality of channels that transmit data of a fixed number of bits per pixel clock;
After transmitting the performance information, a communication system including the receiving device that receives pixel data transmitted by differential signals in the plurality of channels from the transmitting device,
The transmitter is
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means,
Sub-signal reception availability determination means for determining whether or not the receiving device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. Sub-signal adding means constituting the transmission pixel data,
In the vertical blanking section, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. Prepared,
The receiving device is:
Receiving means for receiving transmission pixel data transmitted by differential signals in the plurality of channels;
Based on the sub-signal information transmitted in the vertical blanking section, it is determined whether the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. Sub-signal presence / absence determining means for
Separating means for separating the sub-signal from the transmission pixel data when the sub-signal is included in the transmission pixel data. After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression in one direction to a reception device by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. ,
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means,
Sub-signal reception availability determination means for determining whether or not the receiving device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. Sub-signal adding means constituting the transmission pixel data,
In the vertical blanking section, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. A transmission device provided. The transmission device according to claim 2, wherein the transmission unit determines the number of bits of the transmission pixel data based on the performance information, and adjusts the frequency of the pixel clock based on the number of bits of the transmission pixel data. . After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. Communication of a transmitting apparatus that transmits pixel data of an image for one screen of compression to a receiving apparatus in one direction by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. Is the way
The transmitting device adjusts the frequency of the pixel clock so that pixel data to which the number of bits equal to or larger than the fixed number of bits is allocated is transmitted to the receiving device by a differential signal in the plurality of channels. Comprising transmission means for transmitting in the direction,
Based on the performance information, determine whether the receiving device can receive a sub-signal,
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. By configuring the transmission pixel data,
A communication method including a step of transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section in the vertical blanking section. After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. Controls a transmission device that sends pixel data of a compressed image for one screen to a receiving device in a single direction using differential signals on multiple channels that transmit data with a fixed number of bits per pixel clock. A program to be executed by a computer
The transmitting device adjusts the frequency of the pixel clock so that pixel data to which the number of bits equal to or larger than the fixed number of bits is allocated is transmitted to the receiving device by a differential signal in the plurality of channels. Comprising transmission means for transmitting in the direction,
Based on the performance information, determine whether the receiving device can receive a sub-signal,
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. By configuring the transmission pixel data,
In the vertical blanking interval, a communication process including a step of transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval. A program to be executed by a computer. After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression in one direction to a reception device by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. ,
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means,
Sub-signal reception availability determination means for determining whether or not the receiving device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. Sub-signal adding means constituting the transmission pixel data,
In the vertical blanking section, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. After transmitting the performance information to the transmission device comprising, the reception device that receives pixel data transmitted by differential signals in the plurality of channels from the transmission device,
Receiving means for receiving transmission pixel data transmitted by differential signals in the plurality of channels;
Based on the sub-signal information transmitted in the vertical blanking section, it is determined whether the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. Sub-signal presence / absence determining means for
And a separating unit that separates the sub-signal from the transmission pixel data when the sub-signal is included in the transmission pixel data. After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression in one direction to a reception device by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. ,
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means,
Sub-signal reception availability determination means for determining whether or not the receiving device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. Sub-signal adding means constituting the transmission pixel data,
In the vertical blanking section, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. After transmitting the performance information to the transmission device comprising, the communication method of the reception device for receiving pixel data transmitted by differential signals in the plurality of channels from the transmission device,
The receiving device includes receiving means for receiving transmission pixel data transmitted by a differential signal in the plurality of channels.
Based on the sub-signal information transmitted in the vertical blanking interval, it is determined whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image interval immediately after the vertical blanking interval. And
A communication method including a step of separating the sub-signal from the transmission pixel data when the sub-signal is included in the transmission pixel data. After receiving the performance information indicating the performance of the receiving device, in the effective image section, which is a section obtained by removing the horizontal blanking section and the vertical blanking section from the section from one vertical synchronization signal to the next vertical synchronization signal. A transmission device that transmits pixel data of an image for one screen of compression in one direction to a reception device by a differential signal using a plurality of channels that transmit data having a fixed number of bits per pixel clock. ,
Transmitting pixel data, to which the number of bits equal to or greater than the fixed number of bits is allocated, by adjusting the frequency of the pixel clock in one direction to the receiving device using a differential signal on the plurality of channels Means,
Sub-signal reception availability determination means for determining whether or not the receiving device can receive a sub-signal based on the performance information;
When the receiving device can receive the sub signal, the sub signal is added to the pixel data of the main image including the pixel data having a smaller number of bits than the transmission pixel data which is the pixel data transmitted by the transmission unit. Sub-signal adding means constituting the transmission pixel data,
In the vertical blanking section, information transmission control means for transmitting sub-signal information indicating whether or not the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. A program to be executed by a computer that controls the receiving device that receives pixel data transmitted by a differential signal through the plurality of channels from the transmitting device after transmitting the performance information to the transmitting device And
The receiving device includes receiving means for receiving transmission pixel data transmitted by a differential signal in the plurality of channels.
Based on the sub-signal information transmitted in the vertical blanking section, it is determined whether the sub-signal is included in the transmission pixel data transmitted in the effective image section immediately after the vertical blanking section. And
A program for causing a computer to execute communication processing including a step of separating the sub-signal from the transmission pixel data when the transmission pixel data includes the sub-signal.

Images