JP2007309806A - Semiconductor device inspecting tool and semiconductor device inspection method - Google Patents

Semiconductor device inspecting tool and semiconductor device inspection method Download PDF

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JP2007309806A
JP2007309806A JP2006139634A JP2006139634A JP2007309806A JP 2007309806 A JP2007309806 A JP 2007309806A JP 2006139634 A JP2006139634 A JP 2006139634A JP 2006139634 A JP2006139634 A JP 2006139634A JP 2007309806 A JP2007309806 A JP 2007309806A
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semiconductor device
inspection
circuit board
sealed space
pressure
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Shinri Wakamura
真利 若村
Koji Akahori
浩二 赤堀
Masayuki Nakase
雅之 中瀬
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To suppress strain generated in a board, when a semiconductor device which is an object to be inspected, is brought into contact with a circuit board for inspection, concerning the circuit board for inspection whereupon many electronic components are mounted. <P>SOLUTION: A pressure vessel 111 is provided on a back part of the circuit board 106 for inspection, countering the pressure for bringing the semiconductor device 102 which is the object to be inspected into contact with the circuit board 106 for inspection, and the pressure of gas or liquid in the pressure vessel 111 is raised, by raising a piston 115 inside the pressure vessel 111. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、半導体デバイス特に多ピンの場合の電気特性を検査するための半導体デバイス検査治具および半導体デバイス検査方法に関するものである。   The present invention relates to a semiconductor device inspection jig and a semiconductor device inspection method for inspecting electrical characteristics in the case of a semiconductor device, particularly a multi-pin.

近年、半導体関連技術の進歩とともに半導体デバイスは小型かつ多ピン化し、外部端子に半田ボールを形成したBall Grid Arrayパッケージ(以下、BGAパッケージという)を採用した半導体デバイスが増加している。   In recent years, with the advancement of semiconductor-related technologies, semiconductor devices have become smaller and have more pins, and an increasing number of semiconductor devices have adopted Ball Grid Array packages (hereinafter referred to as BGA packages) in which solder balls are formed on external terminals.

図5はBGAパッケージの半導体デバイスに対する電気特性検査に用いられる従来の半導体デバイス検査治具の断面図である。
この半導体デバイス検査治具においては、図5に示すように、検査対象でありBGAパッケージを採用した半導体デバイス102の外部端子と検査用回路基板106との間に、それらの電気的接続を行うための接触子103(以下、ポゴピンという)を使用している。このポゴピン103と半導体デバイス102の外部端子とが一致する位置にBGAパッケージの半導体デバイス102を配置し、コンタクトプッシャ治具101で半導体デバイス102の上面を加圧することにより、その外部端子とポゴピン103とを接触させる。このとき、半導体デバイス102の半田ボールにおいて、ポゴピン103の鋭利な先端形状によって、半田ボール表面に形成された酸化膜が突き破られることにより、半導体デバイス102の半田ボールとポゴピン103の電気的な接触を実現している。
FIG. 5 is a cross-sectional view of a conventional semiconductor device inspection jig used for inspection of electrical characteristics of a BGA package semiconductor device.
In this semiconductor device inspection jig, as shown in FIG. 5, in order to make an electrical connection between an external terminal of a semiconductor device 102 to be inspected and adopting a BGA package and an inspection circuit board 106. Contactor 103 (hereinafter referred to as pogo pin). The semiconductor device 102 of the BGA package is disposed at a position where the pogo pin 103 and the external terminal of the semiconductor device 102 coincide with each other, and the upper surface of the semiconductor device 102 is pressed by the contact pusher jig 101, whereby the external terminal and the pogo pin 103 are Contact. At this time, in the solder ball of the semiconductor device 102, the sharp tip shape of the pogo pin 103 breaks the oxide film formed on the surface of the solder ball, so that the electrical contact between the solder ball of the semiconductor device 102 and the pogo pin 103 is achieved. Is realized.

上記の半導体デバイス102の半田ボールとポゴピン103の電気的接触には、半田ボールの酸化膜を破る力が必要となり、半導体デバイス102の外部端子1ピン当たり数十グラムの押し圧をかけている。例えば1000ピンの半導体デバイス102では、全ピンの電気的接触を行うためには、半導体デバイス102に数十kgの押し圧が必要となる。   For the electrical contact between the solder ball of the semiconductor device 102 and the pogo pin 103, a force that breaks the oxide film of the solder ball is required, and a pressing pressure of several tens of grams per pin of the external terminal of the semiconductor device 102 is applied. For example, in a 1000-pin semiconductor device 102, several tens of kg of pressing force is required for the semiconductor device 102 in order to make electrical contact with all pins.

図5に示すように、ソケット104と検査用回路基板106との接触部分では、半導体デバイス102からの押し圧により、ソケット104の下部にある検査用回路基板106がU字形に歪む。この歪により、ソケット104のポゴピン103を止めているプレートにも検査用回路基板106と同様にU字形に歪みが発生し、特にソケット104の中心部では、ポゴピン103のストロークが規定のストロークに満たないため、半田ボールの酸化膜を突き破るだけのポゴピン103からの押し圧を得ることができず、半導体デバイス102と検査用回路基板106との間に電気的な接触不良が発生してしまう。このような電気的接触不良は、検査対象の半導体デバイス102が良品の半導体デバイスであっても不良判定をしてしまうというように、半導体デバイス102に対する検査ミスが起きる要因になる。   As shown in FIG. 5, at the contact portion between the socket 104 and the inspection circuit board 106, the inspection circuit board 106 below the socket 104 is distorted into a U shape by the pressing force from the semiconductor device 102. Due to this distortion, the plate holding the pogo pin 103 of the socket 104 is also distorted in a U-shape like the circuit board 106 for inspection, and the stroke of the pogo pin 103 satisfies the specified stroke particularly in the center of the socket 104. Therefore, it is not possible to obtain a pressing force from the pogo pin 103 that only breaks through the oxide film of the solder ball, and an electrical contact failure occurs between the semiconductor device 102 and the circuit board 106 for inspection. Such an electrical contact failure causes a test error to the semiconductor device 102, such as a failure determination even if the semiconductor device 102 to be inspected is a non-defective semiconductor device.

そこで、図6に示すように、検査用回路基板106の裏面に補強板601を取り付けることにより、良品の半導体デバイスに対しても起こり得る不良判定等の検査ミスにつながる検査用回路基板106の歪みを防止し、半導体デバイス102と検査用回路基板106との間に十分な電気的接触を得るようにしている。また、他の装置(例えば、特許文献1を参照)では、検査用回路基板をその裏面に支持棒を設けて支えることにより、上記のような検査ミスにつながる検査用回路基板の歪みを防止している。
特開2005−235818号公報
Therefore, as shown in FIG. 6, by attaching a reinforcing plate 601 to the back surface of the inspection circuit board 106, distortion of the inspection circuit board 106 that leads to an inspection error such as a failure determination that may occur even for a non-defective semiconductor device. In this way, sufficient electrical contact is obtained between the semiconductor device 102 and the circuit board 106 for inspection. In another apparatus (for example, see Patent Document 1), the inspection circuit board is supported by providing a support bar on the back surface thereof, thereby preventing the inspection circuit board from being distorted as described above. ing.
JP 2005-235818 A

しかしながら、図5に示すような従来の半導体デバイス検査治具では、検査用回路基板106の裏面で半導体デバイス102の裏面に対向する領域に、電源の安定化やアナログ信号のノイズを抑制するための電子部品105を多数実装した場合には、その部分に検査用回路基板106の歪みを抑制するための補強板や支持棒を取り付けることができないという問題があった。   However, in the conventional semiconductor device inspection jig as shown in FIG. 5, the power supply is stabilized and the noise of the analog signal is suppressed in the region facing the back surface of the semiconductor device 102 on the back surface of the circuit board 106 for inspection. When a large number of electronic components 105 are mounted, there is a problem in that a reinforcing plate or a support bar for suppressing distortion of the inspection circuit board 106 cannot be attached to that portion.

また、図6に示すように、検査用回路基板106の裏面で半導体デバイス102の裏面に対向する領域に、検査用回路基板106の歪みを抑制するための補強板601や支持棒を取り付けた場合には、半導体デバイス102の上面を加圧した際に、検査用回路基板106の裏面に取り付けた補強板601または支持棒と電子部品との間に接点が生じて電子部品の剥離が発生するという問題があった。   In addition, as shown in FIG. 6, when a reinforcing plate 601 or a support bar for suppressing distortion of the inspection circuit board 106 is attached to a region facing the back surface of the semiconductor device 102 on the back surface of the inspection circuit board 106. In other words, when the upper surface of the semiconductor device 102 is pressurized, a contact point is generated between the reinforcing plate 601 or the support bar attached to the back surface of the circuit board for inspection 106 and the electronic component, and the electronic component is peeled off. There was a problem.

本発明は、上記従来の問題点を解決するもので、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に実装した電子部品の剥離を防止することができ、しかも、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に多数の電子部品を実装しているためにその部分に補強板や支持棒を用いることができない場合にも、そのような検査用回路基板の歪みを抑制することができる半導体デバイス検査治具および半導体デバイス検査方法を提供する。   The present invention solves the above-mentioned conventional problems, and can prevent peeling of an electronic component mounted in a region facing the back surface of a semiconductor device on the back surface of the circuit board for inspection. Even when a large number of electronic components are mounted on the back surface of the semiconductor device in the region facing the back surface of the semiconductor device, a reinforcing plate or a support rod cannot be used for that portion, the distortion of such a test circuit board is also reduced. A semiconductor device inspection jig and a semiconductor device inspection method that can be suppressed are provided.

上記の課題を解決するために、本発明の請求項1に記載の半導体デバイス検査治具は、半導体デバイスの電気的特性を検査用回路基板を通じて検査するために、前記半導体デバイスを前記検査用回路基板に電気的にコンタクトさせる機構を有する半導体デバイス検査治具において、前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧するための機構を有する加圧容器を備え、前記加圧容器の内部に、前記検査用回路基板における前記裏面の一部と前記加圧容器の内壁とともに、前記検査用回路基板を前記裏面から加圧するための密閉空間を形成する仕切り板を設け、前記密閉空間の密閉状態を保持したままで前記仕切り板が前記加圧容器の内部を可動することにより、前記密閉空間を加圧するように構成したことを特徴とする。   In order to solve the above-described problems, a semiconductor device inspection jig according to claim 1 of the present invention is configured to inspect the electrical characteristics of a semiconductor device through an inspection circuit board. In a semiconductor device inspection jig having a mechanism for making electrical contact with a substrate, the inspection circuit substrate is placed against the pressure applied to the inspection circuit substrate by contact of the semiconductor device with the inspection circuit substrate. A pressurization container having a mechanism for pressurizing the contact surface with the semiconductor device from the back surface is provided, and a part of the back surface of the circuit board for inspection and an inner wall of the pressurization container are provided inside the pressurization container. In addition, a partition plate that forms a sealed space for pressurizing the circuit board for inspection from the back surface is provided, and the sealed state of the sealed space is maintained. By the partition plate remains can move the inside of the pressure vessel, characterized by being configured the enclosed space to pressurize.

また、本発明の請求項2に記載の半導体デバイス検査治具は、請求項1記載の半導体デバイス検査治具であって、前記密閉空間への加圧を前記半導体デバイスの前記検査用回路基板へのコンタクト動作に連動させる機構を備えたことを特徴とする。   Moreover, the semiconductor device inspection jig according to claim 2 of the present invention is the semiconductor device inspection jig according to claim 1, wherein the pressure applied to the sealed space is applied to the circuit board for inspection of the semiconductor device. A mechanism for interlocking with the contact operation is provided.

また、本発明の請求項3に記載の半導体デバイス検査治具は、半導体デバイスの電気的特性を検査用回路基板を通じて検査するために、前記半導体デバイスを前記検査用回路基板に電気的にコンタクトさせる機構を有する半導体デバイス検査治具において、前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧するための機構を有する加圧容器を備え、前記検査用回路基板における前記裏面の一部と前記加圧容器の内壁とで、前記検査用回路基板を前記裏面から加圧するための密閉空間を形成し、前記加圧容器に前記密閉空間とその外部が繋がる少なくとも1個の貫通穴を設け、前記密閉空間を前記貫通穴を通じて前記密閉空間の外部から加圧するよう構成したことを特徴とする。   According to a third aspect of the present invention, there is provided a semiconductor device inspection jig, wherein the semiconductor device is electrically contacted with the inspection circuit board in order to inspect the electrical characteristics of the semiconductor device through the inspection circuit board. In a semiconductor device inspection jig having a mechanism, the inspection circuit board is placed on a contact surface with the semiconductor device so as to oppose pressure applied to the inspection circuit board by contact of the semiconductor device with the inspection circuit board. In contrast, a pressurization container having a mechanism for pressurizing from the back surface is provided, and the test circuit board is pressurized from the back surface by a part of the back surface of the test circuit board and the inner wall of the pressurization container. A closed space is formed, and the pressurized container is provided with at least one through-hole that connects the sealed space and the outside thereof, and the sealed space passes through the sealed space. Characterized by being configured to pressurize the outside of the sealed space through the hole.

また、本発明の請求項4に記載の半導体デバイス検査治具は、請求項3記載の半導体デバイス検査治具であって、前記密閉空間を前記密閉空間の外部から前記貫通穴に向かう一方向のみに加圧するよう構成したことを特徴とする。   Moreover, the semiconductor device inspection jig according to claim 4 of the present invention is the semiconductor device inspection jig according to claim 3, wherein the sealed space is only in one direction from the outside of the sealed space toward the through hole. It is characterized by being configured to pressurize.

また、本発明の請求項5に記載の半導体デバイス検査治具は、請求項3または請求項4記載の半導体デバイス検査治具であって、前記密閉空間への加圧を前記半導体デバイスの前記検査用回路基板へのコンタクト動作に連動させる機構を備えたことを特徴とする。   Moreover, the semiconductor device inspection jig according to claim 5 of the present invention is the semiconductor device inspection jig according to claim 3 or 4, wherein the inspection of the semiconductor device is performed by applying pressure to the sealed space. And a mechanism for interlocking with the contact operation to the circuit board.

また、本発明の請求項6に記載の半導体デバイス検査治具は、請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、前記密閉空間の加圧による圧力を調整する圧力調整弁を設けたことを特徴とする。   Moreover, the semiconductor device inspection jig according to claim 6 of the present invention is the semiconductor device inspection jig according to any one of claims 1 to 5, wherein the pressure by pressurization of the sealed space is adjusted. A pressure regulating valve is provided.

また、本発明の請求項7に記載の半導体デバイス検査治具は、請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、前記密閉空間を加圧するために満たされた媒体は気体もしくは液体とすることを特徴とする。   A semiconductor device inspection jig according to claim 7 of the present invention is the semiconductor device inspection jig according to any one of claims 1 to 5, and is filled to pressurize the sealed space. The medium is a gas or a liquid.

また、本発明の請求項8に記載の半導体デバイス検査治具は、請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、前記加圧容器が剛体であることを特徴とする。   Moreover, the semiconductor device inspection jig according to claim 8 of the present invention is the semiconductor device inspection jig according to any one of claims 1 to 5, wherein the pressurized container is a rigid body. Features.

また、本発明の請求項9に記載の半導体デバイス検査方法は、請求項1または請求項2記載の半導体デバイス検査治具を用いて、前記仕切り板を前記加圧容器の内部で可動させることにより、前記密閉空間の密閉状態を保持したままで前記密閉空間を加圧し、前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧することを特徴とする。   According to a ninth aspect of the present invention, there is provided a semiconductor device inspection method comprising: moving the partition plate inside the pressurized container using the semiconductor device inspection jig according to the first or second aspect. The circuit board for inspection faces the pressure applied to the circuit board for inspection by the contact with the circuit board for inspection of the semiconductor device by pressurizing the airtight space while maintaining the sealed state of the airtight space. Is pressed from the back surface against the contact surface with the semiconductor device.

また、本発明の請求項10に記載の半導体デバイス検査方法は、請求項3または請求項4または請求項5記載の半導体デバイス検査治具を用いて、前記密閉空間の外部から前記貫通穴を通じて前記密閉空間を加圧することにより、前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧することを特徴とする。   In addition, a semiconductor device inspection method according to claim 10 of the present invention uses the semiconductor device inspection jig according to claim 3, claim 4, or claim 5, and passes through the through hole from the outside of the sealed space. By pressurizing the sealed space, the inspection circuit board is opposed to the contact surface with the semiconductor device so as to oppose the pressure applied to the inspection circuit board by the contact of the semiconductor device to the inspection circuit board. It is characterized by applying pressure from the back side.

以上のように本発明によれば、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に多数の電子部品を実装しているために、その部分に従来のような補強板や支持棒を用いることができない場合にも、そのような検査用回路基板の歪みを抑制することができる。   As described above, according to the present invention, a large number of electronic components are mounted on the back surface of the circuit board for inspection facing the back surface of the semiconductor device. Even when it cannot be used, such distortion of the circuit board for inspection can be suppressed.

また、従来のように補強板や支持棒を取り付けることによって生じていた補強板や支持棒と電子部品との接点がなくなるため、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に実装した電子部品の剥離を防止することができる。   In addition, since there is no contact between the reinforcing plate or support bar and the electronic components that had been generated by attaching the reinforcing plate or support bar as in the past, mounting on the back side of the circuit board for inspection facing the back side of the semiconductor device It is possible to prevent peeling of the electronic components.

以上により、半導体デバイス検査治具の不具合によって良品の半導体デバイスに対しても起こり得る不良判定等の検査ミスを防止することができる。   As described above, it is possible to prevent an inspection error such as a defect determination that may occur even for a non-defective semiconductor device due to a defect in the semiconductor device inspection jig.

以下、本発明の実施の形態を示す半導体デバイス検査治具および半導体デバイス検査方法について、図面を参照しながら具体的に説明する。
最初に、本実施の形態の半導体デバイス検査治具の構成について、図1、図2、図3、図4を用いて説明する。
Hereinafter, a semiconductor device inspection jig and a semiconductor device inspection method showing embodiments of the present invention will be specifically described with reference to the drawings.
First, the configuration of the semiconductor device inspection jig according to the present embodiment will be described with reference to FIGS. 1, 2, 3, and 4.

図1、図2、図3、図4は本実施の形態1、2、3、4の半導体デバイス検査治具の断面図であリ、半導体デバイス検査治具における検査用回路基板の歪を抑制するように構成されている。
(実施の形態1)
図1に示すように、剛体として例えば厚み約5mm以上のステンレスなどの金属等でできた加圧容器111を、検査用回路基板106において半導体デバイス102がコンタクトするソケット104を取り付けた面とは対向する裏面部分に、加圧容器111の開口部が検査用回路基板106の裏面に接触するように取り付け、検査用回路基板106と加圧容器111により密閉空間(以下、高圧室と呼ぶ)113を設ける。高圧室113内には気体もしくは液体を充填し、加圧容器111と検査用回路基板106の間のドッキング部分には、高圧室113から高圧の気体もしくは液体が抜けないように、ゴムパッキン110を取り付け、治具固定用ネジ109により固定する。高圧室113内の圧力は一定となるように、高圧室113内部の壁面には圧力調整弁112を設ける。
1, 2, 3, and 4 are cross-sectional views of the semiconductor device inspection jig according to the first, second, third, and fourth embodiments, and suppress distortion of the inspection circuit board in the semiconductor device inspection jig. Is configured to do.
(Embodiment 1)
As shown in FIG. 1, a pressurized container 111 made of, for example, a metal such as stainless steel having a thickness of about 5 mm or more as a rigid body is opposed to a surface on which a socket 104 to which a semiconductor device 102 contacts is mounted on an inspection circuit board 106. The pressurization container 111 is attached to the back surface portion so that the opening of the pressurization container 111 is in contact with the back surface of the test circuit board 106, and a sealed space (hereinafter referred to as a high pressure chamber) 113 is formed by the test circuit board 106 and the pressurization container 111. Provide. The high-pressure chamber 113 is filled with gas or liquid, and a rubber packing 110 is inserted in the docking portion between the pressurized container 111 and the inspection circuit board 106 so that the high-pressure gas or liquid does not escape from the high-pressure chamber 113. Mounting and fixing with jig fixing screw 109. A pressure regulating valve 112 is provided on the wall surface inside the high pressure chamber 113 so that the pressure in the high pressure chamber 113 is constant.

高圧室113の内部は、検査用回路基板106の裏面と接する密閉空間(高圧室113)と接しない空間114に分けるために、高圧室113内にピストン機構115を設ける。検査用回路基板106と接する部分の高圧室113の圧力を上げるために、ピストン機構115は上下に可動する構造とする。ピストン機構115と高圧室113の壁面が接する部分は、ピストン機構115の可動時に高圧室113の圧力がピストン機構115と高圧室113の壁面との間から抜けないように、隙間寸法は10μm以内とし、そしてピストン機構115が滑らかに動くように、ピストン機構115と高圧室113の壁面には、潤滑オイルを塗布する。   In order to divide the inside of the high-pressure chamber 113 into a space 114 that does not contact the sealed space (high-pressure chamber 113) that contacts the back surface of the circuit board 106 for inspection, a piston mechanism 115 is provided in the high-pressure chamber 113. In order to increase the pressure in the high-pressure chamber 113 at the portion in contact with the inspection circuit board 106, the piston mechanism 115 is configured to move up and down. The portion where the piston mechanism 115 and the wall surface of the high pressure chamber 113 are in contact with each other has a gap size of 10 μm or less so that the pressure of the high pressure chamber 113 does not escape from between the piston mechanism 115 and the wall surface of the high pressure chamber 113 when the piston mechanism 115 is moved. Then, lubricating oil is applied to the wall surfaces of the piston mechanism 115 and the high-pressure chamber 113 so that the piston mechanism 115 moves smoothly.

ピストン機構115を上下方向に可動させるため、ピストン機構115の下部にはネジ機構118を設け、ネジ機構118の下部に設けられたハンドル116を回すことによりピストン機構115は上下に可動する。ピストン機構115の下部に設けられたネジ機構118の緩みにより、高圧室113の圧力が下がらないように、ハンドル116部分の上部にはハンドル固定治具117を取り付ける。   In order to move the piston mechanism 115 up and down, a screw mechanism 118 is provided at the lower part of the piston mechanism 115, and the piston mechanism 115 is moved up and down by turning a handle 116 provided at the lower part of the screw mechanism 118. A handle fixing jig 117 is attached to the upper part of the handle 116 so that the pressure in the high-pressure chamber 113 does not drop due to the looseness of the screw mechanism 118 provided at the lower part of the piston mechanism 115.

本実施の形態1の半導体デバイス検査方法は、コンタクトプッシャ治具101より半導体デバイス102の上面に圧力がかけられると、同時もしくは瞬時にピストン機構115の下部に設けられたハンドル116を回すことにより、ピストン機構115を上昇させる。そして、ピストン機構115の上昇によって、加圧容器111の高圧室113内の容積が減少し、高圧室113内部の気体の圧力が上昇する。その圧力によって検査用回路基板106の歪みを抑制し、このように抑制できたところで、ハンドル116上部にあるハンドル固定治具117を固定して、高圧室113内の圧力を一定に保つ。
(実施の形態2)
図2に示すように、剛体として例えば厚み約5mm以上のステンレスなどの金属等でできた加圧容器111を、検査用回路基板106において半導体デバイス102がコンタクトするソケット104を取り付けた面とは対向する裏面部分に、加圧容器111の開口部が検査用回路基板106の裏面に接触するように取り付け、検査用回路基板106と加圧容器111により密閉空間である高圧室113を設ける。高圧室113内には気体もしくは液体を充填し、加圧容器111と検査用回路基板106の間のドッキング部分には、高圧室113から高圧の気体もしくは液体が抜けないように、ゴムパッキン110を取り付け、治具固定用ネジ109により固定する。高圧室113内の圧力は一定となるように、高圧室113内部の壁面には圧力調整弁112を設ける。
In the semiconductor device inspection method of the first embodiment, when pressure is applied to the upper surface of the semiconductor device 102 from the contact pusher jig 101, the handle 116 provided at the lower portion of the piston mechanism 115 is rotated simultaneously or instantaneously, The piston mechanism 115 is raised. As the piston mechanism 115 rises, the volume of the pressurized container 111 in the high-pressure chamber 113 decreases, and the gas pressure inside the high-pressure chamber 113 rises. The distortion of the circuit board for inspection 106 is suppressed by the pressure, and when the pressure can be suppressed in this way, the handle fixing jig 117 above the handle 116 is fixed to keep the pressure in the high-pressure chamber 113 constant.
(Embodiment 2)
As shown in FIG. 2, a pressurized container 111 made of, for example, a metal such as stainless steel having a thickness of about 5 mm or more as a rigid body is opposed to the surface on which the socket 104 to which the semiconductor device 102 contacts is mounted on the inspection circuit board 106. The pressurized container 111 is attached to the rear surface portion so that the opening of the pressurized container 111 is in contact with the rear surface of the inspection circuit board 106, and the high-pressure chamber 113 that is a sealed space is provided by the inspection circuit board 106 and the pressurized container 111. The high-pressure chamber 113 is filled with gas or liquid, and a rubber packing 110 is inserted in the docking portion between the pressurized container 111 and the inspection circuit board 106 so that the high-pressure gas or liquid does not escape from the high-pressure chamber 113. Mounting and fixing with jig fixing screw 109. A pressure regulating valve 112 is provided on the wall surface inside the high pressure chamber 113 so that the pressure in the high pressure chamber 113 is constant.

加圧容器111には高圧室113内部に気体もしくは液体を注入可能な穴204を設け、配管202を通して穴204部分から高圧室113内部に高圧の気体(1気圧以上)もしくは液体を送ることが可能なように、配管202を介して外部にコンプレッサー装置201を設ける。コンプレッサー装置201から送る気体もしくは液体は、高圧室113からコンプレッサー装置201側に流れないように、高圧室113の圧力より高い圧力の気体もしくは液体を送り込む。また、高圧室113内の気体もしくは液体がコンプレッサー装置201側へ逆流しないように、高圧室113の壁面部分の穴204には、逆流防止用の逆止弁203を設ける。   The pressurized container 111 is provided with a hole 204 through which gas or liquid can be injected into the high-pressure chamber 113, and high-pressure gas (1 atmosphere or more) or liquid can be sent from the hole 204 portion into the high-pressure chamber 113 through the pipe 202. As described above, the compressor device 201 is provided outside via the pipe 202. The gas or liquid sent from the compressor device 201 is sent in a gas or liquid having a pressure higher than the pressure in the high pressure chamber 113 so as not to flow from the high pressure chamber 113 to the compressor device 201 side. Further, a check valve 203 for preventing backflow is provided in the hole 204 in the wall surface portion of the high pressure chamber 113 so that the gas or liquid in the high pressure chamber 113 does not flow back to the compressor device 201 side.

本実施の形態2の半導体デバイス検査方法は、コンタクトプッシャ治具101より半導体デバイス102の上面に圧力がかけられると、同時もしくは瞬時にコンプレッサー装置201からの高圧の気体もしくは液体を送り込むことにより、高圧室113内部の気体もしくは液体の圧力が上昇する。その圧力によって検査用回路基板106の歪みを抑制し、このように抑制できたところで、コンプレッサー装置201から高圧の気体もしく液体を送り込むのを止める。高圧室113内の穴204部分に設けられた逆止弁203により、高圧室113内の気体もしくは液体の流出を防ぎ、高圧室113内の圧力を一定に保つ。
(実施の形態3)
図3に示すように、剛体として例えば厚み約5mm以上のステンレスなどの金属等でできた加圧容器111を、検査用回路基板106において半導体デバイス102がコンタクトするソケット104を取り付けた面とは対向する裏面部分に、加圧容器111の開口部が検査用回路基板106の裏面に接触するように取り付け、検査用回路基板106と加圧容器111により密閉空間である高圧室113を設ける。高圧室113内には気体もしくは液体を充填し、加圧容器111と検査用回路基板106の間のドッキング部分には、高圧室113から高圧の気体もしくは液体が抜けないように、ゴムパッキン110を取り付け、治具固定用ネジ109により固定する。高圧室113内の圧力は一定となるように、高圧室113内部の壁面には圧力調整弁112を設ける。
In the semiconductor device inspection method of the second embodiment, when a pressure is applied to the upper surface of the semiconductor device 102 from the contact pusher jig 101, a high-pressure gas or liquid from the compressor device 201 is fed simultaneously or instantaneously, thereby The pressure of the gas or liquid inside the chamber 113 increases. The distortion of the circuit board for inspection 106 is suppressed by the pressure, and when the pressure can be suppressed in this way, the supply of high-pressure gas or liquid from the compressor device 201 is stopped. A check valve 203 provided in the hole 204 in the high pressure chamber 113 prevents gas or liquid from flowing out of the high pressure chamber 113 and keeps the pressure in the high pressure chamber 113 constant.
(Embodiment 3)
As shown in FIG. 3, a pressure vessel 111 made of, for example, a metal such as stainless steel having a thickness of about 5 mm or more as a rigid body is opposed to the surface on which the socket 104 to which the semiconductor device 102 contacts is mounted on the inspection circuit board 106. The pressurized container 111 is attached to the rear surface portion so that the opening of the pressurized container 111 is in contact with the rear surface of the inspection circuit board 106, and the high-pressure chamber 113 that is a sealed space is provided by the inspection circuit board 106 and the pressurized container 111. The high-pressure chamber 113 is filled with gas or liquid, and a rubber packing 110 is provided in a docking portion between the pressurized container 111 and the inspection circuit board 106 so that high-pressure gas or liquid does not escape from the high-pressure chamber 113. Mounting and fixing with jig fixing screw 109. A pressure regulating valve 112 is provided on the wall surface inside the high pressure chamber 113 so that the pressure in the high pressure chamber 113 is constant.

加圧容器111には高圧室113内部に気体もしくは液体を注入可能な穴204を設け、配管202を通して穴204部分から高圧室113内部に高圧の気体(1気圧以上)もしくは液体を送ることが可能なように、配管202を介してシリンダ機構301を設ける。このシリンダ機構301は、半導体デバイス102と検査用回路基板106上のソケット104のポゴピン103をコンタクトさせるために用いるコンタクトプッシャ治具101からの圧力を利用し、この圧力は、支持棒303によりピストン機構302を上下に可動させ、ピストン機構302の下部に設けられたシリンダ室304から、その内部の気体もしくは液体が配管202を通って高圧室113内に送り込まれる構造とする。   The pressurized container 111 is provided with a hole 204 through which gas or liquid can be injected into the high-pressure chamber 113, and high-pressure gas (1 atmosphere or more) or liquid can be sent from the hole 204 portion into the high-pressure chamber 113 through the pipe 202. As described above, the cylinder mechanism 301 is provided via the pipe 202. The cylinder mechanism 301 uses the pressure from the contact pusher jig 101 used to contact the semiconductor device 102 and the pogo pin 103 of the socket 104 on the circuit board 106 for inspection. 302 is moved up and down, and gas or liquid inside the cylinder chamber 304 provided in the lower part of the piston mechanism 302 is sent into the high-pressure chamber 113 through the pipe 202.

本実施の形態3の半導体デバイス検査方法は、コンタクトプッシャ治具101より半導体デバイス102の上面に圧力がかけられると、同時にコンタクトプッシャ治具101に連動してシリンダ機構301内のピストン機構302が下降し、シリンダ室304内の気体もしくは液体が配管202を通して高圧室113に送り込まれ、高圧室113内部の気体もしくは液体の圧力が上昇する。その圧力によって検査用回路基板106の歪みを抑制する。次にコンタクトプッシャ治具101が上昇すると、同時にコンタクトプッシャ治具101に連動してシリンダ機構301内のピストン機構302が上昇し、高圧室113内の気体もしくは液体が配管202を通してシリンダ機構301内に送り込まれ、高圧室113内部の気体もしくは液体の圧力が減少する。
(実施の形態4)
図4に示すように、剛体として例えば厚み約5mm以上のステンレスなどの金属等でできた加圧容器111を、検査用回路基板106において半導体デバイス102がコンタクトするソケット104を取り付けた面とは対向する裏面部分に、加圧容器111の開口部が検査用回路基板106の裏面に接触するように取り付け、検査用回路基板106と加圧容器111により密閉空間である高圧室113を設ける。高圧室113内には気体もしくは液体を充填し、加圧容器111と検査用回路基板106の間のドッキング部分には、高圧室113から高圧の気体もしくは液体が抜けないように、ゴムパッキン110を取り付け、治具固定用ネジ109により固定する。高圧室113内の圧力は一定となるように、高圧室113内部の壁面には圧力調整弁112を設ける。
In the semiconductor device inspection method of the third embodiment, when a pressure is applied to the upper surface of the semiconductor device 102 from the contact pusher jig 101, the piston mechanism 302 in the cylinder mechanism 301 is lowered simultaneously in conjunction with the contact pusher jig 101. Then, the gas or liquid in the cylinder chamber 304 is sent to the high pressure chamber 113 through the pipe 202, and the pressure of the gas or liquid in the high pressure chamber 113 increases. The pressure suppresses the distortion of the inspection circuit board 106. Next, when the contact pusher jig 101 rises, simultaneously, the piston mechanism 302 in the cylinder mechanism 301 rises in conjunction with the contact pusher jig 101, and gas or liquid in the high pressure chamber 113 enters the cylinder mechanism 301 through the pipe 202. The pressure of the gas or liquid inside the high pressure chamber 113 is reduced.
(Embodiment 4)
As shown in FIG. 4, a pressurized container 111 made of, for example, a metal such as stainless steel having a thickness of about 5 mm or more as a rigid body is opposed to the surface on which the socket 104 with which the semiconductor device 102 contacts is mounted on the inspection circuit board 106. The pressurized container 111 is attached to the rear surface portion so that the opening of the pressurized container 111 is in contact with the rear surface of the inspection circuit board 106, and the high-pressure chamber 113 that is a sealed space is provided by the inspection circuit board 106 and the pressurized container 111. The high-pressure chamber 113 is filled with gas or liquid, and a rubber packing 110 is inserted in the docking portion between the pressurized container 111 and the inspection circuit board 106 so that the high-pressure gas or liquid does not escape from the high-pressure chamber 113. Mounting and fixing with jig fixing screw 109. A pressure regulating valve 112 is provided on the wall surface inside the high pressure chamber 113 so that the pressure in the high pressure chamber 113 is constant.

加圧容器111の内部空間を検査用回路基板106の裏面と接する密閉空間である高圧室113と接しない空間114とに分けるために、加圧容器111内にはピストン機構115を設ける。ピストン機構115は高圧室113の圧力を上げるために上下に可動する構造とする。ピストン機構115と加圧容器111の内側壁面との接する部分は、ピストン機構115の可動時に高圧室113の圧力がピストン機構115と加圧容器111の内側壁面との間から抜けないように、隙間寸法を10μm以内とし、さらにピストン機構115が滑らかに動くように、ピストン機構115と加圧容器111の内側壁面には潤滑オイルを塗布する。   In order to divide the internal space of the pressurized container 111 into a high-pressure chamber 113 that is a sealed space in contact with the back surface of the circuit board for inspection 106 and a space 114 that does not contact the pressure mechanism 111, a piston mechanism 115 is provided in the pressurized container 111. The piston mechanism 115 is configured to move up and down in order to increase the pressure in the high pressure chamber 113. The portion where the piston mechanism 115 and the inner wall surface of the pressurized container 111 are in contact is a gap so that the pressure in the high pressure chamber 113 does not escape from between the piston mechanism 115 and the inner wall surface of the pressurized container 111 when the piston mechanism 115 is movable. Lubricating oil is applied to the inner wall surfaces of the piston mechanism 115 and the pressurized container 111 so that the dimensions are within 10 μm and the piston mechanism 115 moves smoothly.

ピストン機構115の下部には、半導体デバイス102とソケット104のポゴピン103とをコンタクトさせるために用いるコンタクトプッシャ治具101からの圧力を利用したピストン上下動機構を設ける。このピストン上下動機構の構造は、ピストン機構115の下部に接続された支持棒403が軸受けである作用点406に接続され、支持棒401がコンタクトプッシャ治具101に接続され、支持棒402が作用点406とベース台407に固定した軸受けである支点405と支持棒401の先端部分にある力点404に接続されている。   A piston vertical movement mechanism using pressure from a contact pusher jig 101 used for contacting the semiconductor device 102 and the pogo pin 103 of the socket 104 is provided below the piston mechanism 115. In the structure of this piston vertical movement mechanism, a support bar 403 connected to the lower part of the piston mechanism 115 is connected to an action point 406 which is a bearing, the support bar 401 is connected to the contact pusher jig 101, and the support bar 402 is operated. The point 406 is connected to a fulcrum 405 that is a bearing fixed to the base 407 and a force point 404 at the tip of the support bar 401.

本実施の形態4の半導体デバイス検査方法は、例えば半導体デバイス102に対する検査を開始して、コンタクトプッシャ治具101より半導体デバイス102の上面に圧力がかけられた場合には、それと同時に、上記のピストン上下動機構によって、コンタクトプッシャ治具101から半導体デバイス102の上面にかかる押し圧が、支持棒401に伝わって力点404が下方に可動することにより、支持棒402が「てこ」の原理によって支点405を軸に回動し作用点406を上方に可動し、この作用点406の上方への可動により、作用点406に接続された支持棒403がピストン機構115を押し上げることによって、高圧室113内の容積が減少し内部の気体もしくは液体の圧力が上昇する。このように高圧室113内の気体もしくは液体の圧力が上昇することによって、検査用回路基板106の歪みを抑制する。   In the semiconductor device inspection method according to the fourth embodiment, for example, when inspection of the semiconductor device 102 is started and pressure is applied to the upper surface of the semiconductor device 102 from the contact pusher jig 101, at the same time, the above piston is used. Due to the vertical movement mechanism, the pressing force applied from the contact pusher jig 101 to the upper surface of the semiconductor device 102 is transmitted to the support bar 401 and the force point 404 moves downward, so that the support bar 402 is supported by the lever principle 405. And the action point 406 is moved upward, and the support bar 403 connected to the action point 406 pushes up the piston mechanism 115 by moving the action point 406 upward. The volume decreases and the internal gas or liquid pressure increases. As described above, the pressure of the gas or liquid in the high-pressure chamber 113 is increased, so that distortion of the inspection circuit board 106 is suppressed.

この後に、例えば半導体デバイス102に対する検査が終了して、コンタクトプッシャ治具101を上昇させた場合には、その上昇と同時に、ピストン上下動機構による上記と逆の動きで、コンタクトプッシャ治具101に連動してピストン機構115が下降することによって、高圧室113内の容積が増加し内部の気体もしくは液体の圧力が減少する。   After this, for example, when the inspection of the semiconductor device 102 is completed and the contact pusher jig 101 is raised, simultaneously with the rise, the contact pusher jig 101 is moved to the contact pusher jig 101 by the reverse movement by the piston vertical movement mechanism. When the piston mechanism 115 is moved down in conjunction with it, the volume in the high pressure chamber 113 is increased and the pressure of the internal gas or liquid is decreased.

以上の各実施の形態の半導体デバイス検査治具および半導体デバイス検査方法により、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に多数の電子部品を実装しているために、その部分に従来のような補強板や支持棒を用いることができない場合にも、そのような検査用回路基板の歪みを抑制することができる。   In the semiconductor device inspection jig and the semiconductor device inspection method of each of the above embodiments, a large number of electronic components are mounted on the back surface of the circuit board for inspection in the region facing the back surface of the semiconductor device. Even when a conventional reinforcing plate or support rod cannot be used, such distortion of the circuit board for inspection can be suppressed.

また、従来のように補強板や支持棒を取り付けることによって生じていた補強板や支持棒と電子部品との接点がなくなるため、検査用回路基板の裏面で半導体デバイスの裏面に対向する領域に実装した電子部品の剥離を防止することができる。   In addition, since there is no contact between the reinforcing plate or support bar and the electronic components that had been generated by attaching the reinforcing plate or support bar as in the past, mounting on the back side of the circuit board for inspection facing the back side of the semiconductor device It is possible to prevent peeling of the electronic components.

その結果、半導体デバイス検査治具の不具合によって良品の半導体デバイスに対しても起こり得る不良判定等の検査ミスを防止することができる。   As a result, it is possible to prevent an inspection error such as a defect determination that may occur even for a non-defective semiconductor device due to a defect in the semiconductor device inspection jig.

本発明の半導体デバイス検査治具および半導体デバイス検査方法は、良品の半導体デバイスに対しても起こり得る不良判定等の検査ミスにつながる検査用回路基板の歪みを抑制することができるもので、電源の安定化やアナログ信号のノイズを抑制するための多数の電子部品が実装された検査用回路基板を用いた半導体デバイス検査治具による半導体デバイスの検査技術に有用である。   The semiconductor device inspection jig and the semiconductor device inspection method of the present invention can suppress distortion of a circuit board for inspection that leads to an inspection error such as a defect determination that may occur even for a non-defective semiconductor device. This is useful for a semiconductor device inspection technique using a semiconductor device inspection jig using an inspection circuit board on which a large number of electronic components for stabilization and suppression of analog signal noise are mounted.

本発明の実施の形態1の半導体デバイス検査治具の構成例を示す断面図Sectional drawing which shows the structural example of the semiconductor device inspection jig of Embodiment 1 of this invention 本発明の実施の形態2の半導体デバイス検査治具の構成例を示す断面図Sectional drawing which shows the structural example of the semiconductor device inspection jig of Embodiment 2 of this invention. 本発明の実施の形態3の半導体デバイス検査治具の構成例を示す断面図Sectional drawing which shows the structural example of the semiconductor device inspection jig of Embodiment 3 of this invention. 本発明の実施の形態4の半導体デバイス検査治具の構成例を示す断面図Sectional drawing which shows the structural example of the semiconductor device inspection jig | tool of Embodiment 4 of this invention. 従来の半導体デバイス検査治具の構成例を示す断面図Sectional drawing which shows the structural example of the conventional semiconductor device inspection jig 従来の半導体デバイス検査治具の他の構成例を示す断面図Sectional drawing which shows the other structural example of the conventional semiconductor device inspection jig

符号の説明Explanation of symbols

101 コンタクトプッシャ治具
102 (検査対象の)半導体デバイス
103 ポゴピン
104 ソケット筐体
105 実装部品
106 検査用回路基板
107 ソケット固定用ネジ
108 ソケット固定ネジ止め具
109 治具固定用ネジ
110 ゴムパッキン
111 加圧容器
112 圧力調整弁
113 高圧室
114 (検査用回路基板と接しない)空間
115 ピストン機構
116 ハンドル
117 ハンドル固定治具
118 ネジ機構
201 コンプレッサー装置
202 配管
203 逆止弁
204 穴
301 シリンダ機構
302 (コンタクトプッシャ治具の圧力により可動する)ピストン機構
303 支持棒(1)
304 シリンダ室
401 支持棒(2)
402 支持棒(3)
403 支持棒(4)
404 力点
405 支点
406 作用点
407 ベース台
601 補強版
DESCRIPTION OF SYMBOLS 101 Contact pusher jig 102 (Inspection object) Semiconductor device 103 Pogo pin 104 Socket housing 105 Mounting component 106 Inspection circuit board 107 Socket fixing screw 108 Socket fixing screw stopper 109 Jig fixing screw 110 Rubber packing 111 Pressurization Container 112 Pressure adjusting valve 113 High pressure chamber 114 (Does not contact test circuit board) space 115 Piston mechanism 116 Handle 117 Handle fixing jig 118 Screw mechanism 201 Compressor device 202 Piping 203 Check valve 204 Hole 301 Cylinder mechanism 302 (Contact pusher) Piston mechanism (movable by jig pressure) 303 Support rod (1)
304 Cylinder chamber 401 Support rod (2)
402 Support rod (3)
403 Support rod (4)
404 Force point 405 Support point 406 Action point 407 Base stand 601 Reinforcement plate

Claims (10)

半導体デバイスの電気的特性を検査用回路基板を通じて検査するために、前記半導体デバイスを前記検査用回路基板に電気的にコンタクトさせる機構を有する半導体デバイス検査治具において、
前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧するための機構を有する加圧容器を備え、
前記加圧容器の内部に、前記検査用回路基板における前記裏面の一部と前記加圧容器の内壁とともに、前記検査用回路基板を前記裏面から加圧するための密閉空間を形成する仕切り板を設け、
前記密閉空間の密閉状態を保持したままで前記仕切り板が前記加圧容器の内部を可動することにより、前記密閉空間を加圧するように構成した
ことを特徴とする半導体デバイス検査治具。
In order to inspect the electrical characteristics of the semiconductor device through the inspection circuit board, in the semiconductor device inspection jig having a mechanism for electrically contacting the semiconductor device to the inspection circuit board,
A mechanism for pressing the circuit board for inspection from the back surface against the contact surface with the semiconductor device opposite to the pressure applied to the circuit board for inspection by the contact of the semiconductor device to the circuit board for inspection. A pressure vessel having
A partition plate for forming a sealed space for pressurizing the circuit board for inspection from the back surface together with a part of the back surface of the circuit board for inspection and the inner wall of the pressure container is provided inside the pressure container. ,
A semiconductor device inspection jig configured to pressurize the sealed space by moving the inside of the pressurized container while the sealed state of the sealed space is maintained.
請求項1記載の半導体デバイス検査治具であって、
前記密閉空間への加圧を前記半導体デバイスの前記検査用回路基板へのコンタクト動作に連動させる機構を備えた
ことを特徴とする半導体デバイス検査治具。
The semiconductor device inspection jig according to claim 1,
A semiconductor device inspection jig comprising a mechanism for interlocking pressurization of the sealed space with a contact operation of the semiconductor device to the circuit board for inspection.
半導体デバイスの電気的特性を検査用回路基板を通じて検査するために、前記半導体デバイスを前記検査用回路基板に電気的にコンタクトさせる機構を有する半導体デバイス検査治具において、
前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧するための機構を有する加圧容器を備え、
前記検査用回路基板における前記裏面の一部と前記加圧容器の内壁とで、前記検査用回路基板を前記裏面から加圧するための密閉空間を形成し、
前記加圧容器に前記密閉空間とその外部が繋がる少なくとも1個の貫通穴を設け、
前記密閉空間を前記貫通穴を通じて前記密閉空間の外部から加圧するよう構成した
ことを特徴とする半導体デバイス検査治具。
In order to inspect the electrical characteristics of the semiconductor device through the inspection circuit board, in the semiconductor device inspection jig having a mechanism for electrically contacting the semiconductor device to the inspection circuit board,
A mechanism for pressing the circuit board for inspection from the back surface against the contact surface with the semiconductor device opposite to the pressure applied to the circuit board for inspection by the contact of the semiconductor device to the circuit board for inspection. A pressure vessel having
A part of the back surface of the circuit board for inspection and an inner wall of the pressurized container form a sealed space for pressurizing the circuit board for inspection from the back surface,
The pressurized container is provided with at least one through hole connecting the sealed space and the outside thereof,
A semiconductor device inspection jig configured to pressurize the sealed space from the outside of the sealed space through the through hole.
請求項3記載の半導体デバイス検査治具であって、
前記密閉空間を前記密閉空間の外部から前記貫通穴に向かう一方向のみに加圧するよう構成した
ことを特徴とする半導体デバイス検査治具。
A semiconductor device inspection jig according to claim 3,
A semiconductor device inspection jig configured to pressurize the sealed space only in one direction from the outside of the sealed space toward the through hole.
請求項3または請求項4記載の半導体デバイス検査治具であって、
前記密閉空間への加圧を前記半導体デバイスの前記検査用回路基板へのコンタクト動作に連動させる機構を備えた
ことを特徴とする半導体デバイス検査治具。
A semiconductor device inspection jig according to claim 3 or claim 4,
A semiconductor device inspection jig comprising a mechanism for interlocking pressurization of the sealed space with a contact operation of the semiconductor device to the circuit board for inspection.
請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、
前記密閉空間の加圧による圧力を調整する圧力調整弁を設けた
ことを特徴とする半導体デバイス検査治具。
A semiconductor device inspection jig according to any one of claims 1 to 5,
A semiconductor device inspection jig comprising a pressure adjustment valve for adjusting a pressure due to pressurization of the sealed space.
請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、
前記密閉空間を加圧するために満たされた媒体は気体もしくは液体とする
ことを特徴とする半導体デバイス検査治具。
A semiconductor device inspection jig according to any one of claims 1 to 5,
A semiconductor device inspection jig, wherein a medium filled to pressurize the sealed space is gas or liquid.
請求項1〜請求項5のいずれかに記載の半導体デバイス検査治具であって、
前記加圧容器が剛体である
ことを特徴とする半導体デバイス検査治具。
A semiconductor device inspection jig according to any one of claims 1 to 5,
A semiconductor device inspection jig, wherein the pressurized container is a rigid body.
請求項1または請求項2記載の半導体デバイス検査治具を用いて、
前記仕切り板を前記加圧容器の内部で可動させることにより、前記密閉空間の密閉状態を保持したままで前記密閉空間を加圧し、
前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧する
ことを特徴とする半導体デバイス検査方法。
Using the semiconductor device inspection jig according to claim 1 or 2,
By moving the partition plate inside the pressurized container, the sealed space is pressurized while maintaining the sealed state of the sealed space,
The circuit board for inspection is pressed from the back surface against the contact surface with the semiconductor device, opposite to the pressure applied to the circuit board for inspection by the contact of the semiconductor device to the circuit board for inspection. Semiconductor device inspection method.
請求項3または請求項4または請求項5記載の半導体デバイス検査治具を用いて、
前記密閉空間の外部から前記貫通穴を通じて前記密閉空間を加圧することにより、
前記半導体デバイスの前記検査用回路基板へのコンタクトにより前記検査用回路基板に加わる圧力に対向して、前記検査用回路基板を前記半導体デバイスとのコンタクト面に対して裏面から加圧する
ことを特徴とする半導体デバイス検査方法。
Using the semiconductor device inspection jig according to claim 3 or claim 4 or claim 5,
By pressurizing the sealed space from the outside of the sealed space through the through hole,
The circuit board for inspection is pressed from the back surface against the contact surface with the semiconductor device, opposite to the pressure applied to the circuit board for inspection by the contact of the semiconductor device to the circuit board for inspection. Semiconductor device inspection method.
JP2006139634A 2006-05-19 2006-05-19 Semiconductor device inspecting tool and semiconductor device inspection method Pending JP2007309806A (en)

Priority Applications (1)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011252792A (en) * 2010-06-02 2011-12-15 Fuji Electric Co Ltd Testing device and testing method
US9562929B2 (en) 2014-05-13 2017-02-07 Mitsubishi Electric Corporation Measurement device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011252792A (en) * 2010-06-02 2011-12-15 Fuji Electric Co Ltd Testing device and testing method
US20110309850A1 (en) * 2010-06-02 2011-12-22 Fuji Electric Co., Ltd. Testing device and testing method
CN102313864A (en) * 2010-06-02 2012-01-11 富士电机株式会社 Testing apparatus and method of testing
US8610446B2 (en) 2010-06-02 2013-12-17 Fuji Electric Co., Ltd. Testing device and testing method
US9562929B2 (en) 2014-05-13 2017-02-07 Mitsubishi Electric Corporation Measurement device

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