JP2007295200A - Flicker correcting method and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flicker correcting method for highly accurately performing flicker correction and an imaging apparatus. <P>SOLUTION: An image pickup signal is generated by accumulating electric charges in an imaging element in accordance with a frame rate, two sorts of flicker phase image pickup signals are generated by adding flickers having respectively different phases to an image pickup signal of a current frame, a correction phase error is detected by comparing the image pickup signal of the current frame with an image pickup signal of a succeeding frame, and two sorts of flicker amplitude image pickup signals are generated by adding flickers having respectively different amplitudes to the image pickup signal of the current frame. Then a correction amplitude error is detected by comparing the image pickup signal of the current frame with the image pickup signal of the succeeding frame, an amplitude signal for controlling the amplitude of a flicker correction signal is generated, the flicker correction signal is generated by integrating a specific period determined on the basis of relation among the frequency of a light source, the charge accumulation time of the imaging element and the charge accumulation timing of the imaging element from correction waveform data corresponding to a correction phase error signal and multiplying an amplitude signal by the integrated data, and flicker correction is performed by adding the flicker correction signal to the image pickup signal of the succeeding frame. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a flicker correction method and an imaging apparatus that perform flicker correction by adding a flicker correction signal to an imaging signal.

  Conventionally, an image sensor has different charge accumulation timings in units of planes or lines. In general, a method for adjusting charge accumulation timing in units of planes is called a global shutter method, and a method for adjusting charge accumulation timing in units of lines is called a rolling shutter method. In the past, CCD image sensors employing a global shutter system have been the mainstream image sensors. Recently, however, CMOS image sensors that consume less power and have fewer parts than CCD image sensors and can be produced at low cost have attracted attention. This CMOS image sensor often employs a rolling shutter system due to structural problems. In either method, when shooting under a light source that repeatedly blinks, there is a difference in brightness (surface flicker) on the entire surface and a difference in brightness (in-plane flicker) on a line-by-line basis due to the difference in charge accumulation timing at the sensor. appear.

  FIG. 13 shows the difference in the amount of accumulated charge in sensors that employ the global shutter system, and FIG. 14 shows an example of a surface flicker image that appears by the global shutter system. FIG. 15 shows a difference in the amount of accumulated charge by the rolling shutter system, and FIG. 16 shows an example of an in-plane flicker image.

  For example, when imaging using a CMOS camera, when a light source that illuminates a subject repeats blinking with a period of 1/2 of an AC power supply period, for example, an image from a solid-state image sensor The video signal formed based on the output signal includes a flicker component that appears as a periodic increase / decrease in luminance level.

Here, under the luminance X of the light source that illuminates the subject in FIG. 15, the signal charge corresponding to one line period of the video signal is accumulated in the light receiving portion L _n of the solid-state image sensor unit. In the period from the period a to the period b (period a + b), the signal charge is accumulated, and the light receiving portion L _{n + 1} that accumulates the signal charge corresponding to the next one line period of the video signal is transferred to the period b to the period c (c = if the signal charge in the period (the period b + c) until a) is accumulated, the amount of signal charge accumulated in the period a + b on the light-receiving portion L _n is proportional to the sum of the areas Aa area Ab (area Aa + Ab) The amount of signal charges accumulated in the light receiving portion L _{N + 1} in the period b + c is proportional to the sum of the area Ab and the area Ac (area Ab + Ac). Here, each of the period a and the period c corresponds to, for example, one line period of the video signal, and each of the period a + b and the period b + c corresponds to, for example, one frame period of the video signal. .

That is, the charge accumulation time (exposure time) of each of the light receiving portion L _n and the light receiving portion L _{n + 1} is equal in length corresponding to, for example, one frame period of the video signal, and the timing is, for example, The video signal is shifted by a period corresponding to one line period. In the case shown in FIG. 15, the luminance fluctuation period (1/2 of the AC power supply period) of the light source that illuminates the subject and the frame period of the video signal are not related to each other as an integral multiple of the other. .

As is clear from FIG. 15, the area Aa + Ab and the area Ab + Ac include the area Ab in common, and have the area Aa and the area Ac, respectively. Therefore, the amount of signal charge accumulated in the light receiving portion L _n in the period a + b and the amount of signal charge accumulated in the light receiving portion L _{n + 1} in the period b + c differ depending on the area Aa and the area Ac.

  As described above, in the fixed image sensor unit, the signal charge corresponding to one line period of the video signal accumulated in the light receiving portion where the signal charge corresponding to each line period of the video signal is accumulated and sent out. The amount changes periodically according to the periodic variation of the luminance of the light source. Then, a periodic change in the amount of signal charge corresponding to one line period of the video signal accumulated in the light receiving portion appears as a periodic change in the luminance level of the video signal, and a flicker component appears in the video signal. Will be included.

  An image for one frame period reproduced based on a video signal including a flicker component as described above has, for example, light and dark stripes in the line direction (horizontal direction) as shown in FIG. It is said.

  Patent Document 1 describes a method of detecting a flicker component from an input image and correcting a gain based on the detected flicker component in order to correct the flicker component.

JP 2004-222228 A

  The flicker component included in the imaging signal imaged under such a periodically lit light source can be approximated by a sine wave. Therefore, conventionally, as a method for removing flicker, a method of approximating a flicker component by a sine wave is widely used.

  In addition, the applicant stores sine wave data that approximates the flicker component in advance, calculates a correction value from the captured image based on this data, and removes the flicker component by adding the correction value from the captured image. Japanese Patent Application No. 2004-330299 has previously proposed a flicker correction method for generating a captured image signal.

  By the way, since the flicker component included in the video signal changes according to the shutter speed of the imaging device, it may not be approximated by a sine wave.

  As a specific example, FIG. 17A shows a flicker component when the frame rate is 30 fps and no shutter is provided, and FIG. 17B shows a case where the frame rate is 30 fps and the shutter speed is 1/1000 [s]. FIG. 17C shows the flicker component when the frame rate is 30 fps and the shutter speed is 1/2000 [s]. The flicker components shown in FIG. 17 are all under conditions where the frame rate is fixed at 30 fps. 18A and 18B are diagrams showing flicker components according to exposure time and charge accumulation timing. FIG. 18A is a diagram showing a flicker component when the shutter speed is faster than that in FIG. 18B. Thus, the exposure time varies depending on the shutter speed, and the charge storage capacity varies depending on the difference in exposure time.

  Thus, when the light from a fluorescent lamp or the like is approximated by the absolute value of a sine wave, the flicker component can be approximated sufficiently accurately if the frame rate and the shutter speed are slow, but the approximation accuracy increases as the shutter speed increases. Therefore, the flicker component cannot be sufficiently reduced as the shutter speed increases.

  The present invention has been proposed in view of such circumstances, and an object of the present invention is to provide a flicker correction method and an imaging apparatus that perform flicker correction with high accuracy even when the shutter speed and / or the frame rate change. To do.

  In order to solve the above-described problem, a flicker correction method according to the present invention is a flicker correction method for correcting an imaging signal including a flicker component according to a frequency of a light source, and a predetermined imaging device is provided according to a frame rate. An image pickup signal is generated by accumulating charges, and two types of flicker phase image pickup signals are generated by adding flickers having different phases to the image pickup signal of the current frame that has been subjected to flicker correction. A correction phase error is detected by comparing with an image signal of the next frame not subjected to flicker correction, and two types of flicker amplitude image signals are generated by adding flickers having different amplitudes to the image signal of the current frame subjected to the flicker correction. And comparing the generated two types of flicker amplitude image pickup signals with the image pickup signals of the next frame not subjected to flicker correction. A correction amplitude error is detected, an amplitude signal for controlling the amplitude of the flicker correction signal in a direction in which the detected correction amplitude error is reduced is generated, and the correction waveform data approximating the flicker component is stored in the storage means The correction waveform data is read based on the correction phase error signal, and based on the relationship between the frequency of the light source, the charge accumulation time of the image sensor, and the charge accumulation timing of the image sensor from the read correction waveform data. The flicker correction signal is generated by integrating a specific period determined by multiplying the amplitude signal and adding the flicker correction signal to the imaging signal of the next frame. To do.

  The image pickup apparatus according to the present invention includes an image pickup unit that generates an image pickup signal by accumulating electric charges in the image pickup element according to the frame rate, and corrects the image pickup signal including a flicker component according to the frequency of the light source. An image pickup apparatus, wherein flicker correction means performs flicker correction by adding a flicker correction signal to the image signal generated by the image pickup means for each frame, and picks up the current frame after flicker correction by the flicker correction means. Two types of flicker amplitude imaging signals are generated by adding flickers having different phases to the signal, and the generated two types of flicker amplitude imaging signals are compared with the imaging signal of the next frame not subjected to flicker correction, thereby correcting the correction phase error. Correction phase error detection means for detecting, and an image signal of the current frame flicker corrected by the flicker correction means. Two types of flicker image signals are generated by adding flickers having different amplitudes to each other, and a corrected amplitude error is detected by comparing the generated two types of flicker amplitude image pickup signals with the image pickup signal of the next frame not subjected to flicker correction. Correction amplitude error detection means, flicker amplitude adjustment means for generating an amplitude signal for controlling the amplitude of the flicker correction signal in a direction in which the correction amplitude error detected by the correction amplitude error detection means decreases, and the correction phase error detection means And a flicker correction signal generation means for generating the flicker correction signal based on the amplitude signal generated by the flicker amplitude adjustment means. The flicker correction means approximates the flicker component. Storage means storing the corrected waveform data and the above-described correction phase error signal. From the corrected waveform data read from the means, the amplitude signal is multiplied by integrating a specific period determined based on the relationship between the frequency of the light source, the charge accumulation time of the image sensor, and the frame rate of the image signal. And a flicker correction signal generating means for generating the flicker correction signal.

  The present invention generates a flicker correction signal obtained by multiplying the correction waveform data obtained by integrating a specific period determined based on the relationship between the frequency of the light source, the charge accumulation time of the image pickup device, and the frame rate of the image pickup signal with the amplitude signal. Therefore, even if the shutter speed and the frame rate of the imaging signal change, the flicker component can be corrected with high accuracy.

  Hereinafter, specific embodiments to which the present invention is applied will be described in detail with reference to the drawings. Needless to say, the present invention is not limited to the following examples, and can be arbitrarily changed without departing from the gist of the present invention.

  The present invention is applied to, for example, an imaging apparatus 100 configured as shown in FIG.

  The imaging apparatus 100 receives an analog imaging signal output from the imaging element 10R for imaging a red image, the imaging element 10G for imaging a green image, the imaging element 10B for imaging a blue image, and the imaging elements 10R, 10G, and 10B. A / D converters 20R, 20G, and 20B to be digitized, flicker correction circuits 30R, 30G, and 30B to which imaging signals DV_R, DV_G, and DV_B digitized by the A / D converters 20R, 20G, and 20B are supplied. The correction phase error detectors 40R, 40G, and 40B and the correction amplitude error signals CV_R, CV_G, and CV_B detected by the correction amplitude error detectors 50R, 50G, and 50B are provided.

  Each of the correction phase error detectors 40R, 40G, and 40B includes imaging signals CV_R, CV_G, and CV_B that have been subjected to flicker correction by the flicker correction circuits 30R, 30G, and 30B, and flicker amplitudes that have been adjusted by the flicker amplitude adjusters 60R, 60G, and 60B. Signals A_R, A_G, and A_B are supplied, and the imaging signals CV_R from the digitized imaging signals DV_R, DV_G, DV_B, flicker corrected imaging signals CV_R, CV_G, CV_B, and flicker amplitude signals A_R, A_G, A_B. , CV_G, CV_B are detected to generate correction phase error signals E_R, E_G, E_B, and the generated correction phase error signals E_R, E_G, E_B are used as flicker correction circuits 30R, 30G, 30B and correction amplitudes. Used for error detectors 50R, 50G, and 50B To.

  The corrected amplitude error detectors 50R, 50G, and 50B are adjusted by the imaging signals CV_R, CV_G, and CV_B that have been subjected to the flicker correction by the flicker correction circuits 30R, 30G, and 30B, and the flicker amplitude adjusters 60R, 60G, and 60B. Flicker amplitude signals A_R, A_G, A_B are supplied, and the digitized imaging signals DV_R, DV_G, DV_B and flicker corrected imaging signals CV_R, CV_G, CV_B, flicker amplitude signals A_R, A_G, A_B, correction phase Corrected amplitude error signals C_R, C_G, and C_B are generated by detecting corrected amplitude errors of the respective imaging signals CV_R, CV_G, and CV_B from the error signals E_R, E_G, and E_B, and the generated corrected amplitude error signals C_R, C_G, and C_B are flickered. Used for amplitude adjusters 60R, 60G, 60B To.

  The flicker amplitude adjusters 60R, 60G, 60B generate flicker amplitude signals A_R, A_G, A_B from the corrected amplitude error signals C_R, C_G, C_B, and the generated flicker amplitude signals A_R, A_G, A_B are flicker correction circuits 30R, 30G. , 30B, correction phase error detectors 40R, 40G, 40B and correction amplitude error detectors 50R, 50G, 50B.

  In the imaging apparatus 100, a flicker correction circuit 30 * having a configuration as shown in FIG. 2 is used for each of the flicker correction circuits 30R, 30G, and 30B. Hereinafter, * represents R, G, and B as a representative.

  The flicker correction circuit 30 * includes an address calculator 31 * to which the correction phase error signal E_ * is supplied from the correction phase error detector 40 *, and a correction value calculation to which the address AD calculated by the address calculator 31 * is supplied. 32 *, a multiplier 33 * to which the flicker correction data FD calculated by the correction value calculator 32 * and the flicker amplitude signal A_ * generated by the flicker amplitude adjuster 60 * are supplied, and the multiplier 33 *. The level adjuster 34 * to which the flicker correction signal FDA multiplied by the flicker amplitude signal A_ * is supplied, and the low-pass filter (LPF) to which the imaging signal DV_ * digitized by the A / D converter 20 * is supplied. 35 * and an arithmetic unit 36 *, and the imaging signal DV_ * digitized by the A / D converter 20 * is the low pass filter. Data (LPF) is supplied to the level adjuster 34 * through 35 *, flicker correction value CFD which is generated by the level adjuster 34 * that are supplied to the calculator 36 *. Then, the calculator 36 * outputs the video signal CV_ * subjected to flicker correction according to the video signal DV_ * and the flicker correction value CFD.

  In the flicker correction circuit 30 * having such a configuration, the address calculation unit 31 * includes a ROM provided in the correction value calculator 32 * based on the correction error signal E_ * supplied from the correction error detector 40 *. Address AD is calculated.

  This address calculator 31 * calculates the address of the current line by calculating the address of the first line of the frame of interest from the power supply frequency and the frame rate, and adding the address increment for each advance of one line to that address. To do. Specifically, when the power supply frequency is 50 Hz, the frame rate is 30 Hz, and the number of clocks in the vertical direction of the image sensor 10 * is 1125 clk (hereinafter, in the specific example, the power frequency, the frame rate, and the number of clocks of the image sensor 10 * are the same. ), The flicker period T for one flicker is 337.5 lines (T = 30 [Hz] × 1125 [cLk] / (50 [Hz] × 2) = 337.5 [cLk]). In addition, flicker data obtained by dividing one cycle into 512 is held in the ROM in the system, and the ROM address increases by about 1.51703 (512 / 337.5≈1.51703) each time one line is advanced. become. That is, when the address in the first line is 0 and the address advances to 100 lines, the address on that line becomes 152 (0 + 1.51703 × 100≈152).

  As shown in FIG. 3, the correction value calculator 32 * stores a correction waveform data storage unit that stores correction waveform data obtained by approximating a flicker component to a sine wave based on the address AD calculated by the address calculation unit 31 *. 321 * and an integrator 322 * for integrating a specific period from the correction waveform data read from the correction waveform data storage unit 321 *, and the correction waveform data integrated by the integrator 322 * is flicker correction data. Output as FD.

  Here, the correction waveform data stored in the correction waveform data storage unit 321 * of the correction value calculator 32 * supplies a part of the waveform to the integrator 322 * in order to use periodicity. . The flicker correction data FD is a value determined in line units and is updated once per line.

  The correction value calculator 32 * models the relationship between the power source frequency L [Hz] of the light source shown in FIG. 4 and the shutter speed S [s], which is the charge accumulation time of each image sensor 10 *, and the charge accumulation timing. In addition to the corrected waveform data approximated by waves, this model is used to calculate flicker correction data FD that enables more accurate flicker correction than in the prior art.

  FIG. 4 models the relationship between the power source frequency L [Hz] of the light source, the shutter speed S [s], which is the charge accumulation time of each image sensor 10 *, and the charge accumulation timing. Specifically, the integration interval of the correction waveform data is the charge accumulation time, that is, the shutter speed S [s]. Further, the deviation of the timing for integrating the correction waveform data, that is, the timing for accumulating the charge is a value 1 / (F × V )

  Here, when the number of addresses of the correction waveform data corresponding to the power source cycle 1 / L [s] of the light source is W, the number of addresses of the correction waveform data corresponding to each integration interval is 2 × L × S × W, and the correction waveform The data integration timing is 2 × L × W / (F × V).

  Then, in the correction value detection unit 32 *, the number of correction waveform data addresses corresponding to each integration interval (2 × L × S × W) and its integration timing (2 × L × W / (F × V)) Based on the above, the integrator 322 * calculates the flicker correction data FD.

  As described above, the correction value calculation unit 32 * calculates the appropriate flicker correction data FD based on the above-described model in addition to the correction waveform data approximated by the sine wave, thereby enabling more accurate flicker correction. To do. Therefore, the correction value detector 32 * can calculate appropriate flicker correction data FD according to an arbitrary frame rate and shutter speed. In particular, under the condition of imaging at a high frame rate and a high shutter speed, conventionally, the approximation accuracy by the sine wave is reduced, and therefore the high-precision flicker correction data FD cannot be calculated. The correction value calculation unit 32 * according to can perform flicker correction with high accuracy even under such conditions.

  Here, the frame rate, the shutter speed, and the power supply frequency are all held in a storage unit (not shown) included in the imaging apparatus 100. The input to the storage unit is performed by a manual setting using a switch or the like provided in the imaging apparatus 100 and a setting by transmission from an external apparatus. The frame rate, shutter speed, and power supply frequency are read from the storage unit by a control unit (not shown) that controls the operation of the entire imaging apparatus 100, and are supplied to the correction value calculation unit 32 *.

  In addition, since the flicker level changes according to the luminance value of each pixel value, the level is adjusted for each pixel using the input imaging signal DV_ *. However, the imaging signal DV_ * also includes a noise component. This level adjustment is affected by noise.

  Therefore, in the flicker correction circuit 30 * in the imaging apparatus 100, noise is removed from the imaging signal DV_ * by passing through a low-pass filter (LPF) 35 *, and the imaging signal DV_ * ′ from which the noise is removed and the flicker amplitude signal A_ *. The correction value CFD of each pixel not affected by noise is calculated from the flicker correction data FDA multiplied by.

  In this embodiment, the correction value also increases in a minor manner according to the pixel value. This is because the flicker level tends to increase linearly according to the pixel value. Further, since flicker is not measured when the pixel value is very small or very large, the calculation including the feature is executed, but the present invention is not limited to this characteristic.

  In the flicker correction circuit 30 *, the computing unit 35 * adds the correction value CFD of each pixel to the imaging signal DV_ * to obtain the imaging signal CV_ * in which the flicker component is corrected.

  Next, a correction error detection algorithm in the imaging apparatus 100 will be described with reference to FIG. Specifically, the detection algorithm of the phase correction error will be described first with reference to FIG. 5A.

  First, it is assumed that the flicker of a certain frame image (here, the nth frame image) can be corrected at a correct level. After outputting the “nth frame corrected image”, the flicker state of the n + 1th frame image is predicted and a flicker component is added to the “nth frame corrected image”. Let the flicker image thus formed be an image A. At the same time, the flicker state of the (n + 1) th frame is predicted, and a flicker component with a further shifted address is added. Let the flicker image thus formed be an image B.

  Here, when the difference between the two images and the “n + 1th frame image” before the correction including the flicker component is taken, only the motion component of the subject is output as the difference image. However, the difference value for the image B is output as a difference image for both the motion component and the flicker component of the subject. For this reason, the difference value obtained from the image A is considered to be smaller than the difference value obtained from the image B. On the other hand, when the difference value obtained from the image B is smaller than the difference value obtained from the image A, it is considered that the flicker phase is correctly predicted by shifting the address. In other words, the smaller the difference value is, the more accurately the flicker phase is predicted, so that the phase correction error can be finally converged within an appropriate range by shifting the address in the direction where the difference value becomes smaller. it can.

  Next, an amplitude correction error detection algorithm will be described with reference to FIG. 5B.

  First, the flicker of a certain frame image (here, the nth frame image) is corrected at a correct level. Subsequently, the next frame (here, the (n + 1) th image) is predicted, the flicker level of the predicted next frame is set to the same level as the nth frame, and the (n + 1) th frame flicker is added to the corrected image. Let the flicker image thus formed be an image A. At the same time, the level is made stronger than the nth frame, and the flicker of the (n + 1) th frame is added to the corrected image. Let the flicker image thus formed be an image B.

  Here, if the difference between the two images and the “image of the (n + 1) th frame” before the correction including the flicker component is taken, only the motion component of the subject is output as the difference value for the image A. The difference value with respect to the image B is output as two components, a motion component of the subject and a flicker component. For this reason, the difference value obtained from the image A is considered to be smaller than the difference value obtained from the image B. On the other hand, when the difference value obtained from the image B is smaller than the difference value obtained from the image A, it is considered that adding a stronger level than the image A correctly predicts the flicker amplitude. It is done. In other words, the smaller the difference value is, the more accurately the flicker amplitude is predicted, so that the amplitude correction error can be finally converged within an appropriate range by adding a level in the direction in which the difference value becomes smaller. .

  The correction phase error detectors 40R, 40G, and 40B and the correction amplitude error detectors 50R, 50G, and 50B are configured according to the above algorithm.

  In this imaging apparatus 100, the correction phase error detectors 40R, 40G, and 40B employ a correction phase error detector 40 * configured as shown in FIG. 6 according to the above algorithm.

  On the other hand, the correction phase error detector 40 * is a flicker addition signal to which the imaging signal CV_ * flicker corrected by the flicker correction circuit 30 * and the flicker amplitude signal A_ * generated by the flicker amplitude adjuster 60 * are supplied. Generation units 41A *, 41B *, line integrators 42A *, 42B * to which flicker additional signals FDV1, FDV2 generated by the flicker signal generation units 41A *, 41B * are supplied, and line integrators 42A *, 42B * The differential data detectors 44A *, 44B * to which the line data LD12, LD22 read from the memories 43A *, 43B * and the line data LD12, LDB read from the memories 43A *, 43B * are supplied. Line product supplied with the imaging signal DV_ * digitized by the A / D converter 20 * 45 *, integrators 46A * and 46B * supplied with difference data DD1 and DD2 detected by the respective difference detectors 44A * and 44B *, and integration data ID1 obtained by the integrators 46A * and 46B *. Comparator 47 * to which ID2 is supplied is provided, and line data LD3 obtained by the line integrator 45 * is supplied to each of the difference detectors 44A * and 44B * to obtain a correction phase obtained as a comparison output by the comparator 47 *. The error signal E_ * is supplied to each of the flicker additional signal generation units 41A * and 41B *.

  Each flicker additional signal generation unit 41A *, 41B * is supplied with an address calculation unit 411A *, 411B * and each address calculation unit 411A *, 411B to which a corrected phase error signal E_ * obtained as a comparison output by the comparator 47 * is supplied. Address converters 412A * and 412B * to which addresses AD11 and AD21 calculated by * are supplied, and correction value calculator 413A * to which addresses AD12 and AD22 calculated by the address converters 412A * and 412B * are supplied. 413B *, multipliers 414A * and 414B * supplied with the flicker amplitude signal A_ * generated by the flicker amplitude adjuster 60 *, and the flicker multiplied by the flicker amplitude signal A_ * by the multipliers 414A * and 414B *. Level adjusters 415A *, 4 to which data FDA1, FDA2 are supplied 5B *, and the imaging signal DV_ * digitized by the A / D converter 20 * is supplied to the level adjusters 415A * and 415B * via the low-pass filters (LPF) 416A * and 416B *. Correction values CFD1 and CFD2 generated by the adjusters 415A * and 415B * are supplied to the calculators 417A * and 417B *.

  In the corrected phase error detector 40 * having such a configuration, addresses AD11 and AD21 of ROM provided in the corrected phase error detector 40 * by the address calculation units 411A * and 411B * based on the correction error signal E_ *. Calculate Here, the calculated address is an address obtained by shifting the start address of the flicker of the next frame in the plus direction and the minus direction. These addresses are calculated by the same calculation as the address calculator 31 * in the flicker corrector 30 *. The ROM provided in the correction error detector 40 * is the same as the ROM provided in the flicker correction circuit 30 *.

  The address converters 412A * and 412B * convert the addresses AD11 and AD21 calculated by the address calculators 411A * and 411B * into addresses AD12 and AD22 that can reproduce the flicker of the next frame. That is, the address is converted into an address whose phase is reversed. The addresses AD12 and AD22 converted by the address converters 412A * and 412B * are predicted for flicker of the next frame and are not for correcting flicker.

  The correction value calculators 413A * and 413B * calculate flicker correction data FD1 and FD2 based on the addresses AD12 and AD22 converted by the address converters 412A * and 412B *. The flicker data FD1 and FD2 are values determined in units of lines as in the flicker correction circuit 30 *. The correction value calculators 413A * and 413B * are also provided in the flicker correction circuit 30 * and have the same configuration as the correction value calculator 32 *.

  The correction phase error detector 40 * removes noise from the flicker-corrected imaging signal CV_ * by passing the low-pass filters (LPF) 416A * and 416B * in the flicker additional signal generation units 41A * and 41B *, and the noise The image signal CV_ * from which the signal is removed is supplied to the level adjusters 415A * and 415B *. In the level adjusters 415A * and 415B *, the correction values CFD1 and CFD2 of each pixel not affected by noise are obtained from the image signal CV_ * without noise and the flicker data FDA1 and FDA2 calculated by the multipliers 414A * and 414B *. Is calculated.

  The level adjusters 415A * and 415B * also have the same configuration as the level adjuster 34 * provided in the flicker correction circuit 30 *.

  The calculators 417A * and 417B * add the correction values CFD1 and CFD2 of each pixel to the imaging signal CV_ * subjected to flicker correction to generate flicker addition signals FDV1 and FDV2 for the next frame. The arithmetic units 417A * and 417B * have the same configuration as the arithmetic unit 36 * provided in the flicker correction circuit 30 *.

  Then, the line integrators 42A * and 42B * integrate the areas where the flicker addition signals FDV1 and FDV2 of the next frame are respectively integrated to calculate line data LD11 and LD21. The region here can take any value as long as it is a range of an image acquired in the horizontal direction, and the accuracy of correction error detection can be improved by taking a wide range. In the vertical direction, it may be an integral multiple of the flicker period of flicker entering one screen. Specifically, it can be 1000 pixels in the horizontal direction, 675 pixels in the vertical direction (337.5 × 2.0), and the like. Here, 337.5 lines refers to one flicker cycle of flicker when the power frequency is 50 [Hz], the frame rate is 30 [Hz], and the number of lines in the vertical direction of the sensor is 1125 [lines] ( 30 [Hz] × 1125 [line] / (50 [Hz] × 2) = 337.5 [line]).

  The line data LD12 and LD21 calculated by the line integrators 42A * and 42B * are stored in the memories 43A * and 43B * until the imaging signal DV_ * of the next frame is input, and the imaging signal DV_ * of the next frame is stored. When input, the same area as the area where the flicker addition signals FDV1 and FDV2 are integrated is line-integrated by the line integrator 45 * to calculate line data LD3.

  The line data LD12, LD22 stored in the memories 43A *, 43B * and the line data LD3 of the imaging signal DV_ * of the next frame corresponding to the lines are input to the difference detectors 44A *, 44B *, respectively, and the difference data DD1, DD2 Get.

  The integrators 46A * and 46B * obtain integrated data ID1 and ID2 by integrating the two difference data DD1 and DD2, respectively.

  Then, the comparator 47 * compares these integrated data ID1 and ID2 to determine whether the correct flicker is predicted when the address is shifted to plus or minus. For example, if the integral data ID * with the positive address is smaller than the integral data ID * with the negative address, the corrected phase error signal E_ * is output so that the address is positive.

  The correction phase error signal E_ * is input to the flicker correction circuit 30 * and the correction amplitude error detector 50 *, and the correction error is minimized by shifting the address in the correct direction.

  In this imaging apparatus 100, the corrected amplitude error detectors 50R, 50G, and 50B use a corrected amplitude error detector 60 * configured as shown in FIG. 7 according to the above algorithm.

  The correction amplitude error detector 50 * is a flicker additional signal to which the imaging signal CV_ * whose flicker component is corrected by the flicker correction circuit 30 * and the flicker amplitude signal A_ * generated by the flicker amplitude adjuster 60 * are supplied. Generation units 51A *, 51B *, line integrators 52A *, 52B * supplied with flicker addition signals FDV31, FDV32 generated by the flicker addition signal generation units 51A *, 51B *, and line integrators 52A *, 52B Memory 53A *, 53B * supplied with line data LD31, LD32 integrated by *, and difference detectors 54A *, 54B * supplied with line data LD31, LD32 read from each memory 53A *, 53B * The imaging signal DV_ * digitized by the A / D converter 20 * is supplied. In integrator 55 * and comparators supplied with integrated data ID31 and ID32 obtained by integrators 56A * and 56B * supplied with difference data DD31 and DD32 detected by respective difference detectors 54A * and 54B * The line data LD3 obtained by the line integrator 55 * is supplied to the difference detectors 54A * and 54B *.

  The flicker additional signal generators 51A * and 51B * receive address calculators 511A *, 511B *, to which the corrected phase error signal E_ * obtained as a comparison output by the comparator 47 * in the corrected phase error detector 40 * is supplied. Correction value calculation in which the address converters 512A * and 512B * supplied with the address AD31 calculated by the address calculators 511A * and 511B * and the address AD32 calculated by the address converters 512A * and 512B * are supplied. 513A *, 513B *, the amplitude amplifier 514A * supplied with the flicker amplitude signal A_ * generated by the flicker amplitude adjuster 60 *, the amplitude attenuator 514B *, and the correction value calculators 513A *, 513B *. Multipliers 515A * and 515B * supplied with the flicker data FD31 Image data digitized by the level adjusters 516A * and 516B * supplied with the flicker data FDA31 and FDA32 multiplied by the flicker amplitude signal A_ * by the multipliers 515A * and 515B *, and the A / D converter 20 *. The signal DV_ * is supplied to the level adjusters 516A * and 516B * via the low pass filters (LPF) 517A * and 517B *, and correction values CFD31 and CFD32 generated by the level adjusters 516A * and 516B * are obtained. The calculators 518A * and 518B * are supplied.

  In the corrected amplitude error detector 50 * having such a configuration, the flicker addition signal generation units 51A * and 51B * use the corrected amplitude error detectors 511A * and 511B * based on the corrected phase error signal E_ *. 50 * The address AD31 of the ROM provided inside is calculated. The address calculated here is the head address of the flicker component of the next frame. This address is calculated by the same calculation as the address calculator 31 * in the flicker correction circuit 30 *. The ROM provided in the correction amplitude error detector 50 * is the same as the ROM provided in the flicker correction circuit 30 *.

  The address converters 512A * and 512B * convert the addresses AD31 calculated by the address calculators 511A * and 511B * into addresses that can reproduce the flicker of the next frame. Specifically, the input address AD31 is converted into an address AD32 obtained by inverting the phase. The address AD32 converted by the address converters 512A * and 512B * is a prediction of the flicker of the next frame and is not for correcting the flicker.

  The correction value calculators 513A * and 513B * calculate the flicker data FD31 based on the address AD32 converted by the address converters 512A * and 512B *. The flicker data FD31 is also a value determined in units of lines as in the flicker correction circuit 30 *. The correction value calculators 513A * and 513B * also have the same configuration as the correction value calculator 32 * provided in the flicker correction circuit 30 *.

  Next, an amplitude signal AM31 obtained by amplifying the flicker amplitude signal A_ * by the amplitude amplifier 514A * is calculated, and at the same time, an attenuation signal AM32 obtained by attenuating the flicker amplitude signal A_ * input by the amplitude attenuator 514B * is calculated. Each of the calculated amplitude signal AM31 and attenuation signal AM32 and the flicker data FD31 are multiplied by multipliers 515A * and 515B * to obtain flicker correction data FDA31 in which the flicker component is amplified and attenuated flicker correction data FDA32.

  The corrected amplitude error detector 50 * removes noise from the imaging signal CV_ * by passing the low-pass filters (LPF) 517A * and 517B * in the flicker additional signal generators 51A * and 51B *, and imaging with noise removed The signal CV_ * is supplied to the level adjusters 516A * and 516B *. In the level adjusters 516A * and 516B *, the correction value CFD31 of each pixel that is not affected by noise from the imaging signal CV_ * from which noise has been removed and the flicker data FDA31 and FDA32 calculated by the multipliers 515A * and 515B *. , CFD32 is calculated.

  The level adjusters 516A * and 516B * have the same configuration as the level adjuster 34 * provided in the flicker correction circuit 30 *.

  The calculators 518A * and 518B * add the correction values CFD31 and CFD32 of each pixel to the imaging signal CV_ * subjected to flicker correction to generate flicker addition signals FDV31 and FDV32 for the next frame. The arithmetic units 518A * and 518B * have the same configuration as the arithmetic unit 36 * provided in the flicker correction circuit 30 *.

  Then, the correction amplitude error detector 50 * performs the same processing as the correction phase error detector 40 * on the flicker addition signals FDV31 and FDV32 of the next frame obtained by the calculators 518A * and 518 *. . That is, the line integrators 52A * and 52B * integrate the areas where the flicker addition signals FDV31 and FDV32 of the next frame are respectively integrated to calculate line data LD31 and LD32.

  The line data LD31 and LD32 calculated by the line integrators 52A * and 52B * are stored in the memories 53A * and 53B * until the imaging signal DV_ * of the next frame is input, and the imaging signal DV_ * of the next frame is stored. When input, the same area as the area where the flicker addition signals FDV31 and FDV32 are integrated is line-integrated by the line integrator 55 * to calculate line data LD3.

  The line data LD31 and LD32 stored in the memories 53A * and 53B * and the line data LD3 of the imaging signal DV_ * of the next frame corresponding to the line are input to the difference detectors 54A * and 54B *, respectively, and the difference data DD31, Get DD32.

  The integrators 56A * and 56B * obtain integrated data ID31 and ID32 by integrating the two difference data DD31 and DD32, respectively.

  Then, the comparator 57 * outputs a corrected amplitude signal C_ * indicating whether the amplitude of flicker in the next frame should be amplified or attenuated by comparing the magnitudes of these integral data ID31 and ID32.

  As shown in FIG. 8, the flicker amplitude adjuster 60 * to which the corrected amplitude error signal C_ * obtained by the corrected amplitude error detector 50 * is supplied comprises a comparator 61 * and an amplitude amplifier 62 *. The amplitude is always changed by the corrected amplitude error signal C_ *. The flicker amplitude adjuster 60 * has a function of changing the flicker amplitude so that the corrected amplitude error signal C_ * obtained by the corrected amplitude error detector 50 * decreases. This is because it can be seen that the flicker image produced by prediction approaches the actual image obtained from the image sensor 10 * by decreasing the corrected amplitude error signal C_ *. That is, it is possible to determine whether or not the flicker level prediction is correctly performed by examining the magnitude relationship of the corrected amplitude error signal C_ * between frames by the comparator 51 *. For example, when the amplitude of the flicker is increased and the corrected amplitude error signal C_ * is larger than the corrected amplitude error signal C_ * of the previous frame, the prediction of the flicker amplitude at that time is incorrect. If the amplitude of the flicker is reduced by the amplitude amplifier 52A * and the amplitude decay period 52B *, and the corrected amplitude error signal C_ * is smaller than the corrected amplitude error signal C_ * in the previous frame. Since it can be determined that the flicker amplitude at that time is predicted, the flicker amplitude is increased by the amplitude amplifier 52 *. The flicker amplitude signal A_ * is output by the above processing.

  Further, the flicker correction in the imaging apparatus 100 is performed according to a series of procedures shown in the flowcharts shown in FIGS.

  First, in the flicker correction circuit 30 *, the address calculator 31 * calculates the address AD based on the correction phase error signal E_ * input from the correction phase error detector 40 * (step S1A), and the correction value calculator 32 * calculates the flicker correction data FD based on the address AD calculated by the address calculator 31 * (step S2).

  On the other hand, the flicker amplitude adjuster 60 * determines in step S1B whether the flicker level prediction is correctly performed based on the corrected amplitude error signal C_ * obtained by the corrected amplitude error detector 50 *. A flicker amplitude signal A_ * is output according to the determination result.

  When the processing in step S2A and step S1B is completed, in the flicker correction circuit 30 *, the level adjuster 34 * calculates the correction value CFD of each pixel from the imaging signal DV_ * 'from which the noise has been removed and the flicker correction data FDA ( In step S3), the calculator 36 * subtracts the correction value CFD of each pixel from the imaging signal DV_ * from which noise has not been removed to obtain an imaging signal CV_ * in which the flicker component is corrected (step S4).

  Here, the imaging signal CV_ * obtained by correcting the flicker component obtained by the flicker correction circuit 30 * is supplied to the correction phase error detector 40 * and the correction amplitude error detector 50 *. In the following, the correction phase error signal E_ * calculation processing by the correction phase error detector 40 is shown first, and then the correction amplitude error signal C_ * calculation processing step by the correction amplitude error detection unit 50 * is shown. Note that either one of the processes of the correction phase error detector 40 * and the correction amplitude error detector 50 * does not have to be performed first, but may be performed in parallel with each other.

  In the correction phase error detection unit 40 *, the address calculation units 411A * and 411B * calculate the start address of the flicker of the next frame (step S10), and the address calculation units 411A * and 411B * set the start address in the plus direction. Then, the addresses AD12 and AD22 shifted in the minus direction are calculated (steps S11A and S11B). Subsequently, the correction phase error detector 40 * calculates flicker correction data FD1 and FD2 based on the addresses AD12 and AD22 converted by the address converters 412A * and 412B *, respectively (steps S12A and S12B), and the level. The correction values CFD1 and CFD2 of each pixel are calculated from the imaging signal CV_ * corrected by the adjusters 415A * and 415B * and the flicker correction data FDA1 and FDA2 (steps S13A and S13B), and the calculators 417A * and 417B * are calculated. The correction values CFD1 and CFD2 of each pixel are added to the corrected imaging signal CV_ * that has not been subjected to noise removal to generate the flicker addition signals FDV1 and FDV2 of the next frame (steps S14A and S14B).

  Subsequently, in the correction phase error detector 40 *, the line integrators 42A * and 42B * integrate the areas where the flicker addition signals FDV1 and FDV2 of the next frame are respectively integrated to calculate the line data LD11 and LD21, and the memory 43A * , 43B * store the line data LD11, LD21 until the imaging signal DV_ * of the next frame is input (steps S15A, S15B). Subsequently, in the correction phase error detector 40 *, the difference detectors 44A * and 44B * are line data LD12 and LD22 stored in the memories 43A * and 43B * and the imaging signal DV_ * of the next frame corresponding to the line. Differential data DD1 and DD2 are generated based on the line data LD3 (steps S16A and 16B), and the integrators 46A * and 46B * integrate the differential data DD1 and DD2 to generate integrated data ID1 and ID2. (Steps S17A and 17B).

  Then, in the correction value phase error detector 40 *, the comparator 47 * compares the magnitudes of these integration data ID1 and ID2 (step S18), and determines whether or not the correct flicker is predicted when the address is positive. If it is determined (step S19) that the correct flicker is predicted, the corrected phase error signal E_ is shifted so that the address is shifted in the positive direction, or if the correct flicker is not predicted, the address is shifted in the negative direction. * Is output (steps S20A and 20B). Thereafter, the process returns to step S1A.

  Next, a calculation processing step of the corrected amplitude error signal C_ * by the corrected amplitude error detector 50 * will be described.

  In the corrected amplitude error detector 50 *, the address calculators 511A * and 511B * calculate the start address of the flicker of the next frame (step S30).

  In the corrected amplitude error detector 50 *, the amplitude amplifier 514A * calculates the amplitude signal AM31 obtained by amplifying the flicker amplitude signal A_ * (step S31A), and at the same time, the amplitude attenuator 514B * attenuates the flicker amplitude signal A_ *. The amplitude signal AM32 is calculated (step S31B), and then the process proceeds to steps S33A and S33B, respectively. In the corrected amplitude error detector 50 *, the correction value calculators 513A * and 513B * calculate the flicker data FD31 based on the address AD32 converted by the address converters 512A * and 512B * (step S32).

  Subsequently, the correction amplitude error detector 50 * calculates the correction values CFD31 and CFD32 of each pixel from the video signal CV_ * obtained by performing the flicker correction of the level adjusters 516A * and 516B * and the flicker correction data FDA1 and FDA2 (steps). S33A, S33B), the arithmetic units 518A *, 518B * add the correction values CFD31, CFD32 of each pixel to the video signal CV_ * from which noise has not been removed to generate flicker-added signals FDV31, FDV32 for the next frame (step S34A). , S34B).

  In the corrected amplitude error detector 50 *, the line integrators 52A * and 52B * integrate the areas where the flicker addition signals FDV31 and FDV32 of the next frame are respectively integrated to calculate line data LD31 and LD32, and the memories 53A * and 53B *. However, the line data LD31 and LD32 are stored until the imaging signal DV_ * of the next frame is input (steps S35A and S35B). Subsequently, in the corrected amplitude error detector 50 *, the difference detectors 54A * and 54B * are line data LD31 and LD32 stored in the memories 53A * and 53B *, and the imaging signal DV_ * of the next frame corresponding to the line. Based on the line data LD3, differential data DD31 and DD32 are generated (steps S36A and S36B), and the integrators 46A * and 46B * integrate the differential data DD31 and DD32 to generate integrated data ID31 and ID32. (Steps S37A and S37B).

  In the correction value amplitude error detector 50 *, the comparator 57 * compares the sizes of the integrated data ID31 and ID32 (step S38), and whether or not the flicker amplitude is predicted more correctly is predicted. (Step S39), if it is determined that the correct flicker is predicted, the amplitude of the flicker is amplified, or if it is determined that the correct flicker is not predicted, the corrected amplitude error indicating whether the amplitude of the flicker should be attenuated The signal C_ * is output (steps S40A and S40B). Thereafter, the processing process returns to step S1B.

  In the imaging apparatus 100, flicker correction is performed for each frame according to the flowcharts shown in FIGS. 9 to 11, so that the flicker correction information for the nth frame is changed to the n + 1th frame as shown in the time chart of FIG. This is compared with the image, reflected in the flicker correction of the (n + 2) th frame, and the flicker correction of the (n + 3) th and subsequent frames is performed in the same manner.

  As described above, in the imaging apparatus 100, since the flicker correction signal CFD reduces the correction error for the flicker component for each frame period, when the imaging signal DV_ * is a plurality of imaging signals having different frame periods, or Even when the flicker component included in the imaging signal DV_ * has no periodicity, the imaging signal CV_ * in which the flicker component is effectively reduced can be obtained.

  It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention.

It is a block diagram which shows the structure of the imaging device to which this invention is applied. It is a block diagram which shows the structure of the flicker correction circuit with which the imaging device was equipped. It is a block diagram which shows the structure of the correction value calculator in a flicker correction circuit. It is the model which modeled the relationship between the power supply frequency of a light source, the shutter speed which is the charge storage time of each image sensor, and a charge storage timing. It is a figure which shows typically the correction | amendment phase error detection algorithm in an imaging device. It is a figure which shows typically the correction | amendment amplitude error detection algorithm in an imaging device. It is a block diagram which shows the structure of the correction | amendment phase error detector with which the imaging device was equipped. It is a block diagram which shows the structure of the correction | amendment amplitude error detector with which the imaging device was equipped. It is a block diagram which shows the structure of the flicker amplitude adjuster with which the imaging device was equipped. 6 is a flowchart illustrating an operation of a flicker correction circuit provided in the imaging apparatus. 6 is a flowchart illustrating an operation of a flicker correction circuit provided in the imaging apparatus. 6 is a flowchart illustrating an operation of a flicker correction circuit provided in the imaging apparatus. It is a time chart which shows operation | movement of the flicker correction circuit with which the imaging device was equipped. It is a figure which shows typically the difference in the charge accumulation amount in the sensor which employ | adopted the global shutter system. It is a figure which shows typically the example of the image of the surface flicker which appears by a global shutter system. It is a figure which shows typically the difference in the electric charge accumulation amount by a rolling shutter system. It is a figure which shows typically the example of the image of an in-plane flicker. It is a figure which shows the difference of the flicker component according to a frame rate and shutter speed. It is a figure which shows the difference in the flicker component according to exposure time. It is a figure which shows the difference in the flicker component according to exposure time.

Explanation of symbols

  10R, 10G, 10B Image sensor, 20R, 20G, 20B, 20 * A / D converter, 30R, 30G, 30B, 30 * Flicker correction circuit, 31 * Address calculator, 32 * Correction value calculator, 33 * Multiplication , 34 * level adjuster, 35 * low-pass filter (LPF), 36 * calculator, 40R, 40G, 40B, 40 * corrected phase error detector, 41A *, 41B * flicker additional signal generator, 42A *, 42B *, 45 * Line integrator, 43A *, 43B * Memory, 44A *, 44B * Difference detector, 46A *, 46B * Integrator, 47 * Comparator, 50R, 50G, 50B, 50 * Corrected amplitude error detector 60R, 60G, 60B, 60 * Flicker amplitude adjuster, 61 * comparator, 62 * amplitude increase / decrease, 70 Camera signal processing circuit, 0 imaging device

Claims (4)

A flicker correction method for correcting an imaging signal including a flicker component according to a frequency of a light source,
A predetermined imaging device generates an imaging signal by accumulating electric charges according to the frame rate,
Two types of flicker phase imaging signals are generated by adding flickers having different phases to the imaging signal of the current frame subjected to flicker correction, and the generated two types of flicker phase imaging signals and the imaging signal of the next frame not subjected to flicker correction are generated. By detecting the correction phase error by comparing,
Two types of flicker amplitude imaging signals are generated by adding flickers having different amplitudes to the imaging signal of the current frame subjected to the flicker correction, and the generated two types of flicker amplitude imaging signals and the imaging signal of the next frame not subjected to flicker correction are generated. To detect the corrected amplitude error,
Generating an amplitude signal for controlling the amplitude of the flicker correction signal in a direction in which the detected correction amplitude error is reduced;
The correction waveform data is read based on the correction phase error from storage means storing correction waveform data approximating the flicker component, and the frequency of the light source and the charge of the image sensor are read from the read correction waveform data. Integrate a specific period determined based on the relationship between the accumulation time and the charge accumulation timing of the image sensor, and generate the flicker correction signal by multiplying the integrated data and the amplitude signal,
A flicker correction method, wherein flicker correction is performed by adding the flicker correction signal to the imaging signal of the next frame for each frame. An image pickup apparatus that has an image pickup unit that generates an image pickup signal by accumulating electric charges in an image pickup element according to a frame rate, and corrects an image pickup signal including a flicker component according to a frequency of a light source,
Flicker correction means for performing flicker correction by adding a flicker correction signal for each frame to the imaging signal generated by the imaging means;
Two types of flicker phase imaging signals are generated by adding flickers having different phases to the imaging signal of the current frame that has been subjected to the flicker correction by the flicker correction means, and the generated two types of flicker phase imaging signals and the next frame not subjected to flicker correction Correction phase error detection means for detecting a correction phase error by comparing the imaging signal of
Two types of flicker amplitude imaging signals are generated by adding flickers having different amplitudes to the imaging signal of the current frame subjected to the flicker correction by the flicker correction means, and the generated two types of flicker amplitude imaging signals and the next frame not subjected to flicker correction. A corrected amplitude error detecting means for detecting a corrected amplitude error by comparing the imaging signal of
Flicker amplitude adjusting means for generating an amplitude signal for controlling the amplitude of the flicker correction signal in a direction in which the corrected amplitude error detected by the corrected amplitude error detecting means is reduced;
A flicker correction signal generation means for generating the flicker correction signal based on the correction phase error signal generated by the correction phase error detection means and the amplitude signal generated by the flicker amplitude adjustment means;
The flicker correction signal generation means includes a storage means storing correction waveform data approximating a flicker component, and a frequency of the light source from the correction waveform data read from the storage means based on the correction phase error. The flicker correction signal is generated by integrating a specific period determined based on the relationship between the charge accumulation time of the image sensor and the frame rate of the image signal, and multiplying the integrated data by the amplitude signal. An imaging apparatus comprising: flicker correction signal generation means.   The correction phase error detection means includes the flicker correction signal generation means, and generates two types of flicker correction signals based on the correction phase error signal immediately before the flicker correction signal generation means corrects the imaging signal of the next frame. 3. The imaging apparatus according to claim 2, wherein two types of flicker phase imaging signals are generated by adding the flicker correction signals having different phases.   The correction amplitude error detection means includes the flicker correction signal generation means. The flicker correction signal generation means generates two types of flicker correction signals based on the correction phase error signal immediately before the flicker correction signal generation means corrects the imaging signal of the next frame. 3. The imaging apparatus according to claim 2, wherein two types of flicker phase imaging signals are generated and added with the flicker correction signals having different amplitudes.

Images