JP2007286135A - Liquid crystal display - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display capable of reducing the frame memory amount of a panel module, by making the speed of a video signal and a black insertion video signal input to a panel correspond to the video signal processing of the panel. <P>SOLUTION: The liquid crystal display comprises a control circuit which sequentially attains a black insertion period, a video writing period, and a video holding period within one frame to the liquid crystal panel; a backlight drive circuit which switches off the backlight for the black insertion period and the video writing period and switches on the backlight for the video holding period; and a video signal input means which inputs the video signal at double-speed or quadruple-speed of a single frame period. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an OCB-type liquid crystal display device having high-speed response, a driving method thereof, an input signal format, and the like.

  Conventionally, a TN type liquid crystal display device has been generally used. However, an OCB type liquid crystal display device characterized by high-speed response has been mounted on a liquid crystal television, a liquid crystal monitor, and the like in order to improve moving image visibility. ing.

  In this OCB type liquid crystal display device, even when the bend alignment is performed, if the voltage of a predetermined level or more is not applied to the liquid crystal layer for a certain period of time or longer, the bend alignment cannot be maintained and the splay alignment is resumed (hereinafter, This phenomenon is called reverse transition. In order to prevent this reverse transition, it has been prevented by applying a black insertion voltage. (For example, refer to Patent Document 1).

  As shown in FIG. 4, the black insertion writing 20 b is scanned from the upper part of the screen 20 toward the lower part of the liquid crystal display panel 19. The backlight 18 is always lit.

When an image is displayed using such an OCB type liquid crystal display device, for example, a liquid crystal panel is driven by a drive circuit in combination with a polarizing plate by controlling birefringence, and light is applied in a high voltage application state. In liquid crystal display panels such as the OCB mode, which can be blocked (black display) and transmit light (white display) in a low voltage application state, the black insertion drive is intended to prevent reverse transition to splay alignment (See Patent Document 1). In this case, the liquid crystal display panel performs video signal display, for example, in about 80% of one frame period, and performs black display (non-video signal display) that maximizes the drive voltage in the remaining 20% of one frame period. Driven by.

  Since this black insertion drive artificially creates an impulse-type luminance response close to a CRT in moving image display, it is effective for clearing the retinal afterimage generated in the viewer's vision and making the movement of the object appear smooth. Therefore, black insertion driving is attracting attention as a technique for dramatically improving moving image visibility.

  In a liquid crystal display panel driven to insert black, for example, writing to apply a pixel voltage to each pixel electrode is performed twice as black insertion writing and video signal writing within one frame period. FIG. 3 shows the timing for sequentially driving the gate signal lines G1, G2, G3,... For black insertion writing and video signal writing.

  In this black insertion driving example, the gate driver circuit 12 sequentially drives the gate signal lines G1, G2, G3,... Using the first half of one horizontal scanning period (1H) of the video signal as black insertion scanning. Further, the gate signal lines G1, G2, G3,... Are sequentially driven using the latter half of one horizontal scanning period (1H) of the video signal as signal writing scanning.

The source driver circuit 14 drives all the source signal lines S so that the pixel voltage for black insertion is written to pixels for one line in the first half of one horizontal scanning period (1H), and further, for one horizontal scanning period (1H). In the second half, all the source signal lines S are driven so that the pixel voltages of the video signal are respectively written to the pixels for one line. In this case, the black insertion period of each pixel is equal to the period from the black insertion scanning to the signal writing scanning.
JP 2002-107695 A

  A voltage applied to maintain bend alignment or prevent reverse transition is called a black insertion voltage or a black insertion video signal. The black insertion voltage is applied mainly during the black insertion period a. In addition, the voltage for shifting from the splay alignment to the bend alignment may be referred to as a black insertion voltage. This voltage may also be referred to as a transition voltage.

  When a black insertion voltage is applied to the display screen in the form of a black band, there arises a problem that display contrast is lowered. In addition, there is a problem that the circuit operation needs to be made faster in order to apply the black insertion voltage, resulting in an increase in power consumption.

  Therefore, the present invention provides a liquid crystal display device capable of reducing the amount of frame memory of the panel module by making the video signal input to the panel and the speed of the black insertion video signal correspond to the video signal processing of the panel.

  In the present invention, a plurality of source signal lines and a plurality of gate signal lines are orthogonally wired on an insulating substrate, and a thin film transistor is formed in the vicinity of the intersection of the source signal lines and the gate signal lines. A liquid crystal display panel having an array substrate and a counter substrate made of an insulating substrate, a source driver circuit for supplying a video signal to the plurality of source signal lines, and a gate for supplying a gate signal to the plurality of gate signal lines A liquid crystal display device comprising: a driver circuit; a common signal application circuit that applies a polarity of a common signal voltage to the counter electrode of the counter substrate by reversing the polarity at regular intervals; and a backlight disposed on the liquid crystal display panel. A control circuit for sequentially realizing a black insertion period, a video writing period, and a video holding period within one frame for the liquid crystal display panel; A backlight drive circuit for turning off the black during the black insertion period and the video writing period and turning on the video holding period; video signal input means for inputting the video signal at a double speed or a quadruple speed of one frame period; It is a liquid crystal display device characterized by having.

  According to the present invention, the frame memory amount of the panel module can be reduced by making the video signal input to the panel and the speed of the black insertion video signal correspond to the video signal processing of the panel.

  Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 schematically shows a circuit configuration of the liquid crystal display device of the present embodiment.

  The liquid crystal display device includes an OCB mode liquid crystal display panel 19, a backlight 18 that illuminates the liquid crystal display panel 19, and a controller circuit 11 that controls the liquid crystal display panel 19 and the backlight 18.

  The liquid crystal display panel 19 has a structure in which a liquid crystal layer 24 is sandwiched between an array substrate 15 which is a pair of electrode substrates and a counter substrate 21. The liquid crystal layer 24 includes, as a liquid crystal material, an OCB liquid crystal that is previously changed from a splay alignment to a bend alignment for a normally white display operation, for example. Reverse transition from bend alignment to splay alignment is prevented or suppressed by periodically applying a black insertion voltage corresponding to black display to the liquid crystal layer 24.

  The array substrate 15 includes, for example, a plurality of pixel electrodes 23 arranged in a substantially matrix form on a transparent insulating substrate such as glass, and a plurality of gate signal lines G (G1 to Gm) arranged along a row of the plurality of pixel electrodes 23. ), A plurality of source signal lines S (S1 to Sn) arranged along a column of the plurality of pixel electrodes 23, and the gate signal lines corresponding to the gate signal lines G and the source signal lines S, which are arranged in the vicinity of the intersection positions. A plurality of pixel switching elements Q that are electrically connected between the corresponding source signal line S and the corresponding pixel electrode 23 when driven through G are provided. Each pixel switching element Q is formed of, for example, a thin film transistor. A gate of the thin film transistor is connected to the gate signal line G, and a source-drain path is connected between the source signal line S and the pixel electrode 23.

  The counter substrate 21 is a color filter facing a plurality of pixel electrodes 23 and a color filter composed of red (R), green (G), and blue (B) colored layers disposed on a transparent insulating substrate such as glass. The counter electrode 22 etc. arrange | positioned on a filter are included. Each of the pixel electrodes 23 and the counter electrode 22 is made of a transparent electrode material such as ITO, and is covered with an alignment film that is rubbed in parallel with each other, and has a liquid crystal molecular arrangement corresponding to the electric field from the pixel electrode 23 and the counter electrode 22. The OCB liquid crystal pixel 16 is configured together with a pixel region which is a part of the liquid crystal layer 24 to be controlled.

  Each of the plurality of OCB liquid crystal pixels 16 has a liquid crystal capacitor LC between the pixel electrode 23 and the counter electrode. The plurality of auxiliary capacitance lines C1 to Cm are capacitively coupled to the pixel electrodes 23 of the liquid crystal pixels 16 in the corresponding rows to form auxiliary capacitances Cs.

  The controller circuit 11 further includes a gate driver circuit 12 that sequentially drives the plurality of gate signal lines G1 to Gm so that the plurality of switching elements Q are conducted in units of rows, and the switching elements Q in each row are driven by driving the corresponding gate signal lines G. A source driver circuit 14 that outputs a pixel voltage to each of the plurality of source signal lines S1 to Sn, a backlight drive circuit 17 that drives the backlight 18, a gate driver circuit 12, and a source driver circuit 14 are provided.

  In the OCB type liquid crystal display device, as shown in FIG. 2A, the pixel electrode 23 disposed on the glass array substrate 15 and the glass counter substrate 21 disposed to face the array substrate 15 are used. When no voltage is applied between the counter electrodes 21 disposed above, the liquid crystal molecules 25 in the liquid crystal layer take a splay alignment state. For this reason, when the power is turned on, a high voltage of about several tens of volts is applied between the pixel electrode 23 and the counter electrode 22 to shift the liquid crystal molecules 25 to the bend alignment state.

  After the liquid crystal molecules 25 are in the bend alignment state in this way, during operation, as shown in FIG. 2B, a voltage higher than a low off voltage at which the bend alignment state is maintained from the drive power supply 26 to the liquid crystal molecules 25. Is applied. The off voltage and an on voltage higher than the off voltage are applied between the drive power supply 26 and the pixel electrode 23 as shown in FIG. By changing the driving voltage between the on / off voltage, the bend alignment state of the liquid crystal molecules 25 is changed as shown in FIG. 2 (c) from the bend alignment state of FIG. The transmittance is controlled by changing the retardation value.

  FIG. 10 is a configuration diagram of the liquid crystal display device of the present embodiment. In the display area 20, pixels are arranged in a matrix. The number of pixels is 480 RGB × 240 dots. The source driver circuit 14 has 240 RGB output, and two source driver circuits 14a are mounted on the display panel.

  The source driver circuit 14a has a built-in RAM for storing a display area for two frames. A gamma (γ) conversion circuit and an external input data latch circuit are also formed. An 8-bit DA converter circuit (DAC) for 240 RG is formed at the output stage of the source driver circuit 14.

  The gate driver circuit 12a includes a common voltage (VcH, VcL) generation circuit and a DAC circuit for adjusting them. Further, a generation circuit for generating a gate driver voltage (Vgon, Voff) and a generation circuit for the power supply voltage AVDD = 5V of the source driver circuit 14 are incorporated. That is, the gate driver circuit 12a is a gate driver circuit with a built-in DCDC converter. As shown in FIG. 13, the voltage of the temperature sensor Rs is applied to the gate driver circuit 12, and the gate driver circuit 12 controls the common center voltage Vcnt and the gamma characteristic curve in accordance with the panel temperature.

  The source driver circuit 14a1 and the source driver circuit 14a2 have a master / slave function, and one of them is configured to perform a master operation according to an external setting. The gate driver circuit 12a controls the source driver circuit 14a. The gate driver circuit 12 also controls the master source driver circuit 14 to control the gamma characteristic curve and the like according to the panel temperature and the like.

  Reference numeral 111 denotes a flexible substrate (FPC) for a liquid crystal panel, and one end thereof is configured to be connected to a connector having a 45 pin and 0.5 mm pitch. On the flexible substrate 111, a power supply capacitor, a resistor, and an EEPROM are mounted. Reference numeral 112 denotes an LED driver circuit flexible substrate. A connector of 4 pins and a pitch of 0.5 mm can be connected to one end. The temperature sensor Rs shown in FIG. 13 is mounted on a flexible substrate. The output voltage of the temperature sensor Rs in FIG. 13 may be applied to the gate driver circuit 12 through this connector.

  FIG. 5 illustrates the concept of the driving method of the liquid crystal display panel 19 of the basic embodiment. The operation of the liquid crystal display panel 19 and the operation of the backlight 18 are controlled in synchronization. One frame (cycle or section for rewriting one image) is divided into three operations. One frame is divided in units of 1/4.

  The first 1F / 4 period of one frame (1F) is a black insertion period (black insertion drive period) for writing a black image. A black insertion voltage is applied to the display area 20 sequentially from the top of the screen. The black insertion voltage is basically applied to maintain the OCB bend orientation.

  The images held in the previous frame are sequentially rewritten in black from the top of the screen 20, and the image display state of the liquid crystal display panel 19 becomes black in the period of 1F / 4. This black insertion drive can prevent reverse transition to the splay alignment. In the present invention, since the black insertion voltage is applied to the entire surface of the display region 20 during the black insertion period a, it is possible to apply a high voltage that is uniform and irrespective of image display. Therefore, it is easy to maintain the bend alignment state, and reverse transition does not occur. Further, the configuration of the source driver circuit 14 is simplified and the power consumption is reduced. By varying the black insertion voltage according to the panel temperature, it is possible to maintain a good bend orientation and to generate a good image quality without causing gradation inversion even in a low temperature region.

  In the next 1F / 4 period, display images are sequentially written from the top of the screen of the display area 20. That is, the image writing speed is quadruple speed. In a normal liquid crystal display panel, four pixel rows are rewritten in a period in which one pixel row is rewritten. Therefore, during the first half of one frame, 2F / 4 (= 1F / 2), black insertion is performed to prevent reverse transition to the splay orientation, and a video signal is written to the pixel to rewrite the image to be displayed. It is done. The black insertion voltage is preferably changed or adjusted according to the panel temperature.

  The 2F / 4 (= 1F / 2) period in the latter half of one frame is a period for holding the image rewritten earlier. During this period, the operations of the source driver circuit 14 and the gate driver circuit 12 are stopped. Therefore, the electric power used is very small.

  The backlight 18 is controlled to be extinguished during the 1F / 2 period of the first half of one frame. That is, the backlight 18 is not lit (turned off) in the black insertion period and the image rewriting period (video writing period), so that the image display state of the liquid crystal display panel 19 cannot be seen. When the black rewrite voltage during the black insertion period is higher than necessary, there is a phenomenon that black floating occurs and the contrast is lowered. On the other hand, in order to prevent reverse transition to the splay alignment, it is preferable to apply a higher voltage during the black insertion period.

  The conventional driving method has a problem that when a voltage higher than necessary is applied during the black insertion period, the contrast is lowered and the image display state is lowered. However, in this embodiment, the backlight 18 is in an off (light-off) state during the black insertion period. Accordingly, even when a high voltage is applied during the black insertion period and the contrast is lowered, the backlight 18 is not lit, so that the display is visually in a completely black display state, and no contrast reduction occurs. Therefore, a high black insertion voltage can be applied and reverse transition can be effectively performed.

  In the next image rewriting period, the image of the previous frame is sequentially rewritten, so that “moving image blur” occurs if it looks visually. However, since the backlight 18 is still off during this period, the rewriting state of the image is not visually recognized. Visually, the display is completely black.

  In the 1F / 2 period in the second half of one frame, the image rewritten earlier is held. Further, since the image is not rewritten during this period, a complete still image display state is obtained when the period of 1F / 2 is seen. Since the backlight 18 is lit during this period, the image is visually recognized.

  As described above, in the driving method of the present embodiment, the backlight 18 is turned off during the black insertion period that may cause a decrease in contrast and the image rewriting period (video writing period) that may cause moving image blur. This prevents image quality degradation.

  Also, during the 2F / 4 (= 1F / 2) period of the latter half of one frame, the rewritten image is held as it is so that no moving image blur occurs.

  Further, the backlight 18 is turned off at 1F / 2, and the backlight 18 is turned on in the remaining 1F / 2 period, whereby the image display is in an intermittent display state. Therefore, a very good moving image display can be realized.

  In addition, since the gate driver circuit 12 and the source driver circuit 14 are substantially stopped during the second half period of 2F / 4 (= 1F / 2), low power consumption can be realized.

  The driving method preferably employs a frame inversion method. Further, it is preferable to apply the common voltage signal VCOM to the counter electrode 22 and to apply voltages having different polarities for each frame.

  The driving method described above is illustrated in the images of FIGS. 6 (a1), (a2), (a3), and (a4) are black insertion periods (the first 1F / 4 period of 1F (first period, period a in FIG. 9)). 6 (b1), (b2), (b3), and (b4) are video signal rewriting periods (second period, period b in FIG. 9). 7 (c1), (c2), (c3), (c4), (d1), (d2), (d3), and (d4) are video display holding periods (periods c1 and c2 in FIG. 9) (the second half of 1F) / 4 (= 1F / 2) period (third period)).

  In the black insertion period shown in FIGS. 6A 1, 6 A 2, A 3, and A 4, the image “A” of all frames is erased by writing the black image 20 b from the upper part of the screen 20. At the same time, reverse transition can be prevented. In the image rewriting period (video writing period) of FIGS. 6B1, B2, B3, and B4, the image “B” of the current frame is sequentially written on the screen 20. In the period shown in FIG. 6, the backlight 18 is controlled to be turned off as illustrated.

  7 (c1), (c2), (c3), (c4), (d1), (d2), (d3), and (d4) are image display holding periods (2F / 4 in the second half of 1F (= 1F / 2) period). The display image “B” is held as it is during this period. The backlight 18 is controlled to be lit.

  In the liquid crystal display panel driving method of the present embodiment, black insertion writing is sequentially performed on all the liquid crystal pixels 16 using the black insertion period a (first period), and the video following the black insertion period a (first period). Using the writing period b (second period), video signal writing is sequentially performed on all the liquid crystal pixels 16. In this case, the potential of the source signal line S does not change at least during black insertion scanning.

  In the second period, the potential of the source signal line S changes corresponding to image display. However, even in this video signal writing period, the source signal line S potential does not change with polarity inversion. This is because the frame is inverted. In 2F / 4 (= 1F / 2) in the second half of one frame, which is a display image holding period, the output of the source driver circuit 14 is in a stopped state, so the potential of the source signal line S does not change.

  In the black insertion period (first period) and the video writing period (second period), the total time length needs to be equal to the 1F / 2 period, but the time of the first period with respect to the time length of the 1F / 2 period. The ratio of the length can be arbitrarily changed as the black insertion rate.

  As a driving method in which the potential of the source signal line S does not change for one frame period (image display is raster display), column inversion driving and frame inversion driving are exemplified. In this embodiment, either column inversion driving or frame inversion driving can be applied, but frame inversion driving is more advantageous from the viewpoint of power consumption. The reason why frame inversion driving is advantageous is as follows.

  The first reason is that, in general, in a source driver for dot inversion or column inversion, power (static power) consumed in addition to power required for charging / discharging the source signal line S load is a source driver for line inversion or frame inversion. Bigger than

  The second reason is that, in the frame inversion, the pixel voltages for all the pixel columns have the same polarity. Therefore, the voltage amplitude necessary for the driver operation is reduced by changing the counter voltage (common voltage) VCOM with respect to the pixel voltage. Thus, the power consumption of the source driver can be reduced.

  However, when only frame inversion is used, attention is required because flicker that is undesirable from the viewpoint of display quality may be noticeable.

  Further, as similar to dot inversion (or line inversion) and column inversion (or frame inversion), for example, polarity inversion is performed every k pixel lines (k = 2, 3, 4, 5, 6,...). It is not impossible to adopt the method. This driving method cannot be expected to reduce power consumption like pure column inversion (or frame inversion), but has an advantage that flicker can be reduced. However, horizontal stripes may appear on the display screen due to pixel voltage writing characteristics different from those of other pixel lines immediately after the polarity inversion. For this reason, it is necessary to appropriately select the driving method for polarity inversion so as to satisfy the product specifications.

  In the present embodiment, power consumption is eliminated by eliminating repetition of polarity inversion caused by overlapping of writing of a non-video signal (black level pixel voltage) to all pixels and writing of a video signal (video level pixel voltage) to all pixels. Can be reduced.

  Furthermore, the lengths of the first period and the second period can be adjusted to each other in order to optimize the ratio of non-video signal display to video signal display. Accordingly, display quality can be improved while maintaining low power consumption.

  In the liquid crystal display panel driving method of the present embodiment, the backlight driver circuit 17 is controlled so that the backlight 18 blinks in synchronization with the operation of the liquid crystal display panel 19. Specifically, the backlight 18 is turned on only during a period in which all the liquid crystal pixels hold the picture-level pixel voltage, and the backlight 18 is used during other periods, that is, the black insertion period and the video signal writing period. Is turned off. From the viewpoint of turning the backlight 18 on and off at high speed, it is preferable to employ an LED backlight using white LEDs or RGB LEDs. Further, the brightness of the backlight 18 or the amount of light flux generated per unit time is adjusted.

  Such control has the following advantages.

  The first advantage is that since the backlight 18 is turned on after the pixel voltage of the video level is held in all the liquid crystal pixels, the utilization efficiency of the backlight 18 can be improved. The temporal light utilization efficiency is substantially 100%.

  The second advantage is that the screen is displayed in black or in the video signal writing state for 50% (as an example) of one frame period when the backlight 18 is turned off, and the screen is displayed for video for the remaining 50% of one frame period. The luminance profile in this case is close to an impulse type, and the moving image visibility can be improved. This moving image visibility is expressed using MPRT (Motion Picture Response Time) as an index, but this MPRT value decreases.

  The third advantage is that since the video signal writing operation is not performed during the lighting period of the backlight BL, it is not necessary to change the potential of the source signal line S, so that the constant value can be maintained. Therefore, even in the case of column inversion or frame inversion driving, problems such as vertical crosstalk and luminance gradient due to capacitive coupling between the source signal line S and the pixel electrode and off-leakage current in the thin film transistor hardly occur.

  A fourth advantage is that since the backlight 18 is turned off during the black insertion period and the video signal writing period, the scanning speeds of the black insertion period and the video signal writing period need not be the same. For this reason, it is possible to perform the black insertion period for all the liquid crystal pixel rows at once, and to perform video signal writing so as to secure sufficient time for writing the pixel voltage at the video level. Become. As a result, the writing characteristics of the pixel voltage at the video level are improved.

  FIG. 8 illustrates the relationship between the video signal output from the source signal line S and the common voltage signal VCOM applied to the counter electrode 22. However, it is shown for ease of understanding, and the video signal does not consider the phase relationship of the common voltage signal VCOM.

  The video signal swings in any range between the ground voltage (GND) and the power supply voltage (AVDD) of the source driver circuit 14. AVDD is 5 (V) to 6 (V). The common voltage signal VCOM has an amplitude Vcp in the positive and negative directions with the common center (Vcnt) as the center.

  The common voltage signal VCOM swings at VcH and VcL. The voltage applied to the liquid crystal layer by the video signal and the common voltage signal VCOM in the positive polarity range (positive frame) and the voltage applied to the liquid crystal layer by the video signal and the common voltage signal VCOM in the negative polarity range (negative frame) Different. The difference is due to the influence of the penetration voltage due to the transistor Q of the pixel. The relative potential relationship between the common center voltage Vcnt and the video signal Vs can be freely changed.

  FIG. 9 shows the relationship between the video signal, the common voltage signal VCOM, and the blinking control of the backlight 18. The video signal includes a black insertion period (first period; this period is illustrated as a), a video writing period to pixels arranged in a matrix (second period; this period is illustrated as b), a matrix The holding period of the video signal written to the pixels arranged in the pixel (second period. These periods are shown as c1 and c2. However, during this period, the source driver circuit 14 and the gate driver circuit 12 stop operating. This is a period in which the video signal written in the pixel is held.

  As shown in FIG. 9B, the polarity of the common voltage signal VCOM is inverted around the common center voltage Vcnt every frame. That is, the amplitude changes to VcH and VcL for each frame with Vcp. The polarity of the video signal is inverted in synchronization with the polarity of the common voltage signal VCOM (see FIG. 8).

  The backlight 18 is controlled to be in an off (light-off) state during a black insertion period “a” and a video writing period “b”, and is turned on (lighted) during a video signal holding period (c1, c2). Note that the frame frequency of one frame is not less than 72 Hz and not more than 125 Hz. If it is less than 72 Hz, the flicker becomes strong in image display and the image quality is lowered. When it is higher than 125 Hz, the moving image display performance is remarkably deteriorated.

  The video signal is transmitted for one screen in one frame period (1F). The transmitted video signals are sequentially written in the display area 20.

  In the embodiment of FIG. 9, the black insertion voltage is written in the display area 20 during the black insertion period a. The writing period is 1/4 of one frame period. Further, the video signal transmitted during the video writing period b is written in the display area 20. Therefore, the video signal transmitted in one frame period is accumulated in the frame memory, read out at a quadruple speed in the video writing period b, and written in the display area 20. That is, the video signal needs to be converted at a quadruple speed. Further, at least a frame memory is required for quadruple speed conversion.

  When the frame rate of the input video signal is 60 Hz, flicker occurs when the black insertion voltage a is applied with the black insertion period a described in FIG. Therefore, the frame rate of the image to be displayed (image displayed on the liquid crystal display panel) is set to 72 Hz or higher. That is, frame rate conversion is necessary. A frame memory is required for frame rate conversion.

  As described above, for double speed conversion and frame rate conversion, a frame memory that holds an image for one or two frames is required. The frame memory becomes a cause of cost increase. Further, since the present invention generates the black insertion period a, the video writing period b, and the video holding period c (c1, c2), the video signal processing is basically quadruple speed. Increasing the processing speed of the video signal requires measures against EMI, and measures against EMI increase costs.

  For this problem, measures are taken as shown in FIG. Basically, the input signal is easily adapted to the driving method of the present invention. The driving method of this embodiment includes the format of the input signal.

  FIG. 11 shows a signal format input to the liquid crystal display panel of this embodiment shown in FIG. The first frame (first F), second frame (second F),... In FIG. 11 are both input frame rates and output frame rates. The input frame rate is not 60 Hz but a high frame rate such as 1.25 times 75 Hz and 1.5 times 90 Hz. That is, the signal is transmitted at a frame rate that makes it difficult for the flicker to visually recognize the input signal.

  In the present embodiment, the image display is intermittently displayed by turning on and off the backlight 18 in one frame period. Video visibility is greatly improved by intermittent display. However, if the frame rate is low, flicker is visible. The frame rate in NTSC is 60 Hz (60 frames / second) and PAL (50 frames / second). As shown in FIG. 29, there is a correlation between the frame frequency on the horizontal axis and the flicker visibility coefficient on the vertical axis. The larger the flicker visibility coefficient, the easier the flicker is recognized. The flicker visibility coefficient needs to be 0.25 or less.

  From FIG. 29, when the driving method (intermittent display) of this embodiment is performed at 50 Hz and 60 Hz, flicker is visually recognized. The frame rate becomes difficult to be visually recognized from around 70 Hz, and the flicker sensitivity coefficient becomes 0.25 or less at 72 Hz. Almost no flicker occurs at 80 Hz or higher. Flicker is not recognized above 90 Hz, but moving image visibility decreases (moving image blurring) if the frame rate is increased too much. The moving image visibility decreases from above about 100 Hz, and at 150 Hz or higher, the effect of improving the moving image visibility by intermittent display by blinking the backlight is lost.

  In the driving method of this embodiment, the frame rate of the input signal shown in FIGS. 11, 14, and 16 is 72 Hz or more. The frame rate is 150 Hz or less. When the frame rate of the input signal is 72 Hz or less, the input frame rate is converted to 1.25 times, 1.5 times, or 2 times by the driving method and circuit of this embodiment, and output to the liquid crystal display panel. Apply. By adopting the above method, cost reduction can be realized.

  Basically, the display device of the present embodiment does not perform frame rate conversion, and sets the output frame rate while maintaining the input frame rate. In the display device of this embodiment, the input signal is converted so as to conform to the format described with reference to FIG. Note that the present invention is not limited to not performing frame rate conversion, and it goes without saying that necessary frame memory may be mounted on the panel module of the present embodiment to perform frame rate conversion.

  11 and 14, the speed of the video signal is described as quadruple speed, and the speed of the video signal is illustrated as double speed in FIG. 16, but the present invention is not limited to this. For example, the embodiment of FIG. 28 is illustrated.

  The embodiment of FIG. 28 is a method for transmitting a video signal at 6 × speed. As an example, in FIG. 28, the lengths of a period, b period, c1 period, c2 period, c3 period, and c4 period are the same. Therefore, the black insertion drive is performed in the period of 1F / 6, and the video signal is written in the next period of 1F / 6. The period of 4F / 6 (= 2F / 3) is a video signal holding period. The backlight 18 is turned on during the video signal holding period. The black insertion period a and the video writing period b are turned off to make the image display invisible. Even the embodiment of FIG. 28 can be applied to the embodiments of FIG. 11, FIG. 14, and FIG. The above matters also apply to other embodiments.

  FIG. 11 shows a signal transmitted corresponding to the driving method of the present embodiment shown in FIG. The format of this signal is called “black voltage added quadruple speed method”. The input video signal is quadruple speed. The period of the first quarter frame is a period for transmitting the black insertion voltage (corresponding to the black insertion period a), and the next 1F / 4 period of one frame corresponds to the video signal (video writing period b). ). In the latter half of 1F / 2, the previous video signal may be transmitted repeatedly, but it may be no signal. Further, a constant signal such as a black insertion voltage may be transmitted.

  In FIG. 11 and the like, transmission states of video signals and the like are described. The present embodiment is basically based on writing this video signal or the like to the display panel of the present embodiment without accumulating it in the frame memory. However, it goes without saying that a video signal or the like may be stored in the frame memory or line memory and written to the display panel of this embodiment.

  In FIG. 11 and the like, the black insertion period a is described as 1F / 4 (1/4 of one frame), but the present embodiment is not limited to this. As shown in FIG. 12, the black insertion period a, the video writing period b, the video signal holding periods (c1, c2), and the like may be variable. For example, an example in which the temperature varies according to the panel temperature is illustrated. In addition, an example of changing or changing between a moving image and a still image is illustrated.

  The present embodiment is not limited to stopping the video signal writing operation during the video signal holding period c. The video signal writing operation may be performed during the c1 period and the c2 period. Since the image data to be written does not change, image quality deterioration does not occur even when the backlight 18 is turned on, and the moving image display performance is maintained.

  The video signal writing scan need not be performed once, and may be repeated three times, four times, and so on. The repetitive writing operation is performed during the video holding period c. By repeatedly performing the writing scan, the display contrast can be improved. The second and subsequent video signal writing scans may be performed during the lighting period of the backlight 18. This is because even if the image signal writing scan is performed, the image data written to the pixel 16 is the same, and therefore the image display state does not change. Of course, the backlight may be turned on after the second and subsequent scans are completed. Further, the video signal writing may be performed in the original video holding period (c1, c2). With respect to the number of times the video signal is written and scanned or the lighting timing of the backlight 18, an appropriate condition may be adopted in consideration of the burden on the source driver 14 and the necessary luminance.

  In the embodiment of FIG. 12, the black insertion period a is set to 1F / 4 + s. That is, the period of s is longer than 1F / 4. s is in the range of 0 to 1F / 4. Increasing the black insertion period a increases the effect of suppressing reverse transition. In an OCB liquid crystal display panel, reverse transition tends to occur at low temperatures. Therefore, it is effective to vary the black insertion period a in accordance with the panel temperature. Further, by shortening the black insertion period a and lengthening the video holding period c (c1, c2), the lighting period of the backlight 18 can be lengthened, and high luminance display can be realized. The variable or adjustment of the s period is also effective in changing the image displayed on the liquid crystal display panel between a still image and a moving image. In the case of a moving image, the moving image display performance improves as the black insertion voltage period a is increased. In the case of a still image, there is no need to improve the moving image display performance. This is effective in reducing the black insertion period a and suppressing the occurrence of flicker. The input frame rate to be transmitted may be varied between a moving image and a still image. In the case of moving images, the frame rate may be low. In the case of a still image, flicker is suppressed by increasing the input frame rate. The above matters also apply to other embodiments of the present embodiment. Moreover, it can implement in combination with other embodiment of this embodiment.

  As illustrated in FIG. 13, the black insertion period “a” is exemplified by a method of detecting the panel temperature and automatically varying the black insertion period “a”. For example, when the contrast is poor at low temperatures, the user adjusts the black insertion period a by operating a volume or the like, and the image display state is made good. In addition, in the black insertion period a, an example in which the number of pixel rows to which black voltages are simultaneously written is made plural is illustrated.

  In the embodiment of FIG. 12, the black insertion period is extended by s periods. Therefore, the black insertion period is 1F / 4 + s. The video writing period b is fixed at 1F / 4. In the present embodiment, the black insertion period is variable, but the circuit configuration is performed by fixing the video writing period b = 1F / 4, thereby simplifying the circuit configuration and reducing the cost.

  Since the video holding period c is set to the black insertion period a = 1F / 4 + s, it is shortened by the period s. Therefore, the video holding period c = c1 + c2 = 2F / 4-s. Since the video holding period is a period in which the source driver circuit 14 and the gate driver circuit 12 do not operate and the pixels 16 hold the video data, it is very easy to shorten or extend the video holding period c. During the black insertion period a, the source driver circuit 14 only outputs a constant black voltage, and can be realized only by changing the operating frequency of the gate driver circuit 12, and therefore can be easily shortened or extended. . The present embodiment is characterized in that at least one of the black insertion period a and the video holding period c is changed without changing the video writing period b. In the present specification, for ease of explanation, the black insertion voltage application period a is fixed as 1F / 4.

  The backlight 18 is turned off or turned on by counting the counter from the start position of the black insertion period. Lon for turning on the backlight 18 and Loff for turning off the backlight are configured to be set at an arbitrary timing by command setting. Accordingly, not only the backlight 18 is turned on at the end of the video writing period b and the backlight 18 is turned off at the end of the video holding period c. The backlight 18 can be turned on / off (lit or extinguished) at the timing.

  Since the OCB liquid crystal is bend alignment, it has a high speed response. However, when the panel is at a low temperature (for example, −10 ° C. or lower), the response to the effective value becomes dominant. In the driving method of the present embodiment, the backlight 18 is turned off during the black insertion voltage writing period “a” and the video writing period “b” as described with reference to FIGS. This is because the OCB liquid crystal has a high responsiveness, and if the backlight is turned on during this period, the contrast is lowered and the luminance of the screen is inclined. However, at the low temperature, even the OCB liquid crystal responds to the effective value. From this knowledge, even if the backlight is always turned on at a low panel temperature, there is no brightness gradient and it does not fail. Therefore, even if the backlight 18 is turned on during the video writing period b at a low temperature, there are few problems. Therefore, the display brightness can be increased. It is effective to switch the lighting timing of the backlight 18 from “lighting after screen completion (after writing video signal) at normal temperature” to “lighting even during video signal writing at low temperature”. In the embodiment of FIG. 12, the start position of Lon may be during the video writing period b at low temperatures. Furthermore, the start position of Lon may be set during the black writing period a. Further, the backlight 18 may be turned on when the driving shown in FIGS. 17, 23, and 26 is performed.

  In FIG. 11, the black insertion voltage (shown as “black” in FIG. 11 and the like) transmitted during the first 1F / 4 period is transmitted to the display panel. The black insertion voltage varies in voltage depending on the panel temperature. Similarly, the next video signal (referred to as “video” in FIG. 11 and the like) also has a signal amplitude magnitude, a common amplitude magnitude, and a center voltage of the common signal depending on the panel temperature (see FIG. 8). And the absolute value of the voltage applied to the liquid crystal layer is preferably adjusted. The absolute value of the voltage applied to the liquid crystal layer is large when the panel temperature is low and low when the panel temperature is high. As an example, in the same gradation, the absolute value of the voltage applied to the liquid crystal layer (the absolute value of at least one of the black insertion voltage and the video signal) is the voltage applied at a panel temperature of 50 ° C. (Celsius). The absolute value of the voltage applied when the panel temperature is 0 ° C. (Celsius) is made larger than the absolute value. As an example, the common center voltage is higher than the potential applied at a panel temperature of 50 ° C. (Celsius), but higher than the potential applied at a panel temperature of 0 ° C. (Celsius). In the present embodiment, the absolute value of the voltage applied to the liquid crystal layer is adjusted or set according to the panel temperature. Further, the common center voltage is adjusted or changed in accordance with the panel temperature. Needless to say, the above matters also apply to other embodiments of this embodiment such as FIGS.

  The black insertion voltage voltage (absolute value of the voltage applied to the liquid crystal layer) may be changed in accordance with the characteristics of each pixel in the display area 20 as in the case of the video signal. Further, the same voltage may be common to each pixel in the display area 20. Needless to say, the above matters also apply to other embodiments of this embodiment such as FIGS.

  In the embodiments of FIG. 11, FIG. 14, FIG. 16, etc., the black insertion voltage or the video signal is described as being written in the pixels of the liquid crystal display panel in real time for easy understanding. It is not limited. For example, the black insertion voltage or the video signal may be temporarily stored in the line buffer memory and written to the pixels of the liquid crystal display panel. Further, it may be stored in a frame memory and written on a liquid crystal display panel. Needless to say, the black insertion voltage or the video signal is processed and converted in accordance with the voltage applied to the liquid crystal layer.

  In FIG. 11, the black insertion voltage transmitted during period a is 4 times the input video signal. Therefore, a 1F / 4 period of one frame is a video signal. Also, a black insertion signal (black writing video signal) is transmitted during the period of 1F / 4. For the remaining 1F / 2, the previous video signal may be transmitted repeatedly. There may be no signal.

  In FIG. 11, the black insertion voltage and the video signal are transmitted at a quadruple speed corresponding to the writing speed of the liquid crystal display panel of the present embodiment. Therefore, there is no need to hold a video signal or the like. Therefore, no frame memory is required.

  As described with reference to FIG. 9, the black writing period “a” is basically performed in a period of 1F / 4. This black writing period signal is transmitted to the first 1F / 4 of one frame (indicated as “black” in FIG. 11). The black writing signal may be self-generated within the liquid crystal display panel of the present embodiment. FIG. 11 shows an embodiment in which the level of the black writing signal is adjusted in correspondence with the input video signal and transmitted.

  After the video signal described as “black” is written on the liquid crystal display panel in the black writing period a, the input video signal (described as “video” in FIG. 11) is arranged in a matrix at the same speed. Write to the pixels 16 in the display area 20. Thereafter, a video holding period c is performed.

  As described above, the frame rate conversion of the input video signal is unnecessary in the method of FIG. Further, a memory for storing the input video signal is not necessary. Therefore, the frame memory capacity can be reduced and the circuit configuration is simple. The period a during which the black insertion voltage is applied is preferably variable according to the panel temperature. The magnitude of the black insertion voltage is preferably variable according to the panel temperature.

  The “4 × speed transmission method” shown in FIG. 14 will be described. The input video signal is quadruple speed. Therefore, a 1F / 4 period of one frame is a video signal. Further, a period of 1F / 4 from the start timing of one frame is blank. Needless to say, a black insertion signal (black writing video signal) may be transmitted during the blank period. In the latter half 1F / 2, the video signal of the previous 1F / 4 period may be repeatedly transmitted. There may be no signal.

  In the liquid crystal display panel, the black insertion voltage is written to the pixel 16 in period a. The black insertion voltage is self-generated inside the panel module. FIG. 15 shows an example of a black insertion voltage generation circuit.

  In FIG. 15, an analog switch 151 is formed of polysilicon on each source signal line S (S1, S2,...). That is, it is formed directly on the array substrate 15. The analog switch 151 includes a P channel transistor and an N channel transistor. A voltage of reverse polarity is applied to the a terminal and b terminal of the analog switch 151, and ON / OFF control is performed by voltage data applied to the ON-OFF terminal. In the black insertion voltage application period a, the ON voltage is applied to the ON-OFF terminal and the analog switch 151 is turned on, and the black insertion voltage is applied to each source signal line S to the B-SIG terminal. In the video signal application period b and the holding periods (c1, c2), the analog switch 151 is maintained in the OFF state, and the black insertion voltage at the B-SIG terminal is not applied to the source signal line S. However, in FIG. 16, since the video signal and the black insertion voltage are alternately applied to the source signal line S, the analog switch 151 is also turned on during the video signal application period. Further, the black insertion voltage applied to the B-SIG terminal changes the voltage value and polarity in synchronization with the gate driver circuit 12 or the gate signal line G selected by the gate driver circuit 12. Further, the number of gate signal lines G to be selected simultaneously is not limited to one, and a plurality of gate signal lines may be selected simultaneously. By simultaneously selecting a plurality of gate signal lines G, the period a can be shortened, the holding period (panel lighting period) can be lengthened, and high luminance display can be realized.

  A black insertion voltage is applied to the B-SIG terminal. The black insertion voltage changes polarity in accordance with the AC video signal applied to the liquid crystal layer. The absolute value of the voltage applied to the liquid crystal layer is large when the panel temperature is low and low when the panel temperature is high. Therefore, it is preferable to change the black insertion voltage in accordance with the panel temperature. Needless to say, the above matters also apply to other embodiments of this embodiment such as FIGS.

  In FIG. 9, FIG. 11, FIG. 14, FIG. 16, etc., it is assumed that the black insertion voltage is transmitted during period a. The black insertion voltage is a voltage applied to the liquid crystal layer. As described with reference to FIG. 8, the black insertion voltage is generated by the common signal applied to the corresponding electrode and the video signal applied to the pixel electrode. In this specification, the black insertion voltage is transmitted during the period a. However, the video signal data may be transmitted, the common signal data may be transmitted, or both may be transmitted. However, it is preferable to transmit a video signal corresponding to the black insertion voltage during the period a when the pixel characteristic or gradation display displayed by the pixel is used.

  In the embodiment illustrated in FIG. 14, the period “a” is described as a no-signal period, but the black insertion voltage may be transmitted as in FIG. 11. The length of the period a is 1F / 4, but is not limited to this. For example, the panel temperature may be detected using the temperature detection and temperature control circuit of FIG. 13, and the period a may be varied according to the detected temperature. In this embodiment, it is preferable to lengthen the period a when the panel temperature is low and to shorten the period a when the panel temperature is high than when the panel temperature is low. Or it can be shortened.

  Further, control data related to the video signal, such as gamma conversion data that changes in accordance with the panel temperature during the period a shown in FIG. 14, may be transmitted. Further, control data for changing or setting the operation of the panel module may be transmitted. The above matters are the same for c1 and c2.

  In the method of FIG. 14, the black insertion voltage is generated by the panel itself during period a, and the black insertion voltage is applied to the pixel 16. The video signal is transmitted at a quadruple speed as an example, and is written in the pixel 16 in accordance with the transmission speed. Therefore, in the method of FIG. 14, it is not necessary to hold the black insertion voltage and the video signal. Therefore, no frame memory is required.

  As described above, the frame rate conversion of the input video signal is unnecessary in the method of FIG. Further, a memory for storing the input video signal is not necessary. Therefore, the frame memory capacity can be reduced and the circuit configuration is simple.

  Hereinafter, the “double speed transmission method” illustrated in FIG. 16 will be described. The input video signal is double speed. The video signal is transmitted in the first 1F / 2 period of one frame. For ease of explanation, it is assumed that the input video signal is double speed and the period during which the video signal is transmitted is 1F / 2. However, the present invention is not limited to this. Similarly to FIG. 12, the transmission period of the video signal including the application period of the black insertion voltage may be changed or varied. This is because in FIG. 12, the black insertion voltage is self-generated during the video signal transmission period. The black insertion voltage application period varies or varies depending on the panel temperature and the like. Accordingly, the video signal period of FIG. 16 also changes corresponding to the change of the black insertion voltage period.

  The video signal (denoted as “video” in FIG. 16) transmitted during the 1F / 2 period is stored in the line memory. Reading from the line memory is performed at double speed. Since the input signal is double speed and is read at double speed, the speed of the video signal written to the panel is 2 × 2 = 4 times speed. Generation of the black insertion voltage and application to the pixel 16 are performed in the configuration of FIG.

  As described above, the frame rate conversion of the input video signal is unnecessary in the method of FIG. Further, the input video signal is stored in the line memory and read out at a double speed, so that it can be adapted to the driving method of the present embodiment. Therefore, the frame memory can be reduced and the circuit configuration is simple. In addition, since the input video signal to be transmitted is double speed, EMI countermeasures are relatively easy.

  17 and 18 are explanatory diagrams of the driving method of the present embodiment shown in FIG. As described with reference to FIG. 3, the black insertion voltage and the video signal are alternately applied to the source signal line S. Therefore, in the display area 20 of the panel, the black display portion 20b (area to which the black insertion voltage is applied) moves from the top to the bottom of the screen 20 corresponding to the scanning direction. In the black display portion 20b, since the black insertion voltage is applied, the bend alignment state of the OCB liquid crystal is maintained. On the other hand, after the black insertion voltage is applied, the transmitted video signal is applied to the pixel and image display is performed.

  FIG. 17 is implemented in the video signal transmission period of FIG. 16 (1F / 2 period in the first half of one frame). At the same time, the black insertion voltage is applied in the circuit of FIG. The period of FIG. 17 is a period when the backlight is off (extinguishment) as shown in FIG. The region 20b to which the black insertion voltage is applied and the video display region 20a are not visually recognized. This is because the backlight is off.

  FIG. 18 shows the holding period c (c1, c2). The image rewriting is completed and the image is retained. That is, the 1F / 2 period in the latter half of one frame corresponds. At this time, the backlight is in an on (lighting) period.

  Note that the on / off control of the backlight in FIG. 16 is set to 1F / 2 for easy explanation and easy understanding. However, the lighting period is shorter than 1F / 2 for the reason described below.

  In the driving method of FIG. 16, the transmission of the video signal is double speed. Therefore, the transmission speed of the video signal is lower than that of the embodiment of FIGS. 11 and 14, and EMI countermeasures are easy. In addition, since the transmission speed is low, power consumption can be reduced. Control by turning on the backlight is the same as in FIG. Therefore, it is possible to realize an image display with good moving image visibility.

  In the embodiment of FIG. 16, the on / off control of the backlight is performed all over the entire area. Accordingly, the backlight cannot be turned on unless the black insertion voltage application and the video signal application in FIG. 17 are completed. This is because the upper part of the screen is fast and the application of the video signal is completed after the black insertion voltage is applied, but the lower part of the screen (the last area of the scan) is the slowest to hold the video signal. The backlight is turned on simultaneously on the entire surface. Therefore, the video holding period is different between the upper part and the lower part of the screen, and the backlight can be turned on only during the shortest video holding period. In addition, when the backlight is turned on even when the writing of the video signal is not completed, the brightness of the screen is inclined (the upper part of the screen is bright and the lower part of the screen is dark).

  FIG. 19, FIG. 23, FIG. 24, etc. are explanatory views of a driving method for solving this problem in this embodiment. FIG. 19 is a configuration diagram of a backlight. FIG. 20 is an explanatory diagram of a light guide plate constituting the backlight of FIG. The light guide plate 192 has a configuration in which a plurality of fibers 201 are bundled. Light is transmitted mainly in the longitudinal direction of the fiber 201. That is, light is transmitted in the longitudinal direction of the light guide plate 192. The light leaking from the fiber 201 is also transmitted in the lateral direction.

  A plurality of light guide plate components H (H1 to Hn, corresponding to the light guide plate 192) in FIG. 20 are arranged as shown in FIG. 19, and constitute a backlight. LEDs 191 as light generating means are disposed at both ends of the light guide plate 192. The LED is exemplified by a white LED, and in addition, red (R), green (G), and blue (B) LEDs are exemplified. A fluorescent tube or the like may be used as the light generating means.

  Light 193 generated from the LED 191 reflects inside the light guide plate 192. Light incident on the side surface of the light guide plate 192 is reflected. Since the light guide plate 192 includes the fibers 201 as illustrated in FIG. 20, the light 193 efficiently propagates in the longitudinal direction. As shown in FIG. 22, the liquid crystal display panel of the present embodiment is disposed on the upper surface of the backlight 18 composed of the light guide plate 192. A diffusion sheet 221 is disposed between the backlight 18 and the liquid crystal display panel. The diffusion sheet 221 is configured to have a high degree of diffusion of the boundary so that the boundary of the light guide plate 192 is not particularly noticeable.

  19 and 22, the backlight 18 can be illuminated in a strip shape (shown by A) as shown in FIG. By turning on the LED 191 in the area A, the light generated from the LED 191 propagates in the longitudinal direction of the light guide plate 192 and illuminates the display area 20a of the liquid crystal display panel. At this time, the LEDs 191 of B1 and B2 are turned off. Therefore, the display area 20b of the liquid crystal display panel is a non-display area.

  The lighting position of the LED 191 moves in synchronization with the video signal writing position to the liquid crystal display panel. This state is illustrated in FIG. 23 corresponds to the black insertion period a and the video writing period b as in FIG. 17, and FIG. 24 corresponds to the holding period c as in FIG.

  In FIG. 23, a black insertion voltage is applied to the display area 20b in the liquid crystal display panel, and the display area 20b moves from the top to the bottom in synchronization with the video signal write timing. The area or position of the non-lighting area 61b of the backlight 18 is controlled so as to overlap the display area 20b. That is, the area of the display region 20b is smaller than the area of the non-lighting region 61b. The period of FIG. 23 is a 1F / 2 period, and the old image (indicated by A) is rewritten to the new image (indicated by B) during this period. Writing of the black insertion voltage and the video signal is the same as in FIGS. The driving state of FIG. 24 is the same as the driving state of FIG.

  In the embodiment of FIG. 19, the backlight is configured by at least three light guide plates 192. FIG. 25 is an embodiment in which the configuration of the backlight 18 is simplified and configured by one light guide plate. The light guide plate 18 in FIG. 25 may be composed of two light guide plates 18A and 18B.

  On the upper side of the light guide plate 18, light generating means such as an LED 191a is disposed. On the lower side of the light guide plate 18, light generation means such as an LED 191 b is disposed. The backlight 18a is illuminated by turning on the LED 191a. The light generated by the LED 191a is configured so that the backlight 18b hardly illuminates. The backlight 18b is illuminated by turning on the LED 191b. The light generated by the LED 191b is configured so that the backlight 18a hardly illuminates.

  The on / off (lighting / non-lighting) control of the LEDs 191a and 191b is performed in synchronization with the video signal writing position. This driving state is shown in FIG. A black insertion voltage is applied to the display area 20 sequentially from the top of the screen. A region to which the black insertion voltage is applied becomes a black display region 20b. The black display area 20b moves in a strip shape from the top to the bottom of the screen. When the black display area 20b is in the upper half of the screen, the LED 191b is turned on and the LED 191a is turned off. Therefore, the backlight 18a is in a non-display state, and the backlight 18b is in a lighting state.

  When the black display area 20b moves and reaches below the center of the screen, the LED 191b is also turned off and the backlight 18b is also not displayed. When it further moves and the black display area 20b is located in the lower half of the screen, the LED 191a is turned on and the LED 191b is turned off. Therefore, the backlight 18b is in a non-display state, and the backlight 18a is in a lighting state.

  In FIG. 26, a black insertion voltage is applied to the display area 20b in the liquid crystal display panel, and the display area 20b moves from the top to the bottom in synchronization with the video signal write timing.

  The period of FIG. 26 is a 1F / 2 period, and the old image (indicated by A) is rewritten to the new image (indicated by B) during this period. Writing of the black insertion voltage and the video signal is the same as in FIGS. The driving state of FIG. 27 is the same as the driving state of FIG.

  In the present embodiment, the luminance gradient may occur due to the difference in transmittance response between the upper and lower rows of the screen 20 due to the delay in the liquid crystal response. Such a luminance gradient is a format in which a vertical scanning direction for selecting a plurality of pixel rows is scanned, for example, from the upper end row to the lower end row in an odd frame and from the lower end row to the upper end row in an even frame. This can be suppressed by reversing every frame period. In addition, amplitude modulation of the video signal may be performed in accordance with the generated luminance gradient. Further, the amplitude value of the common voltage signal VCOM may be modulated in accordance with the generated luminance gradient.

  In the present embodiment, the liquid crystal layer 24 has been described as being an OCB liquid crystal, but is not limited thereto. For example, a liquid crystal in a TN (Twisted Nematic) mode, an IPS (In-plane Switching) mode, or a VA (Vertically Aligned) mode may be used. In these liquid crystals, the black insertion period a may be deleted. That is, it is not necessary to perform black writing. In addition, the driving method of the liquid crystal display panel of the present embodiment can be realized by using ferroelectric liquid crystal or anti-ferroelectric liquid crystal. Moreover, a liquid crystal display device can be comprised using these.

  In the embodiment of the present specification, the backlight 18 is always lit during the video holding period c (c1, c2), but the present embodiment is not limited to this. In the video holding period c or the like, the backlight 18 may be controlled to blink at high speed, the amount of light emitted from the backlight 18 may be adjusted, and the brightness may be controlled. In other words, the technical idea of the present embodiment is to make the image visible during the video holding period c, and to make the image of the liquid crystal display panel not visible during the black insertion period a or the like. It is a technical idea. Further, the backlight may blink at a frequency of 1 KHz or more and 15 KHz in the video holding period c or the like. In the black insertion period a, the backlight is turned off. Or it controls to a substantially light extinction state.

  The technical ideas such as the liquid crystal display panel, liquid crystal display device or driving method or control method or method described in the embodiment of the present invention are a video camera, a projector, a stereoscopic (3D) television, a projection television, a viewfinder, and a mobile phone. It can be applied to main monitors and sub-monitors, clock display units, PHS, and portable information terminals.

  Note that the present embodiment is not limited to the above-described embodiments, and various modifications and changes can be made without departing from the scope of the invention at the stage of implementation. Moreover, each embodiment may be implemented in combination as appropriate as possible, and in that case, a characteristic effect by the combination can be obtained.

It is a block diagram of a liquid crystal display panel. It is explanatory drawing of operation | movement of OCB liquid crystal. It is explanatory drawing of the drive method of the conventional liquid crystal display panel. It is explanatory drawing of the drive method of the conventional liquid crystal display panel. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is a block diagram of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive circuit of the liquid crystal display panel of this embodiment. It is a block diagram of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is a block diagram of the liquid crystal display device of this embodiment. It is a block diagram of the liquid crystal display device of this embodiment. It is a block diagram of the liquid crystal display device of this embodiment. It is a block diagram of the liquid crystal display device of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is a block diagram of the liquid crystal display device of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive circuit of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment. It is explanatory drawing of the drive method of the liquid crystal display panel of this embodiment.

Explanation of symbols

11 Controller circuit 12 Gate driver circuit 14 Source driver circuit 15 Array substrate 16 Pixel 17 Backlight driver circuit 18 Backlight 19 Liquid crystal display panel 20 Image display area 21 Counter substrate 22 Counter electrode 23 Pixel electrode 24 Liquid crystal layer

Claims (4)

An array substrate in which a plurality of source signal lines and a plurality of gate signal lines are wired orthogonally on an insulating substrate, and a thin film transistor is formed in the vicinity of the intersection of the source signal lines and the gate signal lines, A liquid crystal display panel having a counter substrate made of an insulating substrate;
A source driver circuit for supplying a video signal to the plurality of source signal lines;
A gate driver circuit for supplying a gate signal to the plurality of gate signal lines;
A common signal application circuit that inverts and applies the polarity of the common signal voltage to the counter electrode of the counter substrate at regular intervals;
A backlight disposed on the liquid crystal display panel;
In a liquid crystal display device comprising:
A control circuit for sequentially realizing a black insertion period, a video writing period, and a video holding period in one frame for the liquid crystal display panel;
A backlight drive circuit that turns off the black insertion period and the video writing period, and turns on the video holding period;
Video signal input means for inputting the video signal at double speed or quadruple speed in one frame period;
Having
A liquid crystal display device characterized by the above. 2. The liquid crystal display device according to claim 1, wherein the black insertion video signal written in the black insertion period is also input at a double speed or a quadruple speed of one frame period. The liquid crystal display device according to claim 1, wherein the control circuit performs frame inversion driving. The liquid crystal display device according to claim 1, wherein the liquid crystal display panel sandwiches an OCB liquid crystal.

Images