JP2007281516A - Method for manufacturing semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent film peel-off and cracks in an interlayer insulating layer of a multilayer wiring. <P>SOLUTION: A method for manufacturing a semiconductor device includes a step of preparing an underlying structure having a silicon carbide layer covering a copper wiring, a step of treating the surface of the silicon carbide layer of the underlying structure with a plasma of weak oxidizing gas which has a molecular weight larger than that of O<SB>2</SB>and contains oxygen, to bring the surface more hydrophilic, and a step of forming a low permittivity insulating layer with relative permittivity smaller than that of silicon oxide on the surface of the silicon carbide layer which is brought to be more hydrophilic. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a low dielectric constant insulator suitable for use in a semiconductor integrated circuit having multilayer wiring.

  As semiconductor integrated circuit devices become highly integrated, the wiring scale of integrated circuit devices tends to increase with each generation. As the wiring scale increases, the number of wiring layers also increases, and multilayer wiring is adopted. With higher integration, the wiring interval in the semiconductor integrated circuit device becomes narrower.

  The wiring interval is the narrowest in the lower layer wiring and tends to increase as it goes to the upper layer. The lower layer wiring has many wires that propagate signals, and the upper layer wiring has more power wires. The conditions required for the multilayer wiring are not all the same because of these characteristic differences.

The signal propagation speed in the wiring is governed by the wiring resistance and the parasitic capacitance between the wirings. For high-speed operation, it is desired to reduce the wiring resistance and the wiring parasitic capacitance.
In order to reduce the resistance of wiring, Cu wiring has been used instead of Al wiring. However, it is difficult to use a wiring material having a lower resistivity than Cu. As the resistance of wiring approaches the limit, it is necessary to reduce the parasitic capacitance of the wiring in order to increase the operation speed. When a Cu wiring is used, a diffusion prevention film such as SiN or SiC is used to cover the Cu wiring in order to prevent Cu oxidation and diffusion.

  When the wiring interval is narrowed, the parasitic capacitance between the wirings increases with the same wiring thickness. In a device having a wiring interval of 1 μm or more, the influence of the parasitic capacitance on the device operation speed was small. When the wiring interval is 0.5 μm or less, the influence of the parasitic capacitance on the device operation speed becomes large. In the future, when the wiring interval is 0.2 μm or less, the parasitic capacitance is expected to greatly affect the device operation speed.

  If the wiring thickness is reduced and the area facing the wiring is reduced, the parasitic capacitance between the wirings can be reduced. However, if the wiring thickness is reduced, the wiring resistance increases, and the overall speed is not increased.

  In order to reduce the parasitic capacitance of the wiring, the most effective means is to lower the dielectric constant of the insulating layer between the wirings. An insulating material having a lower relative dielectric constant is used instead of silicon oxide (USG) having a relative dielectric constant of about 4.1, P-doped silicon oxide (PSG), B, or P-doped silicon oxide (BPSG). It became so.

  Porous materials such as organic insulators (registered trademark SiLK, registered trademark FLARE, etc.) having a very low dielectric constant and porous silicon oxide have come to be used. These materials have properties that are significantly different from those of silicon oxide, and it is difficult to use them for all interlayer insulating layers of multilayer wiring from the viewpoints of strength and reliability. Therefore, these materials are mainly used for lower layer wiring.

Silicon oxycarbide (SiOC) has attracted attention as another insulating material having a low dielectric constant. Vapor growth silicon oxycarbide available from Novellus, called the registered trademark CORAL, uses tetramethylcyclotetrasiloxane (TMCTS), oxygen (O ₂ ), carbon dioxide (CO ₂ ) as a source gas, and has a flow rate. Deposited by performing plasma enhanced CVD with TMCTS: O ₂ : CO ₂ = 5: 250: 5000 (ml / min, sccm), gas pressure 4 torr, HF (13.56 MHz) power 600 W, LF (1 MHz or less) power 400 W It is formed at a speed of about 1000 to 1200 nm / min.

  This insulating material called CORAL has Si—O—C as a main skeleton, has a relative dielectric constant of about 2.9, and has a dielectric constant much lower than that of silicon oxide. It is a promising insulating material as an interlayer insulating layer material for multilayer wiring.

There is also a proposal that uses a silicon oxycarbide layer as a part of a hard mask layer and then leaves it as a part of an interlayer insulating film having a low dielectric constant (Patent Document 1).
A low relative dielectric constant material generally has low adhesion to a base formed, for example, as a Cu diffusion prevention film. When an interlayer insulating film with low adhesion is used and the number of wiring layers is increased, film peeling occurs at the interface with the base layer.

  In multilayer wiring, it is desirable to use a stack of a plurality of low dielectric constant insulating layers having different thermal expansion coefficients. Low dielectric constant materials generally tend to have low density and low mechanical strength. If there is a mismatch in the thermal expansion coefficient between the insulating layers, a large stress is generated at the interface, and a crack occurs in the insulating layer having a low relative dielectric constant.

JP 2003-218109 A

  An object of the present invention is to provide a method for manufacturing a highly reliable semiconductor device using an insulating material having a low dielectric constant.

According to one aspect of the present invention, a step of preparing a base structure having a semiconductor substrate, a copper wiring formed above the semiconductor substrate, and a silicon carbide layer covering the copper wiring, and a silicon carbide layer surface of the base structure the, O ₂ larger molecular weight than the steps of the hydrophilic treatment by plasma of weak oxidizing gas containing oxygen, on the silicon carbide layer surface treated hydrophilic, small relative dielectric constant than silicon oxide low dielectric constant insulating layer And a method for manufacturing a semiconductor device.

Adhesion can be improved.
A highly reliable and high performance semiconductor device can be manufactured.

Hereinafter, examples of the present invention will be described with reference to the drawings and experiments conducted by the present inventors.
Vapor-grown silicon oxycarbide (registered trademark CORAL) film, available from Novellus, has a low dielectric constant of about 2.9, but has low adhesion to SiC layers, etc., hardness, elasticity There is a tendency for physical strength such as constants to be insufficient.

  The inventors of the present invention have attempted to improve the physical strength by improving the adhesion of the silicon oxycarbide film that is vapor-phase grown by developing new CVD conditions. Hereinafter, the conventional vapor-grown silicon oxycarbide film is referred to as CORAL, and the vapor-grown silicon oxycarbide film developed by the present inventors is referred to as TORAL or new SiOC. TORAL and new SiOC are also considered to have Si—O—C as the main skeleton.

FIG. 1A is a table showing growth parameters of the CORAL film and the TORAL film. As described above, CORAL grows at a flow rate of HF power of 600 W and LF power of 400 W under a pressure of 4 torr by flowing TMCTS as a source gas at a flow rate of 5 ml / min, O ₂ gas at 250 sccm, and CO ₂ gas at 5000 sccm.

The inventors have tried to improve physical strength by reducing the deposition rate. In order to reduce the deposition rate, the flow rate of TMCTS, which is the source gas, was reduced to 1/5 / min, 1/5, the HF power was reduced to 300 W, and the LF power was reduced to 200 W. In order to adjust the characteristics of the deposited film, the flow rate of O ₂ gas was decreased from CORAL and varied in the range of 0 to 200 sccm. The O ₂ flow rate was set to 0, 50, 80, 100, 120, 150, 200 (sccm).

  The TORAL deposition rate was 300 to 350 nm / min, which was about 1/4 to 1/3 of the CORAL deposition rate. The density of TORAL was about 1.6 to 1.7, clearly increased compared to the density of CORAL of about 1.4.

FIGS. 1B and 1C are graphs showing physical constants of the TORAL film deposited in this way.
FIG. 1B is a graph showing changes in hardness (hardness) and elastic constant (modulus) with respect to the oxygen flow rate. In the figure, the horizontal axis indicates the oxygen flow rate in units of sccm, the vertical axis indicates the hardness in units of GPa, and the elastic constant in units of GPa. Measurement points connected by a solid line are hardness data, and measurement points connected by a broken line are elastic constant data. White circles indicate the hardness and elastic constant of CORAL for comparison. For CORAL, the horizontal axis has no meaning (the oxygen flow rate is fixed at 250 sccm).

As is apparent from the figure, there are slight changes with the O ₂ flow rate of 100 and 120 (sccm), but a constant hardness and elastic constant are shown almost independently of the O ₂ flow rate. The hardness of TORAL is increased to about 3 GPa while the hardness of CORAL is about 2 GPa. The elastic constant is also increased to about 20 GPa in TORAL as compared to about 13 GPa in CORAL. Thus, TORAL has a significantly increased physical strength compared to CORAL. Therefore, it is expected that the occurrence of cracks is reduced. It is considered that the reduction of the source gas TMCTS and oxygen is effective in reducing the deposition rate and effective in improving the physical strength.

The physical strength is less dependent on the oxygen flow rate. From the viewpoint of physical strength, it is considered that the oxygen flow rate can be reduced as much as possible.
FIG. 1C is a graph showing a change in relative dielectric constant with respect to a change in oxygen flow rate. The horizontal axis represents the oxygen flow rate in sccm, and the vertical axis represents the relative dielectric constant. As is clear from the figure, the relative permittivity decreases as the oxygen flow rate decreases. The increase in the dielectric constant is significant above the oxygen flow rate of 100 sccm, especially above 150 sccm. In order to keep the dielectric constant low, the oxygen flow rate is preferably 150 sccm (3% of the flow rate of CO ₂ gas) or less, particularly preferably 100 sccm (2% of the flow rate of CO ₂ gas) or less.

In a device currently under development, in order to satisfy the capacity design value, the relative dielectric constant needs to be 3.1 or less. TORAL satisfying this condition is a sample having an oxygen flow rate of 50 sccm and an oxygen flow rate of 0. In order to set the relative dielectric constant to about 3.1 or less, it is preferable to set the oxygen flow rate to 50 sccm (1% of the flow rate of CO ₂ gas) or less. The relative dielectric constant of these samples is approximately equal to or slightly higher than the relative dielectric constant of CORAL of about 2.9. As shown in FIG. 1B, the hardness and the elastic constant can be significantly increased as compared with the value of CORAL.

  FIG. 2A shows the composition of the film examined by Rutherford backscattering or the like. The measurement error is close to ± 2%. Even if accuracy is increased by averaging, there will be an error of ± 1%. TORAL samples were examined with oxygen flow rates of 0, 50 and 150 (sccm). For comparison, ESL3, silicon carbide (SiC) available from CORAL and Novellus, was also measured. Vapor-grown silicon carbide films contain a considerable amount of H and O in addition to Si and C. Since it is silicon carbide, the main skeleton is Si-C, and H and O will be bonded to the outside in some form.

  CORAL, which is a silicon oxycarbide film, has a clear increase in oxygen composition and a decrease in other components compared to ESL3. Silicon oxycarbide is considered to have a main skeleton of Si—O—C. Even if silicon carbide (ESL3) contains about 20% of Si, O, and C, respectively, the Si—O—C skeleton will be substantially absent. The composition of TORAL increases Si, O increases at least slightly, and H decreases compared to the composition of CORAL. In TORAL having an oxygen flow rate of 50 sccm or less, carbon (C) is more than about 2 at% and hydrogen (H) is about 12 at% less than CORAL.

The composition of carbon (C) increases with decreasing oxygen flow rate in TORAL. It can be considered that the increase in the C content increases the influence of CO ₂ . Considering that it is desired that the oxygen flow rate be 50 sccm or less in order to realize a relative dielectric constant of about 3.1 or less, the composition of carbon (C) is about 18 at% or more (or 17 at% or more). preferable. According to the results of this experiment, the C composition is preferably about 18 to 21 at% (17 to 22 at%). Although the relative permittivity is expected to decrease as the C composition increases, a state where the C content is clearly higher than that of Si is considered to cause a problem in physical properties, and is preferably about 25 at% or less (26 at% or less). I will.

  The composition of hydrogen (H) is about 20 at% or less (21 at% or less), which is much less than about 32 at% of CORAL. Hydrogen is not an element necessary for silicon oxycarbide, but is a component that enters incidentally in order to use TMCTS as a raw material. Furthermore, it is considered that hydrogen has a function of terminating cross bonds by terminating bonds of Si, C, and O. Therefore, it is considered that the smaller the hydrogen composition, the better. Even if oxygen is flowed at 150 sccm, the hydrogen composition exists at about 11 at%. Therefore, when the oxygen flow rate is set at 50 sccm or less, it will be difficult to reduce the hydrogen composition to about 11 at% or less.

FIG. 2B shows infrared absorption spectra of the CORAL film and the TORAL film. The horizontal axis indicates the wave number in cm ⁻¹ and the vertical axis indicates the absorption. Absorption, which is considered to be caused by Si-H in the vicinity of a wave number of 2200 to 2300 cm ⁻¹ , is clearly observed in CORAL, but is reduced to a level that is hardly recognized in TORAL. Absorption caused by C—H near a wave number of 3000 cm ⁻¹ is reduced in TORAL compared to CORAL. A decrease in Si—H and C—H is considered to indicate a decrease in terminated bonds and an increase in crosslink density. If the cross link increases, it is expected that physical strength such as hardness and elastic constant will increase. An increase in C and a decrease in H in composition meet this expectation.

  SiC used as a copper diffusion preventing film is strictly hydrophilic but has a surface close to water repellency (hydrophobicity). A SiC / SiOC / SiC structure in which a silicon oxycarbide film was sandwiched between silicon carbide films was prepared, and a stud-pull test was performed using a Sebastian tester.

  FIG. 3 is a graph showing the results of the stud pull test. The vertical axis shows the strength of the stud pull test in MPa. Sample c is a sample in which a conventional CORAL is sandwiched between SiC layers. Sample s1 is a sample in which TORAL is sandwiched between SiC layers instead of CORAL. It can be seen that the adhesion is clearly improved. Further, in the CORAL sample, peeling at the underlying SiC / CORAL interface was much, whereas in the TORAL sample, there was no peeling at the interface.

  Sample s2 is a sample in which a TORAL layer of 50 nm is formed on the lower SiC layer with an HF power of 90 W, a conventional CORAL layer is formed thereon, and a SiC layer is formed thereon. In this case, it cannot be said that the adhesion is necessarily improved.

  Sample s3 has the same configuration as sample s2, but shows a case where the HF power during the formation of the TORAL layer is increased from 90 W to 200 W. It can be said that the adhesiveness is considerably improved and the adhesiveness is equal to or higher than that of the conventional CORAL. To improve the adhesion, it seems preferable to increase the HF power during TORAL film formation.

The SiC layer has a surface close to water repellency. When a silicon oxycarbide film is formed on the surface close to water repellency, the adhesion may be lowered. Adhesion will improve if the surface of the SiC layer can be converted to more hydrophilic. Attempts were made to make the surface more hydrophilic by weakly oxidizing with CO ₂ plasma. The CO ₂ plasma treatment was performed by a microwave-excited plasma down flow treatment, with a CO ₂ flow rate of 5000 sccm, a pressure of 4 torr, an RF power of 100 (90 to 200) W, and a treatment time of 5 seconds.

Sample s4 in FIG. 3 is a sample in which the surface of the lower SiC layer was treated with CO ₂ plasma (the surface was converted to more hydrophilic property), and then the CORAL layer was deposited and the SiC layer was deposited thereon. It can be said that the strength of about 70 MPa or more is obtained and the adhesion is clearly improved. Again, there was no delamination at the SiC / CORAL interface.

In the results of FIG. 3, the adhesion is most improved when the SiC surface is hydrophilically treated with CO ₂ plasma. This is presumably because the surface of the underlying SiC has changed more hydrophilic.

When treated with O ₂ plasma instead of CO ₂ plasma, the adhesion decreased. The O ₂ plasma treatment conditions were an O ₂ flow rate of 500 sccm, a pressure of ₂ torr, a power of 200 W, and a time of 2 seconds.

In the sample not subjected to the CO ₂ treatment, the result of the stud pull test was 55 MPa, whereas the strength of the result of the stud pull test of the CO ₂ treated sample was 70 MPa or more, which clearly showed an improvement in adhesion. . As described above, there was no peeling at the SiC / CORAL interface. The result of the stud pull test of the sample treated with O ₂ plasma was 45 MPa, and the adhesion decreased. Peeling at the SiC / CORAL interface was the mainstream. In the O ₂ plasma treatment, it is considered that oxidation occurs excessively and the adhesiveness deteriorates due to surface alteration.

In order to perform plasma treatment that does not cause excessive oxidation, the above-described microwave-excited plasma downflow treatment or the like may be suitable.
When the oxygen flow rate during the TORAL film formation is set to a small amount of 0 to 50 sccm, the O ₂ composition of the source gas in the chamber decreases and the CO ₂ composition relatively increases. It is considered that the plasma of the source gas approaches the CO ₂ plasma. It can be considered that the fact that the TORAL film exhibits high adhesion with the SiC film is consistent with the fact that the SiC layer treated with CO ₂ plasma and the CORAL film formed thereon exhibit high adhesion. A plasma of gas that does not contain oxygen and contains CO ₂ , or a plasma of gas in which the oxygen flow rate is limited to a low level with respect to the CO ₂ flow rate gives good results.

Considering these results, it is considered effective to improve the adhesion by gently oxidizing the surface of the water repellent such as SiC or the like. Considering that the result is poor with O ₂ plasma and that the result is improved with CO ₂ plasma, it is considered preferable to perform the surface treatment with a plasma of a gas having a molecular weight higher than that of O ₂ and containing oxygen. Other CO _2, it is conceivable to use a gas such as NO _2.

The present inventors further studied the conditions for forming a silicon oxycarbide film having physical strength and a low relative dielectric constant by selecting plasma CVD conditions.
FIG. 10 schematically shows the configuration of the plasma CVD apparatus used. The lower electrode 50 also serves as a susceptor on which six 8-inch wafers are placed. The susceptor includes a transfer mechanism that transfers each wafer. Six upper electrodes 51 a, 51 b, 51 c, 51 d, 51 e, 51 f are arranged so as to face the lower electrode 50, and constitute six sets of parallel plate electrodes. These constitute stages S0-S5.

  Each upper electrode is connected to a high frequency (HF) power supply 52a, 52b. . . 52f. The lower electrode 50 is connected to a lower frequency (LF) high frequency power supply 53. The upper electrode 51 also serves as a shower head for the supply gas. The lower electrode 50 includes a heater block. When supplying high frequency power to all stages, the total high frequency power is divided into six equal parts and supplied to each stage. A high frequency power can be supplied by selecting a stage. By applying a high frequency voltage between the lower electrode 50 and the upper electrode 51, plasma can be generated on a predetermined wafer.

  The loaded wafer is first placed on the first stage S0 under the first upper electrode 51a and subjected to processing. Thereafter, the second stage S1, the third stage S2, the fourth stage S3, the fifth stage S4, and the sixth stage S5 are sequentially subjected to processing, and then are carried out to the outside. Hereinafter, experimental results of performing the same process in each stage to create a silicon oxycarbide film are shown. Unless otherwise specified, the gas supply amount and high-frequency power are the sum of the six stages.

FIG. 11 shows the experimental sample conditions and the results obtained. Note that a part of the sample having a large film thickness non-uniformity is excluded. The source gas was fixed to TMCTS: 1 ml / min, (O ₂ : 0 sccm), CO ₂ 5000 sccm. The deposition rate, the non-uniformity of the film thickness in the wafer, and the refractive index were measured by changing the pressure in the chamber, the high frequency power HF applied to the upper electrode, and the high frequency power LF applied to the lower electrode. The film thickness was measured at 49 points in the wafer, and 1/2 of the difference between the maximum value and the minimum value with respect to the average value was displayed as%. The square of the complex refractive index (n + iκ) is equal to the dielectric constant. Refractive index n was measured as a physical constant closely related to the dielectric constant. However, the refractive index n is measured at the frequency of light, and the frequency is significantly different from the dielectric constant measured at the frequency of the electrical signal.

  Sample 1 corresponds to the above-described TORAL with an oxygen flow rate of 0. Samples 1 to 4 are obtained by making the HF power and the LF power the same and gradually reducing the pressure in the chamber. When the pressure in the chamber is decreased, the deposition rate is gradually decreased. It is considered that this corresponds to a decrease in the source gas supplied onto the wafer as the pressure decreases. As the deposition rate decreases, the film thickness non-uniformity decreases (uniformity improves). The refractive index gradually increases with decreasing deposition rate.

  The hardness, Young's modulus, and relative dielectric constant were measured by paying attention to sample 3 at a pressure of 3.5 torr, where the uniformity of the film thickness was relatively good, the refractive index did not increase much, and the plasma stability was good. According to the above experimental results, the hardness of sample 1 is 3, the Young's modulus is about 20 GPa, and the relative dielectric constant is about 3.0. The hardness of Sample 3 is increased to about 4.0, and the Young's modulus is also increased to 23.6. The relative dielectric constant is maintained at about 3.0. Therefore, it can be said that Sample 3 is an excellent low dielectric constant insulating layer having an increased physical strength as compared with Sample 1 and maintaining the same relative dielectric constant. Hereinafter, this novel SiOC is referred to as SiOC-A.

  Samples 5 to 9 show results when the pressure is fixed at 3.5 torr and the HF power and LF power are increased. When both HF power and LF power are increased, the deposition rate gradually increases with the exception of sample 6. It seems that there is no regularity in the film thickness nonuniformity and refractive index. The physical properties of Samples 6 and 9 were measured in consideration of plasma stability and the like. Sample 6 has a hardness of 3.5, a Young's modulus of 24.7, and a relative dielectric constant of 3.2. Sample 9 has a hardness of 4.4, a Young's modulus of 30.1, and a relative dielectric constant of 3.3. The physical strength of hardness and Young's modulus is superior to the above-mentioned TORAL, but the relative dielectric constant becomes 3.2 or more. The use as a low dielectric constant insulating layer will be limited. It is speculated that simply increasing the high frequency power will increase the dielectric constant.

  Samples 10 to 14 show the results of increasing the chamber internal pressure to 3.5 torr, fixing the LF power applied to the lower electrode to 200 W, and increasing only the HF power applied to the upper electrode from 400 W to 600 W. Sample 10 exhibits an exceptionally high deposition rate and low film thickness non-uniformity, while Samples 11-14 show a gradually increasing deposition rate with increasing HF power. The non-uniform film thickness is much lower in Samples 13 and 14. It appears that the refractive index tends to decrease with increasing HF power. In particular, the refractive index of sample 14 is low. The physical properties of Sample 14 were a hardness of 3.6 GPa, a Young's modulus of 23.4 GPa, and a relative dielectric constant of 3.2. Although its hardness and Young's modulus are high, its relative dielectric constant is also high, and its use as a low dielectric constant insulating layer is limited.

  Samples 15 to 18 show the results of changing the HF power and LF power while fixing the pressure in the chamber to 4.0 torr. Sample 15 has the same conditions as Sample 1, but the deposition rate is slightly higher and the film thickness non-uniformity is reduced. It is thought that it shows the dispersion | variation in the process of the same conditions. Samples 16 to 18 are the results of fixing the HF power applied to the upper electrode to 600 W and changing the LF power applied to the lower electrode to 0, 200, and 400 W. Sample 16 shows the results assuming that the LF power applied to the lower electrode is zero. The deposition rate is significantly reduced to 89. In Samples 16, 17, and 18, the deposition rate increases rapidly with increasing LF power, and the film thickness non-uniformity decreases. The refractive index appears to increase with increasing deposition rate. It can be seen that the LF power applied to the lower electrode has a great influence on the film formation.

  Samples 19 to 22 show the case where the pressure in the chamber is increased to 4.5 torr. Samples 19 to 21 show a case where the LF power applied to the lower electrode is fixed at 200 W and the HF power applied to the upper electrode is increased to 600, 800, 900 W. As the HF power applied to the upper electrode increases, the deposition rate increases. Samples 20 and 21 have significantly reduced non-uniform film thickness compared to sample 19. The refractive index of Samples 19 to 21 is lower than that of Samples 1 to 18. When the physical properties of Sample 20 with low non-uniform film thickness and excellent plasma stability were measured, the hardness was 2.0, the Young's modulus was 17.3, and the relative dielectric constant was 2.85. Hardness 2.0 is almost the same as CORAL, but Young's modulus 17.3 is better than CORAL and relative dielectric constant 2.85 is lower than CORAL. Since the relative dielectric constant is low and the Young's modulus is improved, it can be used as a low dielectric constant insulating layer in various applications. Hereinafter, this novel SiOC is referred to as SiOC-B.

Sample 22 is a case where the LF power applied to the lower electrode is increased by 100 W compared to sample 21. The deposition rate is greatly increased and the film thickness is uniform, but the refractive index is increased.
Samples 23 and 24 show the case where the pressure in the chamber is further increased to 5.0 torr and the LF power applied to the lower electrode is 200 W. The HF power applied to the upper electrode was 1100 W and 1200 W. As the HF power increases, the deposition rate increases and the film thickness non-uniformity also increases, but the refractive index gradually decreases.

It was found that an insulating layer having a low relative dielectric constant can be formed by using TMCTS and CO ₂ without supplying oxygen as a source gas. In particular, Samples 3 and 20 have a low relative dielectric constant and are excellent as low dielectric constant insulating layers. However, in the sample 3, the plasma state is slightly unstable, and particles that appear to be caused by the flowing source gas are generated on the wafer when the plasma is extinguished.

Therefore, following the plasma CVD process, only CO ₂ gas is supplied to generate CO ₂ plasma, and the plasma CVD is switched to the CO ₂ plasma treatment, thereby terminating the CVD and lightly oxidizing the CVD film surface. It was. The CO ₂ plasma generation conditions are a CO ₂ flow rate of 5000 sccm, a pressure of 1 torr, and an HF power of 150 W. In sample 3, tens of thousands of 0.1 μmΦ particles are generated on a wafer having a diameter of 20 cm. By generating CO ₂ plasma during plasma extinction, the number of 0.1 μmΦ particles is several hundred or less, which is good. In some cases, the number could be reduced to about 100. In the plasma CVD apparatus of FIG. 10, although carried out by dividing the SiOC film deposited on six stages, was conducted CO ₂ plasma treatment following the SiOC film deposited at each stage.

Sample 3 was SiOC-A, a sample in which CO ₂ plasma was generated at the time of plasma extinction under the same conditions as sample 3 was SiOC-A; POX, sample 20 was SiOC-B, and the composition was measured. The composition measurement accuracy has an error close to ± 2 at%.

  FIG. 12 is a table showing the compositions of SiOC-A, SiOC-A: POX, and SiOC-B together with the composition of CORAL. The relative dielectric constant is also shown. SiOC-A has the same composition as TORAL with an oxygen flow rate of 0. In contrast to SiOC-A, in SiOC-B, carbon and silicon are each reduced by 3 at%, and hydrogen is increased by 7 at%. It seems that a phenomenon different from the dependence of TORAL on the carbon composition observed when the oxygen flow rate is decreased appears. Since the pressure is higher and the HF power is significantly higher than that of SiOC-A, the possibility of different phenomena cannot be denied. Compared to CORAL, the pressure and HF power are higher and the LF power is lower.

  When compared with SiOC-A, it is considered that crosslinks are reduced due to an increase in hydrogen, and mechanical strength is reduced. However, compared to CORAL, the hydrogen composition is significantly (about 5 at%) less and the carbon composition is about 2 at% more. The measured values of the carbon composition were 17.8 and 17.9. Considering the measurement error, it is within the above-mentioned preferable range of about 18 at% or more (17 at% or more). It can be said that it is 1 at% or more higher than the carbon composition of CORAL. The mechanical strength is higher than CORAL, and the relative dielectric constant is 2.85, which is lower than CORAL.

  The hydrogen composition is about 27 at% and is clearly lower than about 32 at% of CORAL. Corresponding to mechanical strength superior to CORAL. Silicon oxycarbide having a hydrogen composition of about 27 at% or less (28 at% or less) and excellent mechanical strength and a relative dielectric constant of about 3.1 or less has been realized. If the hydrogen composition is about 29 at% or less (30 at% or less), a low dielectric constant silicon oxycarbide having a mechanical strength superior to CORAL and a relative dielectric constant of about 3.1 or less can be realized.

SiOC-A: POX is obtained by performing surface treatment with CO ₂ plasma for 2 seconds in each of the six stages shown in FIG. 10 after the growth of SiOC-A, and the composition is considered to be almost the same as that of SiOC-A. Although the measured composition shows a large change from SiOC-A, it may have an effect of adsorbing moisture or the like on the oxidized surface after being taken out into the atmosphere. Although the dielectric constant increases, a significant reduction in the number of particles on the wafer surface is obtained.

FIG. 13 is a spectrum showing the infrared absorption of SiOC-A and SiCO-B compared to the reference (CORAL). The horizontal axis represents the wave number in cm ⁻¹ and the vertical axis represents the absorption intensity. Compared to the reference Ref, the absorption near 3000 cm ⁻¹ indicating the absorption of CH is decreased. Similarly, the absorption of C—H near 1270 cm ⁻¹ also decreases. Conversely, the absorption of Si—CH ₂ —Si near 1360 cm ⁻¹ is increased over the reference Ref. From this absorption spectrum, it can be seen that SiO bonds are reduced and cross links are increased in SiOC-A and SiOC-B as compared with reference Ref. It is considered that the physical strength increases due to an increase in cross links.

  Based on the above experimental results, an embodiment for forming a multilayer wiring of a semiconductor device will be described below. 4A, 4B, 5C, and 5D are cross-sectional views illustrating a method for manufacturing a semiconductor integrated circuit device according to an embodiment of the present invention.

  As shown in FIG. 4A, after an element isolation region, an element structure such as a MOS transistor, etc. are formed on a silicon substrate 100, a phosphosilicate glass (PSG) layer 11 is formed at a substrate temperature of 600.degree. 5 μm film is formed. After planarizing the surface of the PSG layer 11 by chemical mechanical polishing (CMP), a resist layer is formed on the surface, and a resist pattern having an opening for electrode extraction is created. The PSG layer 11 is etched using the resist pattern as a mask to form a via hole that exposes the lower connection region, and then the resist pattern is removed. For example, after a barrier layer such as Ti is formed, a W layer is formed by CVD or the like, and the via hole for electrode extraction is embedded. The W layer and the like deposited on the surface of the PSG layer 11 are removed by CMP to form a tungsten plug 12.

  A SiC layer 14 that is an etch stopper layer having an oxygen shielding ability is formed to cover the tungsten plug 12 using a registered trademark ESL3 of about 70 nm in thickness by Novellus. Next, the above-described TORAL silicon oxycarbide (SiOC) layer 15 is formed to a thickness of 550 nm. A silicon oxycarbide layer 15 with improved adhesion and physical strength is formed on the SiC layer 14.

  A SiC layer 17 functioning as a middle stopper layer is deposited on the surface of the SiOC layer 15 by using a registered trademark ESL2 manufactured by Novellus Co., Ltd., with a thickness of about 30 nm. Film. The SiOC layer 18 is also formed with improved physical strength and good adhesion to the SiC layer 17. Further, an antireflection film ARC1 such as a SiN film is formed on the surface.

  A photoresist layer PR1 having a via opening pattern is formed on the antireflection film ARC1. Using the photoresist pattern PR1 as an etching mask, the antireflection film ARC1, the SiOC layer 18, the SiC layer 17, and the SiOC layer 15 are etched.

  As shown in FIG. 4B, the photoresist pattern PR1 is removed, and a photoresist layer PR2 having a new wiring pattern opening is formed. The previously formed via hole is filled with the filling F. The filling F is a resist material from which photosensitivity is removed, for example. Using the photoresist layer PR2 having the wiring pattern opening as an etching mask, the antireflection film ARC1 and the SiOC layer 18 are etched. Thereafter, the photoresist pattern PR2 and the filling F are removed, and the exposed SiC layers 17 and 14 are selectively etched. In this way, a dual damascene recess is formed.

  As shown in FIG. 5C, a TaN barrier layer 19a having a thickness of about 30 nm and a Cu seed layer 19b having a thickness of about 30 nm are first formed on the concave surface for dual damascene by sputtering. The Cu layer 19b serves as a seed layer for plating. A Cu layer 19c is formed by plating on the surface of the Cu layer 19b. In this way, the dual damascene recess is filled with the Cu wiring. An unnecessary Cu layer or the like deposited above the SiOC layer (including the antireflection film ARC1) is removed by CMP. At this time, the antireflection film ARC1 can also be used as a stopper. The antireflection film ARC1 is also removed by CMP or etching.

  As shown in FIG. 5D, an SiC layer 24 having a thickness of about 70 nm is formed using Novellus registered trademark ESL3 so as to cover the formed Cu wiring 19. This SiC layer has a function of a copper diffusion prevention film.

  Further, as an interlayer insulating film for upper layer wiring, a SiOC layer 25 that is TORAL similar to the above is formed with a thickness of about 550 nm, a SiC layer 27 is formed thereon with a thickness of about 30 nm, and a SiOC layer 28 that is TORAL is further formed. A thickness of about 370 nm is formed. An antireflection film ARC2 is formed on the surface of the SiOC layer 28 to complete the insulating laminated structure. Dual damascene wirings embedded in the interlayer insulating films 24, 25, 27, and 28 are formed by performing the same processes as those shown in FIGS. 4A, 4B, and 5C.

  If necessary, the same process is repeated to form the required number of wiring layers. Further, the silicon oxide layer is used as an interlayer film, and an Al aluminum pad is formed thereon. With such a configuration, for example, a wiring having a capacitance of 180 fF / mm could be formed as the second wiring layer. Heat treatment at 400 ° C. for 30 minutes was repeated 5 times, and the presence or absence of film peeling was measured. No film peeling was observed.

  When a conventional silicon oxycarbide film (Novelas, registered trademark CORAL) is formed on the SiC layer, the multilayer wiring formed with the same film thickness shows peeling at the interface between the underlying SiC layer and the CORAL layer in the thermal cycle test. It was.

Other novel silicon oxycarbides can also be used.
As a modification, a SiOC-A layer having a thickness of 350 nm was used as the silicon oxycarbide layers 15 and 25, and a SiOC-A layer having a thickness of 550 nm was used as the silicon oxycarbide layers 18 and 28. The deposition conditions for SiOC-A are TMCTS flow rate 1 ml / min, CO ₂ flow rate 5000 sccm, pressure 3.5 toor, HF power 300 W, and LF power 200 W. Even in this configuration, as a result of repeating the heat treatment at 400 ° C. for 30 minutes five times, no film peeling was observed. The capacity of the second wiring layer was about 180 fF / mm. When the silicon oxycarbide layer was formed by CORAL of Novellus, peeling occurred at the interface with the underlying SiC layer in the thermal cycle test.

SiOC-A has a relatively low chamber internal pressure of 3.5 torr, and the plasma tends to become unstable. When the plasma is extinguished, particles are likely to be generated. When the plasma is extinguished, the source gas is stopped, the CO ₂ gas is supplied, and the CO ₂ plasma is generated for 2 seconds. Although the dielectric constant may increase slightly, an insulating layer that prevents particles can be formed.

As an example, in the above modification, following each SiOC-A film forming step of forming a six-divided SiOC layer, the surface treatment by CO ₂ plasma generated at a CO ₂ flow rate of 5000 sccm, a pressure of 1 torr, and an HF power of 150 W is turned off. 2 seconds per arc. That is, the SiOC layers 15, 18, 25, and 28 were formed of SiOC-A: POX. Also in this case, as a result of repeating the heat treatment at 400 ° C. for 30 minutes five times, no film peeling was observed. As a result of measuring the capacitance of the second wiring layer, the capacitance was about 180 fF / mm.

SiOC-B can also be used. As an example, in the above modification, as the silicon oxycarbide layers 15, 18, 25, 28, the TMCTS flow rate: 1 ml / min, the CO ₂ flow rate: 5000 sccm, the pressure: 4.5 torr, the HF power: 800 W, and the LF power: 200 W. Then, a silicon carbide layer of SiOC-B was formed. As a result of measuring the capacitance of the second layer wiring, it was about 180 fF / mm. As a result of repeating the heat treatment at 400 ° C. for 30 minutes five times, no film peeling was observed.

  SiOC-B has a relatively high pressure in the chamber, can stabilize the plasma, and can reduce particle generation. Furthermore, the relative dielectric constant can be further reduced, which is effective in reducing the capacitance between wirings.

  In the above-described embodiment, the interlayer insulating film other than the etch stopper layer (copper diffusion prevention film) is formed of a silicon oxycarbide layer made of TORAL. It is also possible to use the TORAL layer in combination with other layers as an intermediate layer. As the TORAL layer, silicon oxycarbide having an oxygen flow rate of 50 sccm to 0 sccm can be used.

6A and 6B are cross-sectional views showing a wiring formation process of a semiconductor integrated circuit device according to another embodiment of the present invention.
As shown in FIG. 6A, an interlayer insulating film 11 and a lower layer wiring 12 made of PSG are formed on a silicon substrate 10 as in the above-described embodiment. An SiC layer 14 for an etch stopper is formed with a thickness of about 50 nm using Novellus registered trademark ESL3 so as to cover the surface of the lower layer wiring 12.

  A SiOC layer 15x which is TORAL is deposited on the SiC layer 14 to a thickness of about 50 nm. This SiOC layer 15x has improved adhesion to the underlying SiC layer as described above. On the TORAL SiOC 15x, a SiOC layer 15y which is the same CORAL as the conventional film is formed to a thickness of about 500 nm. Next, a SiC layer 17 having a thickness of about 30 nm as a middle stopper is formed using Novellus registered trademark ESL2, and a TORAL SiOC layer 18x is formed thereon with a liner having a thickness of about 50 nm. A CORAL SiOC 18y is formed to a thickness of about 320 nm on the TORAL SiOC layer 18x. An antireflection film ARC1 such as SiN is formed on the SiOC layer 18y.

Thereafter, as in the steps shown in FIGS. 4 and 5, a photoresist mask formation and an etching step are performed to form a dual damascene recess.
As shown in FIG. 6B, a dual damascene copper wiring 19 is formed by sputtering a TaN layer and a Cu layer in a recess for dual damascene, forming a plated Cu layer thereon, and planarizing by CMP. . The copper wiring 19 is covered, and a 70 nm thick SiC layer 24 is formed as a copper diffusion prevention layer using ESL3 manufactured by Novellus.

By repeating the same process, a desired number of wiring layers are formed. With such a configuration, for example, about 180 fF / mm could be obtained as the capacitance of the second wiring layer.
The heat treatment at 400 ° C. for 30 minutes was repeated 5 times to observe whether film peeling occurred. No film peeling was observed.

  Instead of TORAL, other novel SiOC can be used. As the SiOC layers 15x and 18x, a silicon oxycarbide layer having a thickness of 50 nm was formed by SiOC-A. As a result of measuring the capacitance of the second-layer wiring in the multilayer wiring, the parasitic capacitance was about 180 fF / mm. As a result of repeating the heat treatment at 400 ° C. for 30 minutes five times, no film peeling was observed.

  It has been found that the adhesion can be improved by interposing the SiOC layer of TORAL or SiOC-A between the conventional CORC SiOC layer and the SiC layer as the base etch stopper layer.

  In the above-described embodiment, a multilayer formed by forming a SiOC layer by TORAL on the surface near the water repellency of the SiC layer having a copper diffusion preventing function and improving the adhesion between the SiC layer and the SiOC layer. Got the wiring.

Adhesion can also be improved by surface treatment of the formed SiC layer.
7A and 7B are cross-sectional views of a silicon substrate showing a multilayer wiring forming process of a semiconductor integrated circuit device according to still another embodiment of the present invention. Similar to the above-described embodiment, the interlayer insulating film 11 and the lower layer wiring 12 are formed on the surface of the semiconductor substrate 10, and the surfaces are covered with an SiC layer 14 having a thickness of about 70 nm using Novellus registered trademark ESL3. The surface of this SiC layer 14 was treated with CO ₂ plasma. In the CVD apparatus of FIG. 10, CO ₂ plasma treatment was performed in the first stage S0. The processing conditions were a CO ₂ flow rate of 5000 sccm, a pressure of 4 torr, an RF power of 200 W, and a processing time of 5 seconds. This CO ₂ plasma treatment is considered to form a hydrophilic surface 14 x on the surface of the SiC layer 14.

A SiOC layer 15y having a thickness of about 550 nm is formed on the surface of the hydrophilic SiC layer 14 using a registered trademark CORAL of Novellus, and a SiC layer 17 having a thickness of about 30 nm is further formed on the surface of the SiC layer 14 by using a registered trademark ESL2 of Novellus. Used as a middle stopper. The surface of the SiC layer 17 is treated with the same CO ₂ plasma as described above to form a hydrophilic surface 17x. On this, a SiOC layer 18y using Novellus CORAL is formed to a thickness of about 370 nm. An antireflection film ARC1 such as a SiN film is formed on the surface of the SiOC layer 18y.

Thereafter, a dual damascene recess is formed by performing photolithography, etching, and the like similar to the above-described embodiments.
As shown in FIG. 7B, a TaN layer and a Cu layer are formed on the surface of the recess for dual damascene by sputtering of about 30 nm, respectively, and a Cu layer is formed on the surface by plating. An unnecessary wiring layer on the surface of the SiOC layer 18y is removed by CMP or the like, thereby completing the dual damascene copper wiring 19. The copper wiring 19 is covered, and a 70 nm thick SiC layer 24 is formed as a copper diffusion prevention layer using ESL3 manufactured by Novellus.

  The same number of wiring layers as required can be formed by repeating the same process, as in the previous embodiment. With such a configuration, for example, about 180 fF / mm can be obtained as the capacitance of the second wiring layer. The heat treatment at 400 ° C. for 30 minutes was repeated 5 times, and the presence or absence of film peeling was examined. No film peeling was observed.

  In the multilayer wiring structure, an interlayer insulating film for a lower wiring layer having a high wiring density is replaced with SiOC having a relative dielectric constant of about 2.9 to 3.1, and an organic insulating film having a lower relative dielectric constant (for example, a relative dielectric constant). It may be desirable to use about 2.6 registered trademark SiLK).

  FIG. 8 is a cross-sectional view showing the structure of a multilayer wiring structure according to another embodiment of the present invention. After forming a necessary structure in the silicon substrate 100, a PSG layer 11 having a thickness of about 1.5 μm is formed and a tungsten plug 12 is embedded.

An SiC layer 21 having a thickness of about 30 nm is deposited so as to cover the surface of the W plug 12, and an organic insulating (Dow Chemical Co., registered trademark SiLK-J150) layer 22 having a thickness of about 450 nm is formed thereon. The surface of the organic insulating film 22 is covered with a silicon oxide layer 23 having a thickness of about 100 nm. The first interlayer insulating layers 21, 22, and 23 are formed by stacking these layers.

A wiring groove is formed in the first interlayer insulating layer, and the copper wiring 34 is embedded. After planarizing the surface of the copper wiring 34, an SiC layer 36 having a thickness of about 50 nm, an organic insulating (Dow Chemical Co., registered trademark SiLK-J350) layer 37 having a thickness of about 450 nm are formed so as to cover the surface. A 100 nm silicon oxide layer 38 is formed. Further, a SiN hard mask layer HM is formed on the surface of the silicon oxide layer 38 to a thickness of about 50 nm.

  A dual damascene recess is formed using a photoresist mask and a pattern of a hard mask HM. After the dual damascene recess is formed, the barrier metal layer and the seed layer are sputtered, and the Cu layer is buried by plating to form a dual damascene Cu wiring 29. In the CMP for planarizing the surface of the dual damascene wiring 29, the hard mask layer HM may disappear.

  A SiC layer 14 having a thickness of about 70 nm is formed using Novellus registered trademark ESL3 so as to cover the surface of the dual damascene wiring 29. A SiOC layer 15 of TORAL having a thickness of about 350 nm is formed on the SiC layer 14. Further, an SiC layer 17 having a thickness of about 30 nm and an SiOC layer (TORAL layer) 18 having a thickness of about 550 nm are similarly formed on the surface.

  A dual damascene recess similar to that described above is formed by photolithography and etching, and is filled with the copper wiring 19. By repeating the same process, the fourth layer wiring using the SiOC layer as the interlayer insulating film can be formed on the third layer wiring layer. If necessary, wiring layers can be laminated.

The heat treatment at 400 ° C. for 30 minutes was repeated 5 times for the multilayer wiring thus prepared. No film peeling was observed.
Instead of TORAL, other novel SiOC can be used. As an example, in the above structure, the SiOC layers 15 and 18 are formed of SiOC-B. The film forming conditions are as described above. Heat treatment at 400 ° C. for 30 minutes was repeated 5 times. No film peeling was observed.

  It is assumed that a large thermal stress is applied to the boundary region between the organic insulating layer 27 having a large coefficient of thermal expansion and the SiOC layer 15 having a relatively small coefficient of thermal expansion. However, no cracks occurred in the third interlayer insulating film.

  When a SiOC layer by CORAL was used instead of the new SiOC layer, peeling was observed at the interface between the SiC layer and the SiOC layer by CORAL in the same thermal cycle test. Moreover, the crack which seems to have originated from the 3rd layer wiring generate | occur | produced.

When the number of layers of the multilayer wiring is increased, various interlayer insulating films can be used depending on the wiring layer.
FIG. 9 schematically shows a configuration of a semiconductor integrated circuit device having a multilayer wiring structure. An element isolation region 2 by shallow trench isolation is formed on the surface of the silicon substrate 1, and a gate electrode 3 is formed on the surface of the active region, thereby forming a MOS transistor structure. A PSG layer 4 is formed so as to embed the gate electrode 3, and a W plug 5 is embedded. Further, a silicon oxide layer 6 is formed on the surface, and a via conductor 7 is embedded.

  A first interlayer insulating film IL1 made of an organic insulating film is formed on the silicon oxide layer 6, and a copper wiring W1 is embedded. A second interlayer insulating film IL2, a third interlayer insulating film IL3, and a fourth interlayer insulating film IL4 are similarly formed using an organic insulating film thereon. Copper wirings W2, W3, and W4 are embedded in each interlayer insulating film.

  An interlayer insulating film IL5 using a SiOC layer is formed on the fourth wiring layer, and a copper wiring W5 is embedded. On the fifth interlayer insulating film IL5, a sixth interlayer insulating film IL6, a seventh interlayer insulating film IL7, and an eighth interlayer insulating film IL8 having the same configuration are sequentially stacked, and the copper wiring W6, W7 and W8 are embedded.

  On the eighth wiring W8, an interlayer insulating film IL9 made of silicon oxide is deposited, and a copper wiring W9 is embedded. Further thereon, an interlayer insulating film IL10 made of silicon oxide and a copper wiring W10 are formed and covered with an interlayer insulating film IL11a made of silicon oxide. A via conductor is embedded in the interlayer insulating film IL11a and covered with the interlayer insulating film IL11b. A pad opening is formed, and an Al pad PD (and an uppermost wiring) is formed on the via conductor embedded in the interlayer insulating film IL11a. A protective layer PS is formed on the pad PD.

  In this multilayer wiring structure, an organic insulating film is used as an interlayer insulating film for the first to fourth wirings having the narrowest wiring interval, and SiOC is used as an interlayer insulating film for the fifth to eighth wiring layers thereon. A layer is used, and a silicon oxide layer is used for the ninth to eleventh interlayer insulating films thereon. By selecting an appropriate interlayer insulating film in accordance with the change in the wiring interval, a highly reliable and high performance multilayer wiring can be formed.

  Although the present invention has been described with reference to the embodiments, the present invention is not limited thereto. For example, the multilayer wiring structure is not limited to the semiconductor integrated circuit device. The number of wiring layers can be arbitrarily selected. It is also possible to use materials other than Cu as the wiring material. If a higher dielectric constant is allowed, a TORAL layer having a relative dielectric constant of about 3.1 or higher can be used. It will be apparent to those skilled in the art that various other changes, modifications, and combinations are possible. The features of the present invention will be additionally described below.

(Appendix 1) (1) Silicon oxycarbide containing hydrogen, having a carbon content of about 18 at% or more and a relative dielectric constant of about 3.1 or less.
(Supplementary note 2) (2) The silicon oxycarbide according to supplementary note 1, wherein the carbon content is about 25 at% or less.

(Supplementary note 3) The silicon oxycarbide according to supplementary note 1, wherein tetramethylcyclotetrasiloxane is used as a source gas.
(Supplementary Note 4) (3) Silicon oxycarbide having a hydrogen content of 30 at% or less and a relative dielectric constant of about 3.1 or less.

(Supplementary note 5) The silicon oxycarbide according to supplementary note 4, wherein the hydrogen content is 28 at% or less.
(Appendix 6) (4) A step of preparing a base;
Using tetramethylcyclotetrasiloxane, carbon dioxide, oxygen at a flow rate of 3% or less as a source gas, and growing a silicon oxycarbide layer on the substrate by vapor phase growth;
A method of growing a silicon oxycarbide layer comprising:

(Appendix 7) (5) The method for growing the silicon oxycarbide layer according to Appendix 6, wherein the oxygen is 0%.
(Supplementary note 8) The method for growing a silicon oxycarbide layer according to supplementary note 6, wherein the vapor phase growth is performed at a pressure lower than 4 torr.

(Supplementary note 9) The method for growing the silicon oxycarbide layer according to supplementary note 8, further comprising a step of performing a CO ₂ plasma treatment subsequent to the growth of the silicon oxycarbide layer.
(Supplementary note 10) The method for growing a silicon oxycarbide layer according to supplementary note 6, wherein the vapor phase growth is performed at a pressure higher than 4 torr.

(Supplementary note 11) The method for growing a silicon oxycarbide layer according to supplementary note 6, wherein the vapor phase growth is plasma enhanced vapor phase growth.
(Supplementary Note 12) A semiconductor substrate, a copper wiring formed above the semiconductor substrate, a silicon carbide layer covering the copper wiring, a silicon carbide layer covering the silicon substrate, containing hydrogen and having a carbon content of about 18 at% or more, And a first silicon oxycarbide layer having a dielectric constant of about 3.1 or less.

(Additional remark 13) The semiconductor device of Additional remark 12 whose carbon content of a said 1st silicon oxycarbide layer is 25 at% or less.
(Supplementary note 14) The supplementary note 12, further comprising a second silicon oxycarbide layer formed on and in contact with the first silicon oxycarbide layer and having a carbon content of 1 at% or more lower than that of the first silicon oxycarbide layer. Semiconductor device.

    (Supplementary note 15) The semiconductor device according to supplementary note 12, further comprising a low dielectric constant insulating layer formed on and in contact with the first silicon oxycarbide layer and having a relative dielectric constant lower than that of silicon oxide.

(Supplementary Note 16) a semiconductor substrate;
A copper wiring formed above the semiconductor substrate;
A silicon carbide layer covering the copper wiring, a first silicon oxycarbide layer covering the silicon carbide layer, containing hydrogen, having a hydrogen content of 30 at% or less and a relative dielectric constant of about 3.1 or less;
A semiconductor device.

(Supplementary note 17) The semiconductor device according to supplementary note 16, wherein the hydrogen content is 28 at% or less.
(Supplementary note 18) The supplementary note 16, further comprising a second silicon oxycarbide layer formed on and in contact with the first silicon oxycarbide layer and having a hydrogen content of 2 at% or more higher than that of the first silicon oxycarbide layer. Semiconductor device.

    (Supplementary note 19) The semiconductor device according to supplementary note 16, further comprising a low dielectric constant insulating layer formed on and in contact with the first silicon oxycarbide layer and having a relative dielectric constant lower than that of silicon oxide.

(Appendix 20) (6) a semiconductor substrate;
A copper wiring formed above the semiconductor substrate;
A silicon carbide layer covering the copper wiring, a silicon carbide layer covering the silicon carbide layer, containing hydrogen, having a carbon content of 17 at% or more, or a hydrogen content of 30 at% or less, and a relative dielectric constant of about 3.1 or less. 1 silicon oxycarbide layer;
A semiconductor device.

    (Additional remark 21) Further, the first silicon oxycarbide layer is formed in contact with the first silicon oxycarbide layer, and the carbon content is lower by 2 at% or higher or the hydrogen content is higher by 2 at% or higher than the first silicon oxycarbide layer. Item 20. The semiconductor device according to appendix 20, having two silicon oxycarbide layers.

    (Supplementary note 22) The semiconductor device according to supplementary note 20, further comprising a low dielectric constant insulating layer formed on and in contact with the first silicon oxycarbide layer and having a relative dielectric constant lower than that of silicon oxide.

(Supplementary Note 23) (7) A step of preparing a base structure having a semiconductor substrate, a copper wiring formed above the semiconductor substrate, and a silicon carbide layer covering the copper wiring;
A step of growing a silicon oxycarbide layer by vapor phase growth on the base structure using tetramethylcyclotetrasiloxane, carbon dioxide, oxygen having a flow rate of 3% or less with respect to the flow rate of carbon dioxide as a source gas;
A method of manufacturing a semiconductor device including:
N (Supplementary Note 24) (8) The method for manufacturing a semiconductor device according to Supplementary Note 23, wherein a flow rate of the oxygen is 0%.
N (Supplementary note 25) (9) The method for manufacturing a semiconductor device according to supplementary note 23, further comprising a step of lightly oxidizing the surface with CO ₂ plasma after the step of growing the silicon oxycarbide layer.

(Supplementary note 26) The method for manufacturing a semiconductor device according to supplementary note 23, further comprising a step of forming a recess in the insulating layer including the silicon oxycarbide layer and embedding the wiring.
(Supplementary note 27) A step of preparing a base structure having a semiconductor substrate, a copper wiring formed above the semiconductor substrate, and a silicon carbide layer covering the copper wiring;
Hydrophilizing the surface of the silicon carbide layer of the base structure with a plasma of a weak oxidizing gas having a molecular weight larger than O ₂ and containing oxygen;
Forming a low dielectric constant insulating layer having a dielectric constant smaller than that of silicon oxide on the surface of the silicon carbide layer subjected to the hydrophilic treatment;
A method of manufacturing a semiconductor device including:

(Supplementary note 28) The method for manufacturing a semiconductor device according to supplementary note 27, wherein the step of hydrophilizing with the plasma is a step of exposing the underlying structure to a plasma downflow.
(Supplementary note 29) The method for manufacturing a semiconductor device according to supplementary note 27, wherein the step of processing with plasma is performed in the same chamber as the step of forming the low dielectric constant insulating layer.

(Supplementary Note 30) The method of producing the weak oxidizing gas of Supplementary Notes 27 wherein the CO _2.

It is the table | surface and graph for demonstrating the experiment which this invention etc. conducted. It is the table | surface and graph for demonstrating the experiment which this invention etc. conducted. It is a graph which shows the result of the stud pull test which investigates the adhesiveness of the produced SiOC layer. It is sectional drawing of the semiconductor substrate explaining the process of manufacturing the multilayer wiring structure of the semiconductor integrated circuit device by the Example of this invention. It is sectional drawing of the semiconductor substrate explaining the process of manufacturing the multilayer wiring structure of the semiconductor integrated circuit device by the Example of this invention. It is sectional drawing of the semiconductor substrate for demonstrating the multilayer wiring preparation process by the other Example of this invention. It is sectional drawing of the semiconductor substrate for demonstrating the manufacturing process of the multilayer wiring structure by other Example of this invention. It is sectional drawing of the semiconductor substrate for demonstrating the manufacturing process of the multilayer wiring structure by the other Example of this invention. It is sectional drawing which shows schematically the structure of the semiconductor integrated circuit device which has a multilayer wiring structure. It is a perspective view which shows the structure of a plasma CVD apparatus roughly. It is a table | surface which shows the film-forming conditions and measurement result of a sample. It is a table | surface which shows the composition of the selected sample. It is a graph which shows the infrared absorption spectrum of the selected sample.

Explanation of symbols

11 PSG layer 12 Lower layer wiring 14, 17 SiC layer 15, 18 SiOC (TORAL) layer ARC Antireflection film PR Photo resist 19 Dual damascene wiring 21 SiC layer 22 Organic insulating layer 23 Silicon oxide layer 24 SiC layer 25 SiOC layer 27 SiC layer 28 SiOC layer 29 Dual damascene wiring 34 Organic insulating layer 36 SiC layer 37 Organic insulating layer 38 Silicon oxide layer 100 Semiconductor substrate IL Interlayer insulating film W Wiring HM Hard mask (SiN layer)
PD pad

Claims (6)

Preparing a base structure having a semiconductor substrate, a copper wiring formed above the semiconductor substrate, and a silicon carbide layer covering the copper wiring;
Hydrophilizing the surface of the silicon carbide layer of the base structure with plasma of an oxidizing gas having a molecular weight larger than O ₂ and containing oxygen;
Forming a low dielectric constant insulating layer having a dielectric constant smaller than that of silicon oxide on the surface of the silicon carbide layer subjected to the hydrophilic treatment;
A method of manufacturing a semiconductor device including:   2. The method of manufacturing a semiconductor device according to claim 1, wherein the low dielectric constant insulating layer is silicon oxycarbide having a hydrogen content of 30 at% or less and 20 at% or more and a relative dielectric constant of 3.1 or less and 2.85 or more. .   The method of manufacturing a semiconductor device according to claim 2, wherein the silicon oxycarbide has a carbon content of 18 at% or more and 21 at% or less.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the low dielectric constant insulating layer is silicon oxycarbide having a hydrogen content of 30 at% or less and 11 at% or more.   The method for manufacturing a semiconductor device according to claim 4, wherein the silicon oxycarbide has a carbon content of 15 at% or more and 21 at% or less. The method of manufacturing a semiconductor device according to claim 1, further comprising a step of oxidizing the surface with CO ₂ plasma subsequent to the step of forming the low dielectric constant insulating layer.

Images