JP2007281025A - Laminated chip coil - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated chip coil capable of attaining both excellent DC superimposition characteristics and low resistance at a high inductance value. <P>SOLUTION: The laminated chip coil includes a first magnetic substance 3 made of a ferrite sintered body, inner conductors 5a-5d buried in the first magnetic substance 3 and having a predetermined pattern formed, and a terminal electrode connected with ends of the inner conductors 5a and 5d and provided on the first magnetic substance 3. A through-hole 4a passing through the first magnetic substance is formed on the first body 3 in such a range that the inner conductors 5a-5d are not exposed. A second magnetic substance 3 is placed in the through-hole 4a, and thus both the excellent DC superimposition characteristics and low resistance can be attained at a high inductance value. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a multilayer chip component, for example, and particularly relates to a multilayer chip coil that can apply a large current and maintain a high inductance.

  Conventionally, there is a laminated chip coil in which conductor patterns and insulating layers are alternately laminated, and it has been suitably used for signal system circuits. In recent years, the technology for forming fine patterns of conductors has progressed, and the characteristics of materials used for multilayer chip coils have been modified, leading to the downsizing technology of multilayer chip coils, the technology and quality for mass production. Stabilization technology has made great strides. A laminated chip coil is formed by integrally sintering a laminated body in which a plurality of substrate layers on which internal conductors are arranged and a magnetic body portion, and is superior in mechanical strength compared to a coiled coil component. There is a structural advantage. For this reason, the demand for multilayer chip coils as inductors used in power supply circuits to which a large current is applied is increasing.

  When using a multilayer chip coil for a power supply system circuit, it is required to have excellent DC superposition characteristics so that a necessary inductance value can be maintained even when a large current is applied to the multilayer chip coil. Furthermore, in order to suppress the heat generated by applying a current to the multilayer chip coil, it is also required to keep the resistance value of the coil component low.

Patent Document 1 describes a laminated chip coil in which a nonmagnetic layer is inserted so as to cross a magnetic path of a core magnetic body generated by energizing the coil.
JP 2004-31944 A

  By the way, in the multilayer chip coil described in Patent Document 1, a nonmagnetic layer is disposed so as to cross a magnetic path excited by energization. For this reason, as the thickness of the nonmagnetic material layer increases, the direct current superimposition characteristic improves, but the inductance value decreases. Therefore, it has been extremely difficult to form a multilayer chip coil that has both a high inductance value and excellent direct current superposition characteristics.

  Therefore, in order to improve the inductance value while forming the nonmagnetic layer of the multilayer chip coil, the number of turns of the coil pattern formed by the internal conductor must be increased. However, simply increasing the number of turns of the coil pattern causes a remarkable increase in the resistance value. Therefore, such a multilayer chip coil cannot be used as a power source inductor that requires low resistance. Patent Document 1 describes the use of Si (glass) -based ceramics as the material for the non-magnetic layer. However, with ferrite-based materials and glass-based ceramics, the heat shrinkage curve during sintering and The physical properties such as linear expansion coefficient are often different. For this reason, there exists a possibility that delamination may generate | occur | produce in the laminated body after sintering. In addition, the peel strength between the magnetic layer and the nonmagnetic layer may be reduced. As a result, the quality of the multilayer chip coil may be degraded.

  In order to solve such problems by material design, a sinterable magnetic material (Ni-Zn ferrite, Mn-Zn ferrite, etc.) having a high magnetic permeability: μ and a maximum saturation magnetic flux density: Bm is used as a laminated chip coil. What is necessary is just to use for this magnetic body part. And what is necessary is just to comprise an internal conductor with the coil pattern of as few turns as possible. However, the multilayer chip coil uses a low-resistance, low-melting metal such as Ag (Ag melting point is about 960 ° C.) for the inner conductor. For this reason, when Ni-Zn ferrite, Mn-Zn ferrite, etc., whose sintering temperature reaches 1200 ° C to 1400 ° C, are used for the magnetic body portion, it melts out when the low melting point metal used for the internal conductor is large. If the amount is small, conversely, problems such as accumulation inside the capillaries occur. That is, ferrite having a high sintering temperature cannot be used for the multilayer chip coil. On the other hand, since the specific resistance of Mn—Zn ferrite is low, it cannot be used for a multilayer chip component having a structure in which an inner conductor directly contacts a magnetic body. Therefore, Ni—Cu—Zn ferrite that can be sintered at a temperature lower than the sintering temperature of Ni—Zn ferrite (although the sintering temperature is suitable at about 850 ° C. to 1000 ° C., the material physical properties are higher than the above ferrite magnetic materials) Or inferior in magnetic properties).

  The present invention has been made in view of such a point, and the object of the present invention is excellent in mechanical strength and high while maintaining the simplicity and ease of the conventional multilayer chip coil manufacturing process. An object of the present invention is to provide a multilayer chip coil that can achieve both excellent DC superposition characteristics and low resistance with an inductance value.

  The present invention is connected to a first magnetic body portion made of a ferrite sintered body, an internal conductor formed with a predetermined pattern embedded in the first magnetic body portion, and an end portion of the internal conductor, And a terminal electrode portion provided in the magnetic body portion, wherein the first magnetic body portion is formed with a through-hole penetrating the first magnetic body portion within a range in which the internal conductor is not exposed, and the second through hole is formed in the through-hole. This is a laminated chip coil in which the magnetic part is arranged.

  According to the present invention, the first magnetic body portion is formed with a through-hole penetrating the first magnetic body portion in a range where the internal conductor is not exposed, and the second magnetic body portion is disposed in the through-hole. Since the chip coil is used, it is easy to manufacture and has the effect of achieving both excellent DC superposition characteristics and low resistance.

  Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. In the present embodiment, an explanation will be given as an example in which the inner conductor and the magnetic body portion have a laminated structure and are applied to a laminated chip coil to which a large current can be applied.

  First, a configuration example of the multilayer chip coil of this example will be described with reference to FIG. Fig.1 (a) is an example of the external appearance perspective view of the multilayer chip coil of this example. FIG.1 (b) is an example of sectional drawing which follows the I1-I1 line which crosses the 1st magnetic body part and 2nd magnetic body part of the multilayer chip coil of this example.

  FIG. 1A shows a laminated chip coil 1 formed in a substantially rectangular parallelepiped shape. Near the center of the first magnetic body portion 3 formed of a ferrite sintered body, a substantially cylindrical through hole 4a is opened. A second magnetic body portion 4 made of a metal material or a metal alloy magnetic material is formed in the through hole 4a. Conductive terminal electrode portions 2a and 2b are formed at both ends of the multilayer chip coil 1 in the longitudinal direction. The terminal electrode portions 2a and 2b are connected to a lead portion of an internal conductor described later.

  FIG. 1B shows a first magnetic body portion 3 in which conductive inner conductors 5a to 5d are laminated for each of a plurality of layers (not shown). The second magnetic body portion 4 is disposed in the through hole 4 a formed near the center of the first magnetic body portion 3. By applying a current to the terminal electrode portions 2a and 2b of the multilayer chip coil 1, the magnetic flux lines 6 are generated so as to circulate around the inner conductors 5a to 5d. In the multilayer chip coil 1 of this example, the generated magnetic flux lines 6 pass through the second magnetic body portion 4.

  Next, an example of a manufacturing process of the multilayer chip coil 1 according to the first embodiment of the present invention will be described with reference to FIGS.

  FIG. 2 is an exploded perspective view for explaining the laminated body 1 ′ corresponding to the first magnetic body part 3 before the through hole 4 a is opened before the sintering. In the laminated body 1 ′, ferrite plates 11 a and 11 b on which ferrite sheets are laminated are stacked so as to sandwich a coil portion 12 in which a coil pattern (not shown) is formed on a plurality of base materials. The manufacturing process of the coil part 12 is mentioned later.

  The ferrite plates 11a and 11b are formed by laminating a required number of ferrite sheets obtained by a manufacturing process described later. In addition, the coil portion 12 is formed by a conductor (Ag) paste being printed by an after-mentioned (1) build-up method or (2) through-hole method to form a coil pattern of an internal conductor. It is. However, as long as a multilayer chip coil having the same structure as that of the multilayer chip coil 1 is finally formed, the manufacturing process and method used are not particularly limited.

(Manufacturing process of ferrite sheet and ferrite plate)
Here, an example of a manufacturing process of the ferrite sheet and the ferrite plates 11a and 11b will be described with reference to a flowchart of FIG.

  First, Ni-Cu-Zn-based ferrite powder having necessary magnetic properties, resin powder as a raw material for a binder, plasticizer that gives flexibility to a ferrite sheet, an organic solvent, and the like are weighed in necessary amounts ( Step S1). Then, the weighed material is put into a mixing container (not shown) and mixed until the material is sufficiently dispersed (step S2) to generate a ferrite slurry. Thereafter, the generated ferrite slurry is recovered from the mixing container, and the ferrite slurry is applied with a necessary thickness by a method such as a doctor blade method (step S3). Further, the coated ferrite slurry is dried under an appropriate temperature condition (step S4).

  Next, the dried ferrite slurry is cut into a specific size (step S5), and a plurality of ferrite sheets are created. The cut ferrite sheets are laminated so that no air remains (step S6). Then, temporary pressing is performed from the upper and lower thickness directions where the ferrite sheets are laminated using a press or the like to generate a temporary pressing ferrite sheet (step S7). Further, CIP (Cooling Isostatic Pressing) processing is performed in order to integrate the obtained temporary pressure-bonded ferrite sheet (step S8). Thus, the ferrite plates 11a and 11b in which the ferrite sheets are integrated are obtained.

(Manufacturing process of coil part)
Next, the manufacturing process of the coil part 12 is demonstrated with reference to FIGS. In general, the laminated chip component forming the coil portion 12 is formed so that a plurality of laminated bodies 1 ′ can be obtained from one printed work 13 as shown in FIG. 4. For this reason, for example, when manufacturing a green chip coil (coil before sintering) having a size of 7.0 mmL × 3.5 mmW, if the coil printing range of the print work 13 is 120 mm × 120 mm, about 600 pieces The laminate 1 ′ is obtained.

  In the manufacturing process of the coil portion, a conductive paste serving as an internal conductor is printed on a base material, and an insulating layer for forming a coil pattern is formed on the internal conductor. The insulating layer is formed by mixing an organic solvent, a plasticizer, or the like with the same material as the magnetic powder that is the raw material of the ferrite sheet already described. The methods of printing the internal conductor and forming the insulating layer are roughly classified into two types of manufacturing methods, a build-up method and a through-hole method. Hereinafter, each manufacturing method will be described.

(1) Build-up Method First, the build-up method will be described with reference to FIG. The build-up method is a method of consistently performing screen printing in order to form an internal conductor and an insulating layer. The advantage of the build-up method is that the thickness of the internal conductor and the insulating layer can be controlled by changing the printing conditions (conditions such as the number of times of printing and the viscosity of the paste used). For this reason, it can respond finely to the structural conditions required for each multilayer chip coil (for example, the thickness dimension of the internal conductor and the insulating layer).

  Fig.5 (a) is an example of the base material 21 for printing an internal conductor and an insulating layer. As the base material 21, a PET (Polyethylene Terephthalate) film, a ferrite sheet, a ferrite plate, etc., to which a release material is applied, are preferably used as a material and a raw material. In this example, the ferrite plate produced | generated at the manufacturing process of FIG.

  FIG. 5B is an example of a state in which the internal conductor is printed on the base material 21. The internal conductor 5a in which a conductive material is used is formed on the base material 21 as a conductor pattern. The internal conductor 5 a includes a lead portion 25 a for inputting a current into the multilayer chip coil 1 or outputting a current to the outside of the multilayer chip coil 1. The lead portion 25a is an end portion connected to the terminal electrode portion 2a. Moreover, it has the internal conductor 5b demonstrated in FIG.5 (d), and the connection part 26a connected via a window part. When the printing process of the inner conductor 5a is finished, a drying process is performed under specific conditions.

  FIG. 5C shows an example in which an insulating layer 23a is printed between the inner conductor 5a and the inner conductor 5b. A part of the insulating layer 23a is provided with a window 24a for connecting the internal conductor 5a to the internal conductor 5b described with reference to FIG. From the window part 24a, the connection part 26a of the internal conductor 5a is exposed. When the printing process of the insulating layer 23a is completed, a drying process is performed under specific conditions.

  FIG. 5D shows an example in which the internal conductor 5b is printed. The internal conductor 5b has a connection portion 26b for connecting to the next internal conductor 5c. In the step of FIG. 5D, the formed coil pattern has one turn. When the printing process of the inner conductor 5b is finished, a drying process is performed under specific conditions.

  FIG. 5E shows an example in which the insulating layer 23b is printed. A part of the insulating layer 23b is provided with a window 24b for connecting the internal conductor 5b to the internal conductor 5c described with reference to FIG. From the window part 24b, the connection part 26b of the internal conductor 5b is exposed. When the printing process of the insulating layer 23b is finished, a drying process is performed under specific conditions.

  FIG. 5F is an example of a state in which the internal conductor 5c is printed. The internal conductor 5c has a connection portion 26c for connecting to the next internal conductor 5d. When the printing process of the inner conductor 5c is finished, a drying process is performed under specific conditions.

  FIG. 5G shows an example in which the insulating layer 23c is printed. A part of the insulating layer 23c is provided with a window portion 24c for connecting the internal conductor 5c to the internal conductor 5d described with reference to FIG. From the window part 24c, the connection part 26c of the internal conductor 5c is exposed. When the printing process of the insulating layer 23c is finished, a drying process is performed under specific conditions.

  FIG. 5H shows an example in which the internal conductor 5d is printed. The internal conductor 5 d has a lead portion 25 b for outputting a current to the outside of the multilayer chip coil 1 or for inputting a current to the inside of the multilayer chip coil 1. The lead portion 25b is an end portion connected to the terminal electrode portion 2b. The coil pattern formed in the steps of FIGS. 5A to 5H has two turns. When the printing process of the inner conductor 5d is finished, a drying process is performed under specific conditions.

  In the example of the build-up method described with reference to FIG. 5, the case where the number of turns of the coil pattern is 2 turns has been described, but in order to set the number of turns to 3 turns or more, FIGS. After the printing process of g), the printing process of FIGS. 5D to 5G is repeated, and when the necessary number of turns is reached, the printing process of FIG. 5H may be performed.

(2) Through-Hole Method Next, the through-hole method will be described with reference to FIG. In the through hole construction method, a through hole is formed in a part of a conductive inner conductor formed on a ferrite sheet. By filling the through holes with a conductive paste, the internal conductors between the layers are connected. Further, a plurality of ferrite sheets on which a coil pattern is printed are stacked to form a coil portion. Advantages of the through-hole method include that it is possible to suppress the occurrence of defects such as cracks in the print work due to the shortening of the printing process, and to suppress printing misalignment and the like.

  FIG. 6A is a configuration example of the internal conductor 5a formed on the ferrite sheet 31a serving as a base material. The internal conductor 5 a formed on the ferrite sheet 31 a has a lead-out portion 34 a for inputting or outputting current to the multilayer chip coil 1.

  FIG. 6B is a configuration example of the internal conductor 5b formed on the ferrite sheet 31b. The ferrite sheet 31b is formed with a through hole 33a for connecting the internal conductor 5a and the internal conductor 5b. The formed through hole 33a is filled with a conductive paste to connect the internal conductor 5a and the internal conductor 5b.

  FIG. 6C is a configuration example of the internal conductor 5c formed on the ferrite sheet 31c. The ferrite sheet 31c is formed with a through hole 33b for connecting the inner conductor 5b and the inner conductor 5c. The formed through hole 33b is filled with a conductive paste to connect the internal conductor 5b and the internal conductor 5c.

  FIG. 6D is a configuration example of the internal conductor 5d formed on the ferrite sheet 31d. A through hole 33c for connecting the internal conductor 5c and the internal conductor 5d is formed in the ferrite sheet 31d. The formed through hole 33c is filled with a conductive paste to connect the internal conductor 5c and the internal conductor 5d. The internal conductor 5d formed on the ferrite sheet 31d has a lead-out portion 34b for inputting or outputting current to the multilayer chip coil 1.

  FIG. 6E shows an example in which the ferrite sheets 31a to 31d shown in FIGS. 6A to 6D are stacked. The internal conductors 5a to 5d formed on each ferrite sheet are connected via a conductor paste (not shown) filled in the through holes 33a to 33c, and the coil pattern has two turns.

  Next, a process until the laminated chip coil is completed after the ferrite sheet, the ferrite plate, and the coil portion are overlapped to form the laminated body 1 'will be described with reference to FIG.

(Lamination process to formation of second magnetic part)
Of the build-up method and the through-hole method already described, a laminated body using the coil part 12 in which the formation of the coil pattern has been completed by one of the methods and the ferrite plates 11a and 11b created in the manufacturing process of FIG. 1 'stacking process is started.

  First, in order to start the lamination process, the ferrite plates 11a and 11b and the coil portion 12 are laminated based on the configuration of the laminated body 1 ′ described in FIG. Then, temporary press-bonding is performed using a press or the like from the vertical direction of the thickness of the laminated ferrite plates 11a and 11b and the coil portion 12. Further, the CIP process is performed to integrate the ferrite plates 11a and 11b and the coil portion 12 to form the laminated body 1 '(step S10). Next, a drilling process is performed on the stacked body 1 'to open the through hole 4a (step S11).

  Here, the conditions for drilling will be described with reference to FIG. FIG. 8 is an example of the laminated body 1 ′ as viewed from above the thickness. The inner conductor 5 that cannot be seen directly is represented by a dotted line as a coil pattern 5e. In order to open the through hole 4a in the laminate 1 ′, the diameter and position of the through hole 4a must be determined inside the through hole formation range 4b where the coil pattern 5e is not exposed from the through hole 4a. This is because when the coil pattern 5e is exposed from the through hole 4a, the exposed coil pattern 5e is plated by the subsequent plating process. As a result, problems such as short-circuiting between internal conductors occur. For this reason, the through-hole 4a must be formed inside the through-hole formation range 4b.

  Returning to the description of FIG. 7, the printed workpiece is cut into a plurality of pieces with a cutting blade so as to have a necessary size as the laminated chip coil 1 (step S <b> 12) to obtain a laminated body 1 ′. Then, the laminate 1 ′ is sintered at a predetermined temperature (step S13), and barrel polishing is performed to chamfer (step S14). Then, a conductor (Ag) paste is applied to both ends in the longitudinal direction of the multilayer body 1 ′ to form terminal electrode portions 2a and 2b (step S15). After the formed terminal electrode portions 2a and 2b are fired (step S16), barrel polishing is performed again (step S17). The barrel polishing performed in step S17 is a process performed to increase the adhesion strength of plating during the plating process.

  Next, the formed terminal electrode portions 2a and 2b are plated with Ni, Sn or the like (step S18). Here, the second magnetic body portion 4 formed in the through hole 4 a uses a material having a lower resistance than that of the first magnetic body portion 3. For this reason, there is a possibility that a plating layer is generated in the second magnetic body portion 4, and it is desirable to perform the plating process before forming the second magnetic body portion 4. Of the processes in steps S10 to S18 in FIG. 7 described above, the processes other than the process for forming the through hole 4a performed in step S11 are the same as the processes for manufacturing a general multilayer chip component.

Next, the 2nd magnetic body part 4 is formed in the through-hole 4a formed in the 1st magnetic body part 3 (step S19). The second magnetic body portion 4 can be easily manufactured using any one of the following methods (A) and (B). For example, an Fe—Si-based material is used as the metal alloy-based magnetic powder.
(A) A fluid mixed paste of metal-based or metal alloy-based magnetic powder and resin-based binder is filled in the through-holes 4a and cured.
(B) A dust core in which a mixed powder of a metal-based or metal alloy-based magnetic powder and a resin-based binder is formed under pressure is inserted into the through hole 4a.
Through the above steps, the multilayer chip coil 1 can be formed.

  According to the present embodiment described above, as shown in FIG. 1B, most of the magnetic flux excited by the current flowing through the inner conductor 5 (magnetic flux line 6) is excellent in the maximum saturation magnetic flux density: Bm. It passes through the second magnetic body part 4 made of a metal-based or metal alloy-based magnetic material. For this reason, there is an effect that the DC superimposition characteristic is improved.

  Further, the second magnetic body portion 4 formed in the multilayer chip coil 1 has a characteristic of magnetic permeability: μ. For this reason, when the laminated chip coil sandwiching the magnetic gap layer formed of a nonmagnetic material having no magnetic permeability: μ is compared with the laminated chip coil 1 in the present embodiment, the laminated chip coil 1 is more The inductance value can be improved.

  Further, when the coil portion 12 is formed, the multilayer chip coil 1 uses (1) a build-up method (see FIG. 5) or (2) a through-hole method (see FIG. 6). For this reason, there exists an effect that the coil part 12 can be manufactured easily.

  Next, a second embodiment of the present invention will be described with reference to FIGS. In the present embodiment, the present invention is applied to a laminated chip coil formed so that the inner conductor is surrounded by nonmagnetic ceramics.

  Here, before describing the second embodiment, the characteristics of the multilayer chip coil 1 in the first embodiment already described will be described with reference to FIG. Most of the magnetic flux (flux lines 6) excited by the current flowing through the inner conductors 5a to 5d passes through the second magnetic body portion 4 that is excellent in the maximum saturation magnetic flux density: Bm. However, a part of the magnetic flux is generated as a minor loop 7 that is excited for each of the inner conductors 5a to 5d. The minor loop 7 is represented by a dotted line for each of the inner conductors 5a to 5d.

  The minor loop 7 causes local magnetic saturation in the vicinity of and around the inner conductors 5a to 5d. Here, the occurrence of local magnetic saturation will be described with reference to FIG. FIG. 10 is a graph in which the horizontal axis represents the applied current value of the current applied to the multilayer chip coil 1 and the vertical axis represents the inductance value of the multilayer chip coil 1. As shown in FIG. 10, immediately after the current is applied to the multilayer chip coil 1, the inductance value decreases greatly. For this reason, it is desirable to eliminate the minor loop in practice.

  A second embodiment of the present invention configured to suppress the occurrence of the minor loop described in FIGS. 9 and 10 will be described with reference to FIG.

  First, a configuration example of the multilayer chip coil of this example will be described with reference to FIG. Fig.11 (a) is an example of the external appearance perspective view of the multilayer chip coil of this example. FIG. 11B is an example of a cross-sectional view taken along line I2-I2 crossing the first magnetic body portion and the second magnetic body portion of the multilayer chip coil of this example.

  FIG. 11A shows a laminated chip coil 51 formed in a substantially rectangular parallelepiped shape. Near the center of the first magnetic body portion 53 formed of the ferrite sintered body, a substantially cylindrical through hole 54a is opened. A second magnetic body portion 54 made of a metal material or a metal alloy magnetic material is formed in the through hole 54a. Conductive terminal electrode portions 52a and 52b are formed at both ends of the multilayer chip coil 1 in the longitudinal direction. The terminal electrode portions 52a and 52b are connected to a lead portion of an internal conductor described later.

  FIG. 11B shows a first magnetic body portion 53 in which conductive inner conductors 55a to 55d are stacked for each of a plurality of layers (not shown). The second magnetic body portion 54 is disposed in the through hole 4 a that is opened near the center of the first magnetic body portion 53. By applying a current to the terminal electrode portions 52a and 52b of the multilayer chip coil 51, the magnetic flux lines 56 are generated so as to circulate generally around the inner conductors 55a to 55d. In the multilayer chip coil 51 of this example, the generated magnetic flux lines 56 pass through the second magnetic body portion 54.

  The multilayer chip coil 51 according to the second embodiment of the present invention is formed so that the inner conductor 55 is surrounded by a nonmagnetic ceramic part 57 having no magnetism. The nonmagnetic ceramic portion 57 is made of, for example, a zinc-based ferrite material. Zinc-based ferrite paste is a material that is not magnetic in composition. Further, since the nonmagnetic ceramic portion 57 is formed of a ferrite material, the affinity with a magnetic body portion that is also formed of a ferrite material is high. For this reason, possibility that delamination will generate | occur | produce in the sintered laminated body or the peeling strength of a magnetic body layer and a nonmagnetic ceramic part will fall becomes low.

  Here, a method of forming the laminated chip coil 51 will be described with reference to FIGS. Since the ferrite sheet and ferrite plate used in the second embodiment are formed and configured in the same steps as those in the first embodiment already described, detailed description thereof is omitted. The coil portion is printed with a conductor (Ag) paste by either the (1 ′) build-up method or the (2 ′) through-hole method described later to form a coil pattern of the internal conductor. However, as long as a multilayer chip coil having the same structure as that of the multilayer chip coil 51 is finally formed, the manufacturing process and method used are not particularly limited.

(1 ′) Build-up Method First, a build-up method for manufacturing a coil portion will be described with reference to FIG.

  FIG. 12A is an example of a base material 61 for printing an internal conductor or nonmagnetic ceramic. As the base material 61, a PET film, a ferrite sheet, a ferrite plate or the like coated with a release material is suitably used as a material / raw material. In this example, the ferrite plate is used as the base material 61 and the subsequent printing process is performed.

  FIG. 12B is an example of a state in which the nonmagnetic ceramic portion 57 a is printed on the base material 61. The nonmagnetic ceramic portion 57 a is printed at a location excluding the peripheral portion of the substrate 61. When the printing process of the nonmagnetic ceramic portion 57a is finished, a drying process is performed under specific conditions.

  FIG. 12C shows an example in which the ferrite 63a is printed. The ferrite 63a is printed on the peripheral edge of the substrate 61. When the printing process of the ferrite 63a is finished, a drying process is performed under specific conditions.

  FIG. 12D shows an example in which the internal conductor 55a is printed. The internal conductor 55a in which a conductive material is used is formed as a conductor pattern on the substrate 61 on which the nonmagnetic ceramic portion 57a and the ferrite 63a are printed. The internal conductor 55a includes a lead-out portion 65a for inputting or outputting a current to the multilayer chip coil 51. The lead portion 65a is an end portion connected to the terminal electrode portion 52a. Moreover, the connection part 66a connected via the window part and the internal conductor 55b demonstrated in FIG.12 (g) is provided. When the printing process of the inner conductor 55a is finished, a drying process is performed under specific conditions.

  FIG. 12E shows an example in which a nonmagnetic ceramic portion 57b is printed on the internal conductor 55a. In the nonmagnetic ceramic portion 57b, a window portion 67a for connecting the inner conductor 55a to the inner conductor 55b described with reference to FIG. The connecting portion 66a is exposed from the window portion 67a. When the printing process of the nonmagnetic ceramic portion 57a is finished, a drying process is performed under specific conditions.

  FIG. 12F shows an example in which the ferrite 63b is printed. The ferrite 63b is printed on the peripheral edge. The window part 67a remains as it is. When the printing process of the ferrite 63a is finished, a drying process is performed under specific conditions.

  FIG. 12G shows an example in which the internal conductor 55b is printed. The inner conductor 55b is formed as a conductor pattern. The internal conductor 55b includes an internal conductor 55c described in FIG. 12 (j) and a connection portion 66b connected via a window portion. In the process shown in FIG. 12G, the formed coil pattern has one turn. When the printing process of the inner conductor 55b is finished, a drying process is performed under specific conditions.

  FIG. 12H shows an example of a state in which the nonmagnetic ceramic portion 57c is printed on the internal conductor 55b. In the nonmagnetic ceramic portion 57c, a window portion 67b for connecting the inner conductor 55b to the inner conductor 55c described in FIG. The connecting portion 66b is exposed from the window portion 67b. When the printing process of the nonmagnetic ceramic part 57c is finished, a drying process is performed under specific conditions.

  FIG. 12 (i) shows an example in which the ferrite 63c is printed. The ferrite 63c is printed on the peripheral edge. The window part 67b remains as it is. When the printing process of the ferrite 63c is finished, a drying process is performed under specific conditions.

  FIG. 12J shows an example in which the internal conductor 55c is printed. The inner conductor 55c is formed as a conductor pattern. The internal conductor 55c includes a connection portion 66c connected to the internal conductor 55d described with reference to FIG. When the printing process of the inner conductor 55c is finished, a drying process is performed under specific conditions.

  FIG. 12 (k) shows an example in which the nonmagnetic ceramic portion 57d is printed on the internal conductor 55c. In the nonmagnetic ceramic portion 57d, a window portion 67c for connecting the inner conductor 55c to the inner conductor 55d described in FIG. The connecting portion 66c is exposed from the window portion 67c. When the printing process of the nonmagnetic ceramic portion 57d is finished, a drying process is performed under specific conditions.

  FIG. 12 (l) shows an example of a state where the ferrite 63d is printed. The ferrite 63d is printed on the peripheral edge. The window part 67c remains as it is. When the printing process of the ferrite 63d is completed, a drying process is performed under specific conditions.

  FIG. 12 (m) is an example of a state where the internal conductor 55d is printed. The inner conductor 55d is formed as a conductor pattern. The inner conductor 55d includes a lead portion 65b for inputting or outputting a current to the multilayer chip coil 51. The lead portion 65b is an end portion connected to the terminal electrode portion 52b. In the process up to FIG. 12 (m), the formed coil pattern has two turns. When the printing process of the inner conductor 55d is finished, a drying process is performed under specific conditions.

  FIG. 12 (n) shows an example in which the nonmagnetic ceramic portion 57e is printed on the internal conductor 55d. However, the lead-out portion 65b is exposed. When the printing process of the nonmagnetic ceramic part 57e is completed, a drying process is performed under specific conditions.

  FIG. 12 (o) shows an example of a state in which the ferrite 63e is printed. The ferrite 63e is printed on the peripheral edge of the substrate 61. When the printing process of the ferrite 63e is completed, a drying process is performed under specific conditions.

  In the example of the buildup method described with reference to FIG. 12, the case where the number of turns of the coil pattern is 2 turns has been described. However, in order to make the number of turns 3 turns or more, FIGS. ) After the printing process of FIG. 12 (g) to FIG. 12 (l) is repeated, the printing process of FIG. 12 (m) to FIG. 12 (o) is performed when the necessary number of turns is reached. Just do it.

(2 ′) Through-Hole Method Next, the through-hole method will be described with reference to FIG.

  FIG. 13A shows an example in which a ferrite 75a is printed on the peripheral edge of a sheet 71a serving as a base material, and a nonmagnetic ceramic portion 57a is printed inside the ferrite 75a. In the through-hole method, a plurality of sheets printed with such ferrite and nonmagnetic ceramics are prepared (in this example, sheets 71a to 71f are prepared), and the internal conductor is pattern-printed for each sheet. And the sheet | seat in which the pattern of the internal conductor was printed is laminated | stacked, and it sinters and forms a coil part.

  FIG. 13B is a configuration example of the internal conductor 55a formed on the sheet 71b. A ferrite 75b is printed on the peripheral edge of the sheet 71b, and a nonmagnetic ceramic part 57b is printed inside the ferrite 75b. The internal conductor 55 a formed on the sheet 71 b has a lead-out portion 74 a for inputting or outputting current to the multilayer chip coil 51. The lead portion 74a is an end portion connected to the terminal electrode portion 52a.

  FIG. 13C is a configuration example of the internal conductor 55b formed on the sheet 71c. A ferrite 75b is printed on the peripheral edge of the sheet 71b, and a nonmagnetic ceramic part 57b is printed inside the ferrite 75b. A through hole 73a for connecting the internal conductor 55a and the internal conductor 55b is formed in the sheet 71c. The through-hole 73a is filled with a conductor paste, and the internal conductor 55a and the internal conductor 55b are connected.

  FIG. 13D is a configuration example of the internal conductor 55c formed on the sheet 71d. A ferrite 75d is printed on the peripheral edge of the sheet 71d, and a nonmagnetic ceramic part 57d is printed inside the ferrite 75d. A through hole 73b for connecting the internal conductor 55b and the internal conductor 55c is formed in the sheet 71d. The through hole 73b is filled with a conductive paste, and the internal conductor 55b and the internal conductor 55c are connected.

  FIG. 13E is a configuration example of the internal conductor 55d formed on the sheet 71e. A through hole 73c for connecting the internal conductor 55c and the internal conductor 55d is formed in the sheet 71e. The through hole 73c is filled with a conductive paste, and the internal conductor 55c and the internal conductor 55d are connected. The internal conductor 55d formed on the sheet 71e has a lead-out portion 74b for inputting or outputting a current to the multilayer chip coil 51. The lead portion 74b is an end portion connected to the terminal electrode portion 52b.

  FIG. 13F shows an example in which the ferrite 75f is printed on the peripheral edge of the sheet 71f, and the nonmagnetic ceramic portion 57f is printed inside the ferrite 75f.

  FIG. 13G shows an example in which the sheets 71a to 71f shown in FIGS. 13A to 13F are stacked. It can be seen that the internal conductors 55a to 55d formed on each sheet are connected via a conductor paste (not shown) filled in the through holes 73a to 73c, and a coil portion having two turns is formed. The basic process of the through-hole method used in the second embodiment is almost the same as the through-hole method (see FIG. 6) described in the first embodiment. The difference is that the sheet to be used is obtained by printing two types of pastes of ferrite and a nonmagnetic ceramic part.

  In the case of forming the coil portion, the laminated chip coil 51 according to the second embodiment uses (1 ′) the build-up method (see FIG. 12) or (2 ′) the through-hole method (see FIG. 13). Thus, the coil portion can be easily manufactured. Other manufacturing processes for forming the through-hole and filling the through-hole with the second magnetic body portion are the same as those in the first embodiment, and thus detailed description thereof is omitted.

  In addition, since the magnetic flux excited by applying an electric current is coupled in a high state, the inductance value is higher than that of a multilayer chip coil having the same number of turns and no nonmagnetic ceramic part. There is. Here, the inductance value with respect to the current applied to the multilayer chip coil will be described with reference to FIG. FIG. 14 is a graph in which the horizontal axis represents the applied current value of the current applied to the multilayer chip coil, and the vertical axis represents the inductance value of the multilayer chip coil. As shown in FIG. 14, immediately after the current is applied to the multilayer chip coil that does not have the non-magnetic ceramic portion, a minor loop is generated and the inductance value is greatly reduced. On the other hand, the inductance value does not decrease immediately after the current is applied to the multilayer chip coil 51 having the nonmagnetic ceramic portion. Further, it can be seen that even when the current applied to the multilayer chip coil 51 is increased to some extent, the decrease in the inductance value is slight.

  The multilayer chip coil 51 has a structure in which the inner conductors 55a to 55d are enclosed by the nonmagnetic ceramic portion 57. For this reason, as shown in FIG. 11, almost all the magnetic flux excited by the current flowing through the inner conductor passes through the second magnetic body portion. In addition, since the occurrence of a minor loop of magnetic flux can be suppressed, there is an effect that a drop in inductance value can be prevented immediately after a current is applied to the multilayer chip coil 51. Furthermore, there is an effect that an excellent inductance value and DC superimposition characteristics can be obtained.

  In the multilayer chip coil according to the first and second embodiments described above, a through hole is formed in the first magnetic body portion. The formed through hole is filled with a fluid mixed paste of metal-based or metal alloy-based magnetic powder and resin-based binder, and cured to form a second magnetic body portion. Alternatively, the second magnetic body part is formed by inserting a formed powder through which a mixed powder of a metal-based or metal alloy-based magnetic powder and a resin-based binder is pressed. Since such a simple process is performed, there is an effect that the second magnetic body portion can be easily formed as compared with a conventionally used method. Moreover, there is an effect that the inductance value can be further improved by increasing the degree of coupling of the magnetic flux excited by the inner conductor.

  In addition, a multilayer chip coil that achieves both an increase in inductance value and improvement in DC superposition characteristics and a low resistance value can be obtained. Furthermore, since the structure of the laminated chip coil is extremely simple, there is an effect that the production of the laminated chip coil becomes easy. Further, the multilayer chip coil maintains a high inductance value, and it is not necessary to increase the number of turns of the coil pattern formed by the internal conductor. As a result, there is an effect that the length of the inner conductor can be shortened and the resistance of the inner conductor can be kept low.

  In addition, in order to form the through hole of the multilayer chip coil described in the first and second embodiments described above, it is formed by, for example, a cutting method using a drill blade or a drilling method using laser irradiation. It is desirable. The through hole is preferably circular. The reason for forming the through hole in this way is to easily form the second magnetic part. However, even if the shape of the through-hole is rectangular or other shapes, the obtained effect does not change.

  Moreover, in order to form a through-hole, in addition to the already-described through-hole forming step (see step S11 in FIG. 7), the through-hole may be formed within a build-up method or a step in the through-hole method. . In this case, a through-hole is previously formed in the ferrite plate and the ferrite sheet, and further in the printed pattern. By increasing the accuracy of the position where the through hole is formed, a through hole similar to the through hole formed in the first and second embodiments can be formed.

  In the first and second embodiments described above, in order to form the second magnetic body portion in the laminate, a mixed powder of a metal-based or metal alloy-based magnetic powder and a resin-based binder is used. The dust core formed under pressure was inserted into the through hole. When such a dust core is inserted into the through-hole, pressure is applied to increase the density of the dust core to form the second magnetic body portion, so that the permeability: μ and the maximum saturation magnetic flux density : Bm can be improved. For this reason, there is an effect that it is possible to further improve the electrical characteristics such as the inductance value and the DC superimposition characteristics.

  Furthermore, the coil pattern formed in the laminate is not limited to one. If the required electrical characteristics are the same as those of the present invention, it is possible to suitably use a form in which two or more coil patterns are formed, such as a laminated transformer component or a laminated common mode noise filter.

It is the block diagram which showed the example of the multilayer chip coil in the 1st Embodiment of this invention. It is the disassembled perspective view which showed the example of the laminated body in the 1st Embodiment of this invention. It is the flowchart which showed the example of the manufacturing process of the ferrite sheet and ferrite plate in the 1st Embodiment of this invention. It is explanatory drawing which showed the example of the print workpiece | work in the 1st Embodiment of this invention. It is explanatory drawing which showed the example of the buildup construction method in the 1st Embodiment of this invention. It is explanatory drawing which showed the example of the through-hole construction method in the 1st Embodiment of this invention. It is the flowchart which showed the example of the manufacturing process of the multilayer chip coil in the 1st Embodiment of this invention. It is explanatory drawing which showed the example of the formation range of the through-hole of the multilayer chip coil in the 1st Embodiment of this invention. It is explanatory drawing which showed the example of the minor loop generate | occur | produced around the inner conductor in the 1st Embodiment of this invention. It is explanatory drawing which showed the corresponding relationship of the applied electric current value and inductance in the 1st Embodiment of this invention. It is the block diagram which showed the example of the multilayer chip coil in the 2nd Embodiment of this invention. It is explanatory drawing which showed the example of the buildup construction method in the 2nd Embodiment of this invention. It is the disassembled perspective view which showed the example of the through-hole construction method in the 2nd Embodiment of this invention. It is explanatory drawing which showed the corresponding relationship of the applied current value and inductance in the 2nd Embodiment of this invention.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Multilayer chip coil, 1 '... Laminated body, 2a, 2b ... Terminal electrode part, 3 ... 1st magnetic body part, 4 ... 2nd magnetic body part, 4a ... Through-hole, 5a-5d ... Internal conductor, 5e ... Coil pattern, 6 ... Magnetic flux line, 7 ... Minor loop, 11a, 11b ... Ferrite plate, 12 ... Coil part, 13 ... Print work, 21 ... Base material, 23a-23c ... Insulating layer, 24a-24c ... Window part , 25a, 25b ... leading part, 26a-26c ... connecting part, 31a-31d ... ferrite sheet, 33a-33c ... through hole, 34a, 34b ... leading part, 51 ... multilayer chip coil, 52a, 52b ... terminal electrode part, 53 ... first magnetic body part, 54 ... second magnetic body part, 55a to 55d inner conductor, 56 ... magnetic flux lines, 57, 57a to 57f ... nonmagnetic ceramic part, 61 ... base material, 63a to 63e ... blow Door, 65a, 65b ... lead-out portion, 67a~67c ... window, 26a~26c ... connecting portion, 71a~71f ... sheet, 73a~73c ... through-hole, 74a, 74b ... lead-out portion, 75a~75f ... ferrite

Claims (3)

A first magnetic body portion comprising a ferrite sintered body;
An inner conductor formed with a predetermined pattern embedded in the first magnetic part;
In the laminated chip coil provided with a terminal electrode portion connected to an end portion of the inner conductor and provided in the first magnetic body portion,
A through hole is formed in the first magnetic body portion so as to penetrate the first magnetic body portion in a range where the inner conductor is not exposed, and the second magnetic body portion is disposed in the through hole. And laminated chip coil. The second magnetic body portion is formed by filling the through hole with a fluid mixed paste of a metal-based or metal alloy-based magnetic powder and a resin-based binder and curing, or a metal-based or metal-based 2. The multilayer chip coil according to claim 1, wherein a powder magnetic core formed by pressurizing a mixed powder of an alloy-based magnetic powder and a resin-based binder is inserted through the through hole. The multilayer chip coil according to claim 2, wherein the inner conductor is encased in a nonmagnetic ceramic.

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