JP2007274743A - Oscillation circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To obtain an oscillation circuit for generating triangular waves having different frequencies, phases or amplitude widths synchronously with a standard triangular wave in generating a plurality of the triangular waves. <P>SOLUTION: When voltages VC1 at both ends of a capacitor C1 reach a voltage VH of a power supply 16, a comparator 13 sets set terminals S of a flip-flop 15. When the voltages VC1 at both the ends of the capacitor C1 are lowered to a voltage VL of a power supply 17, a comparator 14 sets reset terminals R of the flip-flop 15. An output Q of the flip-flop 15 which has been set or reset by the comparators turns a switch SW1 on/off to charge or discharge the capacitor C1 to generate the standard triangular wave, and turns a switch SW2 on/off using an output QB to switch a capacitor C2 to a charging operation or a discharging operation. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to an oscillation circuit that generates a plurality of triangular waves, and more particularly to an oscillation circuit that generates a triangular wave by charging and discharging a capacitor.

  In a circuit that handles large power, such as a switching DC-DC converter, when there are a plurality of channels, when one oscillation circuit is used for the plurality of channels, the output switches of the DC-DC converter are all turned on at the same timing. Become. Therefore, at the timing when the output switch of the DC-DC converter is turned on, the power consumption increases instantaneously, and the power supply voltage of the circuit decreases instantaneously.

  In addition, in the case of an oscillation circuit that generates a triangular wave by switching between charging with a constant current and discharging with a constant current to a capacitor, for example, in two independent oscillation circuits, even if the two oscillation circuits are configured identically, The oscillation frequency of the triangular wave generated by the two oscillation circuits is not the same due to a slight deviation in the capacitance values of the capacitors in each oscillation circuit and a slight deviation in the current values of the charging current and the discharging current. Therefore, the phase of the two triangular waves gradually shifts in time. That is, the triangular wave generated by two independent oscillation circuits cannot be synchronized, and even when the DC-DC converter is driven by the triangular wave generated by these oscillation circuits, the timing at which multiple channels are simultaneously turned on As a result, the power supply voltage of the circuit is instantaneously reduced.

  An instantaneous drop in the power supply voltage causes a malfunction of the circuit. In addition, the power concentration increases the power consumption of the wiring and the like, which causes an increase in power loss and an increase in noise due to the wiring resistance.

  In order to solve such a problem, in the prior art, reference voltage output units for outputting binary reference voltages provided in a plurality of triangular wave generation circuits are connected to each other, and the triangular wave signal output from each triangular wave generation circuit is connected. By matching the peak values, the outputs of the triangular wave oscillation circuits are synchronized to obtain a triangular wave oscillation output with no output time difference (see, for example, Patent Document 1).

Japanese Patent Laid-Open No. 08-293767

  However, in the above prior art, the output of the triangular wave signal output from each triangular wave oscillation circuit can be synchronized, but the phase of each triangular wave output cannot be inverted or the amplitude cannot be changed. Therefore, when the conventional oscillation circuit is used in a circuit that handles large power, such as a DC-DC converter, a plurality of channels are simultaneously turned on, and it cannot be avoided that power is concentrated instantaneously. .

  In order to halve the concentration of power consumption for a plurality of channels, for example, it is not necessary to distribute and operate the plurality of channels using two oscillation circuits in which the phases of the plurality of channels are inverted. When applying the oscillation circuit of the prior art, there is a problem that it is necessary to invert the output of the synchronized triangular wave signal, and a circuit for that purpose is required.

  Further, the conventional technique has a problem that the amplitude and frequency of each of the triangular wave oscillation outputs cannot be changed.

  The present invention has been made in view of the above, and an object thereof is to obtain an oscillation circuit that generates a triangular wave having a different frequency, phase, or amplitude width in synchronization with a reference triangular wave when generating a plurality of triangular waves. .

  In order to achieve the above object, an oscillation circuit according to the present invention generates a reference triangle wave and generates a reference triangle wave in an oscillation circuit that generates a plurality of triangle waves by discharging and charging a capacitor. A first triangular wave oscillation circuit that outputs a capacitor state signal indicating whether one capacitor is in a discharging operation or a charging operation; and a second that is different from the first capacitor in synchronization with a change in the capacitor state signal. And N (N is a natural number) second triangular wave oscillation circuits for generating a triangular wave by switching the capacitor to a discharging operation or a charging operation.

  According to the oscillation circuit of the present invention, the first triangular wave oscillation circuit outputs a capacitor state signal indicating whether the first capacitor that generates the reference triangular wave is a discharging operation or a charging operation, The capacitor state signal causes the one or more second triangular wave oscillation circuits to switch each second capacitor to a discharging operation or a charging operation, so that triangular waves having different phases are synchronized with the reference triangular wave. Can be generated.

  Exemplary embodiments of an oscillation circuit according to the present invention will be explained below in detail with reference to the accompanying drawings.

Embodiment 1 FIG.
A first embodiment of the present invention will be described with reference to FIGS. 1 is a circuit diagram showing a configuration of an oscillation circuit according to a first embodiment of the present invention. The oscillation circuit of the first embodiment includes two triangular wave oscillation circuits 1 and 2 that generate a triangular wave by charging and discharging a capacitor.

  The triangular wave oscillation circuit 1 generates a reference triangular wave by changing the voltage VC1 across the capacitor C1 by the charging operation and discharging operation of the capacitor C1. The triangular wave oscillation circuit 1 includes a capacitor C1, two constant current sources 11 and 12, two comparators 13 and 14, power supplies 16 and 17 having different voltages, a flip-flop 15, and a switch SW1. I have. The current I1 output from the constant current source 11 and the current I2 output from the constant current source 12 are set so that a relationship of I2> I1 is established. Further, the voltage VH of the power supply 16 and the voltage VL of the power supply 17 are set so that the relationship of VH> VL is established.

  The input of the constant current source 11 is connected to the power supply voltage Vcc. The output of the constant current source 11 is connected to the capacitor C1, the input of the constant current source 12, and the non-inverting input terminals of the comparator 13 and the comparator 14. The output of the constant current source 12 is connected to the switch SW1, and is grounded when the switch SW1 is on.

  The inverting input terminal of the comparator 13 is connected to a power supply 16 having a voltage VH that is an upper limit value of a reference triangular wave voltage. The output of the comparator 13 is connected to the set terminal S of the flip-flop 15. The inverting input terminal of the comparator 14 is connected to a power source 17 having a voltage VL that is a lower limit value of a triangular wave voltage that is a reference. The output of the comparator 14 is connected to the reset terminal R of the flip-flop 15.

  The output Q of the flip-flop 15 is connected to the switch SW1, and controls the on / off operation of the switch SW1. The output QB of the flip-flop 15 is connected to the switch SW2 of the triangular wave oscillation circuit 2 and controls the on / off operation of the switch SW2.

  The triangular wave oscillating circuit 2 charges and discharges the capacitor C2 by the switch SW2 controlled by the flip-flop 15 of the triangular wave oscillating circuit 1, thereby changing the voltage VC2 across the capacitor C2 to generate a triangular wave. The triangular wave oscillation circuit 2 includes a capacitor C2, four constant current sources 21 to 24, two comparators 25 and 26, power supplies 27 and 28 having different voltages, and three switches SW2 to SW4. I have. The capacitance of the capacitor C2 is set to be equal to that of the capacitor C1 that generates a triangular wave in the triangular wave oscillation circuit 1, and the relationship C1 = C2 is established. The current I3 output from the constant current source 21 and the current I1 output from the constant current source 11 are I1 = I3, and the current I4 output from the constant current source 22 and the current I2 output from the constant current source 12 are I2 = I4. Are set so that each holds. Further, the voltage of the power supply 27 is VH, and the voltage of the power supply 28 is VL. That is, the power supply 16 and the power supply 27 are set equal, and the power supply 17 and the power supply 28 are set equal.

  The input of the constant current source 21 is connected to the power supply voltage Vcc. The output of the constant current source 21 is connected to the capacitor C2, the input of the constant current source 22, the output of the constant current source 23, the input of the constant current source 24, and the non-inverting input terminals of the comparator 25 and the comparator 26. Is done.

  The output of the constant current source 22 is connected to the switch SW2, and is grounded when the switch SW2 is on. The input of the constant current source 23 is connected to the switch SW3, and is connected to the power supply voltage Vcc when the switch SW3 is on. The output of the constant current source 24 is connected to the switch SW4 and is grounded when the switch SW4 is on.

  A power supply 27 having a voltage VH is connected to the inverting input terminal of the comparator 25. The output of the comparator 25 is connected to the switch SW3 and controls the on / off operation of the switch SW3.

  A power supply 28 having a voltage VH is connected to the inverting input terminal of the comparator 26. The output of the comparator 26 is connected to the switch SW4 and controls the on / off operation of the switch SW4.

  The operation of the oscillation circuit according to the first embodiment of the present invention will be described with reference to the time charts of FIGS. In the period from the time t1 to the time t2, in the triangular wave oscillation circuit 1, since the output Q of the flip-flop 15 is “L”, the switch SW1 is turned off. Since the voltage VC1 across the capacitor C1 is between the voltage VH and the voltage VL and the switch SW1 is off, the current I1 of the constant current source 11 flows into the capacitor C1. Thereby, the capacitor C1 is charged. When the capacitor C1 is charged, the voltage VC1 across the capacitor C1 increases.

  The comparator 13 compares the voltage VH of the power supply 16 with the voltage VC1 across the capacitor C1. At time t2, the capacitor C1 is charged, and the voltage VC1 across the capacitor C1 reaches the voltage VH of the power supply 16. The comparator 13 detects that the voltage VC1 across the capacitor C1 has reached the voltage VH, and sets the set terminal S of the flip-flop 15. As a result, the flip-flop 15 sets the output Q to “H” and the output QB to “L”.

  When the output Q of the flip-flop 15 becomes “H”, the switch SW1 is turned on. Thereby, the current I2 of the constant current source 12 flows out. At this time, since the current I1 of the constant current source 11 and the current I2 of the constant current source 12 are set such that current I2> current I1, the current I2-I1 is drawn from the capacitor C1. That is, the capacitor C1 is discharged. Therefore, the voltage VC1 across the capacitor C1 decreases.

  The comparator 14 compares the voltage VL of the power supply 17 with the voltage VC1 across the capacitor C1. At time t3, the capacitor C1 is discharged and the voltage VC1 across the capacitor C1 drops to the voltage VL. The comparator detects that the voltage VC1 across the capacitor C1 has dropped to the voltage VL, and sets the reset terminal R of the flip-flop 15. As a result, the flip-flop 15 sets the output Q to “L” and the output QB to “H”.

  When the output Q of the flip-flop 15 becomes “L”, the switch SW1 is turned off. As a result, the current I1 of the constant current source 11 flows into the capacitor C1, and the capacitor C1 is charged. As described above, the capacitor C1 is repeatedly charged and discharged, so that the triangular wave oscillation circuit 1 generates a triangular wave having an amplitude of the voltage VH from the voltage VL. The output Q of the flip-flop 15 is a capacitor state signal indicating the operation state of the capacitor C1 with respect to the triangular wave oscillation circuit 2 while switching the charging operation and discharging operation of the capacitor C1.

  On the other hand, in the triangular wave oscillation circuit 2, since the output QB of the flip-flop 15 is “H” during the period of time t1 to t2, the switch SW2 is turned on. Since the voltage VC2 across the capacitor C2 is between the voltage VH and the voltage VL and the switch SW2 is off, the current I4 of the constant current source 22 begins to flow. That is, the capacitor C2 is discharged. Therefore, the voltage VC2 across the capacitor C1 decreases.

  The comparator 26 compares the voltage VL of the power supply 28 with the voltage VC2 across the capacitor C2. At time t2, the capacitor C2 is discharged, and the voltage VC2 across the capacitor C2 drops to the voltage VL. The comparator detects that the voltage VC2 across the capacitor C2 has dropped to the voltage VL, and turns on the switch SW4. As a result, the current I6 of the constant current source 24 flows out and forcibly charges the capacitor C2. In other words, the voltage VC2 across the capacitor C2 is controlled so as not to drop below the voltage VL by the current I6.

  When the output QB of the flip-flop 15 becomes “L” at time t2, the switch SW2 is turned off, and the current I3 of the constant current source 11 flows into the capacitor C2. Thereby, the capacitor C2 is charged. When the capacitor C2 is charged, the voltage VC2 across the capacitor C1 increases.

  The comparator 25 compares the voltage VH of the power supply 27 with the voltage VC2 across the capacitor C2. At time t3, the capacitor C2 is charged and the voltage VC2 across the capacitor C2 reaches the voltage VH. The comparator 25 detects that the voltage VC1 across the capacitor C2 has reached the voltage VH, and turns on the switch SW3. As a result, the current I5 of the constant current source 23 flows out, and the capacitor C2 is forcibly discharged. That is, the current VC is controlled so that the voltage VC2 across the capacitor C2 does not become larger than the voltage VH by the current I5. Further, since the output QB of the flip-flop 15 becomes “H”, the switch SW2 is turned on, the current I4 of the constant current source 22 flows out, and the capacitor C2 is discharged. As a result, the voltage VC2 across the capacitor C2 decreases.

  FIG. 3 is a time chart showing the voltage VC2 across the capacitor C2 shown in FIG. At time t3, the voltage VC2 across the capacitor C2 is switched on by the comparator 25 detecting that the voltage VH of the power supply 27 is equal to the voltage VC2 across the capacitor C2, so that the current of the constant current source 23 By flowing I5, the capacitor C2 is forcibly discharged so that the voltage VC2 across the capacitor C2 does not become higher than the voltage VH. When there is no current I5, the voltage VC2 across the capacitor C2 becomes larger than the voltage VH before the switch SW2 is turned on at the timing when the output QB of the flip-flop 15 changes from “L” to “H”. In other words, the comparator 25 compares the voltage VH of the power supply 27 with the voltage VC2 across the capacitor C2, thereby suppressing the maximum voltage of the triangular wave generated by the triangular wave oscillation circuit 2.

  The comparator 26 compares the voltage VL of the power supply 28 with the voltage VC2 across the capacitor C2, detects that the voltage VC2 across the capacitor C2 has become smaller than the voltage VL, and causes the current I6 to flow. Thus, the minimum voltage of the triangular wave generated by the triangular wave oscillation circuit 2 is suppressed.

  Thus, in the first embodiment, the operation state of the second capacitor is switched by the capacitor state signal indicating the operation state of the capacitor while switching the charging operation and the discharging operation of the first capacitor that generates the reference triangular wave. To switch. That is, when the capacitor state signal indicates a charging operation, the second capacitor is discharged, and when the capacitor state signal indicates a discharging operation, the second capacitor is charged. Thereby, it is possible to generate a triangular wave whose phase is inverted by 180 degrees in synchronization with the reference triangular wave.

  Further, the upper limit voltage value of the first triangular wave oscillation circuit and the upper limit voltage value of the second triangular wave oscillation circuit are set equal, and the lower limit voltage value of the first triangular wave oscillation circuit and the lower limit of the second triangular wave oscillation circuit are set. The voltage value is set to be equal, and the difference between the upper limit voltage value and the lower limit voltage value of the triangular wave generated by the second triangular wave oscillation circuit with respect to the reference triangular wave is detected by the comparator to force the second triangular wave. Since the capacitor of the oscillation circuit is charged or discharged, a triangular wave having the same frequency and amplitude width as that of the reference triangular wave can be generated in synchronization with the reference triangular wave.

Embodiment 2. FIG.
A second embodiment of the present invention will be described with reference to FIGS. FIG. 4 is a circuit diagram showing a configuration of the oscillation circuit according to the second embodiment of the present invention. In the oscillation circuit according to the second embodiment, an N (N> 0, N is an integer) stage counter CT is added to the triangular wave oscillation circuit 2. Components having the same functions as those in the first embodiment are denoted by the same reference numerals, and redundant description is omitted.

The N-stage counter CT controls the switch SW2 by counting the output Q of the flip-flop 15, that is, the capacitor state signal. The triangular wave timing generated by the triangular wave oscillation circuit 2 is controlled so as to have a period N ² times the triangular wave serving as a reference generated by the triangular wave oscillation circuit 1. That is, as the voltage VC2 across the capacitor C2 becomes a period ^twice N for the voltage VC1 across the capacitor C1, switches the ON / OFF of the switch SW2.

The capacity of the capacitor C2 is set so that C2 = C1 × N ² holds with respect to the capacity of the capacitor C1. As a result, the time when the voltage reaches from the voltage VL to the voltage VH by charging and the time when the voltage decreases from the voltage VH to the voltage VL due to discharging match the voltage VC1 at both ends of the capacitor C1 and the voltage VC2 at both ends of the capacitor C2.

FIG. 5 is a time chart illustrating the operation of the oscillation circuit according to the second embodiment when the number of stages N of the counter CT is two. Since the output Q of the flip-flop 15 is “H” at time t0, the switch SW1 is turned on. As a result, the capacitor C1 is discharged and the voltage VC1 across the capacitor C1 decreases. Since the output Q2 of the counter CT is “H”, the switch SW2 is turned on. As a result, the capacitor C2 is discharged and the voltage VC2 across the capacitor C2 decreases. Since the capacitance of the capacitor C2 is set so that C2 = C1 × N ² holds, the capacitance decreases more slowly than the decrease in the voltage VC1 across the capacitor C1. In this case, since the counter stage number N is 2, the voltage VC2 across the capacitor C2 drops to the voltage VL over a period of four times that the voltage VC1 across the capacitor C1 decreases.

  At time t1, the voltage VC1 across the capacitor C1 has dropped to the voltage VL of the power supply 17, so the comparator 14 detects this and sets the reset terminal R of the flip-flop 15. As a result, the output Q of the flip-flop 15 becomes “L”, and the switch SW1 is turned off. Therefore, the capacitor C1 is charged and the voltage VC1 across the capacitor C1 increases. At this time, since the output Q2 of the counter CT remains “H”, the capacitor C2 continues to discharge.

  At time t2, the voltage VC1 across the capacitor C1 reaches the voltage VH of the power supply 16, and the comparator 13 detects this and sets the set terminal S of the flip-flop 15. As a result, the output Q of the flip-flop 15 becomes “H”, and the switch SW1 is turned on. Therefore, the capacitor C1 is discharged and the voltage VC1 across the capacitor C1 decreases. At this time, since the output Q2 of the counter CT remains “H” and does not change, the capacitor C2 continues discharging.

  At time t3, the capacitor C1 switches from discharging to charging in the same manner as at time t1. Also at this time, since the output of the counter CT remains “H”, the capacitor C2 continues to be discharged.

  At time t4, the capacitor C1 is switched from charging to discharging similarly to the time t2. Since the rise of the output Q of the flip-flop 15 becomes the third from time t0, the counter CT changes the output Q2 from “H” to “L”. As a result, the switch SW2 is turned off, and the capacitor C2 is switched from discharging to charging. Therefore, the voltage VC2 across the capacitor C2 increases.

  The voltage VC2 across the capacitor C2 is forcibly discharged or charged by comparing the voltage VH of the power supply 27 with the comparator 25 and the voltage VL of the power supply 28 with the comparator 26, respectively. Thereby, the voltage VC2 at both ends of the capacitor C2 is suppressed so as to change in the same range as the voltage VC1 at both ends of the capacitor C1.

As described above, in the second embodiment, the N-stage counter of the second triangular wave oscillation circuit counts the capacitor state signal, that is, delays the capacitor state signal by N ² periods, thereby generating the second triangular wave oscillation circuit. Since the capacitor is switched between charging and discharging, a triangular wave having an N ² period can be generated with respect to the triangular wave serving as a reference.

In addition, since the capacitance of the capacitor of the second triangular wave oscillation circuit is set to N ² times the capacitance of the capacitor of the first triangular wave oscillation circuit, the triangular wave of N ² period is synchronized with the reference triangular wave. Can be generated.

Embodiment 3 FIG.
A third embodiment of the present invention will be described with reference to FIGS. FIG. 6 is a circuit diagram showing a configuration of the oscillation circuit according to the third embodiment of the present invention. Components having the same functions as those in the first embodiment are denoted by the same reference numerals, and redundant description is omitted.

  The output Q of the flip-flop 15 is connected to the switches SW1 and SW2, and controls the on / off operation of the switches SW1 and SW2.

  The voltage of the power supply 16 that determines the upper limit value of the amplitude of the triangular wave generated by the triangular wave oscillation circuit 1 is VH1, and the voltage of the power supply 17 that determines the lower limit value of the amplitude of the triangular wave generated by the triangular wave oscillation circuit 1 is VL1, and VH1> VL1. Is set so that

  The voltage of the power source 27 that determines the upper limit value of the amplitude of the triangular wave generated by the triangular wave oscillation circuit 2 is VH2, the voltage of the power source 28 that determines the lower limit value of the amplitude of the triangular wave generated by the triangular wave oscillation circuit 2 is VL2, and VH2> It is set so that the relationship of VL2 is established.

  The capacitance of the capacitor C2 is set so that C2 = C1 × (VH1−VL1) / (VH2−VL2). As a result, the time for the capacitor C1 to be charged to reach the upper limit voltage VH1 from the lower limit voltage VL1 and the time for the capacitor C2 to be charged to reach the upper limit voltage VH2 from the lower limit voltage VL2 coincide. Also, the time for the capacitor C1 to discharge and drop from the upper limit voltage VH1 to the lower limit voltage VL1 coincides with the time for the capacitor 2 to discharge and lower from the upper limit voltage VH2 to the lower limit voltage VL2. .

  FIG. 7 is a time chart showing the operation of the oscillation circuit according to the third embodiment when the values of the power supplies 16, 17, 27 and 28 are set to VH2-VL2 ≠ VH1-VL1. At time t0, since the output Q of the flip-flop 15 is “H”, the switch SW1 and the switch SW2 are turned on. When the switch SW1 is turned on, the capacitor C1 is discharged. That is, the voltage VC1 across the capacitor C1 decreases. Since the switch SW2 is also on, the capacitor C2 is also discharged, and the voltage VC2 across the capacitor C1 decreases.

  At time t1, the comparator 14 detects that the voltage VC1 across the capacitor C1 has dropped to the voltage VL1 of the power supply 17, and sets the reset terminal R of the flip-flop 15. As a result, the output Q of the flip-flop 15 becomes “L”, and the switches SW1 and SW2 are turned off. Therefore, the capacitor C1 and the capacitor C2 are switched from discharging to charging. Here, the voltage VC2 across the capacitor C2 is compared with the voltage VL2 of the power supply 28 by the comparator 26. When the voltage VC2 across the capacitor C2 drops to the voltage VL2, the comparator 26 turns on the switch SW4, The capacitor C2 is forcibly charged.

  At time t2, the voltage VC1 across the capacitor C1 reaches the voltage VH1 of the power supply 16, and the comparator detects this and sets the set terminal S of the flip-flop 15. As a result, the output of the flip-flop 15 becomes “H”, and the switches SW1 and SW2 are turned on. Therefore, the capacitor C1 and the capacitor C2 are switched from charging to discharging. Here, the voltage VC2 across the capacitor C2 is compared with the voltage VH2 across the power supply 27 by the comparator 25. When the voltage VC2 across the capacitor C2 reaches the voltage VH2, the comparator 26 turns on the switch SW3, The capacitor C2 is forcibly discharged.

  As described above, in the third embodiment, the upper limit voltage value of the first triangular wave oscillation circuit is set to be different from the upper limit voltage value of the second triangular wave oscillation circuit, and the lower limit voltage of the first triangular wave oscillation circuit is set. And the lower limit voltage value of the second triangular wave oscillation circuit are set to be different from each other, and the capacitance of the capacitor of the first triangular wave oscillation circuit and the capacitance of the capacitor of the second triangular wave oscillation circuit are set to discharge time and charging time. Are set to be equal to each other, it is possible to generate a triangular wave having an oscillation frequency that is synchronized with a reference triangular wave and having a different amplitude width.

  A plurality of triangular wave oscillation circuits 2 described in the first to third embodiments are provided, and each switch SW2 is controlled by the output Q or the output QB of the flip-flop 15 to synchronize with the reference triangular wave, and A plurality of triangular waves having different frequencies, phases, or amplitude widths may be generated.

  As described above, the oscillation circuit according to the present invention is useful when supplying a triangular wave to a circuit that requires a plurality of triangular waves, and in particular, a triangular wave having a different frequency, phase, or amplitude width in synchronization with the reference triangular wave. It is suitable when necessary.

1 is a circuit diagram showing a configuration of an oscillation circuit according to a first embodiment of the present invention. 3 is a time chart for explaining the operation of the oscillation circuit according to the first embodiment of the present invention. 3 is a time chart for explaining the operation of the oscillation circuit according to the first embodiment of the present invention. It is a circuit diagram which shows the structure of the oscillation circuit of Embodiment 2 in this invention. It is a time chart for demonstrating operation | movement of the oscillation circuit of Embodiment 2 in this invention. It is a circuit diagram which shows the structure of the oscillation circuit of Embodiment 3 in this invention. It is a time chart for demonstrating operation | movement of the oscillation circuit of Embodiment 3 in this invention.

Explanation of symbols

1, 2 Triangular wave oscillation circuit 11, 12, 21, 22, 23, 24 Constant current source 13, 14, 25, 26 Comparator 15 Flip-flop 16, 17, 27, 28 Power supply CT counter C1, C2 Capacitor SW1, SW2, SW3, SW4 switch

Claims (6)

In an oscillation circuit that generates multiple triangular waves by discharging and charging a capacitor,
A first triangular wave oscillation circuit that generates a reference triangular wave and outputs a capacitor state signal indicating whether the first capacitor that generates the reference triangular wave is a discharging operation or a charging operation;
N (N is a natural number) second triangular wave oscillation circuits that generate a triangular wave by switching a second capacitor different from the first capacitor to a discharging operation or a charging operation in synchronization with a change in the capacitor state signal; ,
An oscillation circuit comprising: The first triangular wave oscillation circuit includes:
When the voltage across the first capacitor is compared with a predetermined first upper limit voltage value and the voltage across the first capacitor reaches the first upper limit voltage value, the first capacitor A first comparator that switches the capacitor from charge operation to discharge operation;
When the voltage across the first capacitor is compared with a predetermined first lower limit voltage value, and the voltage across the first capacitor is reduced to the first lower limit voltage value, the first capacitor A second comparator that switches the capacitor from discharging operation to charging operation;
The oscillation circuit according to claim 1, further comprising: The second triangular wave oscillation circuit includes:
When the voltage across the second capacitor is compared with a predetermined second upper limit voltage value and the voltage across the second capacitor reaches the second upper limit voltage value, the second capacitor A third comparator that switches the capacitor from charge operation to discharge operation;
When the voltage across the second capacitor is compared with a predetermined second lower limit voltage value and the voltage across the second capacitor drops to the second lower limit voltage value, the second capacitor A fourth comparator that switches from discharging operation to charging operation;
The oscillation circuit according to claim 1, further comprising: The second triangular wave oscillation circuit includes:
The first capacitor according to claim 1, wherein the second capacitor is charged when the first capacitor is in a discharging operation, and the second capacitor is discharged when the first capacitor is in a charging operation. The oscillation circuit as described in any one. The second triangular wave oscillation circuit includes:
4. The method according to claim 1, wherein the second capacitor is discharged when the first capacitor is in a discharging operation, and the second capacitor is charged when the first capacitor is in a charging operation. The oscillation circuit as described in any one. The second triangular wave oscillation circuit includes:
M (M is a natural number) stage counter for counting the capacitor state signal;
Further comprising
The oscillation circuit according to any one of claims 1 to 3, wherein a charging operation and a discharging operation of the second capacitor are switched according to an output of the counter.

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