JP2007236175A - Power supply, standby electric power circuit using the same, and charging circuit for storage battery - Google Patents

Power supply, standby electric power circuit using the same, and charging circuit for storage battery Download PDF

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JP2007236175A
JP2007236175A JP2006086488A JP2006086488A JP2007236175A JP 2007236175 A JP2007236175 A JP 2007236175A JP 2006086488 A JP2006086488 A JP 2006086488A JP 2006086488 A JP2006086488 A JP 2006086488A JP 2007236175 A JP2007236175 A JP 2007236175A
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Takeshi Suzuki
健 鈴木
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a power supply, where a depletion type junction FET (JFET) is used and an idling current is zero, and to provide a standby electric power circuit using the power supply and a charging circuit for storage batteries. <P>SOLUTION: The drain of the JFET Q1 is connected to the positive terminal of a DC power supply E as shown in Fig.1, a capacitor C1 is connected between the source of Q1 and the negative terminal (0 point) of E, and voltage, where a gate side is positive, is applied between the gate of Q1 and the 0 point, thus obtaining a power circuit of which the idling current is zero, and setting both the ends of C1 to be the power supply. Both the ends of C1 are connected to the power supply terminal of a control circuit SG as an auxiliary power supply EH. A load circuit RL and a MOS FET Q2 are connected in series between the positive and negative terminals of E from a positive side, and output OP of SG is connected to the gate of Q2 for turning on and off Q2, thus obtaining the standby electric power circuit having an idling current of zero. Fig. 3 and Fig. 4 are other embodiments, and a circuit is applied to an AC power supply. The RL is not connected to the MOSFET, and the storage battery is connected instead of the capacitor C1, thus obtaining the charging circuit for the storage battery. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、デプレッション型ジャンクションFET(本文では単にJFETと記す)を利用した電源およびその電源を用いた待機電力回路ならびに蓄電池充電回路に関する。
実施例は全てNチャンネルJFETであるが、簡単な回路変更でPチャンネルJFETも使用可能である。なお、電源回路に使用するコンデンサの充電動作と蓄電池充電動作の考え方は同じなので、電源およびその電源を用いた待機電力回路を中心に説明し、蓄電池充電回路の動作説明については簡単にする。
明細書で使用する混同しやすい下記用語を、念のため最初に記す。
▲1▼入力電源:電源回路の入力端子に接続する直流電源(脈流電源も含む)。
▲2▼電源回路:▲1▼の入力電源を入力とし、▲3▼の電源を出力する回路。図1の回路では、JFETQ1、コンデンサC1、電池B、抵抗器R1の部分である。
蓄電池充電回路は基本的には前記電源回路と同じであるが、コンデンサC1は必ずしも接続の必要はない。
▲3▼電 源:▲2▼の電源回路で使用するコンデンサC1の両端が、電源である。
待機電力回路では、この電源が制御回路の電源で補助電源になる。
蓄電池充電回路では、この電源端子が蓄電池充電回路の正負端子になる。
▲4▼出力電圧:▲3▼の電源回路のコンデンサC1の電圧が出力電圧で、Vc1で表す。
電源回路の出力電圧は、待機電力回路では補助電源電圧になる。
蓄電池充電回路では、充電中の蓄電池電圧Vtと同じ値になる。
▲5▼出力電流:▲3▼の電源から流れ出る電流。
待機電力回路としては、制御回路の電源電流になる。
蓄電池充電回路では、蓄電池充電電流になる。
The present invention relates to a power source using a depletion type junction FET (hereinafter simply referred to as JFET), a standby power circuit using the power source, and a storage battery charging circuit.
The embodiments are all N-channel JFETs, but P-channel JFETs can also be used with simple circuit modifications. Since the concept of the charging operation of the capacitor used in the power supply circuit and the storage battery charging operation are the same, the description will focus on the power supply and the standby power circuit using the power supply, and the operation description of the storage battery charging circuit will be simplified.
The following confusing terms used in the specification are listed first to make sure.
(1) Input power supply: DC power supply (including pulsating power supply) connected to the input terminal of the power supply circuit.
(2) Power supply circuit: A circuit that takes the input power of (1) as an input and outputs the power of (3). In the circuit of FIG. 1, it is a portion of JFET Q1, capacitor C1, battery B, and resistor R1.
The storage battery charging circuit is basically the same as the power supply circuit, but the capacitor C1 is not necessarily connected.
(3) Power supply: Both ends of the capacitor C1 used in the power supply circuit of (2) are power supplies.
In the standby power circuit, this power source is an auxiliary power source for the control circuit.
In the storage battery charging circuit, this power supply terminal becomes the positive / negative terminal of the storage battery charging circuit.
(4) Output voltage: The voltage of the capacitor C1 of the power supply circuit of (3) is an output voltage, which is represented by Vc1.
The output voltage of the power supply circuit becomes an auxiliary power supply voltage in the standby power circuit.
In the storage battery charging circuit, it becomes the same value as the storage battery voltage Vt during charging.
(5) Output current: Current flowing out from the power source of (3).
The standby power circuit is a power supply current for the control circuit.
In the storage battery charging circuit, the storage battery charging current is obtained.

最近の大型の電源回路はスイッチング・レギュレータ電源回路を用いることが多い。
待機電力は電力が小さいので研究開発もあまり力を注がれていず、待機電力に使用される補助電源回路は依然として3端子レギュレータの使用が多い。
図5は、補助電源に3端子レギュレータを用いた回路の1例である。図5の3端子レギュレータを直流電源Eに接続すれば、出力電流の有無にかかわらず0点にアイドリング電流(出力電圧を発生させるために流しておく電流で、バイアス電流または回路電流とも言われる。この電流は出力電流の有無にかかわらず流れている)が流れて電力を消費する。例えば、直流電源Eの電圧が15Vでアイドリング電流が10mAであれば、アイドリング電流による電力のみでも150mWの待機電力になる。3端子レギュレータを使用した実際の商品では、トランスの励磁電流等を含む前記以外の電力で、待機電力は数百mW〜数Wの商品が多いが、制御回路で真に必要とする制御回路電力は数mW以下で、待機電力と必要電力の比は実に数百倍〜数千倍である。また、日本での全家庭用電力の10%が待機電力であり、地球温暖化防止のためにも待機電力の削減は必須の課題である。
蓄電池充電回路では、図5の3端子レギュレータ部の出力に被充電蓄電池を接続することになるが、充分に充電ししかも過充電にならないようにするためには充電電圧を監視して手動で充電を止めるか、複雑な回路により自動で充電を止める必要がある。しかも、充電器自体もアイドリング電流が流れているので被充電蓄電池を接続していないときでも電力を消費している回路が多い。
雑誌「トランジスタ技術」CQ出版株式会社、2000年5月号、P.168〜169、図6。 雑誌「電子技術」日刊工業新聞社、1998年3月号、P.2〜3。
In recent large-scale power supply circuits, a switching regulator power supply circuit is often used.
Since standby power is small, much research and development has not been put in place, and the auxiliary power supply circuit used for standby power still uses a three-terminal regulator.
FIG. 5 is an example of a circuit using a three-terminal regulator as an auxiliary power source. If the three-terminal regulator of FIG. 5 is connected to the DC power source E, an idling current (current that is passed to generate an output voltage, which is called a bias current or a circuit current) at the zero point regardless of the presence or absence of the output current. This current flows regardless of the presence or absence of the output current) and consumes power. For example, if the voltage of the DC power supply E is 15 V and the idling current is 10 mA, the standby power of 150 mW is obtained even with only the idling current. In actual products that use a three-terminal regulator, there are many products with standby power in the range of several hundreds mW to several W, other than the above, including the excitation current of the transformer. Is several mW or less, and the ratio of standby power to required power is actually several hundred to several thousand times. In addition, 10% of all household power in Japan is standby power, and reduction of standby power is an essential issue in order to prevent global warming.
In the storage battery charging circuit, the battery to be charged is connected to the output of the 3-terminal regulator unit in FIG. 5, but charging is performed manually by monitoring the charging voltage in order to fully charge and not to overcharge. It is necessary to stop charging or automatically stop charging with a complicated circuit. Moreover, since the idling current flows also in the charger itself, there are many circuits that consume power even when the charged storage battery is not connected.
Magazine “Transistor Technology” CQ Publishing Co., Ltd., May 2000, P.I. 168-169, FIG. Magazine "Electronic Technology" Nikkan Kogyo Shimbun, March 1998, P.I. 2-3.

電源およびその電源を用いた待機電力回路を説明する。図5のように、待機電力回路に使用する制御回路SGの電源として3端子レギュレータ回路の出力電圧を使用し、SGの出力OPでスイッチであるMOSFETQ2をオン/オフさせる回路例で考える。待機電力回路は3端子レギュレータの出力電流の有無にかかわらず、制御回路SGの電源端子には電圧を印加しておく必要がある。即ち、3端子レギュレータは出力電圧を発生させるためアイドリング電流を流しておかねばならず、アイドリング電流は待機電力になるという問題があった。
また、蓄電池充電回路では充電完了時に手動または自動で充電を止める必要があるが、手動で止めるのは煩わしく、自動で止める回路にするには複雑で高価な回路になり、被充電蓄電池が接続されていなくともアイドリング電流は流れて電力が発生すると言う問題があった。
本発明はこのような問題を解決するものである。
電源および待機電力回路では、電源回路から出力電流があれば入力電源から電源回路に電流は流入するが、電源回路からの出力電流がゼロなら出力電圧を維持したまま入力電源からの流入電流を基本的にはゼロにすることを目的とする。
蓄電池充電回路では、蓄電池電圧がある電圧以上になれば充電が自動的に止まり、しかもアイドリング電流がゼロの回路にすることを目的にする。
以上のように両回路はコンデンサと蓄電池の違いはあるが、充電電圧の漸増に伴う充電電流の漸減の関係およびアイドリング電流の考え方は全く同じである。
A power supply and a standby power circuit using the power supply will be described. As shown in FIG. 5, a circuit example is considered in which the output voltage of the three-terminal regulator circuit is used as the power source of the control circuit SG used in the standby power circuit, and the MOSFET Q2 that is a switch is turned on / off by the output OP of SG. The standby power circuit needs to apply a voltage to the power supply terminal of the control circuit SG regardless of the output current of the three-terminal regulator. That is, the three-terminal regulator has to cause an idling current to flow in order to generate an output voltage, and the idling current becomes standby power.
Moreover, in the battery charging circuit, it is necessary to stop charging manually or automatically when charging is completed, but it is troublesome to stop manually, and it becomes a complicated and expensive circuit to make the circuit automatically stop, and the charged storage battery is connected Even if not, there is a problem that idling current flows and power is generated.
The present invention solves such problems.
In the power supply and standby power circuit, if there is output current from the power supply circuit, the current flows from the input power supply to the power supply circuit, but if the output current from the power supply circuit is zero, the inflow current from the input power supply is basically maintained while maintaining the output voltage. The goal is to zero.
The purpose of the storage battery charging circuit is to make charging automatically stop when the storage battery voltage exceeds a certain voltage, and to make the idling current zero.
As described above, although both circuits have a difference between a capacitor and a storage battery, the relationship between the gradual decrease of the charging current accompanying the gradual increase of the charging voltage and the concept of the idling current are exactly the same.

電源およびその電源を用いた待機電力回路について、直流電源で説明する。直流電源正端子にJFETのドレインを接続し、JFETのソースにコンデンサを接続し、コンデンサの別の端子を電源負端子(0点)に接続し、0点とJFETのゲート間にゲート側が正の電圧を印加する。この回路で充電されたコンデンサが電源になる。この電源はアイドリング電流≒ゼロなので、アイドリング時の電力は漏れ電流によるマイクロワット(μW)オーダーである。
蓄電池充電回路では、前記回路のコンデンサ端子を蓄電池の充電用正負端子にすると、蓄電池電圧の漸増に伴い充電電流は漸減し、やがてゼロになる。
A power source and a standby power circuit using the power source will be described using a DC power source. Connect the drain of the JFET to the DC power supply positive terminal, connect the capacitor to the source of the JFET, connect the other terminal of the capacitor to the power supply negative terminal (0 point), and the gate side is positive between the zero point and the gate of the JFET Apply voltage. The capacitor charged in this circuit becomes the power source. Since this power supply has idling current ≈ zero, the power during idling is on the order of microwatts (μW) due to leakage current.
In the storage battery charging circuit, when the capacitor terminal of the circuit is a positive / negative terminal for charging the storage battery, the charging current gradually decreases as the storage battery voltage gradually increases, and eventually becomes zero.

本提案電源は小電力の電源に適した電源で、待機電力回路等の補助電源には最適である。
蓄電池充電回路では蓄電池電圧の漸増に伴い充電電流は漸減して、蓄電池がある電圧まで充電されれば充電電流はゼロになるので、過充電されることは無くなる。
両回路ともアイドリング電流は基本的にはゼロである。
The proposed power source is a power source suitable for a low power source, and is optimal for an auxiliary power source such as a standby power circuit.
In the storage battery charging circuit, the charging current gradually decreases as the storage battery voltage increases, and if the storage battery is charged to a certain voltage, the charging current becomes zero, so that the battery is not overcharged.
In both circuits, the idling current is basically zero.

以下、本発明の実施の形態を図1〜図4に基づいて説明する。  Hereinafter, embodiments of the present invention will be described with reference to FIGS.

図1を説明する前に図2を説明する。図2はJFETである2SK184のドレイン飽和電流Idssをパラメータとするゲート・ソース間電圧Vgs(負の値)とドレイン電流Idの関係である伝達特性で、IdがゼロになるVgsがピンチオフ電圧Vp(負の値)である。図2を見れば明らかなように低いドレイン飽和電流Idssではピンチオフ電圧Vpは絶対値が小さく、大きいIdssではVpの絶対値が大きいので、バラツキの大きいJFETではIdssでランク分けすることが多い。構造的にはゲート・ドレイン間はPN接合で、原理的にはゲート電圧はドレイン電圧より0.7V程度まで高くできるが、その時のドレイン電流はほぼドレイン飽和電流である。
鈴木雅臣著「続トランジスタ回路の設計」CQ出版社、1994年7月20日 第3版発行.図2は本書のp.37.図11の転写。
Prior to describing FIG. 1, FIG. 2 will be described. FIG. 2 shows a transfer characteristic that is a relationship between the gate-source voltage Vgs (negative value) and the drain current Id using the drain saturation current Idss of the JFET 2SK184 as a parameter, and Vgs at which Id becomes zero is the pinch-off voltage Vp ( Negative value). As apparent from FIG. 2, the pinch-off voltage Vp has a small absolute value at a low drain saturation current Idss, and the absolute value of Vp is large at a large Idss. Therefore, JFETs with large variations are often ranked by Idss. Structurally, the gate-drain is a PN junction, and in principle, the gate voltage can be higher than the drain voltage by about 0.7 V, but the drain current at that time is almost the drain saturation current.
Published by Masaomi Suzuki, “Design of transistor circuit”, CQ Publisher, July 20, 1994, 3rd edition. FIG. 2 shows p. 37. Transfer of FIG.

図2に基づき図1を説明する。図1は本発明の請求項1〜請求項3にかかわる実施例で、直流電源用回路である。先ず、電源および待機電力回路について説明する。直流電源Eの正端子にJFETQ1のドレインを接続し、Q1のソースにコンデンサC1の黒点側を接続し、C1の非黒点側をEの負端子である0点に接続する。コンデンサC1の両端は制御回路SGの電源端子に接続する。電池Bの負端子は0点に接続し、Bの正端子は抵抗器R1を介してJFETQ1のゲートに接続する。抵抗器R1は電池Bの電圧がコンデンサC1の電圧より高いときのBから流れ出る電流を抑制する。別に直流電源Eの正負端子間に正端子より負荷回路RLとMOSFETQ2を直列接続し、Q2のゲートは制御回路SGの出力OPに接続する。この回路の、JFETQ1、コンデンサC1、抵抗器R1、電池B、が電源回路で、C1の両端が制御回路SG用の電源で補助電源EHになる。  1 will be described with reference to FIG. FIG. 1 shows an embodiment according to claims 1 to 3 of the present invention, which is a DC power supply circuit. First, the power supply and standby power circuit will be described. The drain of JFET Q1 is connected to the positive terminal of DC power supply E, the black dot side of capacitor C1 is connected to the source of Q1, and the non-black dot side of C1 is connected to the zero point which is the negative terminal of E. Both ends of the capacitor C1 are connected to the power supply terminal of the control circuit SG. The negative terminal of battery B is connected to point 0, and the positive terminal of B is connected to the gate of JFET Q1 via resistor R1. Resistor R1 suppresses the current flowing out of B when the voltage of battery B is higher than the voltage of capacitor C1. Separately, the load circuit RL and the MOSFET Q2 are connected in series from the positive terminal between the positive and negative terminals of the DC power supply E, and the gate of Q2 is connected to the output OP of the control circuit SG. In this circuit, the JFET Q1, the capacitor C1, the resistor R1, and the battery B are power supply circuits, and both ends of C1 are the power supply for the control circuit SG and serve as the auxiliary power supply EH.

この回路の動作を、直流電源Eの電圧がある値以上あるとして説明する。コンデンサC1の電圧Vc1と電池Bの電圧Vbとの差の値により動作は下記のように多少異なる。
以下の説明はコンデンサC1で説明するが、前述のようにコンデンサの充電動作と蓄電池の充電動作は全く同じなので、コンデンサC1の電圧Vc1を蓄電池充電電圧Vtに、またコンデンサC1の充電電流は蓄電池充電電流に置き換えれば、そのまま蓄電池充電動作としての説明になるので、蓄電池充電回路としてはあえて説明は省略する。
(電池Bの電圧:Vb、コンデンサC1の電圧:Vc1、Q1のゲート・ソース間電圧:Vgs、Q1のピンチオフ電圧:Vp、Q1のドレイン電流:Id、Q1のドレイン飽和電流:Idss)
a.電源の出力電流がゼロの時の、Q1のドレイン電流Idを説明する。
(この時のQ1のドレイン電流IdはコンデンサC1の充電電流と同じ値)
▲1▼.0≦(Vb−Vc1)の時は、Vgs≒0なのでId≒Idssになり、コンデンサC1をIdssで充電する。
▲2▼.Vp≦(Vb−Vc1)=Vgs≦0の時は、図2によるVgsに基づくIdになり、コンデンサC1をIdで充電する。
(Vb−Vc1)=VpになればIdはゼロなので、電源回路の待機電力もゼロになる。
▲3▼.(Vb−Vc1)<Vpにはならないが、何らかの理由でこのようになれば、Idはゼロなので、電源回路の待機電力もゼロである。
b.電源からの出力電流とドレイン電流Idが同じ値で安定している状態でのコンデンサC1の電圧Vc1を説明する。
▲4▼.0≦電源回路の出力電流=Id≦Idssの時は、Vc1=(Vb−Id時のVgs)になるがVgsは負の値なので、Vc1はVbから絶対値でVgsだけ高い電圧になる。
▲5▼.Idss≦(電源回路の出力電流)の時は、出力電流はIdssに抑制される。この時はVc1=Vbになる。
c.安定状態での電源回路の出力電圧のまとめ。
電源回路の出力電圧OP(コンデンサC1の電圧Vc1)は、下記の▲6▼〜▲8▼から分かるように、Vb≦Vc1≦(Vb−Vp)になる。
▲6▼.出力電流=Idssの時:Vc1=Vb
▲7▼.出力電流=ゼロの時:Vc1=(Vb−Vp)
▲8▼.出力電流=Idの時=Vc1=(Vb−Id時のVgs)
(VpとVgsは前述のようにNチャンネルJFETでは負の値である)
蓄電池充電回路では、▲7▼記載の蓄電池電圧Vt=(Vb−Vp)と設定すれば,Vtは(Vb−Vp)以上に充電されることはなく、またVtが下がれば自動的に充電が開始される。
The operation of this circuit will be described on the assumption that the voltage of the DC power supply E is greater than a certain value. Depending on the difference between the voltage Vc1 of the capacitor C1 and the voltage Vb of the battery B, the operation is slightly different as follows.
The following description will be made with the capacitor C1. Since the capacitor charging operation and the storage battery charging operation are exactly the same as described above, the voltage Vc1 of the capacitor C1 is changed to the storage battery charging voltage Vt, and the charging current of the capacitor C1 is charged to the storage battery. If the current is replaced with the current, the description will be made as the storage battery charging operation as it is, so the description of the storage battery charging circuit will be omitted.
(Battery B voltage: Vb, capacitor C1 voltage: Vc1, Q1 gate-source voltage: Vgs, Q1 pinch-off voltage: Vp, Q1 drain current: Id, Q1 drain saturation current: Idss)
a. The drain current Id of Q1 when the output current of the power supply is zero will be described.
(At this time, the drain current Id of Q1 is the same value as the charging current of the capacitor C1)
(1). When 0 ≦ (Vb−Vc1), Vgs≈0, so Id≈Idss, and the capacitor C1 is charged with Idss.
(2). When Vp ≦ (Vb−Vc1) = Vgs ≦ 0, Id is based on Vgs according to FIG. 2, and the capacitor C1 is charged with Id.
Since (Id) is zero when (Vb−Vc1) = Vp, the standby power of the power supply circuit is also zero.
(3). (Vb−Vc1) <Vp does not hold, but if this is done for some reason, Id is zero, so the standby power of the power supply circuit is zero.
b. The voltage Vc1 of the capacitor C1 when the output current from the power supply and the drain current Id are stable at the same value will be described.
(4). When 0 ≦ the output current of the power supply circuit = Id ≦ Idss, Vc1 = (Vgs at the time of Vb−Id), but since Vgs is a negative value, Vc1 is an absolute value higher than Vb by Vgs.
(5). When Idss ≦ (output current of the power supply circuit), the output current is suppressed to Idss. At this time, Vc1 = Vb.
c. A summary of the output voltage of the power supply circuit in a stable state.
The output voltage OP (voltage Vc1 of the capacitor C1) of the power supply circuit is Vb ≦ Vc1 ≦ (Vb−Vp) as can be seen from the following (6) to (8).
(6). When output current = Idss: Vc1 = Vb
(7). When the output current is zero: Vc1 = (Vb−Vp)
(8). When output current = Id = Vc1 = (Vgs at Vb−Id)
(Vp and Vgs are negative values in the N-channel JFET as described above)
In the storage battery charging circuit, if the storage battery voltage Vt = (Vb−Vp) described in (7) is set, Vt will not be charged more than (Vb−Vp), and if Vt drops, the battery will be charged automatically. Be started.

電源および待機電力回路として図1の全体回路の動作を説明する。JFETQ1のゲートに電圧が印加されているので直流電源Eの電流は、直流電源E−JFETQ1−コンデンサC1−直流電源E、と流れてコンデンサC1を充電する。コンデンサC1に充電された電圧は補助電源EHとして制御回路SGの電源端子に印加されてSGは動作し、SG出力OPはMOSFETQ2のゲートに印加される。制御回路SGの出力OPは入力IPによりハイ/ロウになるが、OPがロウならMOSFETQ2はオフになるので負荷回路RLに電流は流れない。出力OPがハイならばMOSFETQ2はオンになるので電流は、直流電源E−負荷回路RL−MOSFETQ2−直流電源E、と流れて負荷回路RLは動作する。
この回路は、電源回路から出力電流が流れれば直流電源Eから電源回路に電流は流入するが、電源回路からの出力電流がゼロなら「0009」▲2▼に記載のようにアイドリング電流はゼロなので、Eからの電流はゼロで待機電力もゼロである。従来の待機電力回路は電源回路からの出力電流の有無に無関係に電圧を発生させるためにアイドリング電流を流す必要があったが、本提案回路は電源回路から出力電流があれば入力電源から電流は流れて来るが出力電圧を発生させるのみではアイドリング電流はゼロであり、この点が従来の待機電力回路と大きく異なる点である。なお、コンデンサC1の電圧Vc1(補助電源電圧)は制御回路SGの電源電流により多少は変動するが、前述のように変動幅はピンチオフ電圧Vp以下である。
JFETのドレイン飽和電流Idssは一般的には20mA以下であるが、JFETを並列接続すれば出力電流を大きくできる。複数のJFETの並列接続では、ドレイン電流Idは全てのIdの和の電流になり、ピンチオフ電圧Vpは最も低いVp(絶対値で最大)になる。出力電流の大小で出力電圧の変動を小さく(Vpの絶対値を小さく)するには、ドレイン飽和電流Idssの小さいJFETを並列接続すればよい。また、出力電流による出力電圧の変動を小さくするには、多少待機電力は増加するが出力端子に抵抗器を接続して常時多少の電流を流しておけばピンチオフ電圧Vpは実質的には小さくなる。図2でドレイン飽和電流Idss=6.5mAのJFETで常時Id=1mAを流しておけばピンチオフ電圧Vpは、−0.7V→−0.4Vになり、電源回路としての電圧変動幅は、0.7V→0.4Vになる。電池Bに代えて「数百MΩの抵抗器+ツェナーダイオード」が使用可能である。その時のツェナーダイオード電流は一種のアイドリング電流になり待機電力の増加になるが、その電力は数μW程度である。
蓄電池充電回路については、段落「0008」〜「0009」の説明のコンデンサC1を蓄電池に置き換えれば良いが、再度簡単に説明する。電源回路の出力端子に蓄電池を接続すれば、蓄電池充電回路として使用も可能である。蓄電池の充電完了電圧=(Vb−Vp)にすれば、蓄電池電圧の漸増に伴い充電電流は漸減し、蓄電池電圧が(Vb−Vp)になった時点で充電電流がゼロになり、蓄電池電圧が下がれば自動的に充電が開始されるので、蓄電池を充電しながら使用するフローテング使用には最適な回路になる。単独の充電器としても過充電防止が可能である。しかもアイドリング電流はゼロである。なお、充電器として使用するときは、コンデンサC1は必ずしも必要ではない。充電回路として考えるときは、点線内の電源回路のみの動作であり、負荷回路RLとMOSFETQ2の回路は不要である。
The operation of the entire circuit of FIG. 1 will be described as a power supply and standby power circuit. Since a voltage is applied to the gate of JFET Q1, the current of DC power source E flows through DC power source E-JFET Q1-capacitor C1-DC power source E to charge capacitor C1. The voltage charged in the capacitor C1 is applied to the power supply terminal of the control circuit SG as the auxiliary power supply EH, SG operates, and the SG output OP is applied to the gate of the MOSFET Q2. Although the output OP of the control circuit SG becomes high / low by the input IP, if OP is low, the MOSFET Q2 is turned off, so that no current flows through the load circuit RL. If the output OP is high, the MOSFET Q2 is turned on, so that current flows through the DC power supply E-load circuit RL-MOSFETQ2-DC power supply E, and the load circuit RL operates.
In this circuit, if an output current flows from the power supply circuit, a current flows from the DC power supply E to the power supply circuit. If the output current from the power supply circuit is zero, the idling current is zero as described in “0009” (2). Therefore, the current from E is zero and the standby power is zero. In the conventional standby power circuit, it was necessary to flow an idling current to generate a voltage regardless of the presence or absence of the output current from the power supply circuit. However, the idling current is zero when only the output voltage is generated. This is a point that is greatly different from the conventional standby power circuit. The voltage Vc1 (auxiliary power supply voltage) of the capacitor C1 varies somewhat depending on the power supply current of the control circuit SG, but as described above, the fluctuation range is equal to or less than the pinch-off voltage Vp.
The drain saturation current Idss of the JFET is generally 20 mA or less, but the output current can be increased if the JFETs are connected in parallel. In the parallel connection of a plurality of JFETs, the drain current Id is the sum of all Ids, and the pinch-off voltage Vp is the lowest Vp (absolute value is maximum). In order to reduce the fluctuation of the output voltage depending on the magnitude of the output current (decrease the absolute value of Vp), a JFET having a small drain saturation current Idss may be connected in parallel. In order to reduce the fluctuation of the output voltage due to the output current, the standby power increases slightly, but if a resistor is connected to the output terminal and a certain amount of current is allowed to flow constantly, the pinch-off voltage Vp is substantially reduced. . In FIG. 2, if Id = 1 mA is constantly applied to a JFET having a drain saturation current Idss = 6.5 mA, the pinch-off voltage Vp becomes −0.7 V → −0.4 V, and the voltage fluctuation range as the power supply circuit is 0 .7V → 0.4V. Instead of the battery B, a “several hundred MΩ resistor + zener diode” can be used. The Zener diode current at that time becomes a kind of idling current and the standby power increases, but the power is about several μW.
Regarding the storage battery charging circuit, the capacitor C1 described in the paragraphs “0008” to “0009” may be replaced with a storage battery, but this will be briefly described again. If a storage battery is connected to the output terminal of the power supply circuit, it can be used as a storage battery charging circuit. If the charging completion voltage of the storage battery = (Vb−Vp), the charging current gradually decreases as the storage battery voltage increases, and the charging current becomes zero when the storage battery voltage becomes (Vb−Vp). Since the charging is automatically started when the battery is lowered, the circuit is optimal for the use of the float that is used while charging the storage battery. As a single charger, overcharge can be prevented. Moreover, the idling current is zero. Note that the capacitor C1 is not always necessary when used as a charger. When considered as a charging circuit, only the power supply circuit within the dotted line is operated, and the circuit of the load circuit RL and MOSFET Q2 is unnecessary.

図3は本発明の請求項1〜請求項3にかかわる実施例で交流電源用回路である。蓄電池充電回路については、実施例1の説明に準じるのでここでは割愛する。この回路は、MOSFETQ3とQ4のゲート同士とソース同士を各々接続した逆直列回路を交流電源ACと負荷回路RLに直列接続する。以後の説明上、MOSFETQ3とQ4のソース同士を0点とし、交流電源ACの黒点側をK点とし、ACの非黒点側をL点とし、Q4のドレインと負荷回路RLの接続点をM点とする。K点と0点間に0点側よりコンデンサc2とアノードを0点側にしたツェナーダイオードZDの並列回路のZDのカソードに抵抗器R2とJFETQ1のゲートを接続し、R2の別の端子とQ1のドレインとダイオードD1のカソードを接続し、D1のアノードをK点に接続する。また、JFETQ1のソースと0点間にコンデンサC1を接続し、C1の両端を制御回路SGの電源端子に接続し、SGの出力OPはMOSFETQ3とQ4のゲート同士に接続する。MOSFETQ3とQ4の寄生ダイオードは各々ダイオードD3とD4とする。
動作を説明する。交流電源ACの黒点側が正になればACの電流は、交流電源AC−ダイオードD1−抵抗器R2−ツェナーダイオードZD−ダイオードD3−交流電源ACと流れてコンデンサC2をZDのツェナー電圧に充電し、その電圧はJFETQ1のゲートに印加される。その状態で交流電源ACの黒点側が正になればACの電流は、交流電源AC−ダイオードD1−JFETQ1−コンデンサC1−ダイオードD3−交流電源ACと流れてC1を充電する。コンデンサC1の電圧は補助電源EHとして制御回路SGの電源端子に印加されてSGは動作し、SG出力OPはMOSFETQ3とQ4のゲート同士に印加される。制御回路SGの出力電圧OPがロウならMOSFETQ3とQ4はオフになるので負荷回路RLに電流は流れない。出力OPがハイならMOSFETQ3とQ4はオンになるので負荷回路RLに電流が流れる。交流電源ACの黒点側が正であれば負荷回路RLを流れる電流は、交流電源AC−負荷回路RL−MOSFETQ4−ダイオードD3−交流電源ACと流れ、黒点側が負の時の電流は、交流電源AC−MOSFETQ3−ダイオードD4−負荷回路RL−交流電源ACと流れて負荷回路RLは動作する。なお、MOSFETがオンの時の寄生ダイオードに流れる電流は、まずMOSFETのソースからドレインへチャンネル部を流れ、そのオン電圧が寄生ダイオードの立ち上がり電圧以上になったときに寄生ダイオードにも流れる。交流電源ACは商用周波数でなくともよく、トランスの2次側でもよい。コンデンサC2はJFETQ1のゲート電圧を直流にしている。
FIG. 3 shows an AC power supply circuit in an embodiment according to claims 1 to 3 of the present invention. Since the storage battery charging circuit conforms to the description of the first embodiment, it is omitted here. In this circuit, an anti-series circuit in which gates and sources of MOSFETs Q3 and Q4 are connected to each other is connected in series to an AC power supply AC and a load circuit RL. In the following explanation, the sources of the MOSFETs Q3 and Q4 are set to 0 points, the black dot side of the AC power supply AC is set to K point, the non-black dot side of AC is set to L point, and the connection point between the drain of Q4 and the load circuit RL is M point. And The resistor R2 and the gate of JFET Q1 are connected to the cathode of ZD of the parallel circuit of the Zener diode ZD with the capacitor c2 and the anode at the 0 point side from the 0 point side between the K point and the 0 point, and another terminal of R2 and Q1 Are connected to the cathode of the diode D1, and the anode of D1 is connected to the point K. Further, the capacitor C1 is connected between the source of the JFET Q1 and the zero point, both ends of C1 are connected to the power supply terminal of the control circuit SG, and the output OP of SG is connected to the gates of the MOSFETs Q3 and Q4. The parasitic diodes of MOSFETs Q3 and Q4 are diodes D3 and D4, respectively.
The operation will be described. If the black spot side of the AC power supply AC becomes positive, the AC current flows through the AC power supply AC-diode D1-resistor R2-zener diode ZD-diode D3-AC power supply AC to charge the capacitor C2 to the Zener voltage of ZD, The voltage is applied to the gate of JFET Q1. If the black dot side of the AC power supply AC becomes positive in this state, the AC current flows through the AC power supply AC-diode D1-JFETQ1-capacitor C1-diode D3-AC power supply AC to charge C1. The voltage of the capacitor C1 is applied to the power supply terminal of the control circuit SG as the auxiliary power supply EH, SG operates, and the SG output OP is applied to the gates of the MOSFETs Q3 and Q4. If the output voltage OP of the control circuit SG is low, the MOSFETs Q3 and Q4 are turned off, so that no current flows through the load circuit RL. If the output OP is high, the MOSFETs Q3 and Q4 are turned on, so that a current flows through the load circuit RL. If the black dot side of the AC power source AC is positive, the current flowing through the load circuit RL flows through the AC power source AC-load circuit RL-MOSFET Q4-diode D3-AC power source AC, and the current when the black dot side is negative is AC power source AC- The load circuit RL operates by flowing through the MOSFET Q3-diode D4-load circuit RL-AC power supply AC. Note that the current flowing through the parasitic diode when the MOSFET is on first flows through the channel portion from the source to the drain of the MOSFET, and also flows through the parasitic diode when the on-voltage exceeds the rising voltage of the parasitic diode. The AC power supply AC may not be a commercial frequency, and may be the secondary side of the transformer. Capacitor C2 makes the gate voltage of JFET Q1 DC.

図4は本発明の請求項1〜請求項3にかかわる実施例で、図3とは別の交流電源用回路である。蓄電池充電回路については、実施例1の説明に準じるのでここでも割愛する。
図4は図3のL点とM点間にダイオードD5とD7のカソード同士を接続した逆直列回路と、ダイオードD6とD8のアノード同士を接続した逆直列回路を並列接続し、D5とD7のカソードにMOSFETQ2のドレインを接続し、D6とD8のアノードにQ2のソースを接続する。この回路の0点はMOSFETQ2のソースである。K点と0点間には図3と同じく、コンデンサC1とC2、ツェナーダイオードZD、抵抗器R2、ダイオードD1、JFETQ1を接続し、C1の両端は制御回路SGの電源端子に接続し、SGの出力OPをMOSFETQ2のゲートに接続する。
動作を説明する。この回路のコンデンサC1の両端が電源でC1の電圧が制御回路SGの電源端子に印加されてSGが動作するまでは段落「0011」とほぼ同じである。制御回路SGの出力OPがロウならMOSFETQ2はオフになり負荷回路RLに電流は流れない。出力OPがハイならMOSFETQ2はオンになるので負荷回路RLに電流が流れる。交流電源ACの黒点側が正であれば負荷回路RLを流れる電流は、交流電源AC−負荷回路RL−ダイオードD7−MOSFETQ2−ダイオードD6−交流電源ACと流れ、黒点側が負の時の電流は、交流電源AC−ダイオードD5−MOSFETQ2−ダイオードD8−負荷回路RL−交流電源ACと流れて、RLは動作する。図4の負荷回路RLは交流回路用であるがRLが直流でも動作する回路であればRLをダイオードD5とD7のカソードとMOSFETQ2のドレイン間に接続できる。その回路なら負荷回路とMOSFETの複数の直列回路を複数の制御回路で制御できる。
FIG. 4 shows an embodiment according to claims 1 to 3 of the present invention, which is an AC power supply circuit different from FIG. Since the storage battery charging circuit conforms to the description of the first embodiment, it is omitted here.
In FIG. 4, an anti-series circuit in which the cathodes of the diodes D5 and D7 are connected between the points L and M in FIG. 3 and an anti-series circuit in which the anodes of the diodes D6 and D8 are connected are connected in parallel. The drain of MOSFET Q2 is connected to the cathode, and the source of Q2 is connected to the anodes of D6 and D8. The zero point of this circuit is the source of MOSFET Q2. Similarly to FIG. 3, capacitors C1 and C2, Zener diode ZD, resistor R2, diode D1, and JFET Q1 are connected between the K point and the 0 point, and both ends of C1 are connected to the power supply terminal of the control circuit SG. The output OP is connected to the gate of MOSFETQ2.
The operation will be described. The circuit is almost the same as the paragraph “0011” until both ends of the capacitor C1 are power supplies and the voltage of C1 is applied to the power supply terminal of the control circuit SG to operate SG. If the output OP of the control circuit SG is low, the MOSFET Q2 is turned off and no current flows through the load circuit RL. If the output OP is high, the MOSFET Q2 is turned on, and a current flows through the load circuit RL. If the black dot side of the AC power source AC is positive, the current flowing through the load circuit RL flows through the AC power source AC-load circuit RL-diode D7-MOSFET Q2-diode D6-AC power source AC, and the current when the black dot side is negative is AC The power supply AC-diode D5-MOSFET Q2-diode D8-load circuit RL-AC power supply AC flows and RL operates. The load circuit RL of FIG. 4 is for an AC circuit, but the RL can be connected between the cathodes of the diodes D5 and D7 and the drain of the MOSFET Q2 if the circuit RL operates even with a direct current. In that circuit, a plurality of series circuits of a load circuit and a MOSFET can be controlled by a plurality of control circuits.

本発明の第1の実施例で、直流電源を入力にした電源回路の出力電圧を、制御回路の電源に使用した待機電力回路の例である。  FIG. 2 is an example of a standby power circuit in which the output voltage of a power supply circuit that uses a DC power supply as an input is used as a power supply for a control circuit in the first embodiment of the present invention. JFETの伝達特性で、ドレイン飽和電流Idssをパラメータとするゲート・ソース間電圧Vgsとドレイン電流Idの関係である。  The transfer characteristic of JFET is the relationship between the gate-source voltage Vgs and the drain current Id using the drain saturation current Idss as a parameter. 本発明の第2の実施例で、交流電源を入力にした電源回路の出力電圧を、制御回路の電源に使用した待機電力回路の例である。  In the second embodiment of the present invention, an example of a standby power circuit using an output voltage of a power supply circuit with an AC power supply as an input as a power supply for a control circuit is shown. 本発明の第3の実施例で、図3とは別の、交流電源を入力にした電源回路の出力電圧を、制御回路の電源に使用した待機電力回路の例である。  In the third embodiment of the present invention, it is an example of a standby power circuit that uses an output voltage of a power supply circuit having an AC power supply as an input, which is different from that shown in FIG. 従来の回路で、3端子レギュレータの出力電圧を、制御回路の電源に使用した待機電力回路の例である。  It is an example of a standby power circuit in which the output voltage of a three-terminal regulator is used as a power source for a control circuit in a conventional circuit.

符号の説明Explanation of symbols

E 直流電源
AC 交流電源
B 電池
EH 補助電源
SG 制御回路
IP 制御回路の入力
OP 制御回路の出力
RL 負荷回路
Q1 デプレッション型ジャンクションFET(JFET)
Q2〜Q4 MOSFET
D1〜D8 ダイオード
R1〜R2 抵抗器
C1〜C2 コンデンサ
Id JFETのドレイン電流
Idss JFETのドレイン飽和電流
Vgs JFETのゲート・ソース間電圧
Vp JFETのピンチオフ電圧
Vb 電池の電圧
Vc1 コンデンサC1の電圧(補助電源電圧)
Vt 被充電蓄電池電圧
E DC power supply AC AC power supply B Battery EH Auxiliary power supply SG Control circuit IP Control circuit input OP Control circuit output RL Load circuit Q1 Depletion type junction FET (JFET)
Q2-Q4 MOSFET
D1-D8 Diode R1-R2 Resistor C1-C2 Capacitor Id JFET drain current Idss JFET drain saturation current Vgs JFET gate-source voltage Vp JFET pinch-off voltage Vb Battery voltage Vc1 Capacitor C1 voltage (auxiliary power supply voltage) )
Vt Charged battery voltage

Claims (3)

次のA群から選択された1つの電源回路のコンデンサの両端を電源端子とする、電源。
A群
a.直流電源または脈流電源の正端子にデプレッション型NチャンネルJFETのドレインを接続し、前記JFETのソースとコンデンサを接続し、前記コンデンサの別の端子と前記直流電源または脈流電源の負端子を接続して、前記直流電源または脈流電源の負端子を基準にして前記JFETのゲートに正の電圧を印加した、電源回路。
b.直流電源または脈流電源の負端子にデプレッション型PチャンネルJFETのドレインを接続し、前記JFETのソースとコンデンサを接続し、前記コンデンサの別の端子と前記直流電源または脈流電源の正端子を接続して、前記直流電源または脈流電源の正端子を基準にして前記JFETのゲートに負の電圧を印加した、電源回路。
The power supply which uses the both ends of the capacitor | condenser of one power supply circuit selected from the following A group as a power supply terminal.
Group A a. Connect the drain of the depletion type N-channel JFET to the positive terminal of the DC power supply or pulsating power supply, connect the source of the JFET and the capacitor, and connect the other terminal of the capacitor and the negative terminal of the DC power supply or the pulsating power supply. A power supply circuit in which a positive voltage is applied to the gate of the JFET with reference to the negative terminal of the DC power supply or pulsating power supply.
b. Connect the drain of the depletion type P-channel JFET to the negative terminal of the DC power supply or pulsating power supply, connect the source of the JFET and the capacitor, and connect the other terminal of the capacitor and the positive terminal of the DC power supply or the pulsating power supply. A power supply circuit in which a negative voltage is applied to the gate of the JFET with reference to the positive terminal of the DC power supply or pulsating power supply.
請求項1の電源を、待機時の主電源スイッチ回路の導通を制御する制御回路の電源として用いる、待機電力回路。    A standby power circuit using the power source of claim 1 as a power source for a control circuit for controlling conduction of a main power switch circuit during standby. 次のA群から選択された1つの電源回路の充電用正端子と充電用負端子を充電時の蓄電池接続端子とする、蓄電池充電回路。
A群
a.直流電源または脈流電源の正端子にデプレッション型NチャンネルJFETのドレインを接続し、前記JFETのソースを被充電蓄電池の充電用正端子とし、前記直流電源または脈流電源の負端子を被充電蓄電池の充電用負端子として、前記直流電源または脈流電源の負端子を基準にして前記JFETのゲートに正の電圧を印加した、電源回路。
b.直流電源または脈流電源の負端子にデプレッション型PチャンネルJFETのドレインを接続し、前記JFETのソースを被充電蓄電池の充電用負端子とし、前記直流電源または脈流電源の正端子を被充電蓄電池の充電用正端子として、前記直流電源または脈流電源の正端子を基準にして前記JFETのゲートに負の電圧を印加した、電源回路。
A storage battery charging circuit in which a charging positive terminal and a charging negative terminal of one power supply circuit selected from the following group A are used as storage battery connection terminals during charging.
Group A a. A drain terminal of a depletion type N-channel JFET is connected to a positive terminal of a DC power source or a pulsating current power source, the source of the JFET is used as a positive terminal for charging a charged storage battery, and a negative terminal of the DC power source or the pulsating current power source is a charged storage battery. A power supply circuit in which a positive voltage is applied to the gate of the JFET with reference to the negative terminal of the DC power supply or pulsating power supply as a negative terminal for charging.
b. The drain of a depletion type P-channel JFET is connected to the negative terminal of a DC power source or a pulsating current power source, the source of the JFET is used as a negative terminal for charging a charged storage battery, and the positive terminal of the DC power source or the pulsating current power source is a charged storage battery As a positive terminal for charging, a power supply circuit in which a negative voltage is applied to the gate of the JFET with reference to the positive terminal of the DC power supply or pulsating power supply.
JP2006086488A 2006-02-28 2006-02-28 Power supply, standby electric power circuit using the same, and charging circuit for storage battery Pending JP2007236175A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101177556B1 (en) 2010-12-09 2012-08-27 코칩 주식회사 Start-up circuit for power supply
KR101177554B1 (en) 2010-12-09 2012-08-27 코칩 주식회사 Start-up circuit for power supply

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101177556B1 (en) 2010-12-09 2012-08-27 코칩 주식회사 Start-up circuit for power supply
KR101177554B1 (en) 2010-12-09 2012-08-27 코칩 주식회사 Start-up circuit for power supply

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