JP2007223095A - Optical head and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To make an optical head compact by opposing a first substrate where a selecting circuit and a plurality of unit circuits are arranged to a second substrate where a plurality of light emitting elements and a signal line are arranged. <P>SOLUTION: The first substrate 10 and the second substrate 20 are opposed to each other in the optical head. Both a plurality of the light emitting elements E and a data signal line LD where a data signal D designating a tone of each light emitting element E is supplied are arranged on a surface of the second substrate 20. Both a plurality of the unit circuits U corresponding to the light emitting elements E, and a shift register 43 sequentially selecting each unit circuit U are arranged on a surface of the first substrate 10. Each unit circuit U controls light emission of the light emitting element E corresponding to the unit circuit U on the basis of the data signal D acquired from the data signal line LD in accordance with the selection by the shift register 43. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a technique for controlling a light emitting element such as an organic light emitting diode element.

2. Description of the Related Art Conventionally, an image forming apparatus using an optical head (line head) in which a large number of light emitting elements are arranged on a substrate for exposure of an image carrier such as a photosensitive drum has been proposed. For example, Patent Document 1 discloses an optical head in which various elements related to driving of each light emitting element are arranged on the surface of one substrate together with many light emitting elements. On the surface of the substrate, for example, a plurality of signal lines to which a data signal designating the gradation of each light emitting element is supplied, or a plurality of data signals acquired (sampled) from the signal line for driving each light emitting element. Switching elements, a shift register for sequentially switching each switching element to an ON state, and the like are arranged.
Japanese Patent Laying-Open No. 2005-231171 (FIG. 7)

However, in the configuration of Patent Document 1, a large substrate is required for the arrangement of the various elements as described above, and thus there is a problem that miniaturization of the optical head and the image forming apparatus using the same is restricted. was there. Against this background, the present invention aims to solve the problem of downsizing the optical head.

In order to solve the above problems, an optical head according to a first feature of the present invention includes a first substrate and a second substrate facing each other, and a surface of the second substrate facing the first substrate. Are arranged with a plurality of light emitting elements and a signal line to which a data signal specifying the gradation of each light emitting element is supplied,
On the surface of the first substrate that faces the second substrate, a plurality of unit circuits corresponding to each light emitting element,
A selection circuit (for example, the shift register 43 in FIG. 2 or the sampling circuit 45 in FIG. 8) for sequentially selecting each unit circuit is arranged, and each unit circuit receives a data signal acquired from the signal line in accordance with the selection by the selection circuit. Based on the above, the light emission of the light emitting element corresponding to the unit circuit is controlled.

In the above configuration, the first substrate on which the selection circuit and the plurality of unit circuits are arranged and the second substrate on which the plurality of light emitting elements and signal lines are arranged face each other. The optical head is reduced in size as compared with a configuration in which the optical heads are arranged so as not to overlap each other. For example, in a configuration in which the selection circuit or the unit circuit includes an active element such as a thin film transistor, it is sufficient to form the active element on the surface of one substrate. Therefore, the first
Manufacturing cost is reduced compared to a configuration in which active elements are arranged on both the substrate and the second substrate (for example, a configuration in which a selection circuit is arranged on the first substrate and each unit circuit is arranged on the second substrate). .

In a more preferred aspect, the signal line extends along a first direction (for example, the X direction in FIG. 5) in which each light emitting element is arranged, and each unit circuit holds a data signal acquired from the signal line. The circuit includes a light emission control circuit that controls light emission of the light emitting element in accordance with a data signal held by the holding circuit, and is arranged along the first direction. In this embodiment, a data signal path (hereinafter referred to as “data path”) on the first substrate, such as a path for inputting a data signal to each unit circuit and a path for transmitting the data signal from the holding circuit to the light emission control circuit, A signal line for transmitting a data signal on two substrates intersects when viewed from a direction perpendicular to the first substrate and the second substrate. Therefore, it is possible to reduce the size of the optical head as compared with a configuration in which the data path and the signal line are installed in separate areas of one substrate.
By the way, paying attention only to the effect of reducing the size of the optical head, a configuration in which the data path and the signal line are arranged on the surface of one substrate and intersect each other may be employed. More specifically, the surface of the substrate on which the unit circuits are arranged is covered with an insulating layer, and the signal line is formed on the surface of the insulating layer and intersects with the arrangement of the unit circuits. However, in this configuration, a voltage variation in one of the data path and the signal line may affect the other voltage (for example, noise is generated). In particular, this problem is remarkable at the point where the data path and the signal line intersect. Of course, it is possible to reduce the electrical influence between each other if the film thickness of the insulating layer is sufficiently secured, but the insulating layer should be formed to a sufficient film thickness without defects while maintaining the desired yield. Is not easy due to manufacturing technology. On the other hand, according to the preferred embodiment of the present invention, the data path and the signal line are sufficiently separated by appropriately selecting the interval between the first substrate and the second substrate. It is possible to easily suppress electrical influences between each other.

In a more specific aspect, on the surface of the second substrate that faces the first substrate, a first feeder line (for example, the power supply line 41 in FIG. 2) extending in the first direction in which the light emitting elements are arranged, and A second power supply line (for example, the ground line 42 in FIG. 2) is arranged, each light emitting element is arranged on an electrical path connecting the first power supply line and the second power supply line, and each unit circuit has a first circuit. The current supplied from the power supply line to the light emitting element is controlled based on the data signal. According to the above aspect, it is possible to suppress the electrical influence between the intermediate wiring and the first power supply line or the second power supply line by appropriately selecting the distance between the first substrate and the second substrate. .

An optical head according to a second aspect of the present invention includes a first substrate and a second substrate facing each other, and a first feed line and a second substrate are disposed on a surface of the second substrate facing the first substrate. 2 feeders and first
A plurality of light emitting elements on an electrical path connecting the power supply line and the second power supply line are arranged, and a plurality of units corresponding to the light emitting elements are provided on a surface of the first substrate facing the second substrate. A circuit and a selection circuit that sequentially selects each unit circuit are arranged, and each unit circuit is supplied from the first feeder line to the light emitting element based on a data signal acquired from the signal line according to selection by the selection circuit. To control the current.

In the above configuration, the first substrate on which the selection circuit and the plurality of unit circuits are arranged and the second substrate on which the plurality of light emitting elements and signal lines are arranged face each other. The optical head is reduced in size as compared with a configuration in which the optical heads are arranged so as not to overlap each other. For example, in a configuration in which the selection circuit or the unit circuit includes an active element such as a thin film transistor, it is sufficient to form the active element on the surface of one substrate. Therefore, the first
Manufacturing cost is reduced compared to a configuration in which active elements are arranged on both the substrate and the second substrate (for example, a configuration in which a selection circuit is arranged on the first substrate and each unit circuit is arranged on the second substrate). .

In a preferred aspect of the optical head according to the second feature, the first feeder line and the second feeder line extend along a first direction (for example, the X direction in FIG. 5) in which the light emitting elements are arranged, The unit circuit includes a holding circuit that holds a data signal acquired from the signal line, and a light emission control circuit that controls light emission of the light emitting element according to the data signal held by the holding circuit, and is arranged along the first direction. . In this configuration, since the data path for transmitting the data signal on the first substrate intersects the first feeder line and the second feeder line, these elements are compared with the configuration in which these elements are formed on one substrate. This reduces the size of the optical head. In addition, since the data path is sufficiently separated from the first power supply line and the second power supply line by appropriately selecting the distance between the first board and the second board, the electricity between the data path and each power supply line can be reduced. Can be easily suppressed.

Note that the light emitting element of the present invention means application of electric energy (for example, supply of electric current or application of electric field).
For example, an organic light-emitting diode element whose luminance is controlled by supplying a current. In addition, the “plurality of light emitting elements” in the present invention may be all or part of the light emitting elements included in the optical head.

By the way, in the configuration in which each light emitting element is disposed in the vicinity of the periphery of the second substrate, moisture and impurities that have entered from the junction between the first substrate and the second substrate easily reach the light emitting element, thereby emitting light. The device may be deteriorated. On the other hand, in the configuration in which the space for each sealing is ensured on both sides of each light emitting element by simply increasing the size of the first substrate or the second substrate, there is a problem that miniaturization of the optical head is hindered. is there.
Therefore, in a preferred aspect of the optical head according to the first and second features, each unit circuit is:
A drive element (for example, the drive transistor Rdr in FIG. 3) disposed on an electrical path connecting the first feeder and the light emitting element and controlling the light emission of the light emitting element in accordance with the data signal is provided. The drive element and the light emitting element are connected to the first connection portion (for example, the connection terminal Ca1 and the conductive particle 31 in FIG. 4).
The electrical connection is made at the connection terminal Cb1), and the first feeder and the drive element of each unit circuit are electrically connected at the second connection part (for example, the connection terminal Ca2, the conductive particle 31 and the connection terminal Cb2 in FIG. 4). Each light emitting element is disposed in a region of a gap between the first connection portion and the second connection portion as viewed from the direction perpendicular to the second substrate.
In the above aspect, since the first connection part and the second connection part are arranged on both sides of the arrangement of the light emitting elements, the first light emitting element and the second light emitting element are connected to each other without increasing the size of the first substrate or the second substrate. A sufficient distance from the periphery of the two substrates is ensured. Accordingly, there is an advantage that the possibility that moisture and impurities that have entered from the joint between the first substrate and the second substrate reach the light emitting element is reduced, and deterioration of the light emitting element due to the adhesion thereof is suppressed.

In a preferred aspect of the optical head according to the first and second features, each light emitting element and each unit circuit overlap each other when viewed from a direction perpendicular to the first substrate and the second substrate, and each light emitting element The first electrode and the second electrode that face each other and a light emitting layer interposed between the two electrodes, and the second electrode of each light emitting element is interposed between the light emitting layer of the light emitting element and the unit circuit. According to the above aspect,
Compared with a configuration in which each light emitting element and each unit circuit are arranged so as not to overlap, an optical head (
The first substrate and the second substrate) can be downsized. Further, since the second electrode is interposed between the light emitting layer and the unit circuit, an electrical influence (for example, noise) from the unit circuit to the light emitting layer is shielded by the second electrode. The above operations and effects are particularly remarkable in the aspect in which the second electrode is continuously formed over a plurality of light emitting elements. Light shielding (light absorption or light reflection)
According to the configuration in which the second electrode is formed of the conductive material, light directed to the unit circuit is shielded by the second electrode, so that there is an advantage that malfunction of the unit circuit due to light irradiation is prevented.

In a more preferred aspect, the signal line and the selection circuit overlap each other when viewed from the direction perpendicular to the first substrate and the second substrate. According to this aspect, the optical head can be reduced in size as compared with the configuration in which the signal line and the selection circuit are arranged so as not to overlap each other.

In a specific aspect of the optical head according to the first and second features, the selection circuit extends along a first direction in which the light emitting elements are arranged, and each unit circuit and each light emitting element has a first connection. Each light emitting element is disposed in a region of a gap between the selection circuit and the first connection portion when viewed from a direction perpendicular to the second substrate. From another viewpoint, the signal line is a first line in which each light emitting element is arranged.
Each unit circuit and each light emitting element are electrically connected at the first connection portion, and each light emitting element is connected to the signal line and the first connection as viewed from the direction perpendicular to the second substrate. It arrange | positions in the area | region of the clearance gap between parts.
In each of the above aspects, since the first connection portion and other elements (selection circuit and signal line) are located on both sides of the arrangement of the light emitting elements, the size of the first substrate and the second substrate is increased. The distance between each light emitting element and the peripheral edge of the second substrate is sufficiently secured. Therefore, each light emitting element can be sealed well.

The optical head according to the present invention is used in various electronic devices. A typical example of the electronic apparatus according to the present invention is an electrophotographic image forming apparatus in which the optical head according to each of the above embodiments is used for exposure of an image carrier such as a photosensitive drum. This image forming apparatus includes an image carrier (for example, the photosensitive drum 70 in FIG. 10) on which a latent image is formed by exposure, the optical head of the present invention that exposes the image carrier,
And a developing unit that forms a visible image by attaching a developer (for example, toner) to the latent image of the image carrier. However, the use of the optical head according to the present invention is not limited to the exposure of the image carrier. For example, in an image reading apparatus such as a scanner, the optical head according to the present invention can be used for illuminating a document. This image reading apparatus includes an optical head according to the present invention and a light receiving device (for example, a CCD (Ch) that converts light emitted from the optical head and reflected by a reading target (original) into an electrical signal.
light receiving element such as an arge coupled device) element.

<A: First Embodiment>
FIG. 1 is a perspective view showing a partial configuration of an image forming apparatus using an optical head (exposure head) according to the first embodiment of the present invention. As shown in the figure, the image forming apparatus includes an optical head H, a condensing lens array 60, and a photosensitive drum 70. The optical head H includes a large number of light emitting elements (not shown in FIG. 1) arranged in the X direction (main scanning direction). The photosensitive drum 70 is supported by a rotation shaft extending in the X direction, and rotates with the outer peripheral surface facing the optical head H.

The condensing lens array 60 is disposed in the gap between the optical head H and the photosensitive drum 70. The condensing lens array 60 includes a large number of gradient index lenses arranged in an array with each optical axis directed to the optical head H (Z direction). As the condensing lens array 60, for example, there is SLA (selfoc lens array) available from Nippon Sheet Glass Co., Ltd. (
SELFOC is a registered trademark of Nippon Sheet Glass Co., Ltd. Light emitted from each light emitting element in the optical head H passes through each refractive index distribution type lens of the condensing lens array 60 and then reaches the surface of the photosensitive drum 70. By this exposure, a latent image (electrostatic latent image) corresponding to a desired image is formed on the surface of the photosensitive drum 70.

FIG. 2 is a block diagram showing an electrical configuration of the optical head H. As shown in FIG. As shown in FIG. 2, the optical head H includes an element array portion A in which a plurality of light emitting elements E are arranged in the X direction, a power line 41 and a ground line 42, and a plurality of light emitting elements E (light emitting elements). E) (number of unit circuits U). Each light emitting element E is an organic light emitting diode (OLED) in which a light emitting layer made of an organic EL (ElectroLuminescence) material is interposed between an anode and a cathode.
It is an element and emits light with luminance (luminous intensity) corresponding to the current supplied to the light emitting layer.

A power supply potential VDD is supplied to the power supply line 41 from an external power supply circuit 46 through an external connection terminal Tp1. A ground potential VSS is supplied to the ground line 42 from the power supply circuit 46 via the external connection terminal Tp2. The cathode of each light emitting element E is connected to the ground line 42. The plurality of unit circuits U include m blocks B (B1, B2,..., N units (U1, U2,..., Un) adjacent to each other in the X direction.
.., Bm) (each of m and n is an integer of 2 or more). In the present embodiment, for convenience of explanation, a configuration in which the same number of unit circuits U are included in each block B is illustrated, but a configuration in which the number of unit circuits U is different for each block B may be employed.

Further, the optical head H includes an m-bit shift register 43 corresponding to the total number of blocks B and n data signal lines LD (LD1 to LDn) corresponding to the number of unit circuits U of each block B.
And a signal line group L including The shift register 43 is supplied with a start pulse SP and a clock signal CLK from an external control circuit 47 via an external connection terminal Ts. The shift register 43 is a means for selecting each unit circuit U for each block B, and generates m selection signals S1 to Sm by shifting the start pulse SP in synchronization with the clock signal CLK. Each of the selection signals S1 to Sm sequentially becomes an active level every one cycle of the clock signal CLK. The selection signal Si (i is an integer satisfying 1 ≦ i ≦ m) is supplied in common to the n unit circuits U1 to Un belonging to the block Bi. The transition of the selection signal Si to the active level means selection of the unit circuits U1 to Un belonging to the block Bi.

The image processing circuit 48 of FIG. 2 generates n data signals D1 to Dn corresponding to the total number of unit circuits U belonging to one block B. The data signal Dj (j is an integer satisfying 1 ≦ j ≦ n) is supplied to the data signal line LDj through the external connection terminal Td. The jth stage unit circuits Uj (m in total) belonging to each of the blocks B1 to Bm are commonly connected to the data signal line LDj. The data signal Dj is a voltage signal that specifies the luminance (gradation) of the light emitting element E corresponding to the j-th unit circuit Uj of each of the blocks B1 to Bm in a time-sharing manner in the order of the arrangement of the blocks B1 to Bm. It is. More specifically, the data signal Dj is either a high level or a low level in accordance with the luminance specified for the light emitting element E corresponding to the unit circuit Uj of the block Bi during the period in which the selection signal Si is at the active level. .

Next, a specific configuration of one unit circuit U will be described with reference to FIG. In the figure, only one unit circuit Uj belonging to the block Bi is shown, but all the unit circuits U (U1 to Un) have the same configuration. As shown in FIG. 3, one unit circuit Uj
A holding circuit 441 and a light emission control circuit 442 are included.

The holding circuit 441 receives the data signal line LDj according to the selection of the block Bi by the selection signal Si.
Means for acquiring and holding the data signal Dj from (eg, a latch circuit). More specifically, the holding circuit 441 acquires the data signal Dj from the data signal line LDj at the timing when the selection signal Si transitions to the active level, and the data signal Dj continues until the selection signal Si transitions to the active level next time. Maintain output.

The light emission control circuit 442 generates the light emitting element E according to the data signal Dj held by the holding circuit 441.
A p-channel transistor (hereinafter referred to as “driving transistor”).
Rdr) and an n-channel transistor R0. The drive transistor Rdr is a means for controlling the current supplied to the light emitting element E, and is interposed between the power supply line 41 and the anode of the light emitting element E. The transistor R0 is the drain of the driving transistor Rdr (the anode of the light emitting element E).
And the ground wire 42. The data signal Dj output from the holding circuit 441 is supplied to the gates of the drive transistor Rdr and the transistor R0. Holding circuit 441
Holds the low level data signal Dj, the drive transistor Rdr is turned on and the transistor R0 is turned off. Therefore, the light emitting element E emits light by supplying current from the power supply line 41 via the driving transistor Rdr. In contrast, the data signal D
When j is at a high level, the drive transistor Rdr is turned off and the light emitting element E is turned off. Since the leakage current when the driving transistor Rdr is in the OFF state flows into the ground line 42 via the transistor R0 in the ON state, the light emitting element E is surely turned off when the data signal Dj is at the high level. Can do.

Next, the mechanical structure of the optical head H will be described. 4 is a cross-sectional view taken along line IV-IV in FIG. As shown in FIGS. 1 and 4, the optical head H includes a first substrate 10 and a second substrate 20 that are bonded together in a state of facing each other. The second substrate 20 is the first substrate 1
It is located on the photosensitive drum 70 side when viewed from zero. The 1st board | substrate 10 and the 2nd board | substrate 20 are elongate board materials fixed to the attitude | position which makes X direction a longitudinal direction.

Part (a) of FIG. 5 is a surface of the first substrate 10 that faces the second substrate 20 (hereinafter referred to as “opposing surface”).
10B is a plan view showing the structure of the elements arranged on 10s, and part (b) of the figure is a surface (hereinafter referred to as "opposing surface") 20s of the second substrate 20 facing the first substrate 10. It is a top view which shows the structure of the element arrange | positioned on the top. The first substrate 10 and the second substrate 20 are bonded so that the front side of the paper surface in each of the part (a) and the part (b) in FIG. 5 faces each other.

As shown in FIG. 4 and part (a) of FIG. 5, the shift register 43 and each unit circuit U are the first ones.
It is disposed on the opposing surface 10 s of the substrate 10. As shown in part (a) of FIG.
Reference numeral 3 denotes a long circuit arranged along the positive side periphery in the Y direction (sub-scanning direction) with the X direction as the longitudinal direction. An external connection terminal Ts (
(Not shown) is formed. Further, a plurality of connection terminals Ca1 arranged in the X direction are arranged in a region along the negative side periphery in the Y direction in the facing surface 10s. The plurality of unit circuits U are arranged in the X direction in a gap region between the shift register 43 and the arrangement of the connection terminals Ca1.

As shown in FIG. 4 and part (b) of FIG. 5, a plurality of light-emitting elements E, power supply lines 41, and ground lines 4
2 and the signal line group L are disposed on the opposing surface 20 s of the second substrate 20. The n data signal lines LD1 to LDn constituting the signal line group L extend in the X direction in a region along the peripheral edge on the positive side in the Y direction on the facing surface 20s. Each data signal line LD is connected to an external connection terminal Td formed at the peripheral edge on the positive side in the X direction of the facing surface 20s. A plurality of connection terminals Cb1 arranged in the X direction are arranged in a region along the negative edge in the Y direction on the facing surface 20s. Power line 41
The ground line 42 extends in the X direction in a gap region between the signal line group L and the arrangement of the connection terminals Cb1. An end of the power supply line 41 reaching the periphery of the first substrate 10 is the external connection terminal Tp1 in FIG. Similarly, the end of the ground line 42 that reaches the periphery of the first substrate 10 is the external connection terminal Tp2. The plurality of light emitting elements E are arranged in the X direction in the region of the gap between the ground line 42 and the arrangement of the connection terminals Cb1. In the state where the first substrate 10 and the second substrate 20 are bonded, the second substrate 2
The external connection terminals Td, Tp1, and Tp2 on 0 do not actually overlap the first substrate 10. That is, the external connection terminals Td, Tp1, and Tp2 are formed in a region of the second substrate 20 that protrudes from the periphery of the first substrate 10. Similarly, the external connection terminals Ts on the first substrate 10 do not overlap with the second substrate 20.

As shown in FIG. 4, each connection terminal Ca <b> 1 of the first substrate 10 and each connection terminal Cb <b> 1 of the second substrate 20 face each other in a state where the first substrate 10 and the second substrate 20 are joined. The first substrate 10 and the second substrate 20 are joined by an anisotropic conductor 30 interposed therebetween. Anisotropic conductor 3
Reference numeral 0 denotes a film body in which a large number of conductive particles (hereinafter referred to as “conductive particles”) 31 are dispersed in an adhesive 32. When the anisotropic conductor 30 is inserted into the gap between the first substrate 10 and the second substrate 20 and the two substrates are thermocompression bonded, the first substrate 10 and the second substrate 20 are bonded to each other by the adhesive 32. At the same time, the connection terminal Ca1 and the connection terminal Cb1 opposite thereto are brought into contact with and electrically connected to the conductive particles 31. The conductive particles 31 also function as a spacer that maintains a predetermined distance between the first substrate 10 and the second substrate 20.

As shown in FIG. 4, each unit circuit U of the first substrate 10 and each light emitting element E of the second substrate 20 are:
They overlap each other when viewed from the Z direction perpendicular to the surfaces of the first substrate 10 and the second substrate 20. According to this configuration, the substrate (the first substrate 10 and the second substrate 20) can be downsized as compared with the configuration in which the unit circuit U and the light emitting element E are arranged in separate areas partitioned into one substrate. The Furthermore, in the present embodiment, the shift register 43 (more specifically, the shift register 43 in the first substrate 10).
And the signal line group L of the second substrate 20 overlap each other when viewed from the Z direction. According to this configuration, the substrate is reduced in size as compared with the configuration in which the shift register 43 and the signal line group L are arranged in separate areas of one substrate. As described above, according to the present embodiment, the area required for the first substrate 10 and the second substrate 20 is the elements on the first substrate 10 and the second substrate 20.
The overlap with the above element is reduced. Therefore, there is an advantage that the optical head H and the image forming apparatus incorporating the same are reduced in size.

Further, as shown in part (b) of FIG. 5, each light emitting element E has wiring (signal line group L) extending in the X direction.
The power supply line 41 and the ground line 42) are located in the gap between the connection terminals Cb1. In other words, each light emitting element E is located in the gap between the connection terminals Ca1 and Cb1 and the shift register 43 as seen from the Z direction, as shown in FIG. According to this configuration, a sufficient distance between the peripheral edge of the second substrate 20 and the light emitting element E can be secured. In a configuration in which each light emitting element E is disposed near the periphery of the second substrate 20 (for example, a configuration in which no wiring is interposed between the light emitting element E and the periphery of the second substrate 20), the first substrate 10 and the second substrate Moisture and impurities that have entered from the joint portion with the substrate 20 easily reach the light emitting element E, which may cause deterioration of the light emitting element E. On the other hand, according to the present embodiment, each light emitting element E is arranged at a position closer to the center along the Y direction in the second substrate 20, so that the junction between the first substrate 10 and the second substrate 20. The possibility that moisture and impurities that have entered from the light source reach the light emitting element E is reduced. That is, each light emitting element E can be well sealed in the gap between the first substrate 10 and the second substrate 20 to effectively prevent contact with the outside. Therefore, according to this embodiment, there is an advantage that deterioration of the light emitting element E due to adhesion of moisture and impurities is suppressed.

In the above, the configuration in which the external connection terminal Ts is formed on the facing surface 10s is exemplified.
The external connection terminal Ts formed on the facing surface 20 s of the second substrate 20 may be connected to the shift register 43 of the first substrate 10 by the conductive particles 31. In this configuration, all the external connection terminals (Ts, Td, Tp1, and Tp2) are formed on the second substrate 20, so that the configuration for connecting the optical head H and the outside is simplified. There is.

Next, FIG. 6 is a cross-sectional view (a cross-sectional view taken along line VI-VI in part (a) of FIG. 5) showing a configuration of elements formed on the first substrate 10. 6 and 4 are upside down (Z direction). As shown in FIG. 6, on the opposing surface 10s of the first substrate 10, a plurality of transistors Q (only one is shown in FIG. 6) constituting the shift register 43 and a plurality constituting the unit circuit U. Transistors R are arranged. Note that the transistors constituting the unit circuit U (the transistors constituting the driving transistor Rdr, the transistor R0, and the holding circuit 441 in FIG. 3) are simply referred to as “transistor R” when it is not necessary to distinguish between them. The transistor Q and the transistor R are collectively formed in a common process.

Each of the transistors Q · R on the first substrate 10 includes a semiconductor layer 11 formed of a semiconductor material on the surface of the first substrate 10 and a semiconductor layer 1 sandwiching a gate insulating layer Fa0 on the semiconductor layer 11.
1 is a thin film transistor including a gate electrode 121 opposed to 1 (channel region). The semiconductor layer 11 is a polysilicon film formed by laser annealing on amorphous silicon, for example. The gate electrode 121 is covered with the first insulating layer Fa1. Transistor Q ・ R
Each of the source electrode 131 and the drain electrode 132 is formed of a low-resistance metal such as aluminum on the surface of the first insulating layer Fa1, and is electrically connected to the semiconductor layer 11 (source region and drain region) through a contact hole. . The surface of the first substrate 10 on which the transistors Q and R are formed is covered with the second insulating layer Fa2. The first insulating layer Fa1 and the second insulating layer Fa2 are made of Si.
It is a film body formed of an insulating material such as O ₂ or SiN.

As shown in FIG. 6, each connection terminal Ca1 has a structure in which a first layer 133 and a second layer 14 are laminated in this order from the first substrate 10 side. The source electrode 131, the drain electrode 132, and the first layer 133 of each transistor Q · R are collectively formed in the same process by patterning a conductive film formed continuously over the entire surface of the first insulating layer Fa1. Note that, as in the relationship between the source electrode 131 / drain electrode 132 and the first layer 133, selective removal of a film body in which a plurality of elements are common (regardless of whether it is a single layer or a plurality of layers). In the following, it is simply expressed as “formed from the same layer”. Naturally, the material of each element formed from the same layer is the same, and the film thicknesses thereof are substantially the same. According to the configuration in which a plurality of elements are formed from the same layer, there is an advantage that the manufacturing process can be simplified and the manufacturing cost can be reduced as compared with the configuration in which each element is formed from a separate film body.

As shown in FIG. 6, the first layer 133 of each connection terminal Ca1 is electrically connected to the intermediate conductor 122 through a contact hole that penetrates the first insulating layer Fa1. The intermediate conductor 122 is formed from the same layer as the gate electrode 121 of the transistor Q · R. The drain electrode 132 of the drive transistor Rdr is connected to the connection terminal Ca1 through the intermediate conductor 122.

An opening Oa1 is formed in a portion of the second insulating layer Fa2 that overlaps the first layer 133. The second layer 14 is formed so as to enter the inside of the opening Oa1 and is electrically connected to the first layer 133. The second layer 14 is made of, for example, ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxid).
The conductive oxide (light-transmitting conductive material) such as e) is formed. By covering the first layer 133 made of a material having low corrosion resistance such as aluminum with the second layer 14 having high corrosion resistance in this way, corrosion of the first layer 133 is effectively prevented.

An opening Oa2 is formed in a portion of the second insulating layer Fa2 that overlaps the source electrode 131 of the driving transistor Rdr. As shown in FIG. 6, the connection terminal Ca2 is formed from the same layer as the second layer 14 so as to enter the inside of the opening Oa2. The connection terminal Ca2 is in contact with and electrically connected to the source electrode 131 of the drive transistor Rdr. Further, the second insulating layer Fa2 (transistor Q
The opening Oa3 is formed in the portion overlapping the drain electrode 132). As shown in FIG. 6, the connection terminal Ca3 is formed from the same layer as the second layer 14 so as to enter the inside of the opening Oa3. The connection terminal Ca3 is electrically connected to the shift register 43 and the holding circuit 441 of the unit circuit U.

Next, FIG. 7 is a cross-sectional view (a cross-sectional view taken along the line VII-VII in the part (b) of FIG. 5) showing the configuration of elements formed on the second substrate 20. As shown in FIG. 7, the opposing surface 2 of the second substrate 20.
On 0s, the power supply line 41 and the n data signal lines LD1 to LDn are formed from the same layer with a low resistance metal such as aluminum. Opposing surface 20 on which power supply line 41 and signal line group L are formed
s is covered with the first insulating layer Fb1.

Each connection terminal Cb1 has a structure in which a first layer 221 and a second layer 242 are laminated in this order from the second substrate 20 side, similarly to the connection terminal Ca1. As shown in FIG. 7, on the surface of the first insulating layer Fb1, the ground line 42 and the intermediate conductors 222 and 223 are formed from the same layer as the first layer 221 with a low resistance metal such as aluminum. Similar to the first layer 221, the intermediate conductor 222 is a conductor that is formed for each unit circuit U (or light-emitting element E) and arranged in the X direction. All the intermediate conductors 222 are electrically connected to the power supply line 41 through contact holes that penetrate the first insulating layer Fb1. Similarly, the intermediate conductor 223 includes a unit circuit U (light emitting element E).
) And arranged in the X direction. The intermediate conductor 223 corresponding to the unit circuit Uj is electrically connected to the data signal line LDj through a contact hole penetrating the first insulating layer Fb1.

As shown in FIG. 7, the surface of the first insulating layer Fb1 is covered with the second insulating layer Fb2. Second insulating layer F
The first electrodes 241 are formed on the surface of b2 so as to be separated from each other for each light emitting element E. 1st electrode 2
Reference numeral 41 denotes a substantially circular electrode that functions as an anode of the light-emitting element E, and is formed of a light-transmitting conductive material such as ITO or IZO. The second layer 242 of the connection terminal Ca1 is the first electrode 24.
1 is formed so as to enter the inside of the opening Ob1 formed in the second insulating layer Fb2, and is electrically connected to the first layer 221. Therefore, the drain electrode 132 of the drive transistor Rdr in FIG. 6 is electrically connected to the first electrode 241 of the light emitting element E via the intermediate conductor 122, the connection terminal Ca1, the conductive particle 31, and the connection terminal Cb1.

The connection terminals Cb 2 and Cb 3 and the intermediate conductor 243 illustrated in FIG. 7 are portions formed from the same layer as the second layer 242. The connection terminal Cb2 is a terminal formed for each unit circuit U and arranged in the X direction. The connection terminal Cb2 enters the opening Ob2 that overlaps each intermediate conductor 222 in the second insulating layer Fb2 and is electrically connected to the intermediate conductor 222. Connected. Similarly, the connection terminal Cb3 is connected to the unit circuit U.
These terminals are formed in each direction and arranged in the X direction, and enter the opening portion Ob3 of the second insulating layer Fb2 to conduct to the intermediate conductor 223. The intermediate conductor 243 is formed for each light emitting element E, and is electrically connected to the ground line 42 through the opening Ob4 of the second insulating layer Fb2.

The surface of the second insulating layer Fb2 on which the above elements are formed is covered with the third insulating layer Fb3. As shown in FIG. 7, the second layer 242 of the connection terminal Cb1, the connection terminals Cb2 and Cb3, and the intermediate conductor 243 are exposed from the third insulating layer Fb3. A substantially circular opening Ob5 is formed in a portion of the third insulating layer Fb3 that overlaps the first electrode 241. The light emitting layer 25 of the light emitting element E is formed in a space inside the opening Ob5 and having the first electrode 241 as a bottom surface. That is, the third insulating layer Fb3 is
It plays a role of defining the planar shape of the light emitting layer 25. For the formation of the light emitting layer 25, for example, an ink jet method (droplet discharge method) in which droplets of a light emitting material are discharged from a nozzle and adhered to the surface of the first electrode 241 is suitably employed. Various functional layers (a hole injection layer, a hole transport layer, an electron injection layer, an electron transport layer, a hole block layer, and an electron block layer) for promoting or improving light emission by the light emitting layer 25 are used as the light emitting layer. 25 may be laminated.

On the surface of the third insulating layer Fb3, a partition wall Fb4 is formed of various insulating materials such as an organic material such as acrylic and an inorganic material such as SiO ₂ and SiN. The partition wall Fb4 is the light emitting layer 25.
And functions as a partition for partitioning each light emitting element E in a region where a droplet of the light emitting material reaches when the light emitting layer 25 is formed by the ink jet method. Therefore, the partition wall Fb4 is unnecessary in the configuration in which the light emitting layer 25 is formed by spin coating or vapor deposition. As shown in FIG. 7, the second layer 242 of the connection terminal Cb1, the connection terminals Cb2 and Cb3, and the intermediate conductor 243 are exposed from the partition wall Fb4.

As shown in FIG. 4, in the state where the first substrate 10 and the second substrate 20 are joined, the connection terminals Ca2 of the first substrate 10 and the connection terminals Cb2 of the second substrate 20 are interposed between them. 31
To touch. Therefore, as shown in FIGS. 4, 6, and 7, the source electrode 131 of the drive transistor Rdr is electrically connected to the power supply line 41 via the connection terminal Ca <b> 2, the conductive particle 31, the connection terminal Cb <b> 2, and the intermediate conductor 222. Connected to. As described above, each light emitting element E is electrically connected to the unit circuit U and each light emitting element E (Ca1 and Cb1), the power line 41 and each unit circuit U. It arrange | positions in the area | region of the gap | interval with a location (Ca2 * Cb2) (FIG. 4
reference).

Further, as shown in FIG. 4, the connection terminal Ca <b> 3 and the connection terminal Cb <b> 3 are in contact with the conductive particles 31. Therefore, as shown in FIGS. 4, 6, and 7, the data signal line LDj on the second substrate 20 passes through the intermediate conductor 223, the connection terminal Cb <b> 3, the conductive particle 31, and the connection terminal Ca <b> 3. The shift register 43 and the unit circuit Uj (holding circuit 441) on the substrate 10 are electrically connected.

The second electrode 27 shown in FIG. 7 is an electrode (a cathode of the light emitting element E) facing the first electrode 241 with the light emitting layer 25 interposed therebetween. As the material of the second electrode 27, various light-reflective conductive materials such as metals such as aluminum and silver and alloys containing these metals as main components are employed. Light emitting layer 2
The light radiated from 5 to the first electrode 241 side and the light radiated from the light emitting layer 25 to the opposite side of the first electrode 241 and reflected from the surface of the second electrode 27 are shown by white arrows in FIG. As shown in the figure, the light passes through the first electrode 241 and the second substrate 20 and is emitted to the photosensitive drum 70 side. Therefore, the second substrate 20 is required to have light transmittance, but the first substrate 10 does not need light transmittance.

As shown in part (b) of FIG. 5, the second electrode 27 is formed continuously over the plurality of light emitting elements E and overlaps with the ground line 42. More specifically, as shown in FIG. 7, the second electrode 27 is formed in a shape straddling the partition wall Fb4 from the upper layer of the light emitting layer 25 and is in contact with the intermediate conductor 243. That is, the second electrode 27 is electrically connected to the ground line 42 through the intermediate conductor 243.

As shown in FIG. 4, since the light emitting element E and the unit circuit U overlap each other when viewed from the Z direction, the second electrode 27 is interposed between the transistor R (semiconductor layer 11) and the light emitting layer 25. Therefore, for example, noise generated when the transistor R is turned on / off is not generated by the second electrode 2.
7 does not affect the light emitting layer 25 or the first electrode 241. As described above, according to the present embodiment, the unit circuit U and the light emitting element E are mutually connected although the unit circuit U and the light emitting element E are overlapped to reduce the size of the optical head H. There is an advantage that the electrical influence between the two is suppressed.

Further, if the light emitted from the light emitting layer 25 reaches the unit circuit U or the shift register 43 directly, a malfunction (for example, current leakage) occurs in the transistors Q and R due to photoexcitation of the semiconductor layer 11. there is a possibility. On the other hand, in the present embodiment, the light shielding (light reflective) second electrode 27 is interposed between the light emitting layer 25 and the first substrate 10, so that radiation from the light emitting layer 25 to the first substrate 10 side is performed. The light is shielded by the second electrode 27 and does not reach the unit circuit U or the shift register 43. Therefore, it is possible to prevent malfunction of the transistor Q · R due to light irradiation.

As described above, in this embodiment, all the transistors (Q · R) are formed on the first substrate 10, and only the light emitting element E and various wirings are formed on the second substrate 20. According to this configuration, it is not necessary to perform the polysilicon process (formation of the semiconductor layer 11) such as silicon film formation or laser annealing on the second substrate 20. Therefore, there is an advantage that the manufacturing process of the optical head H is simplified as compared with the configuration in which the transistors Q and R are distributed and arranged on both the first substrate 10 and the second substrate 20.

By the way, in the present embodiment, a path through which the data signal D is transmitted on the first substrate 10 (data path: a path from the connection terminal Ca2 to each unit circuit U and the holding circuit 441 of each unit circuit U to the drive transistor (Path leading to Rdr) extends in the Y direction. On the other hand, each wiring on the second substrate 20 such as the data signal line LD, the power supply line 41 and the ground line 42 (hereinafter referred to as “
(Collectively referred to as “X-direction wiring”) extends in the X direction. That is, the data path of the first substrate 10 and the X direction wiring of the second substrate 20 intersect as viewed from the Z direction. According to this configuration, there is an advantage that the optical head H is reduced in size as compared with the configuration in which the data path and the X-direction wiring are formed in separate regions of one substrate.

In the configuration in which the data path and the X-direction wiring are close to each other in the Z direction, capacitance is parasitic between the two, and noise may be generated in the other due to voltage fluctuations in one of the data path and the X-direction wiring. There is sex. In the present embodiment, since the data path is formed on the first substrate 10 and the wiring is formed on the second substrate 20, data can be selected by appropriately selecting the interval between the first substrate 10 and the second substrate 20. It is possible to sufficiently separate the route and the X-direction wiring. Therefore, there is an advantage that the electrical influence between the data path and the X-direction wiring can be easily suppressed.

<B: Second Embodiment>
Next, a second embodiment of the present invention will be described. FIG. 8 shows an optical head H according to this embodiment.
FIG. 9 is a plan view (plan view corresponding to FIG. 5) showing the configuration of the elements arranged on each of the first substrate 10 and the second substrate 20. In the present embodiment, elements having the same functions and functions as those of the first embodiment are denoted by the same reference numerals as those described above, and detailed description thereof is omitted as appropriate.

As shown in FIGS. 8 and 9, in the optical head H according to the present embodiment, a sampling circuit (demultiplexer) 45 is provided on the facing surface 10 s of the first substrate 10 instead of the shift register 43 of the first embodiment. Be placed. The sampling circuit 45 is a circuit in which a plurality (“m × n”) of transistors SW corresponding to each unit circuit U are arranged in the X direction, and similarly to the shift register 43, each unit circuit U is selected in order. Functions as a means.

On the opposing surface 20s of the second substrate 20, a signal line group L including m data signal lines LD (LD1 to LDm) and n selections, as shown in part (b) of FIG. 8 and FIG. Signal line LS (LS1 to LSn)
A signal line group La including is formed. Each selection signal line LS extends in the X direction at a gap between the signal line group L and the power supply line 41. As shown in FIG. 8, n unit circuits U1 belonging to the block Bi.
-Un are connected in common to the data signal line LDi through the corresponding transistor SW. In addition, the gates of the transistors SW (m in total) corresponding to the unit circuits Uj in each of the blocks B1 to Bm are commonly connected to the selection signal line LSj.

Each selection signal line LSj is electrically connected to the gate of the transistor SW disposed on the facing surface 10 s of the first substrate 10 through the conductive particles 31 of the anisotropic conductor 30. In the above configuration, the selection signal line LS on the second substrate 20 is connected to the data path or the selection signal SE on the first substrate 10.
L intersects the transmission line. Therefore, as in the first embodiment, the optical head is configured to suppress electrical interference between the path on the first substrate 10 and the X-direction wiring (including each selection signal line LS) on the second substrate 20. It is possible to reduce the size of H. Further, the data signal lines LD1 to LDn and the selection signal lines LS1 to LSn overlap the sampling circuit 45 (transistor SW) of the first substrate 10 when viewed from the Z direction. According to this configuration, the signal line group L
The optical head H is reduced in size compared to a configuration in which La does not overlap the sampling circuit 45.

The selection signal LSj is supplied from the control circuit 47 to the selection signal line LSj via the external connection terminal Tsel. Each of the selection signals SEL1 to SELn sequentially becomes an active level at a predetermined cycle. A data signal Di is supplied from the image processing circuit 48 to the data signal line LDi. When the selection signal SELj transitions to the active level, a total of m transistors SW corresponding to the unit circuits Uj are turned on at the same time. At this time, the data signals D1 to Dm supplied to the data signal lines LD1 to LDm are changed. Dm is input in parallel to the unit circuit Uj of each block B. Select signal SEL1 ~ S
When n selections by ELn are completed, the data signal D is held in the holding circuits 441 of all the unit circuits U as in the first embodiment.

<C: Modification>
Various modifications can be made to each of the above embodiments. An example of a specific modification is as follows. In addition, you may combine each following aspect suitably.

(1) Modification 1
In each of the above embodiments, the configuration in which the emitted light from each light emitting element E is transmitted through the second substrate 20 (
Although the bottom emission structure) is illustrated, the present invention is also applied to a top emission structure in which the emitted light from the light emitting element E is emitted to the side opposite to the second substrate 20. In the optical head H having the top emission structure, the second electrode 27 is formed of a light transmissive conductive material.

(2) Modification 2
The configuration of the unit circuit U is changed as appropriate. For example, in each of the above embodiments, the configuration in which the latch circuit is used as the holding circuit 441 is illustrated, but a configuration in which the capacitor connected to the gate of the driving transistor Rdr is the holding circuit 441 is also employed. In this configuration, a switching element for controlling the electrical connection (conduction / non-conduction) between the gate of the drive transistor Rdr and the data signal line LD according to the selection signal Si is arranged. Even after the data signal Dj is supplied from the data signal line LD to the gate electrode 121 of the drive transistor Rdr via the switching element that has been turned on, and the switching element is turned off, the gate electrode 121 is also turned on.
Is maintained at a voltage corresponding to the data signal Dj by the capacitive element (holding circuit 441).

(3) Modification 3
In each of the above embodiments, the configuration in which the OLED element is employed as the light emitting element E is illustrated, but the present invention is also applied to various optical heads using other light emitting elements. For example, a light emitting element or a light emitting diode element including a light emitting layer made of an inorganic EL material, field emission (FE: Field)
Emission device, surface-conduction electron emission (SE)
) Devices, ballistic electron surface emitting (BS) devices, and other various light emitting devices can be applied to the present invention.

<D: Application example>
Next, an image forming apparatus is illustrated as one form of equipment using the optical head according to the present invention.
FIG. 10 is a cross-sectional view showing a configuration of an image forming apparatus employing the optical head H according to each of the above embodiments. The image forming apparatus is a tandem-type full-color image forming apparatus, and includes four optical heads H (HK, HC, HM, and HY) according to the above-described form and four photosensitive drums corresponding to each optical head H. 70 (70K, 70C, 70M, 70Y). One optical head H is disposed so as to face the image forming surface (outer peripheral surface) of the corresponding photosensitive drum 70. Note that the subscripts “K”, “C”, “M”, and “Y” of each symbol are used to form each visible image of black (K), cyan (C), magenta (M), and yellow (Y). Means.

As shown in FIG. 10, an endless intermediate transfer belt 72 is wound around the driving roller 711 and the driven roller 712. The four photosensitive drums 70 are arranged around the intermediate transfer belt 72 at a predetermined interval from each other. Each photosensitive drum 70 rotates in synchronization with driving of the intermediate transfer belt 72.

In addition to the optical head H, a corona charger 731 (731K,
731C, 731M, 731Y) and developing unit 732 (732K, 732C, 732M, 732Y)
And are arranged. The corona charger 731 uniformly charges the image forming surface of the photosensitive drum 70 corresponding thereto. Each of the optical heads H exposes this charged image forming surface to form an electrostatic latent image. Each developing device 732 forms a visible image (visible image) on the photosensitive drum 70 by attaching a developer (toner) to the electrostatic latent image.

Each color (black, cyan, magenta, yellow) formed on the photosensitive drum 70 as described above.
Are sequentially transferred (primary transfer) to the surface of the intermediate transfer belt 72 to form a full-color visible image. Inside the intermediate transfer belt 72 are four primary transfer corotrons (transfer devices).
74 (74K, 74C, 74M, 74Y) are arranged. Each primary transfer corotron 74 electrostatically attracts a visible image from the corresponding photosensitive drum 70, thereby the photosensitive drum 7.
The visible image is transferred to the intermediate transfer belt 72 that passes through the gap between 0 and the primary transfer corotron 74.

The sheets (recording material) 75 are fed one by one from the paper feed cassette 762 by the pickup roller 761 and conveyed to the nip between the intermediate transfer belt 72 and the secondary transfer roller 77. The full-color visible image formed on the surface of the intermediate transfer belt 72 is transferred (secondary transfer) to one side of the sheet 75 by the secondary transfer roller 77 and is fixed to the sheet 75 by passing through the fixing roller pair 78. . The paper discharge roller pair 79 discharges the sheet 75 on which the visible image is fixed through the above steps.

Since the image forming apparatus exemplified above uses an OLED element as a light source (exposure means), the apparatus is made smaller than a configuration using a laser scanning optical system. Note that the present invention can also be applied to image forming apparatuses having configurations other than those exemplified above. For example, a rotary development type image forming apparatus, an image forming apparatus that directly transfers a visible image from a photosensitive drum to a sheet without using an intermediate transfer belt, or an image forming that forms a monochrome image The optical head according to the present invention can also be used in the apparatus.

The use of the optical head according to the present invention is not limited to the exposure of the image carrier. For example, the optical head of the present invention is employed in an image reading apparatus as a line-type optical head (illumination device) that irradiates a reading target such as a document with light. As this type of image reading apparatus, there is a scanner, a copying machine or a reading part of a facsimile, a barcode reader, or a two-dimensional image code reader for reading a two-dimensional image code such as a QR code (registered trademark).

1 is a perspective view showing a partial configuration of an image forming apparatus according to a first embodiment. It is a block diagram which shows the electrical structure of an optical head. It is a block diagram which shows the structure of a unit circuit. It is sectional drawing seen from the IV-IV line of FIG. It is a top view which shows the structure of the element arrange | positioned at a 1st board | substrate and a 2nd board | substrate. It is sectional drawing seen from the VI-VI line of FIG. It is sectional drawing seen from the VII-VII line of FIG. It is a block diagram which shows the electric constitution of the optical head which concerns on 2nd Embodiment. It is a top view which shows the structure of the element arrange | positioned at a 1st board | substrate and a 2nd board | substrate. 1 is a cross-sectional view showing a specific form of an image forming apparatus according to the present invention.

Explanation of symbols

H: Optical head, 10: First substrate, 20: Second substrate, 10s, 20s: Opposing surface, 30
…… Anisotropic conductor, 31 …… Conductive particles, 32 …… Adhesive, 41 …… Power line, 42 …… Ground line, 43 …… Shift register, 441 …… Holding circuit, 442 …… Light emission control circuit , 45 ……
Sampling circuit 46... Power supply circuit 47... Control circuit 48.
... Element array part, E ... Light emitting element, L ... Signal line group, LD (LD1 to LDn) ... Data signal line, U (U1 to Un) ... Unit circuit, B (B1 to Bm) ... Block , Ts, Td, Tp1, T
p2: External connection terminal, Q, R: Transistor, Ca1, Ca2, Ca3, Cb1, Cb2, Cb3)
... Connection terminals, 60 ... Condensing lens array, 70 ... Photosensitive drum.

Claims (11)

A first substrate and a second substrate facing each other;
On the surface of the second substrate that faces the first substrate,
A plurality of light emitting elements;
A signal line to which a data signal designating the gradation of each light emitting element is supplied, and
On the surface of the first substrate that faces the second substrate,
A plurality of unit circuits corresponding to each of the light emitting elements;
A selection circuit for sequentially selecting the unit circuits, and
Each of the unit circuits controls light emission of the light emitting element corresponding to the unit circuit based on a data signal acquired from the signal line according to selection by the selection circuit. The signal line extends along a first direction in which the light emitting elements are arranged,
Each of the unit circuits includes a holding circuit that holds a data signal acquired from the signal line, and a light emission control circuit that controls light emission of the light emitting element in accordance with the data signal held by the holding circuit. The optical head according to claim 1, wherein the optical head is arranged along a direction. The first light-emitting elements are arranged on a surface of the second substrate that faces the first substrate.
A first feed line and a second feed line extending in a direction are arranged,
Each of the light emitting elements is disposed on an electrical path connecting the first power supply line and the second power supply line,
The optical head according to claim 1, wherein each of the unit circuits controls a current supplied from the first power supply line to the light emitting element based on a data signal. A first substrate and a second substrate facing each other;
On the surface of the second substrate that faces the first substrate,
A first feed line and a second feed line;
A plurality of light emitting elements on an electrical path connecting the first power supply line and the second power supply line are arranged,
On the surface of the first substrate that faces the second substrate,
A plurality of unit circuits corresponding to each of the light emitting elements;
A selection circuit for sequentially selecting the unit circuits, and
Each of the unit circuits controls a current supplied from the first power supply line to the light emitting element based on a data signal acquired from a signal line according to selection by the selection circuit. The first feed line and the second feed line extend along a first direction in which the light emitting elements are arranged,
Each of the unit circuits includes a holding circuit that holds a data signal acquired from the signal line, and a light emission control circuit that controls light emission of the light emitting element in accordance with the data signal held by the holding circuit. The optical head according to claim 4, wherein the optical head is arranged along a direction. Each unit circuit includes a drive element that is disposed on an electrical path connecting the first power supply line and the light emitting element and controls light emission of the light emitting element according to a data signal,
The driving element of each unit circuit and the light emitting element are electrically connected at a first connection portion,
The first power supply line and the drive element of each unit circuit are electrically connected at a second connection portion,
Each said light emitting element is arrange | positioned in the area | region of the gap | interval of a said 1st connection part and a said 2nd connection part seeing from the direction perpendicular | vertical to the said 2nd board | substrate. Light head. Each light emitting element and each unit circuit overlap,
Each of the light emitting elements includes a first electrode and a second electrode facing each other, and a light emitting layer interposed between the two electrodes. The second electrode of each light emitting element includes the light emitting layer of the light emitting element and the unit circuit. The optical head according to any one of claims 1 to 6, wherein the optical head is interposed therebetween. The optical head according to claim 1, wherein the signal line and the selection circuit overlap each other. The selection circuit extends along a first direction in which the light emitting elements are arranged,
Each unit circuit and each light emitting element are electrically connected at a first connection portion,
9. The optical head according to claim 1, wherein each of the light emitting elements is disposed in a region of a gap between the selection circuit and the first connection portion when viewed from a direction perpendicular to the second substrate. . The signal line extends along a first direction in which the light emitting elements are arranged,
Each unit circuit and each light emitting element are electrically connected at a first connection portion,
9. The optical head according to claim 1, wherein each of the light emitting elements is disposed in a gap region between the signal line and the first connection portion when viewed from a direction perpendicular to the second substrate. . An image carrier on which a latent image is formed by exposure; and
The optical head according to any one of claims 1 to 10, wherein the image carrier is exposed;
An image forming apparatus comprising: a developing unit that forms a visible image by attaching a developer to the latent image of the image carrier.

Images