JP2007208797A - Failure detecting apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a failure detecting apparatus to detect the failure accurately even to a signal processing circuit to treat an analog sound signal without adding a redundant signal for detecting the failure. <P>SOLUTION: To the signal processing circuit including a first processing portion to acquire a first signal by applying a first signal processing to a first input signal and a second processing portion to acquire a second signal by applying the first signal processing to a second input signal, a level difference between the first signal and the second signal is calculated and it is judged, based on the level difference whether the failure is occurring in the first processing portion and the second processing portion or not. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a failure detection apparatus for a signal processing circuit.

  Audio signal and video signal processing devices and transmission devices often use processing such as monitoring the signal state in the process of various signal processing and notifying as an alarm when processing abnormality is found. Among them, the digital processing unit can detect an abnormal state by adding a parity bit. In the case of a video signal, since there is a synchronization signal, an abnormal state can be detected by monitoring the state.

  However, in the case of an analog audio signal, there is nothing that corresponds to a synchronization signal, and there is a silent state depending on the input signal, so it is difficult to accurately monitor its normality.

  As a monitoring method, a method of monitoring the state of a signal before and after a certain processing unit and determining that the processing unit is faulty if it is normal at the previous stage of processing and abnormal at the subsequent stage of processing is considered. However, for example, if the state of the A / D conversion unit is to be monitored, the analog audio signal before the A / D conversion is compared with the digital signal after the A / D conversion, and accurate determination becomes difficult. For example, if there is a threshold for the sound level, if there is sound above a certain level, and if there is no sound below a certain level, it is determined that the A / D section is abnormal if there is sound in the previous stage and no sound in the subsequent stage. Although it is conceivable, an abnormality of a specific bit of a digital signal cannot be detected. Further, when the input signal is silent, there is a problem that it is difficult to determine normality / abnormality.

In recent years, it has been proposed that a pilot signal outside the voice band is added to an analog voice input to monitor the state of the analog voice input including the silent state of the input (for example, a patent) Reference 1). However, this method cannot be applied to the monitoring of different signals such as comparison between the former stage and the latter stage of the A / D converter.
JP-A-8-149094

  The present invention provides a failure detection apparatus capable of accurately detecting a failure without adding a redundant signal for failure detection and also for a signal processing circuit for analog audio signals. It is intended.

  A failure detection apparatus according to the present invention includes a first processing unit that obtains a first signal by performing predetermined signal processing on a first input signal, and a second signal that performs the predetermined signal processing on a second input signal. A failure detection device for a signal processing circuit including a second processing unit to obtain, a subtracting means for obtaining a level difference between the first signal and the second signal, the first processing unit based on the level difference, and Failure determination means for determining whether or not a failure has occurred in the second processing unit.

  In the failure detection apparatus according to the present invention, for each signal processing unit provided for each channel, whether or not a failure has occurred in each signal processing unit is individually determined based on the difference between the processing results. ing. Therefore, it is possible to detect a failure with high accuracy without adding a redundant signal such as a parity bit for the failure detection and also for a signal processing circuit that handles an analog audio signal.

  A first processing unit that performs first signal processing on the first input signal to obtain a first signal; and a second processing unit that performs first signal processing on the second input signal to obtain a second signal. The signal processing circuit obtains a level difference between the first signal and the second signal, and determines whether or not a failure has occurred in the first processing unit and the second processing unit based on the level difference.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is a diagram showing an outline of a transmission system including a failure detection apparatus according to the present invention.

  The transmission system shown in FIG. 1 includes a network 100, an audio signal transmission circuit 200, and an audio signal reception circuit 300.

  The audio signal transmission circuit 200 digitizes the input analog audio signals A1 and A2 for two channels and sends them to the network 100, and detects a failure for each process in the transmission processing unit TX. And a failure detection processing unit FA1 to be performed.

  The transmission processing unit TX includes buffers 1 and 9, A / D converters 2 and 10, and transmission modulation units 3 and 11.

  The buffer 1 amplifies the analog audio signal A1 as desired and outputs an amplified analog audio signal AU1. The A / D converter 2 converts the amplified analog audio signal AU1 into N (N: natural number) bit digital audio data AD1 and outputs it. The transmission modulation unit 3 sends the modulated audio data ADC1 obtained by performing a predetermined transmission modulation process on the audio data AD1 to the network 100.

  The buffer 9 outputs an amplified analog audio signal AU2 obtained by amplifying the analog audio signal A1 or A2 supplied from the selector 8 as desired. The A / D converter 10 converts the amplified analog audio signal AU2 into digital audio data AD2 of N (N: natural number) bits and outputs it. The transmission modulation unit 11 sends the modulated audio data ADC2 obtained by performing a predetermined transmission modulation process on the audio data AD2 to the network 100.

  The buffers 1 and 9 have the same amplification characteristics. The A / D converters 2 and 10 have the same conversion characteristics. The transmission modulators 3 and 11 have the same modulation characteristics.

  The failure detection processing unit FA1 of the audio signal transmission circuit 200 includes the selector 8, the subtractor 16 and the failure determination unit 21 that detect the failure of the buffers 1 and 9, and the subtraction that detects the failure of the A / D converters 2 and 10. And a subtractor 18 and a failure determination unit 23 for detecting a failure of the transmission modulation units 3 and 11.

The selector 8 selectively selects one of the audio signals A1 and A2 indicated by the failure test signal TES _TX and supplies it to the buffer 9. That is, the selector 8 supplies the audio signal A1 to the buffer 9 when the logic level 1 fault test signal TES _TX indicating the fault test mode is supplied, while the logic level 0 fault test signal indicating the normal operation mode. When TES _TX is supplied, the audio signal A2 is supplied to the buffer 9.

  That is, in the normal operation mode, A1 of the input two-channel audio signals A1 and A2 passes through the path including the buffer 1, the A / D converter 2, and the transmission modulation unit 3 to the network 100 as the modulated audio data ADC1. At the same time, the audio signal A2 is sent to the network 100 as modulated audio data ADC2 through a path consisting of the buffer 9, the A / D converter 10 and the transmission modulator 11.

  On the other hand, in the failure test mode, the audio signal A1 is supplied to both the buffers 1 and 9. Therefore, the processing based on the audio signal A1 is simultaneously performed in the path including the buffer 1, the A / D converter 2 and the transmission modulation unit 3, and the path including the buffer 9, the A / D converter 10 and the transmission modulation unit 11. . Therefore, if no failure has occurred in the buffers 1 and 9, the amplified analog audio signals AU1 and AU2 that are the outputs of the buffers 1 and 9 have the same value. If no failure has occurred in the A / D converters 2 and 10, the audio data AD1 and AD2 as the outputs of the A / D converters 2 and 10 have the same value. Furthermore, if no failure has occurred in the transmission modulation units 3 and 10, the modulated audio data ADC1 and ADC2 that are the outputs of the transmission modulation units 3 and 10 have the same value.

  The switching from the normal operation mode to the failure test mode is performed when transmission of the audio signals A1 and A2 to A2 is unnecessary, that is, the buffer 9, the A / D converter 10 and the transmission modulation unit for the audio signal A2. 11 is automatically performed when various signal processing by 11 becomes unnecessary.

The subtractor 16 obtains the difference between the signal levels of the amplified analog audio signals AU1 and AU2 output from the buffers 1 and 9, respectively, and supplies the difference as an error value _GAU to the failure determination unit 21. The failure determination unit 21 obtains an average value of the error values G _AU , and when this average value is smaller than a predetermined first threshold value, a failure detection signal ER _AU of logic level 0 indicating “no failure”, large If it is, a failure detection signal ER _AU of logic level 1 indicating “failure present” is output.

The subtractor 17 obtains a difference between the values of the audio data AD1 and AD2 output from the A / D converters 2 and 10, respectively, and supplies the difference as an error value _GAD to the failure determination unit 22. The failure determination unit 22 detects a failure detection signal ER _AD of a logic level 1 indicating “failure present” when the error value G _AD becomes a value greater than 0 over a predetermined period, and “ A failure detection signal ER _AD of logic level 0 indicating “no failure” is output.

The subtracter 18 obtains a difference between the values of the modulated audio data ADC1 and ADC2 output from the transmission modulation units 3 and 11, respectively, and supplies the difference as an error value _GADC to the failure determination unit 23. The failure determination unit 23 detects a failure detection signal ER _ADC having a logic level 1 indicating “there is a failure” when the error value G _ADC is greater than 0 over a predetermined period of time, and otherwise indicates “ A failure detection signal ER _ADC of logic level 0 indicating “no failure” is output.

According to this configuration, in the failure test mode, the failure state of the buffers 1 and 9 is the failure detection signal ER _AU , the failure state of the A / D converters 2 and 10 is the failure detection signal ER _AD , the transmission modulation unit 3, and Eleven failure states are individually represented by the failure detection signal ER _ADC .

  On the other hand, the audio signal receiving circuit 300 shown in FIG. 1 receives audio data for two channels via the network 100 and converts them into analog audio signals, and a reception processing unit RX in the reception processing unit RX. It comprises a failure detection processing unit FA2 that performs failure detection for each process.

  The reception processing unit RX includes an audio data receiving unit 4, audio data demodulating units 5 and 13, D / A converters 6 and 14, and buffers 7 and 15.

  The audio data receiving unit 4 receives modulated audio data ADC1 and ADC2 for two channels from the network 100, respectively.

  The audio data demodulator 5 outputs audio data ADR1 obtained by demodulating the modulated audio data ADC1. The D / A converter 6 converts the audio data ADR1 into an analog audio signal AUR1 and outputs it. The buffer 7 outputs an audio signal AR1 obtained by amplifying the audio signal AUR1 as desired.

  The audio data demodulator 13 obtains audio data ADR2 by performing demodulation processing on the modulated audio data ADC1 or ADC2 supplied from the selector 12, and outputs this. The D / A converter 14 converts the audio data ADR2 into an analog audio signal AUR2 and outputs it. The buffer 15 outputs the audio signal AUR2 amplified as desired as the audio signal AR2.

  The audio data demodulation units 5 and 13 have the same demodulation characteristics. The D / A converters 6 and 14 have the same conversion characteristics. The buffers 7 and 15 have the same amplification characteristics.

  The failure detection processing unit FA2 of the audio signal receiving circuit 300 includes a selector 12, a subtractor 19 and a failure determination unit 24 for detecting a failure of the audio data demodulation units 5 and 13, and a failure detection of the D / A converters 6 and 14. It comprises a subtractor 20 and a failure determination unit 25.

The selector 12 selectively selects the one indicated by the failure test signal TES _RX from the modulated audio data ADC1 and ADC2, and supplies the selected data to the audio data demodulator 13. In other words, the selector 12 supplies the modulated audio data ADC1 to the audio data demodulator 13 when the logic level 1 failure test signal TES _RX indicating the failure test mode is supplied, while the logic level 0 indicating the normal operation mode. When the failure test signal TES _RX is supplied, the modulated audio data ADC2 is supplied to the audio data demodulator 13.

  That is, in the normal operation mode, ADC1 of the received modulated audio data ADC1 and ADC2 for two channels is output as an audio signal AR1 through a path including the audio data demodulator 5, the D / A converter 6 and the buffer 7. At the same time, the modulated audio data ADC2 is output as an audio signal AR2 through a path including the audio data demodulator 13, the D / A converter 14, and the buffer 15.

  On the other hand, in the failure test mode, the modulated audio data ADC1 is supplied to both the audio data demodulation units 5 and 13. Therefore, the processing based on the modulated audio data ADC1 is performed simultaneously on the path consisting of the audio data demodulation unit 5, the D / A converter 6 and the buffer 7 and the path consisting of the audio data demodulation unit 13, the D / A converter 14 and the buffer 15. Done. Therefore, if no failure has occurred in the audio data demodulation units 5 and 13, the audio data ADR1 and ADR2 that are the outputs of the audio data demodulation units 5 and 13 have the same value. If no failure has occurred in the D / A converters 6 and 14, the audio signals AUR1 and AUR2 that are the outputs of the D / A converters 6 and 14 have the same value.

  Note that switching from the normal operation mode to the failure test mode eliminates the need for various signal processing by the audio data demodulator 13, the D / A converter 14, and the buffer 15 for the ADC2 of the modulated audio data ADC1 and ADC2. Done automatically.

Subtracter 19 is supplied to the malfunction determining unit 24 which calculates the difference between the voice data demodulation unit 5 and the audio data are respectively outputted from the 13 ADR1 and ADR2 each value as the error value G _ADR. The failure determination unit 24 detects a failure detection signal ER _ADR at a logic level 1 indicating “failure present” when the error value G _ADR is greater than 0 over a predetermined period, and “ supplied to the fault judgment processing section 40 a failure detection signal ER _ADR logic level 0 indicating no fault ".

The subtracter 20 obtains the difference between the signal levels of the analog audio signals AUR1 and AUR2 as described above and supplies the difference as an error value G _AUR to the failure determination unit 25. The failure determination unit 25 obtains an average value of the error values G _{AUR, and when} the average value is smaller than a predetermined first threshold value, a failure detection signal ER _AUR of logic level 0 indicating “no failure” If it is, a failure detection signal ER _AUR of logic level 1 indicating “failure present” is supplied to the failure determination processing unit 40.

According to such a configuration, in the failure test mode, the failure state of the audio data demodulation units 5 and 13 is the failure detection signal ER _ADR , and the failure state of the D / A converters 6 and 1 is the failure detection signal ER _{AUR, respectively} . Expressed individually.

  As described above, in FA1 and FA2 in the above-described embodiment, each signal processing unit (buffer, A / D converter, modulation unit, or demodulation unit) provided for each channel in the failure test mode. Then, signal processing based on the same input signal (audio signal) is performed. Then, for each signal processing, whether or not a failure has occurred in each signal processing unit is individually determined based on the difference between the processing results. Therefore, it is possible to detect a failure with high accuracy even when it is applied to a signal processing circuit that handles an analog audio signal without adding a redundant signal such as a parity bit for the failure detection.

  In the above embodiment, the operation of the present invention has been described by way of an example in which the present invention is applied to an apparatus that performs 2-channel audio signal processing. Is equally applicable. That is, a subtracter (16-20) and a failure determination unit (21-25) as shown in FIG. 1 are provided for each process for every two channels for a plurality of input audio signals of three or more channels.

It is a figure which shows the structure of the transmission system carrying the failure detection apparatus by this invention.

Brief description of symbols

8,12 selector
16,17,18,19,20 Subtractor
21,22,23,24,25 Failure judgment part

Claims (6)

A first processing unit that performs a predetermined signal processing on the first input signal to obtain a first signal; and a second processing unit that performs the predetermined signal processing on a second input signal to obtain a second signal. A failure detection device for a signal processing circuit,
Subtracting means for obtaining a level difference between the first signal and the second signal;
And a failure determination unit that determines whether or not a failure has occurred in the first processing unit and the second processing unit based on the level difference.   2. The failure detection apparatus according to claim 1, further comprising means for supplying the first input signal to the second processing unit instead of the second input signal in the failure test mode.   The failure detection apparatus according to claim 1, wherein the first input signal and the second input signal are analog audio signals. A first processing unit that performs first signal processing on a first input signal to obtain a first signal; a second processing unit that performs first signal processing on a second input signal to obtain a second signal; and A signal processing circuit including a third processing unit that performs second signal processing on the first signal to obtain a third signal, and a fourth processing unit that performs second signal processing on the second signal to obtain a fourth signal A fault detection device of
First subtraction means for obtaining a level difference between the first signal and the second signal;
Second subtracting means for obtaining a level difference between the third signal and the fourth signal;
First failure determination means for determining whether a failure has occurred in the first processing section and the second processing section based on the level difference obtained by the first subtraction means;
And second failure determination means for determining whether or not a failure has occurred in the third processing section and the fourth processing section based on the level difference obtained by the second subtraction means. Fault detection device.   5. The failure detection apparatus according to claim 4, further comprising means for supplying the first input signal to the second processing unit instead of the second input signal in the failure test mode.   5. The failure detection apparatus according to claim 4, wherein the first input signal and the second input signal are analog audio signals.

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