JP2007208109A - Led control circuit - Google Patents

Led control circuit Download PDF

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JP2007208109A
JP2007208109A JP2006026887A JP2006026887A JP2007208109A JP 2007208109 A JP2007208109 A JP 2007208109A JP 2006026887 A JP2006026887 A JP 2006026887A JP 2006026887 A JP2006026887 A JP 2006026887A JP 2007208109 A JP2007208109 A JP 2007208109A
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circuit
led
period
dac
control circuit
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Tomohiro Ukai
友弘 鵜飼
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an LED control circuit which alleviates a load on a CPU and adjusts the brightness and brightness gradient of an LED in a free and complicated manner. <P>SOLUTION: Data signals in periods A, B, C, and D are inputted to a DAC circuit 12, in which a period A maintains a minimum output voltage, a period B switches the minimum output voltage to a maximum output voltage with a data signal of a count circuit 11 corresponding to an input clock, a period C maintains the maximum output voltage, and a period D switches the maximum output voltage to a minimum output voltage with a data signal of the count circuit 11. The count circuit 11 repeats counting in the increasing order of the period A, period B, period C, and period D (e.g., counting voltage up and down between the preset minimum and maximum and repeating that counting in a preset number of times). Each period can be changed by selecting and adjusting a clock cycle separately for each operation at a clock selection circuit 10, which enables a complicated variation in a brightness gradient in an increase and decrease of the brightness of the LED. A power voltage supplied to the DAC circuit 12 is supplied from a power supply circuit 13 based on maximum brightness setting data, thus allowing a change in the maximum brightness of the LED. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、LED(Light Emitting Diode)を点滅あるいは点灯させる制御回路に係り、特にLEDの輝度勾配および最大輝度を調整可能なLED制御回路に関するものである。   The present invention relates to a control circuit for blinking or lighting an LED (Light Emitting Diode), and more particularly to an LED control circuit capable of adjusting the luminance gradient and maximum luminance of an LED.

近年、携帯電話のようにLEDを搭載している電子機器は数多く存在している。LEDは点滅あるいは点灯の仕方で情報を伝達する役割を担い、また点滅動作を装飾用としても使用されている。このことから、より自由かつ複雑なLEDの輝度勾配および輝度調節を可能とするLED制御回路が求められている。   In recent years, there are many electronic devices equipped with LEDs such as mobile phones. The LED plays a role of transmitting information in a blinking or lighting manner, and the blinking operation is also used for decoration. For this reason, there is a need for an LED control circuit that enables more free and complex LED brightness gradient and brightness adjustment.

従来のLED制御回路として、PWM方式のLED制御回路が挙げられる。図3は従来のPWM方式によるLED制御回路を示す構成図である。図3に示すように、CPU1から出力され、駆動電流設定デコーダ2に設定されたデータは、PWM回路3において実際の出力電圧を比較される。その比較結果はゲート制御パルスとしてLEDドライバ4のトランジスタ(FET)5のゲート端子に印加される。トランジスタ5はオン時にLED7に電流を流すように接続され、このトランジスタ5のオン/オフ比率を調整することにより、LED7の輝度勾配や輝度調節が高い自由度で設定できる。   As a conventional LED control circuit, a PWM type LED control circuit can be cited. FIG. 3 is a block diagram showing a conventional LED control circuit based on the PWM method. As shown in FIG. 3, the data output from the CPU 1 and set in the drive current setting decoder 2 is compared with the actual output voltage in the PWM circuit 3. The comparison result is applied to the gate terminal of the transistor (FET) 5 of the LED driver 4 as a gate control pulse. The transistor 5 is connected so that a current flows through the LED 7 when it is turned on. By adjusting the on / off ratio of the transistor 5, the brightness gradient and brightness adjustment of the LED 7 can be set with a high degree of freedom.

このようなPWM方式のLED制御回路として、例えば特許文献1や特許文献2のようなLED制御回路がある。特許文献1のLED制御回路は輝度勾配の調整に容量可変回路を用いている。また、特許文献2ではオン/オフ比率の調整にカウンタを用いたLED制御回路が開示されている。
特開2003−264316号公報 特開2004−205669号公報
Examples of such PWM type LED control circuits include LED control circuits such as Patent Document 1 and Patent Document 2. The LED control circuit of Patent Document 1 uses a variable capacitance circuit for adjusting the luminance gradient. Patent Document 2 discloses an LED control circuit that uses a counter to adjust the on / off ratio.
JP 2003-264316 A JP 2004-205669 A

しかしながら、このような構成のPWM方式のLED制御回路では、例えば連続的に負荷電流設定値を変化させてホタルが光るようにLEDを点滅させたい場合、逐次CPUからPWM回路に設定値データを送り続ける必要がある。このためLEDの点滅あるいは点灯の仕方が複雑になるほど、CPUの負担も大きくなるという課題があった。   However, in the PWM type LED control circuit having such a configuration, for example, when it is desired to blink the LED so that the firefly shines by continuously changing the load current set value, the set value data is sequentially sent from the CPU to the PWM circuit. Need to continue. For this reason, there has been a problem that as the method of blinking or lighting the LED becomes more complicated, the burden on the CPU increases.

本発明は、前記背景技術の問題を解決することに指向するものであり、CPUの負担が軽く、より自由かつ複雑なLEDの輝度勾配および輝度調節を可能とするLED制御回路を提供することを目的とする。   The present invention is directed to solving the problems of the background art, and provides an LED control circuit that can reduce the burden on the CPU and can adjust the brightness gradient and brightness of LEDs more freely and complexly. Objective.

前記の目的を達成するために、本発明に係る請求項1に記載したLED制御回路は、第1の入力データに基づいて所定のクロックを選択して出力するクロック選択回路と、クロックに従って所定のデータ信号を生成するカウント回路と、データ信号を入力し、この入力に応じた電圧を出力するDAC(Digital Analog Converter)回路と、DAC回路の出力に応じた電流をLEDに流す電流駆動回路とを備えたことを特徴とする。   In order to achieve the above object, an LED control circuit according to claim 1 of the present invention includes a clock selection circuit that selects and outputs a predetermined clock based on first input data, and a predetermined clock according to the clock. A count circuit that generates a data signal, a DAC (Digital Analog Converter) circuit that inputs a data signal and outputs a voltage corresponding to the input, and a current drive circuit that passes a current corresponding to the output of the DAC circuit to the LED It is characterized by having.

また、DAC回路に第2の入力データに基づいた電源電圧を供給する電源回路を備え、第1の入力データがLEDの輝度勾配を設定するデータであること、第2の入力データがLEDの最大輝度を設定するデータであることを特徴とする。   In addition, the power supply circuit for supplying a power supply voltage based on the second input data to the DAC circuit is provided, the first input data is data for setting the brightness gradient of the LED, and the second input data is the maximum of the LED. It is data for setting brightness.

また、電源回路は、請求項1記載のDAC回路と同じ構成であって、データ信号に代えて第2の入力データを入力すること、カウント回路は、第1の期間ではDAC回路の出力が最小値となり、第2の期間ではDAC回路の出力が最小値から最大値へ順次増加し、第3の期間ではDAC回路の出力が最大値となり、第4の期間ではDAC回路の出力が最大値から最小値へ順次減少するデータ信号を生成し、クロック選択回路は、第1の入力データに応じて複数種類のクロックから第1〜第4の期間に用いるクロックを選択しカウント回路に出力すること、電流駆動回路は、LEDに直列接続されたトランジスタと、LEDに流れる電流を検出する電流検出器と、電流検出器の出力とDAC回路の出力が等しくなるようにトランジスタの制御端子に信号を出力する増幅回路とを備えたことを特徴とする。   The power supply circuit has the same configuration as that of the DAC circuit according to claim 1, the second input data is input instead of the data signal, and the count circuit has a minimum output of the DAC circuit in the first period. The output of the DAC circuit sequentially increases from the minimum value to the maximum value in the second period, the output of the DAC circuit becomes the maximum value in the third period, and the output of the DAC circuit increases from the maximum value in the fourth period. Generating a data signal that sequentially decreases to the minimum value, and the clock selection circuit selects a clock used in the first to fourth periods from a plurality of types of clocks according to the first input data, and outputs the selected clock to the count circuit; The current driving circuit includes a transistor connected in series with the LED, a current detector that detects a current flowing through the LED, and a control terminal of the transistor so that the output of the current detector is equal to the output of the DAC circuit. Characterized by comprising an amplifier circuit which outputs a signal to.

前記構成によれば、CPUのソフトウェアでの制御時間を短くし、LEDの点滅あるいは点灯において、輝度勾配および輝度調節の入力データに基づいたLEDの電流制御ができる。   According to the above configuration, the control time in the CPU software can be shortened, and the LED current can be controlled based on the luminance gradient and the input data for luminance adjustment when the LED is blinking or lighting.

本発明によれば、CPUのソフトウェアでの制御時間が短く、LEDの点滅あるいは点灯において輝度勾配および輝度調節する設定の自由度が高いLED電流の制御ができるという効果を奏する。   According to the present invention, the control time of the CPU software is short, and the LED current can be controlled with a high degree of freedom in setting the brightness gradient and brightness adjustment when the LED is blinking or lighting.

以下、図面を参照して本発明における実施の形態を詳細に説明する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

図1は本発明の実施の形態におけるLED制御回路の構成図である。図1において、図3に示した従来例と同様に、7はLEDであり、トランジスタ5と直列に接続される。9はLED7への電源電圧を供給する第1の基準電圧源である。10はクロック選択回路であり、CPUからの輝度勾配設定データに基づいて所定のクロックを選択して出力する。11はカウント回路であり、入力されたクロックに従ったデータ信号を出力する。12はDAC回路であり、カウント回路11からのデータ信号が入力され、この入力のデータ信号に基づいた電源電圧を出力する。13は電源回路であり、例えば前述のDAC回路12と同様な構成として、CPUから入力された最大輝度設定データに基づいた電源電圧を出力しDAC回路12へ供給する。14は電流駆動回路であり、演算増幅器18とトランジスタ5とから構成される。16は抵抗からなる電流検出器であり、トランジスタ5に流れる電流を検出する。演算増幅器18はDAC回路12の出力電圧と電流検出器16の検出した電圧が入力されてトランジスタ5のゲート端子に電圧を出力する。19は電源回路13への電源電圧を供給する第2の基準電圧源である。   FIG. 1 is a configuration diagram of an LED control circuit according to an embodiment of the present invention. In FIG. 1, as in the conventional example shown in FIG. 3, reference numeral 7 denotes an LED, which is connected in series with the transistor 5. Reference numeral 9 denotes a first reference voltage source that supplies a power supply voltage to the LED 7. A clock selection circuit 10 selects and outputs a predetermined clock based on the luminance gradient setting data from the CPU. A count circuit 11 outputs a data signal according to the input clock. A DAC circuit 12 receives a data signal from the count circuit 11 and outputs a power supply voltage based on the input data signal. Reference numeral 13 denotes a power supply circuit. For example, a power supply voltage based on the maximum luminance setting data input from the CPU is output and supplied to the DAC circuit 12 with the same configuration as the DAC circuit 12 described above. Reference numeral 14 denotes a current driving circuit, which includes an operational amplifier 18 and a transistor 5. Reference numeral 16 denotes a current detector composed of a resistor, which detects a current flowing through the transistor 5. The operational amplifier 18 receives the output voltage of the DAC circuit 12 and the voltage detected by the current detector 16 and outputs a voltage to the gate terminal of the transistor 5. Reference numeral 19 denotes a second reference voltage source that supplies a power supply voltage to the power supply circuit 13.

図2は図1に示した本実施の形態においてLED制御回路によるLED電流を示す動作波形図である。以下に、図1に示したLED制御回路の動作について、図2を用いて説明する。   FIG. 2 is an operation waveform diagram showing the LED current by the LED control circuit in the present embodiment shown in FIG. The operation of the LED control circuit shown in FIG. 1 will be described below with reference to FIG.

また、図2に示すLEDの制御駆動として、最小出力電圧を保持動作する期間Aと、入力のクロックによってカウント回路11から出力のデータ信号に基づき最小出力電圧から1bitずつ桁上がりして最大出力電圧まで切り替わる動作(例えば、3bitのDAC回路の場合[0,0,0]→[0,0,1]→・・・[1,1,0]→[1,1,1])の期間Bと、最大出力電圧の保持動作する期間Cと、前述のカウント回路11のデータ信号に基づき最大出力電圧から1bitずつ桁下がりして最小出力電圧まで切り替わる動作(例えば、3bitのDAC回路の場合[1,1,1]→[1,1,0]→・・・[0,0,1]→[0,0,0])の期間Dの4つの動作からなる。   Further, as a control drive of the LED shown in FIG. 2, a period A during which the minimum output voltage is held, and a maximum output voltage that is carried by 1 bit from the minimum output voltage based on the data signal output from the count circuit 11 by the input clock. Period B (for example, [0,0,0] → [0,0,1] →... [1,1,0] → [1,1,1] in the case of a 3-bit DAC circuit) And a period C during which the maximum output voltage is held, and an operation of switching down to the minimum output voltage by dropping by 1 bit from the maximum output voltage based on the data signal of the count circuit 11 (for example, in the case of a 3-bit DAC circuit [1 , 1, 1] → [1, 1, 0] →... [0, 0, 1] → [0, 0, 0]).

図1のDAC回路12に入力するデータ信号として、以上の4つの動作を期間A→期間B→期間C→期間Dの順で繰り返すようにカウント回路11により設定(例えば、設定された最小値から最大値の間でアップ,ダウンのカウントをして、またこのカウントを設定された回数だけ繰り返す)しておく。また、期間A,期間B,期間C,期間Dの各動作時間はクロックの周期により決まり、何種類か違う周期のクロックを用意しておくことで、クロック選択回路10により期間A,期間B,期間C,期間Dの各動作で個別にクロックの周期を選択できるようにする。このようにすることで期間A,期間B,期間C,期間Dの各動作時間を自由に変化させることが可能となり、LED輝度の上昇および下降の輝度勾配を複雑に変化させることができる。   As the data signal input to the DAC circuit 12 in FIG. 1, the count circuit 11 sets the above four operations in the order of period A → period B → period C → period D (for example, from the set minimum value). Count up or down between the maximum values, and repeat this count a set number of times). Further, the operation times of the period A, the period B, the period C, and the period D are determined by the clock period, and by preparing several types of clocks having different periods, the clock selection circuit 10 causes the period A, the period B, The clock cycle can be individually selected in each operation of period C and period D. By doing in this way, it becomes possible to change each operation time of the period A, the period B, the period C, and the period D freely, and the brightness | luminance gradient of a raise and fall of LED brightness can be changed complicatedly.

また、DAC回路12に供給する電源電圧を、電源回路13によって最大輝度設定データに基づいた出力電圧で供給することによって、DAC回路12の最大出力電圧すなわちLED最大輝度を自由に変化させることが可能となる。   Further, the power supply voltage supplied to the DAC circuit 12 is supplied as an output voltage based on the maximum brightness setting data by the power supply circuit 13, so that the maximum output voltage of the DAC circuit 12, that is, the LED maximum brightness can be freely changed. It becomes.

以上のように、本実施の形態のLED制御回路によるLED電流の調整はカウント回路11により動作管理されるため、一旦、最大輝度設定および輝度勾配設定がなされると、スタートbitの入力によってLED駆動を開始させた後、カウント回路11に設定した動作が完結するまで、CPUはLED設定データを送る必要がなく、従来のPWM方式に比べ格段にCPUの負荷は軽減される。このことにより、CPUへの負担が軽く、自由度の高いLEDの点滅あるいは点灯の制御を実現できる。   As described above, the adjustment of the LED current by the LED control circuit according to the present embodiment is managed by the count circuit 11. Therefore, once the maximum luminance setting and the luminance gradient setting are made, the LED driving is performed by inputting the start bit. The CPU does not need to send the LED setting data until the operation set in the count circuit 11 is completed after starting the operation, and the load on the CPU is remarkably reduced as compared with the conventional PWM method. As a result, it is possible to realize control of blinking or lighting of the LED with a light burden on the CPU and a high degree of freedom.

本発明に係るLED制御回路は、CPUのソフトウェアでの制御時間が短く、LEDの点滅あるいは点灯において輝度勾配および輝度調節する設定の自由度が高いLED電流の制御ができ、LEDの点滅あるいは点灯を調整する制御回路として有用である。   The LED control circuit according to the present invention has a short control time in the CPU software, and can control the LED current with a high degree of freedom in setting the brightness gradient and the brightness adjustment in the blinking or lighting of the LED. This is useful as a control circuit for adjustment.

本発明の実施の形態におけるLED制御回路の構成図The block diagram of the LED control circuit in embodiment of this invention 本実施の形態のLED制御回路によるLED電流を示す動作波形図Operation waveform diagram showing LED current by LED control circuit of this embodiment 従来のLED制御回路の構成図Configuration diagram of conventional LED control circuit

符号の説明Explanation of symbols

1 CPU
2 駆動電流設定デコーダ
3 PWM回路
4 LEDドライバ
5 トランジスタ
7 LED
9,19 基準電圧源
10 クロック選択回路
11 カウント回路
12 DAC回路
13 電源回路
14 電流駆動回路
16 電流検出器
18 演算増幅器
1 CPU
2 Drive current setting decoder 3 PWM circuit 4 LED driver 5 Transistor 7 LED
9, 19 Reference voltage source 10 Clock selection circuit 11 Count circuit 12 DAC circuit 13 Power supply circuit 14 Current drive circuit 16 Current detector 18 Operational amplifier

Claims (7)

第1の入力データに基づいて所定のクロックを選択して出力するクロック選択回路と、前記クロックに従って所定のデータ信号を生成するカウント回路と、前記データ信号を入力し、この入力に応じた電圧を出力するDAC回路と、前記DAC回路の出力に応じた電流をLEDに流す電流駆動回路とを備えたことを特徴とするLED制御回路。   A clock selection circuit that selects and outputs a predetermined clock based on the first input data, a count circuit that generates a predetermined data signal according to the clock, and the data signal are input, and a voltage corresponding to the input is set. An LED control circuit comprising: a DAC circuit for outputting; and a current driving circuit for causing a current corresponding to the output of the DAC circuit to flow through the LED. 前記DAC回路に第2の入力データに基づいた電源電圧を供給する電源回路を備えたことを特徴とする請求項1記載のLED制御回路。   2. The LED control circuit according to claim 1, further comprising a power supply circuit that supplies a power supply voltage based on second input data to the DAC circuit. 前記第1の入力データがLEDの輝度勾配を設定するデータであることを特徴とする請求項1記載のLED制御回路。   2. The LED control circuit according to claim 1, wherein the first input data is data for setting a luminance gradient of the LED. 前記第2の入力データがLEDの最大輝度を設定するデータであることを特徴とする請求項2記載のLED制御回路。   3. The LED control circuit according to claim 2, wherein the second input data is data for setting a maximum luminance of the LED. 前記電源回路は、請求項1記載のDAC回路と同じ構成であって、データ信号に代えて第2の入力データを入力することを特徴とする請求項2または4記載のLED制御回路。   5. The LED control circuit according to claim 2, wherein the power supply circuit has the same configuration as that of the DAC circuit according to claim 1 and inputs second input data instead of a data signal. 前記カウント回路は、第1の期間ではDAC回路の出力が最小値となり、第2の期間では前記DAC回路の出力が最小値から最大値へ順次増加し、第3の期間では前記DAC回路の出力が最大値となり、第4の期間では前記DAC回路の出力が最大値から最小値へ順次減少するデータ信号を生成し、
前記クロック選択回路は、第1の入力データに応じて複数種類のクロックから前記第1〜第4の期間に用いるクロックを選択し前記カウント回路に出力することを特徴とする請求項1記載のLED制御回路。
In the count circuit, the output of the DAC circuit has a minimum value in the first period, the output of the DAC circuit sequentially increases from the minimum value to the maximum value in the second period, and the output of the DAC circuit in the third period. Generates a data signal in which the output of the DAC circuit decreases sequentially from the maximum value to the minimum value in the fourth period,
2. The LED according to claim 1, wherein the clock selection circuit selects a clock used in the first to fourth periods from a plurality of types of clocks according to first input data, and outputs the clock to the count circuit. Control circuit.
前記電流駆動回路は、LEDに直列接続されたトランジスタと、前記LEDに流れる電流を検出する電流検出器と、前記電流検出器の出力とDAC回路の出力が等しくなるように前記トランジスタの制御端子に信号を出力する増幅回路とを備えたことを特徴とする請求項1記載のLED制御回路。   The current drive circuit includes a transistor connected in series with the LED, a current detector that detects a current flowing through the LED, and a control terminal of the transistor so that the output of the current detector is equal to the output of the DAC circuit. The LED control circuit according to claim 1, further comprising an amplifier circuit that outputs a signal.
JP2006026887A 2006-02-03 2006-02-03 Led control circuit Pending JP2007208109A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135138A (en) * 2007-11-28 2009-06-18 Texas Instr Japan Ltd Led driving circuit
JP2013191357A (en) * 2012-03-13 2013-09-26 Sony Corp Light-emitting device, method of controlling light-emitting device, and program

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009135138A (en) * 2007-11-28 2009-06-18 Texas Instr Japan Ltd Led driving circuit
JP2013191357A (en) * 2012-03-13 2013-09-26 Sony Corp Light-emitting device, method of controlling light-emitting device, and program

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