JP2007180695A - Pwm modulation type class d amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress deterioration in characteristic due to interference between PWM modulation type class D amplifiers of a plurality of channels. <P>SOLUTION: A class D amplifier which PWM-modulates an audio signal, places an output driving circuit in operation, and removes higher harmonic components from its output to generate an audio output is configured to perform amplitude modulation in mutually opposite directions by inverting modulation directions of PWM control signals from a PWM modulation control circuit 2 to a plurality of output driving circuits 3 and 4 within one cycle along a time base, or configured to alternately generate outputs, cycle by cycle. Consequently, operation peaks of the output driving circuits 3 and 4 are dispersed and then a load variation quantity is suppressed to reduce characteristic deterioration due to interference between the output driving circuits. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a PWM (Pulse Width Modulation) modulation class D amplifier used in a digital audio amplifier, and more particularly to a circuit that performs a plurality of PWM controls at the same timing, such as stereo audio output.

  In recent years, PWM modulation class D amplifiers have been adopted as digital audio amplifiers, which convert digital signals, change the duty of output rectangular waves with a period much higher than the audible frequency band, and perform PWM modulation to drive output. It is known to obtain an analog output by amplifying power by a circuit and integrating it (see, for example, Patent Document 1). There is also a self-running PWM amplifier that reduces mutual interference between amplifiers and improves distortion rate characteristics (see, for example, Patent Document 2).

  In addition, there is a configuration in which the performance is improved by changing the phase of PWM modulation to suppress the potential fluctuation of the GND and the power supply line (for example, see Patent Document 3).

  FIG. 7 shows a block diagram of a conventional PWM modulation class D amplifier. In FIG. 7, in response to the audio signal from the digital signal unit 1 that outputs the audio signal in the form of a digital signal, the PWM modulation control circuits 2a and 2b create PWM modulation waveforms for driving the output drive circuits 3a and 4a.

The first and second output drive circuits 3a, 4a receive this PWM modulated wave and perform power amplification. The low-pass filters 5 and 6 composed of an inductor and a capacitor are connected so that the harmonic components are removed from the power-amplified PWM modulation waveform and the speakers 7 and 8 are sounded. Generally, the PWM modulation control circuits 2a and 2b are configured to perform the same modulation operation. The output of the audio equipment usually has a stereo configuration, and is output in a plurality of configurations such as an L channel side and an R channel side as shown in FIG.
JP 2000-68835 A JP 2003-110375 A JP 2004-48333 A

  However, in such a conventional PWM modulation class D amplifier, since the current load fluctuations of the output drive circuits 3a and 4a for obtaining power amplification are large, the output voltage of the power supply circuit 9 is swung, so that There has been a drawback that mutual leakage occurs due to fluctuation of the amplitude of the PWM modulation waveform of the channel.

  Therefore, it is necessary to consider that the voltage supply level of the power supply circuit 9 must be very stable, or to reduce the common impedance of the PWM modulation control circuits 2a and 2b and the output drive circuits 3a and 4a. There was a problem that had to be done. In particular, the PWM-modulated output rectangular wave causes amplitude fluctuation in a frequency band much higher than the audible frequency band, so that the load fluctuation of the output drive circuit is stabilized, and the characteristic due to mutual interference between a plurality of class D amplifiers It is difficult to suppress deterioration.

  An object of the present invention is to provide a PWM modulation class D amplifier that reduces a load fluctuation range of an output drive circuit for PWM modulation and suppresses deterioration of characteristics due to mutual interference.

  A PWM modulation class D amplifier according to the first aspect of the present invention is a class D amplifier that outputs a low-frequency signal sound by a PWM control system, and a digital signal unit that outputs an audio signal in the form of a digital signal, and the digital signal A PWM modulation control circuit that receives an output from the unit and generates a PWM modulated PWM control signal for driving a class D audio output circuit, and a first output drive that converts the PWM control signal into power and outputs a PWM waveform Circuit, a second output drive circuit, a first low-pass filter that removes harmonic components from the PWM waveforms of the outputs of the first output drive circuit and the second output drive circuit and passes only the audio frequency band, and And a power supply circuit that supplies a drive current to the output drive circuit, and the PWM modulation control circuit applies to the first output drive circuit. The modulation direction of the PWM control signal to be modulated and the modulation direction of the PWM control signal applied to the second output drive circuit are inverted within one cycle with respect to the time axis so that the pulse width modulation is performed in the opposite direction. The operation peak of the drive circuit is distributed, and the fluctuation of the voltage load of the two can be suppressed to a maximum of half of the conventional one. This reduces the deterioration of characteristics due to mutual interference and reduces the voltage stabilization capability of the power supply circuit.

  In the PWM modulation class D amplifier according to the second aspect of the present invention, the PWM modulation control circuit is applied to the first output drive circuit and the PWM control signal applied to the first output drive circuit. This is characterized in that the PWM control signal to be output is alternately output every cycle, and has the effect that the audio output can be separated without being affected by the state of the modulation degree of one channel.

  According to a third aspect of the present invention, the PWM modulation class D amplifier further comprises a third output drive circuit in the first invention, and the PWM modulation control circuit is configured to transmit a PWM control signal applied to the third output drive circuit. In modulation, a period from a quarter cycle to a quarter cycle is output when there is no modulation, and in the case of plus modulation, from the quarter cycle to the quarter cycle direction and from the third quarter cycle. Modulation is performed by combining with the quarter quarter direction, and in the case of negative modulation, modulation is performed by combining the quarter period to the quarter period direction and the quarter period to the quarter period direction. By applying, the operation peaks of the output drive circuit can be dispersed even in the three sets of multi-channel amplifiers, and the voltage load fluctuations of the three output drive circuits can be suppressed, and the characteristics deteriorate due to the mutual interference of each channel. Reduction and power supply circuit Such an action can be performed to reduce the voltage stabilization capacity.

  The PWM modulation class D amplifier of the present invention is such that the modulation direction of the PWM control signal applied to the two output drive circuits in the two-channel amplifier is amplitude modulated in the reverse direction within one cycle with respect to the time axis. Since the PWM modulation is performed, the operation peak of the output drive circuit is dispersed, and the fluctuation of the voltage load of the two can be suppressed to a maximum of half of the conventional one, and can be expanded to multiple channels. Therefore, there are obtained advantageous effects that it is possible to reduce the deterioration of characteristics due to mutual interference among a plurality of channels and to reduce the voltage stabilization capability of the power supply circuit.

  Hereinafter, the best mode for carrying out the PWM modulation class D amplifier of the present invention will be described in detail with reference to FIGS.

(Embodiment 1)
FIG. 1 is a block diagram of a PWM modulation class D amplifier according to the first embodiment of the present invention, FIG. 2 is an explanatory diagram showing the PWM waveform in the first embodiment, and FIG. FIG. 4 is an explanatory diagram showing the load fluctuation amount at the time of modulation in the first embodiment.

  In FIG. 1, a digital signal unit 1 outputs an audio signal in the form of a digital signal. The PWM modulation control circuit 2 receives the output from the digital signal unit 1 and generates a PWM-modulated control signal for driving the class D audio output circuit. The first output drive circuit 3 converts the power of the PWM control signal to drive the speaker. Similarly, the second output drive circuit 4 converts the power of the PWM control signal and outputs a PWM waveform. The first low-pass filter 5 and the second low-pass filter 6 remove harmonic components from the PWM waveform and pass only the audio frequency band. The first speaker 7 and the second speaker 8 convert the audio output that has passed through the low-pass filters 5 and 6 into sound and output the sound. The power supply circuit 9 supplies a drive current to each of the output drive circuits 3 and 4.

  The operation of the PWM modulation class D amplifier of this embodiment configured as described above will be described below. The output of the audio equipment is usually a stereo configuration, and is configured by a plurality of output drive circuits in order to output the L channel side and the R channel side. In this embodiment, the first PWM signal 11a is an L channel signal, and the second PWM signal 11b is an R channel signal. The PWM modulation waveform sent to the plurality of output drive circuits is shown in FIG. PWM modulation is a modulation method that determines the degree of modulation by changing the pulse width within a certain period width. Assuming that the position where the duty ratio is 50% in which the plus amount and minus amount are balanced is 0%, the first PWM signal shown in the waveform 11a outputs a positive voltage at the minus modulation portion toward the left of the time axis. The voltage output is set to stop when switching to the plus modulation via the modulation degree 0%. On the other hand, the second PWM signal indicated by 11b stops the voltage output at the time of positive modulation toward the left of the time axis, and switches to negative modulation via a modulation degree of 0%. Output. In other words, the output of the PWM modulation control circuit 2 is controlled so that the modulation is performed with the direction reversed with respect to the time axis centered on 50% (modulation degree 0%) within one period of the PWM modulation. I do.

  As a comparison, FIG. 2A shows a conventional PWM waveform. This shows the modulation directions of the first PWM signal 10a and the second PWM signal 10b in FIG. As can be seen from this figure, the modulation direction of the PWM signal 11a and the PWM signal 11b in FIG. 2B is the time of the modulation direction of the PWM signal 10a and the PWM signal 10b in FIG. It can be said that the directions are opposite to each other.

  FIG. 3 shows the first and second PWM signals in one cycle in the PWM control when the modulation degree is fixed at 0% (duty ratio is 50%) and the load fluctuation amount of the output drive circuit current corresponding thereto. In the conventional PWM control signal application method shown in FIG. 3A, the first PWM signal (voltage) is 12a and the second PWM signal (voltage) is 12b in the first half cycle. The PWM signals 12a and 12b are both positive voltage outputs. During this period, both the output drive circuit 3a and the output drive circuit 4a pass drive current, so the power supply circuit 9 needs to supply two currents. . Further, in the subsequent half cycle, neither the first PWM signal 12a nor the second PWM signal 12b outputs, so the power supply circuit 9 does not need to supply current. In this way, a load fluctuation amount having a height indicated by the load fluctuation quantity 12c is generated. On the other hand, when the first PWM signal is 13a and the second PWM signal is 13b as shown in FIG. 3B, the mutual modulation directions are reversed, so that the waveform 13c of FIG. As shown, the load fluctuation amount is within the range of 1/2 of 12c in FIG. 3 (a) even in relative value, and when the modulation degree is fixed at 0% (duty ratio 50%), as shown in the waveform 13c. No load fluctuation will occur.

  As the modulation degree of the audio signal varies, various combinations of actual PWM modulation waveforms are generated. FIG. 4 illustrates and explains the first PWM signal and the second PWM signal as an example, and the load fluctuation amount at that time. Waveforms 14a to 14c in FIG. 4A are waveforms and waveforms 15a to 15c when the second PWM signal is not modulated and the modulation degree of the first PWM signal is gradually lowered from 0 in the conventional modulation state. Are waveforms when the PWM signal 2 is not modulated and the modulation degree of the PWM signal 1 is gradually increased from 0 in the conventional modulation state, and the waveforms 16a to 16c in FIG. 4B are the modulation state of the present invention. The waveforms when the second PWM signal 16b is not modulated and the modulation degree of the first PWM signal 16a is gradually lowered from 0, the waveforms 17a to 17c are the second PWM signal 17b in the modulation state of the present invention. Shows a waveform when the modulation degree of the first PWM signal 17a is gradually increased from 0 with no modulation. When only the first or second PWM signal is applied and the wave height of the output drive circuit current excluding the transient state is 1, respectively, in the conventional modulation system, the load fluctuation amount waveforms 14c and 15c are also obtained. As can be seen, an output drive circuit current having a height of 0 to 1 is generated as the wave height of the output drive circuit current. At this time, an abrupt fluctuation amount occurs in the output drive circuit current from 0 to the wave height 2 or from the wave height 2 to 0. However, as shown in the load fluctuation amount of FIG. 4B, the fluctuation width of the output drive circuit currents 16c and 17c is the output drive circuit current corresponding to one wave height up and down around the output drive circuit current value for one wave height. It can be limited only to the fluctuation range.

  As described above, according to this embodiment, the fluctuation of the output drive circuit current can be suppressed to a half of the conventional value at the maximum, so that the mutual interference between the first output drive circuit and the second output drive circuit. It is possible to prevent the characteristic deterioration due to the above, and to reduce the mutual leakage due to the fluctuation of the amplitude of the PWM modulation waveform of the other channel, and to obtain the required linear output. Furthermore, even if the supply capability of the power supply circuit 9 is simple, it can be used as a power supply circuit.

(Embodiment 2)
FIG. 5 is an explanatory diagram showing a PWM waveform in the second embodiment of the present invention. In FIG. 5, one cycle of PWM control is divided, and the output of the first PWM signal 18a is output in the first 1/2 cycle range, and the second PWM signal 18b is output in the later 1/2 cycle range. The output is controlled to be performed independently. The first PWM signal 18a has a center position of the first 1/2 cycle, that is, a 1/4 cycle position, with a modulation degree of 0%. Modulation is performed using a 4 to 2/4 period portion. The second PWM signal 18b has a center position of the subsequent 1/2 cycle, that is, a 3/4 cycle position, with a modulation degree of 0%, and a 3/4 to 4/4 cycle portion at the time of negative modulation, and at the time of positive modulation. Modulation is performed using a 3/4 to 2/4 period portion. The block diagram of the PWM modulation class D amplifier is the same as in FIG. 1 of the first embodiment, and the operation of the PWM modulation control circuit 2 is as described above.

  In other words, the PWM control signal to be applied to the first output drive circuit 3 and the PWM control signal to be applied to the second output drive circuit 4 are alternately output every one cycle, and are performed simultaneously. As in the first embodiment, the plus and minus modulation directions are opposite to each other.

  As described above, according to the present embodiment, no current is supplied from the current supply circuit 9 to the first output drive circuit 3 and the second output drive circuit 4 simultaneously. Thus, no mutual interference with the two output drive circuits occurs. In the case of this embodiment, one cycle of PWM control is divided into two and assigned to each output, so the dynamic range is half that of the case where one cycle is used. When performing this PWM control, it is necessary to set in consideration of the required output.

(Embodiment 3)
FIG. 6 is an explanatory diagram showing PWM control waveforms according to the third embodiment of the present invention. Although illustration of the block diagram is omitted, in the case of using three output drive circuits, the first PWM signal 19a has a time axis with 1/2 of one cycle of PWM control as a modulation degree 0 (duty ratio 50%). The negative modulation portion heading leftward is set to output a positive voltage and to stop the voltage output when switched to positive modulation via a modulation degree of 0%. On the other hand, the second PWM signal shown in the waveform 19b is positive when the voltage output is stopped at the time of positive modulation toward the left of the time axis and switched to negative modulation via the modulation degree 0%. Perform voltage output.

  As shown by 19c in FIG. 6, the third PWM signal is a composite portion using the 0 to 1/4 period and the 3/4 to 4/4 period part during plus modulation, and 1/1 during minus modulation. The PWM modulation is performed by the composite portion using the 4-2 / 4 period and the 2 / 4-3 / 4 period portion.

  According to the present embodiment, the conventional control method generates a load fluctuation amount corresponding to a total of three output drive circuits at the maximum, but in this embodiment, even if the number of output drive circuits is three, The load fluctuation amount can be reduced to 3.

  In each of the above embodiments, the speaker is provided and the sound output is obtained. However, the output low-frequency signal can be used for controlling various devices in addition to the control circuit.

  The PWM modulation class D amplifier of the present invention can improve the characteristics of the class D amplifier and reduce power consumption by stabilizing the amount of load fluctuation applied to the power supply circuit and reducing the mutual interference between channels. It can also be applied to various audio devices and control devices using PWM control.

Block diagram of PWM modulation class D amplifier according to first and second embodiments of the present invention Explanatory drawing which shows the PWM waveform in Embodiment 1 of this invention Explanatory drawing which shows the load fluctuation amount at the time of non-modulation in Embodiment 1 of this invention Explanatory drawing which shows the load fluctuation amount at the time of the modulation | alteration in Embodiment 1 of this invention Explanatory drawing which shows the PWM waveform in Embodiment 2 of this invention Explanatory drawing which shows the PWM waveform in Embodiment 3 of this invention Block diagram of a conventional PWM modulation class D amplifier

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Digital signal part 2 PWM modulation control circuit 3 1st output drive circuit 4 2nd output drive circuit 5 1st low-pass filter 6 2nd low-pass filter 7 1st speaker 8 2nd speaker 9 Power supply circuit 11a First PWM signal 11b in the first embodiment of the present invention Second PWM signal 13a in the first embodiment Similarly First PWM signal 13b in the first embodiment Similarly second PWM signal 13c in the first embodiment Similarly, the load fluctuation amount 16a in the first embodiment 16a The first PWM signal 16b in the state in which the modulation degree in the first embodiment is reduced from 0. The second PWM signal 16c in the first embodiment having the modulation degree of 0 percent. Load fluctuation amount in the state where one of the modulation degrees in the first embodiment is reduced 17a The first PWM signal 17b in the state in which the modulation degree in the first form is increased from 0. Similarly, the second PWM signal 17c in the state in which the modulation degree in the first embodiment is set to 0 percent. Load fluctuation amount 18a in the raised state Similarly the first PWM signal 18b in the second embodiment Similarly the second PWM signal 19a in the second embodiment 19a Similarly the first PWM signal 19b in the third embodiment Similarly, the second PWM signal 19c in the third embodiment The third PWM signal in the third embodiment

Claims (3)

A class D amplifier that outputs a low-frequency signal by a PWM control method,
A digital signal section for outputting an audio signal in the form of a digital signal;
A PWM modulation control circuit that receives an output from the digital signal unit and generates a PWM modulated PWM control signal for driving a class D audio output circuit;
A first output drive circuit and a second output drive circuit for converting a PWM control signal into power and outputting a PWM waveform;
A first low-pass filter and a second low-pass filter that remove harmonic components from the PWM waveforms of the outputs of the first output drive circuit and the second output drive circuit and pass only the audio frequency band;
A power supply circuit for supplying a drive current to the output drive circuit,
The PWM modulation control circuit inverts the modulation direction of the PWM control signal applied to the first output drive circuit and the modulation direction of the PWM control signal applied to the second output drive circuit within one cycle with respect to the time axis. And a PWM modulation class D amplifier, wherein the modulation is performed so that the pulse width modulation is performed in opposite directions. 2. The PWM modulation control circuit alternately outputs a PWM control signal applied to a first output drive circuit and a PWM control signal applied to a second output drive circuit for each cycle. The PWM modulation class D amplifier as described. The PWM modulation control circuit further includes a third output drive circuit. The PWM modulation control circuit modulates the PWM control signal applied to the third output drive circuit from a quarter period to a three-quarter period when there is no modulation. In the case of plus modulation, modulation is applied by combining the quarter period to the quarter period direction and the three quarter period to the quarter period direction, and in the case of minus modulation, 2. The PWM modulation class D amplifier according to claim 1, wherein the modulation is performed by a combination of a quarter period to a quarter period direction and a three quarter period to a quarter period direction.

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